1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the drm device driver. This driver provides support for the
4 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
6 # Add a set of useful warning flags and enable -Werror for CI to prevent
7 # trivial mistakes from creeping in. We have to do this piecemeal as we reject
8 # any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9 # need to filter out dubious warnings. Still it is our interest
10 # to keep running locally with W=1 C=1 until we are completely clean.
12 # Note the danger in using -Wall -Wextra is that when CI updates gcc we
13 # will most likely get a sudden build breakage... Hopefully we will fix
14 # new warnings before CI updates!
15 subdir-ccflags-y := -Wall -Wextra
16 subdir-ccflags-y += -Wno-format-security
17 subdir-ccflags-y += -Wno-unused-parameter
18 subdir-ccflags-y += -Wno-type-limits
19 subdir-ccflags-y += -Wno-missing-field-initializers
20 subdir-ccflags-y += -Wno-sign-compare
21 subdir-ccflags-y += -Wno-shift-negative-value
22 subdir-ccflags-y += $(call cc-option, -Wunused-but-set-variable)
23 subdir-ccflags-y += $(call cc-disable-warning, frame-address)
24 subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
26 # Fine grained warnings disable
27 CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
28 CFLAGS_display/intel_display_device.o = $(call cc-disable-warning, override-init)
29 CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
31 # Support compiling the display code separately for both i915 and xe
32 # drivers. Define I915 when building i915.
33 subdir-ccflags-y += -DI915
35 subdir-ccflags-y += -I$(srctree)/$(src)
37 # Please keep these build lists sorted!
40 i915-y += i915_driver.o \
55 intel_clock_gating.o \
57 intel_memory_region.o \
68 # core peripheral code
79 i915_sw_fence_work.o \
81 i915_user_extensions.o
83 i915-$(CONFIG_COMPAT) += i915_ioc32.o
84 i915-$(CONFIG_DEBUG_FS) += \
86 i915_debugfs_params.o \
87 display/intel_display_debugfs.o \
88 display/intel_pipe_crc.o
89 i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
91 # "Graphics Technology" (aka we talk to the gpu)
96 gt/gen7_renderclear.o \
99 gt/intel_breadcrumbs.o \
101 gt/intel_context_sseu.o \
102 gt/intel_engine_cs.o \
103 gt/intel_engine_heartbeat.o \
104 gt/intel_engine_pm.o \
105 gt/intel_engine_user.o \
106 gt/intel_execlists_submission.o \
108 gt/intel_ggtt_fencing.o \
110 gt/intel_gt_buffer_pool.o \
111 gt/intel_gt_clock_utils.o \
112 gt/intel_gt_debugfs.o \
113 gt/intel_gt_engines_debugfs.o \
117 gt/intel_gt_pm_debugfs.o \
118 gt/intel_gt_pm_irq.o \
119 gt/intel_gt_requests.o \
120 gt/intel_gt_sysfs.o \
121 gt/intel_gt_sysfs_pm.o \
129 gt/intel_region_lmem.o \
130 gt/intel_renderstate.o \
133 gt/intel_ring_submission.o \
135 gt/intel_sa_media.o \
137 gt/intel_sseu_debugfs.o \
138 gt/intel_timeline.o \
141 gt/intel_workarounds.o \
145 # x86 intel-gtt module support
146 gt-$(CONFIG_X86) += gt/intel_ggtt_gmch.o
147 # autogenerated null render state
149 gt/gen6_renderstate.o \
150 gt/gen7_renderstate.o \
151 gt/gen8_renderstate.o \
152 gt/gen9_renderstate.o
155 # GEM (Graphics Execution Management) code
157 gem/i915_gem_busy.o \
158 gem/i915_gem_clflush.o \
159 gem/i915_gem_context.o \
160 gem/i915_gem_create.o \
161 gem/i915_gem_dmabuf.o \
162 gem/i915_gem_domain.o \
163 gem/i915_gem_execbuffer.o \
164 gem/i915_gem_internal.o \
165 gem/i915_gem_object.o \
166 gem/i915_gem_lmem.o \
167 gem/i915_gem_mman.o \
168 gem/i915_gem_pages.o \
169 gem/i915_gem_phys.o \
171 gem/i915_gem_region.o \
172 gem/i915_gem_shmem.o \
173 gem/i915_gem_shrinker.o \
174 gem/i915_gem_stolen.o \
175 gem/i915_gem_throttle.o \
176 gem/i915_gem_tiling.o \
178 gem/i915_gem_ttm_move.o \
179 gem/i915_gem_ttm_pm.o \
180 gem/i915_gem_userptr.o \
181 gem/i915_gem_wait.o \
195 i915_trace_points.o \
196 i915_ttm_buddy_manager.o \
200 # general-purpose microcontroller (GuC) support
202 gt/uc/intel_gsc_fw.o \
203 gt/uc/intel_gsc_proxy.o \
204 gt/uc/intel_gsc_uc.o \
205 gt/uc/intel_gsc_uc_debugfs.o \
206 gt/uc/intel_gsc_uc_heci_cmd_submit.o \
208 gt/uc/intel_guc_ads.o \
209 gt/uc/intel_guc_capture.o \
210 gt/uc/intel_guc_ct.o \
211 gt/uc/intel_guc_debugfs.o \
212 gt/uc/intel_guc_fw.o \
213 gt/uc/intel_guc_hwconfig.o \
214 gt/uc/intel_guc_log.o \
215 gt/uc/intel_guc_log_debugfs.o \
216 gt/uc/intel_guc_rc.o \
217 gt/uc/intel_guc_slpc.o \
218 gt/uc/intel_guc_submission.o \
220 gt/uc/intel_huc_debugfs.o \
221 gt/uc/intel_huc_fw.o \
223 gt/uc/intel_uc_debugfs.o \
226 # graphics system controller (GSC) support
227 i915-y += gt/intel_gsc.o
229 # graphics hardware monitoring (HWMON) support
230 i915-$(CONFIG_HWMON) += i915_hwmon.o
232 # modesetting core code
235 display/intel_atomic.o \
236 display/intel_atomic_plane.o \
237 display/intel_audio.o \
238 display/intel_bios.o \
240 display/intel_cdclk.o \
241 display/intel_color.o \
242 display/intel_combo_phy.o \
243 display/intel_connector.o \
244 display/intel_crtc.o \
245 display/intel_crtc_state_dump.o \
246 display/intel_cursor.o \
247 display/intel_display.o \
248 display/intel_display_driver.o \
249 display/intel_display_irq.o \
250 display/intel_display_power.o \
251 display/intel_display_power_map.o \
252 display/intel_display_power_well.o \
253 display/intel_display_reset.o \
254 display/intel_display_rps.o \
255 display/intel_display_wa.o \
256 display/intel_dmc.o \
257 display/intel_dpio_phy.o \
258 display/intel_dpll.o \
259 display/intel_dpll_mgr.o \
260 display/intel_dpt.o \
261 display/intel_drrs.o \
262 display/intel_dsb.o \
264 display/intel_fb_pin.o \
265 display/intel_fbc.o \
266 display/intel_fdi.o \
267 display/intel_fifo_underrun.o \
268 display/intel_frontbuffer.o \
269 display/intel_global_state.o \
270 display/intel_hdcp.o \
271 display/intel_hdcp_gsc.o \
272 display/intel_hotplug.o \
273 display/intel_hotplug_irq.o \
274 display/intel_hti.o \
275 display/intel_link_bw.o \
276 display/intel_load_detect.o \
277 display/intel_lpe_audio.o \
278 display/intel_modeset_lock.o \
279 display/intel_modeset_verify.o \
280 display/intel_modeset_setup.o \
281 display/intel_overlay.o \
282 display/intel_pch_display.o \
283 display/intel_pch_refclk.o \
284 display/intel_plane_initial.o \
285 display/intel_pmdemand.o \
286 display/intel_psr.o \
287 display/intel_quirks.o \
288 display/intel_sprite.o \
289 display/intel_sprite_uapi.o \
291 display/intel_vblank.o \
292 display/intel_vga.o \
294 display/i9xx_plane.o \
296 display/skl_scaler.o \
297 display/skl_universal_plane.o \
298 display/skl_watermark.o
299 i915-$(CONFIG_ACPI) += \
300 display/intel_acpi.o \
301 display/intel_opregion.o
302 i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
303 display/intel_fbdev.o
305 # modesetting output/encoder code
307 display/dvo_ch7017.o \
308 display/dvo_ch7xxx.o \
310 display/dvo_ns2501.o \
311 display/dvo_sil164.o \
312 display/dvo_tfp410.o \
316 display/intel_backlight.o \
317 display/intel_crt.o \
318 display/intel_cx0_phy.o \
319 display/intel_ddi.o \
320 display/intel_ddi_buf_trans.o \
321 display/intel_display_device.o \
322 display/intel_display_trace.o \
323 display/intel_dkl_phy.o \
325 display/intel_dp_aux.o \
326 display/intel_dp_aux_backlight.o \
327 display/intel_dp_hdcp.o \
328 display/intel_dp_link_training.o \
329 display/intel_dp_mst.o \
330 display/intel_dsi.o \
331 display/intel_dsi_dcs_backlight.o \
332 display/intel_dsi_vbt.o \
333 display/intel_dvo.o \
334 display/intel_gmbus.o \
335 display/intel_hdmi.o \
336 display/intel_lspcon.o \
337 display/intel_lvds.o \
338 display/intel_panel.o \
339 display/intel_pps.o \
340 display/intel_qp_tables.o \
341 display/intel_sdvo.o \
342 display/intel_snps_phy.o \
344 display/intel_vdsc.o \
345 display/intel_vrr.o \
347 display/vlv_dsi_pll.o
349 i915-y += i915_perf.o
351 # Protected execution platform (PXP) support. Base support is required for HuC
354 pxp/intel_pxp_tee.o \
357 i915-$(CONFIG_DRM_I915_PXP) += \
358 pxp/intel_pxp_cmd.o \
359 pxp/intel_pxp_debugfs.o \
360 pxp/intel_pxp_gsccs.o \
361 pxp/intel_pxp_irq.o \
363 pxp/intel_pxp_session.o
365 # Post-mortem debug and GPU hang state capture
366 i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
367 i915-$(CONFIG_DRM_I915_SELFTEST) += \
368 gem/selftests/i915_gem_client_blt.o \
369 gem/selftests/igt_gem_utils.o \
370 selftests/intel_scheduler_helpers.o \
371 selftests/i915_random.o \
372 selftests/i915_selftest.o \
373 selftests/igt_atomic.o \
374 selftests/igt_flush_test.o \
375 selftests/igt_live_test.o \
376 selftests/igt_mmap.o \
377 selftests/igt_reset.o \
378 selftests/igt_spinner.o \
382 i915-y += i915_vgpu.o
384 i915-$(CONFIG_DRM_I915_GVT) += \
386 intel_gvt_mmio_table.o
387 include $(src)/gvt/Makefile
389 obj-$(CONFIG_DRM_I915) += i915.o
390 obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o
394 # Enable locally for CONFIG_DRM_I915_WERROR=y. See also scripts/Makefile.build
395 ifdef CONFIG_DRM_I915_WERROR
396 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none -Werror $<
401 # exclude some broken headers from the test coverage
403 display/intel_vbt_defs.h
405 always-$(CONFIG_DRM_I915_WERROR) += \
406 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
407 $(shell cd $(srctree)/$(src) && find * -name '*.h')))
409 quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
410 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; \
411 $(srctree)/scripts/kernel-doc -none -Werror $<; touch $@
413 $(obj)/%.hdrtest: $(src)/%.h FORCE
414 $(call if_changed_dep,hdrtest)