2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
5 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/clk.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/pinctrl/consumer.h>
26 #include <drm/drm_crtc.h>
27 #include <drm/drm_crtc_helper.h>
30 #include <video/videomode.h>
32 #include "atmel_hlcdc_dc.h"
35 * Atmel HLCDC CRTC structure
37 * @base: base DRM CRTC structure
38 * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
39 * @event: pointer to the current page flip event
40 * @id: CRTC id (returned by drm_crtc_index)
41 * @enabled: CRTC state
43 struct atmel_hlcdc_crtc {
45 struct atmel_hlcdc_dc *dc;
46 struct drm_pending_vblank_event *event;
51 static inline struct atmel_hlcdc_crtc *
52 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
54 return container_of(crtc, struct atmel_hlcdc_crtc, base);
57 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
59 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
60 struct regmap *regmap = crtc->dc->hlcdc->regmap;
61 struct drm_display_mode *adj = &c->state->adjusted_mode;
62 unsigned long mode_rate;
68 vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
69 vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
70 vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
71 vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
72 vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
73 vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
75 regmap_write(regmap, ATMEL_HLCDC_CFG(1),
76 (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
78 regmap_write(regmap, ATMEL_HLCDC_CFG(2),
79 (vm.vfront_porch - 1) | (vm.vback_porch << 16));
81 regmap_write(regmap, ATMEL_HLCDC_CFG(3),
82 (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
84 regmap_write(regmap, ATMEL_HLCDC_CFG(4),
85 (adj->crtc_hdisplay - 1) |
86 ((adj->crtc_vdisplay - 1) << 16));
90 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
91 mode_rate = adj->crtc_clock * 1000;
92 if ((prate / 2) < mode_rate) {
94 cfg |= ATMEL_HLCDC_CLKSEL;
97 div = DIV_ROUND_UP(prate, mode_rate);
101 cfg |= ATMEL_HLCDC_CLKDIV(div);
103 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
104 ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
105 ATMEL_HLCDC_CLKPOL, cfg);
109 if (adj->flags & DRM_MODE_FLAG_NVSYNC)
110 cfg |= ATMEL_HLCDC_VSPOL;
112 if (adj->flags & DRM_MODE_FLAG_NHSYNC)
113 cfg |= ATMEL_HLCDC_HSPOL;
115 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
116 ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
117 ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
118 ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
119 ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
120 ATMEL_HLCDC_GUARDTIME_MASK,
124 static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
126 struct drm_device *dev = c->dev;
127 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
128 struct regmap *regmap = crtc->dc->hlcdc->regmap;
134 drm_crtc_vblank_off(c);
136 pm_runtime_get_sync(dev->dev);
138 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
139 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
140 (status & ATMEL_HLCDC_DISP))
143 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
144 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
145 (status & ATMEL_HLCDC_SYNC))
148 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
149 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
150 (status & ATMEL_HLCDC_PIXEL_CLK))
153 clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
154 pinctrl_pm_select_sleep_state(dev->dev);
156 pm_runtime_allow(dev->dev);
158 pm_runtime_put_sync(dev->dev);
160 crtc->enabled = false;
163 static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
165 struct drm_device *dev = c->dev;
166 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
167 struct regmap *regmap = crtc->dc->hlcdc->regmap;
173 pm_runtime_get_sync(dev->dev);
175 pm_runtime_forbid(dev->dev);
177 pinctrl_pm_select_default_state(dev->dev);
178 clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
180 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
181 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
182 !(status & ATMEL_HLCDC_PIXEL_CLK))
186 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
187 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
188 !(status & ATMEL_HLCDC_SYNC))
191 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
192 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
193 !(status & ATMEL_HLCDC_DISP))
196 pm_runtime_put_sync(dev->dev);
198 drm_crtc_vblank_on(c);
200 crtc->enabled = true;
203 void atmel_hlcdc_crtc_suspend(struct drm_crtc *c)
205 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
208 atmel_hlcdc_crtc_disable(c);
209 /* save enable state for resume */
210 crtc->enabled = true;
214 void atmel_hlcdc_crtc_resume(struct drm_crtc *c)
216 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
219 crtc->enabled = false;
220 atmel_hlcdc_crtc_enable(c);
224 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
225 struct drm_crtc_state *s)
227 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
229 if (atmel_hlcdc_dc_mode_valid(crtc->dc, &s->adjusted_mode) != MODE_OK)
232 return atmel_hlcdc_plane_prepare_disc_area(s);
235 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
236 struct drm_crtc_state *old_s)
238 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
240 if (c->state->event) {
241 c->state->event->pipe = drm_crtc_index(c);
243 WARN_ON(drm_crtc_vblank_get(c) != 0);
245 crtc->event = c->state->event;
246 c->state->event = NULL;
250 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,
251 struct drm_crtc_state *old_s)
253 /* TODO: write common plane control register if available */
256 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
257 .mode_set = drm_helper_crtc_mode_set,
258 .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
259 .mode_set_base = drm_helper_crtc_mode_set_base,
260 .disable = atmel_hlcdc_crtc_disable,
261 .enable = atmel_hlcdc_crtc_enable,
262 .atomic_check = atmel_hlcdc_crtc_atomic_check,
263 .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
264 .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
267 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
269 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
275 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
277 struct drm_device *dev = crtc->base.dev;
280 spin_lock_irqsave(&dev->event_lock, flags);
282 drm_send_vblank_event(dev, crtc->id, crtc->event);
283 drm_vblank_put(dev, crtc->id);
286 spin_unlock_irqrestore(&dev->event_lock, flags);
289 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
291 drm_handle_vblank(c->dev, 0);
292 atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
295 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
296 .page_flip = drm_atomic_helper_page_flip,
297 .set_config = drm_atomic_helper_set_config,
298 .destroy = atmel_hlcdc_crtc_destroy,
299 .reset = drm_atomic_helper_crtc_reset,
300 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
301 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
304 int atmel_hlcdc_crtc_create(struct drm_device *dev)
306 struct atmel_hlcdc_dc *dc = dev->dev_private;
307 struct atmel_hlcdc_planes *planes = dc->planes;
308 struct atmel_hlcdc_crtc *crtc;
312 crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
318 ret = drm_crtc_init_with_planes(dev, &crtc->base,
319 &planes->primary->base,
320 planes->cursor ? &planes->cursor->base : NULL,
321 &atmel_hlcdc_crtc_funcs, NULL);
325 crtc->id = drm_crtc_index(&crtc->base);
328 planes->cursor->base.possible_crtcs = 1 << crtc->id;
330 for (i = 0; i < planes->noverlays; i++)
331 planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
333 drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
334 drm_crtc_vblank_reset(&crtc->base);
336 dc->crtc = &crtc->base;
341 atmel_hlcdc_crtc_destroy(&crtc->base);