2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include "pp_instance.h"
28 #include "cgs_common.h"
29 #include "linux/delay.h"
30 #include "cz_smumgr.h"
31 #include "tonga_smumgr.h"
32 #include "fiji_smumgr.h"
33 #include "polaris10_smumgr.h"
35 int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
37 struct pp_smumgr *smumgr;
39 if ((handle == NULL) || (pp_init == NULL))
42 smumgr = kzalloc(sizeof(struct pp_smumgr), GFP_KERNEL);
46 smumgr->device = pp_init->device;
47 smumgr->chip_family = pp_init->chip_family;
48 smumgr->chip_id = pp_init->chip_id;
49 smumgr->hw_revision = pp_init->rev_id;
50 smumgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
51 smumgr->reload_fw = 1;
52 handle->smu_mgr = smumgr;
54 switch (smumgr->chip_family) {
59 switch (smumgr->chip_id) {
61 tonga_smum_init(smumgr);
64 fiji_smum_init(smumgr);
68 polaris10_smum_init(smumgr);
82 int smum_fini(struct pp_smumgr *smumgr)
84 kfree(smumgr->device);
89 int smum_get_argument(struct pp_smumgr *smumgr)
91 if (NULL != smumgr->smumgr_funcs->get_argument)
92 return smumgr->smumgr_funcs->get_argument(smumgr);
97 int smum_download_powerplay_table(struct pp_smumgr *smumgr,
100 if (NULL != smumgr->smumgr_funcs->download_pptable_settings)
101 return smumgr->smumgr_funcs->download_pptable_settings(smumgr,
107 int smum_upload_powerplay_table(struct pp_smumgr *smumgr)
109 if (NULL != smumgr->smumgr_funcs->upload_pptable_settings)
110 return smumgr->smumgr_funcs->upload_pptable_settings(smumgr);
115 int smum_send_msg_to_smc(struct pp_smumgr *smumgr, uint16_t msg)
117 if (smumgr == NULL || smumgr->smumgr_funcs->send_msg_to_smc == NULL)
120 return smumgr->smumgr_funcs->send_msg_to_smc(smumgr, msg);
123 int smum_send_msg_to_smc_with_parameter(struct pp_smumgr *smumgr,
124 uint16_t msg, uint32_t parameter)
126 if (smumgr == NULL ||
127 smumgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
129 return smumgr->smumgr_funcs->send_msg_to_smc_with_parameter(
130 smumgr, msg, parameter);
134 * Returns once the part of the register indicated by the mask has
135 * reached the given value.
137 int smum_wait_on_register(struct pp_smumgr *smumgr,
139 uint32_t value, uint32_t mask)
144 if (smumgr == NULL || smumgr->device == NULL)
147 for (i = 0; i < smumgr->usec_timeout; i++) {
148 cur_value = cgs_read_register(smumgr->device, index);
149 if ((cur_value & mask) == (value & mask))
154 /* timeout means wrong logic*/
155 if (i == smumgr->usec_timeout)
161 int smum_wait_for_register_unequal(struct pp_smumgr *smumgr,
163 uint32_t value, uint32_t mask)
171 for (i = 0; i < smumgr->usec_timeout; i++) {
172 cur_value = cgs_read_register(smumgr->device,
174 if ((cur_value & mask) != (value & mask))
179 /* timeout means wrong logic */
180 if (i == smumgr->usec_timeout)
188 * Returns once the part of the register indicated by the mask
189 * has reached the given value.The indirect space is described by
190 * giving the memory-mapped index of the indirect index register.
192 int smum_wait_on_indirect_register(struct pp_smumgr *smumgr,
193 uint32_t indirect_port,
198 if (smumgr == NULL || smumgr->device == NULL)
201 cgs_write_register(smumgr->device, indirect_port, index);
202 return smum_wait_on_register(smumgr, indirect_port + 1,
206 void smum_wait_for_indirect_register_unequal(
207 struct pp_smumgr *smumgr,
208 uint32_t indirect_port,
213 if (smumgr == NULL || smumgr->device == NULL)
215 cgs_write_register(smumgr->device, indirect_port, index);
216 smum_wait_for_register_unequal(smumgr, indirect_port + 1,
220 int smu_allocate_memory(void *device, uint32_t size,
221 enum cgs_gpu_mem_type type,
222 uint32_t byte_align, uint64_t *mc_addr,
223 void **kptr, void *handle)
226 cgs_handle_t cgs_handle;
228 if (device == NULL || handle == NULL ||
229 mc_addr == NULL || kptr == NULL)
232 ret = cgs_alloc_gpu_mem(device, type, size, byte_align,
233 0, 0, (cgs_handle_t *)handle);
237 cgs_handle = *(cgs_handle_t *)handle;
239 ret = cgs_gmap_gpu_mem(device, cgs_handle, mc_addr);
243 ret = cgs_kmap_gpu_mem(device, cgs_handle, kptr);
250 cgs_gunmap_gpu_mem(device, cgs_handle);
253 cgs_free_gpu_mem(device, cgs_handle);
257 int smu_free_memory(void *device, void *handle)
259 cgs_handle_t cgs_handle = (cgs_handle_t)handle;
261 if (device == NULL || handle == NULL)
264 cgs_kunmap_gpu_mem(device, cgs_handle);
265 cgs_gunmap_gpu_mem(device, cgs_handle);
266 cgs_free_gpu_mem(device, cgs_handle);