drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <drm/amdgpu_drm.h>
  30 #include "smumgr.h"
  31 #include "cgs_common.h"
  32
  33 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
  34 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
  35 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
  36 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
  37 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  38 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
  39 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
  40 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
  41 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
  42 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
  43 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
  44 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
  45 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
  46 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
  47
  48 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
  49 {
  50         if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
  51                 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
  52
  53         return 0;
  54 }
  55
  56 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
  57 {
  58         if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
  59                 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
  60
  61         return 0;
  62 }
  63
  64 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
  65 {
  66
  67         if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
  68                 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
  69
  70         return 0;
  71 }
  72
  73 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  74 {
  75
  76         if (NULL != hwmgr->smumgr_funcs->update_smc_table)
  77                 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
  78
  79         return 0;
  80 }
  81
  82 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
  83 {
  84         if (NULL != hwmgr->smumgr_funcs->get_offsetof)
  85                 return hwmgr->smumgr_funcs->get_offsetof(type, member);
  86
  87         return 0;
  88 }
  89
  90 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
  91 {
  92         if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
  93                 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
  94         return 0;
  95 }
  96
  97 int smum_get_argument(struct pp_hwmgr *hwmgr)
  98 {
  99         if (NULL != hwmgr->smumgr_funcs->get_argument)
 100                 return hwmgr->smumgr_funcs->get_argument(hwmgr);
 101
 102         return 0;
 103 }
 104
 105 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
 106 {
 107         if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
 108                 return hwmgr->smumgr_funcs->get_mac_definition(value);
 109
 110         return 0;
 111 }
 112
 113 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
 114 {
 115         if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
 116                 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
 117                                                                         table);
 118         return 0;
 119 }
 120
 121 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
 122 {
 123         if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
 124                 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
 125
 126         return 0;
 127 }
 128
 129 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 130 {
 131         if (hwmgr == NULL || hwmgr->smumgr_funcs->send_msg_to_smc == NULL)
 132                 return -EINVAL;
 133
 134         return hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
 135 }
 136
 137 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
 138                                         uint16_t msg, uint32_t parameter)
 139 {
 140         if (hwmgr == NULL ||
 141                 hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
 142                 return -EINVAL;
 143         return hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
 144                                                 hwmgr, msg, parameter);
 145 }
 146
 147 int smu_allocate_memory(void *device, uint32_t size,
 148                          enum cgs_gpu_mem_type type,
 149                          uint32_t byte_align, uint64_t *mc_addr,
 150                          void **kptr, void *handle)
 151 {
 152         int ret = 0;
 153         cgs_handle_t cgs_handle;
 154
 155         if (device == NULL || handle == NULL ||
 156             mc_addr == NULL || kptr == NULL)
 157                 return -EINVAL;
 158
 159         ret = cgs_alloc_gpu_mem(device, type, size, byte_align,
 160                                 (cgs_handle_t *)handle);
 161         if (ret)
 162                 return -ENOMEM;
 163
 164         cgs_handle = *(cgs_handle_t *)handle;
 165
 166         ret = cgs_gmap_gpu_mem(device, cgs_handle, mc_addr);
 167         if (ret)
 168                 goto error_gmap;
 169
 170         ret = cgs_kmap_gpu_mem(device, cgs_handle, kptr);
 171         if (ret)
 172                 goto error_kmap;
 173
 174         return 0;
 175
 176 error_kmap:
 177         cgs_gunmap_gpu_mem(device, cgs_handle);
 178
 179 error_gmap:
 180         cgs_free_gpu_mem(device, cgs_handle);
 181         return ret;
 182 }
 183
 184 int smu_free_memory(void *device, void *handle)
 185 {
 186         cgs_handle_t cgs_handle = (cgs_handle_t)handle;
 187
 188         if (device == NULL || handle == NULL)
 189                 return -EINVAL;
 190
 191         cgs_kunmap_gpu_mem(device, cgs_handle);
 192         cgs_gunmap_gpu_mem(device, cgs_handle);
 193         cgs_free_gpu_mem(device, cgs_handle);
 194
 195         return 0;
 196 }
 197
 198 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
 199 {
 200         if (NULL != hwmgr->smumgr_funcs->init_smc_table)
 201                 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
 202
 203         return 0;
 204 }
 205
 206 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 207 {
 208         if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
 209                 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
 210
 211         return 0;
 212 }
 213
 214 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
 215 {
 216         if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
 217                 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
 218
 219         return 0;
 220 }
 221
 222 /*this interface is needed by island ci/vi */
 223 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
 224 {
 225         if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
 226                 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
 227
 228         return 0;
 229 }
 230
 231 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
 232 {
 233         if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
 234                 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
 235
 236         return true;
 237 }
 238
 239 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 240 {
 241         if (hwmgr->smumgr_funcs->is_hw_avfs_present)
 242                 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
 243
 244         return false;
 245 }
 246
 247 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
 248 {
 249         if (hwmgr->smumgr_funcs->update_dpm_settings)
 250                 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
 251
 252         return -EINVAL;
 253 }