drm/amd/powerplay: add SMU manager sub-component
[linux-2.6-block.git] / drivers / gpu / drm / amd / powerplay / amd_powerplay.c
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/gfp.h>
26 #include <linux/slab.h>
27 #include "amd_shared.h"
28 #include "amd_powerplay.h"
29 #include "pp_instance.h"
30
31 static int pp_early_init(void *handle)
32 {
33         return 0;
34 }
35
36 static int pp_sw_init(void *handle)
37 {
38         return 0;
39 }
40
41 static int pp_sw_fini(void *handle)
42 {
43         return 0;
44 }
45
46 static int pp_hw_init(void *handle)
47 {
48         struct pp_instance *pp_handle;
49         struct pp_smumgr *smumgr;
50         int ret = 0;
51
52         if (handle == NULL)
53                 return -EINVAL;
54
55         pp_handle = (struct pp_instance *)handle;
56         smumgr = pp_handle->smu_mgr;
57
58         if (smumgr == NULL || smumgr->smumgr_funcs == NULL ||
59                 smumgr->smumgr_funcs->smu_init == NULL ||
60                 smumgr->smumgr_funcs->start_smu == NULL)
61                 return -EINVAL;
62
63         ret = smumgr->smumgr_funcs->smu_init(smumgr);
64         if (ret) {
65                 printk(KERN_ERR "[ powerplay ] smc initialization failed\n");
66                 return ret;
67         }
68
69         ret = smumgr->smumgr_funcs->start_smu(smumgr);
70         if (ret) {
71                 printk(KERN_ERR "[ powerplay ] smc start failed\n");
72                 smumgr->smumgr_funcs->smu_fini(smumgr);
73                 return ret;
74         }
75         return 0;
76 }
77
78 static int pp_hw_fini(void *handle)
79 {
80         struct pp_instance *pp_handle;
81         struct pp_smumgr *smumgr;
82
83         if (handle == NULL)
84                 return -EINVAL;
85
86         pp_handle = (struct pp_instance *)handle;
87         smumgr = pp_handle->smu_mgr;
88
89         if (smumgr != NULL || smumgr->smumgr_funcs != NULL ||
90                 smumgr->smumgr_funcs->smu_fini != NULL)
91                 smumgr->smumgr_funcs->smu_fini(smumgr);
92
93         return 0;
94 }
95
96 static bool pp_is_idle(void *handle)
97 {
98         return 0;
99 }
100
101 static int pp_wait_for_idle(void *handle)
102 {
103         return 0;
104 }
105
106 static int pp_sw_reset(void *handle)
107 {
108         return 0;
109 }
110
111 static void pp_print_status(void *handle)
112 {
113
114 }
115
116 static int pp_set_clockgating_state(void *handle,
117                                     enum amd_clockgating_state state)
118 {
119         return 0;
120 }
121
122 static int pp_set_powergating_state(void *handle,
123                                     enum amd_powergating_state state)
124 {
125         return 0;
126 }
127
128 static int pp_suspend(void *handle)
129 {
130         return 0;
131 }
132
133 static int pp_resume(void *handle)
134 {
135         return 0;
136 }
137
138 const struct amd_ip_funcs pp_ip_funcs = {
139         .early_init = pp_early_init,
140         .late_init = NULL,
141         .sw_init = pp_sw_init,
142         .sw_fini = pp_sw_fini,
143         .hw_init = pp_hw_init,
144         .hw_fini = pp_hw_fini,
145         .suspend = pp_suspend,
146         .resume = pp_resume,
147         .is_idle = pp_is_idle,
148         .wait_for_idle = pp_wait_for_idle,
149         .soft_reset = pp_sw_reset,
150         .print_status = pp_print_status,
151         .set_clockgating_state = pp_set_clockgating_state,
152         .set_powergating_state = pp_set_powergating_state,
153 };
154
155 static int pp_dpm_load_fw(void *handle)
156 {
157         return 0;
158 }
159
160 static int pp_dpm_fw_loading_complete(void *handle)
161 {
162         return 0;
163 }
164
165 static int pp_dpm_force_performance_level(void *handle,
166                                         enum amd_dpm_forced_level level)
167 {
168         return 0;
169 }
170 static enum amd_dpm_forced_level pp_dpm_get_performance_level(
171                                                                 void *handle)
172 {
173         return 0;
174 }
175 static int pp_dpm_get_sclk(void *handle, bool low)
176 {
177         return 0;
178 }
179 static int pp_dpm_get_mclk(void *handle, bool low)
180 {
181         return 0;
182 }
183 static int pp_dpm_powergate_vce(void *handle, bool gate)
184 {
185         return 0;
186 }
187 static int pp_dpm_powergate_uvd(void *handle, bool gate)
188 {
189         return 0;
190 }
191
192 int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)
193 {
194         return 0;
195 }
196 enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
197 {
198         return 0;
199 }
200 static void
201 pp_debugfs_print_current_performance_level(void *handle,
202                                                struct seq_file *m)
203 {
204         return;
205 }
206 const struct amd_powerplay_funcs pp_dpm_funcs = {
207         .get_temperature = NULL,
208         .load_firmware = pp_dpm_load_fw,
209         .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
210         .force_performance_level = pp_dpm_force_performance_level,
211         .get_performance_level = pp_dpm_get_performance_level,
212         .get_current_power_state = pp_dpm_get_current_power_state,
213         .get_sclk = pp_dpm_get_sclk,
214         .get_mclk = pp_dpm_get_mclk,
215         .powergate_vce = pp_dpm_powergate_vce,
216         .powergate_uvd = pp_dpm_powergate_uvd,
217         .dispatch_tasks = pp_dpm_dispatch_tasks,
218         .print_current_performance_level = pp_debugfs_print_current_performance_level,
219 };
220
221 static int amd_pp_instance_init(struct amd_pp_init *pp_init,
222                                 struct amd_powerplay *amd_pp)
223 {
224         int ret;
225         struct pp_instance *handle;
226
227         handle = kzalloc(sizeof(struct pp_instance), GFP_KERNEL);
228         if (handle == NULL)
229                 return -ENOMEM;
230
231         ret = smum_init(pp_init, handle);
232         if (ret)
233                 return ret;
234
235         amd_pp->pp_handle = handle;
236         return 0;
237 }
238
239 static int amd_pp_instance_fini(void *handle)
240 {
241         struct pp_instance *instance = (struct pp_instance *)handle;
242         if (instance == NULL)
243                 return -EINVAL;
244
245         smum_fini(instance->smu_mgr);
246
247         kfree(handle);
248         return 0;
249 }
250
251 int amd_powerplay_init(struct amd_pp_init *pp_init,
252                        struct amd_powerplay *amd_pp)
253 {
254         int ret;
255
256         if (pp_init == NULL || amd_pp == NULL)
257                 return -EINVAL;
258
259         ret = amd_pp_instance_init(pp_init, amd_pp);
260
261         if (ret)
262                 return ret;
263
264         amd_pp->ip_funcs = &pp_ip_funcs;
265         amd_pp->pp_funcs = &pp_dpm_funcs;
266
267         return 0;
268 }
269
270 int amd_powerplay_fini(void *handle)
271 {
272         amd_pp_instance_fini(handle);
273
274         return 0;
275 }