2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef __DAL_HW_SHARED_H__
27 #define __DAL_HW_SHARED_H__
30 #include "fixed31_32.h"
31 #include "dc_hw_types.h"
33 /******************************************************************************
34 * Data types shared between different Virtual HW blocks
35 ******************************************************************************/
38 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
39 #define MAX_DWB_PIPES 1
44 uint32_t segments_num;
50 struct fixed31_32 offset;
51 struct fixed31_32 slope;
53 uint32_t custom_float_x;
54 uint32_t custom_float_y;
55 uint32_t custom_float_offset;
56 uint32_t custom_float_slope;
59 struct curve_points3 {
60 struct curve_points red;
61 struct curve_points green;
62 struct curve_points blue;
65 struct pwl_result_data {
66 struct fixed31_32 red;
67 struct fixed31_32 green;
68 struct fixed31_32 blue;
70 struct fixed31_32 delta_red;
71 struct fixed31_32 delta_green;
72 struct fixed31_32 delta_blue;
78 uint32_t delta_red_reg;
79 uint32_t delta_green_reg;
80 uint32_t delta_blue_reg;
83 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
90 struct tetrahedral_17x17x17 {
91 struct dc_rgb lut0[1229];
92 struct dc_rgb lut1[1228];
93 struct dc_rgb lut2[1228];
94 struct dc_rgb lut3[1228];
96 struct tetrahedral_9x9x9 {
97 struct dc_rgb lut0[183];
98 struct dc_rgb lut1[182];
99 struct dc_rgb lut2[182];
100 struct dc_rgb lut3[182];
103 struct tetrahedral_params {
105 struct tetrahedral_17x17x17 tetrahedral_17;
106 struct tetrahedral_9x9x9 tetrahedral_9;
108 bool use_tetrahedral_9;
114 /* arr_curve_points - regamma regions/segments specification
115 * arr_points - beginning and end point specified separately (only one on DCE)
116 * corner_points - beginning and end point for all 3 colors (DCN)
117 * rgb_resulted - final curve
120 struct gamma_curve arr_curve_points[34];
122 struct curve_points arr_points[2];
123 struct curve_points3 corner_points[2];
125 struct pwl_result_data rgb_resulted[256 + 3];
126 uint32_t hw_points_num;
130 * while we are moving functionality out of opp to dpp to align
131 * HW programming to HW IP, we define these struct in hw_shared
132 * so we can still compile while refactoring
135 enum lb_pixel_depth {
136 /* do not change the values because it is used as bit vector */
137 LB_PIXEL_DEPTH_18BPP = 1,
138 LB_PIXEL_DEPTH_24BPP = 2,
139 LB_PIXEL_DEPTH_30BPP = 4,
140 LB_PIXEL_DEPTH_36BPP = 8
143 enum graphics_csc_adjust_type {
144 GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
145 GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
146 GRAPHICS_CSC_ADJUST_TYPE_SW /*use adjustments */
149 enum ipp_degamma_mode {
150 IPP_DEGAMMA_MODE_BYPASS,
151 IPP_DEGAMMA_MODE_HW_sRGB,
152 IPP_DEGAMMA_MODE_HW_xvYCC,
153 IPP_DEGAMMA_MODE_USER_PWL
156 enum ipp_output_format {
157 IPP_OUTPUT_FORMAT_12_BIT_FIX,
158 IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
159 IPP_OUTPUT_FORMAT_FLOAT
162 enum expansion_mode {
163 EXPANSION_MODE_DYNAMIC,
167 struct default_adjustment {
168 enum lb_pixel_depth lb_color_depth;
169 enum dc_color_space out_color_space;
170 enum dc_color_space in_color_space;
171 enum dc_color_depth color_depth;
172 enum pixel_format surface_pixel_format;
173 enum graphics_csc_adjust_type csc_adjust_type;
174 bool force_hw_default;
178 struct out_csc_color_matrix {
179 enum dc_color_space color_space;
183 enum gamut_remap_select {
184 GAMUT_REMAP_BYPASS = 0,
186 GAMUT_REMAP_COMA_COEFF,
187 GAMUT_REMAP_COMB_COEFF
191 OPP_REGAMMA_BYPASS = 0,
197 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
199 OPTC_DSC_DISABLED = 0,
200 OPTC_DSC_ENABLED_444 = 1, /* 'RGB 444' or 'Simple YCbCr 4:2:2' (4:2:2 upsampled to 4:4:4) */
201 OPTC_DSC_ENABLED_NATIVE_SUBSAMPLED = 2 /* Native 4:2:2 or 4:2:0 */
205 struct dc_bias_and_scale {
208 uint16_t scale_green;
214 enum test_pattern_dyn_range {
215 TEST_PATTERN_DYN_RANGE_VESA = 0,
216 TEST_PATTERN_DYN_RANGE_CEA
219 enum test_pattern_mode {
220 TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
221 TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
222 TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
223 TEST_PATTERN_MODE_VERTICALBARS,
224 TEST_PATTERN_MODE_HORIZONTALBARS,
225 TEST_PATTERN_MODE_SINGLERAMP_RGB,
226 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
227 TEST_PATTERN_MODE_DUALRAMP_RGB,
228 TEST_PATTERN_MODE_XR_BIAS_RGB
230 TEST_PATTERN_MODE_DUALRAMP_RGB
234 enum test_pattern_color_format {
235 TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
236 TEST_PATTERN_COLOR_FORMAT_BPC_8,
237 TEST_PATTERN_COLOR_FORMAT_BPC_10,
238 TEST_PATTERN_COLOR_FORMAT_BPC_12
241 enum controller_dp_test_pattern {
242 CONTROLLER_DP_TEST_PATTERN_D102 = 0,
243 CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
244 CONTROLLER_DP_TEST_PATTERN_PRBS7,
245 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
246 CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
247 CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
248 CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
249 CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
250 CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
251 CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
252 CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
253 CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA,
254 CONTROLLER_DP_TEST_PATTERN_SOLID_COLOR
262 #endif /* __DAL_HW_SHARED_H__ */