2 * Copyright 2012-14 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
31 #include "grph_object_defs.h"
33 enum dc_link_fec_state {
34 dc_link_fec_not_ready,
41 LTTPR_MODE_TRANSPARENT,
42 LTTPR_MODE_NON_TRANSPARENT,
45 struct dc_link_status {
47 struct dpcd_caps *dpcd_caps;
50 /* DP MST stream allocation (payload bandwidth number) */
51 struct link_mst_stream_allocation {
53 const struct stream_encoder *stream_enc;
54 /* associate DRM payload table with DC stream encoder */
56 /* number of slots required for the DP stream in transport packet */
60 /* DP MST stream allocation table */
61 struct link_mst_stream_allocation_table {
62 /* number of DP video streams */
64 /* array of stream allocations */
65 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
69 uint64_t edp_poweroff;
74 struct time_stamp time_stamp;
77 /* PSR feature flags */
79 bool psr_feature_enabled; // PSR is supported by sink
80 bool psr_allow_active; // PSR is currently active
81 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
83 /* These parameters are calculated in Driver,
84 * based on display timing and Sink capabilities.
85 * If VBLANK region is too small and Sink takes a long time
86 * to set up RFB, it may take an extra frame to enter PSR state.
88 bool psr_frame_capture_indication_req;
89 unsigned int psr_sdp_transmit_line_num_deadline;
93 * A link contains one or more sinks and their connected status.
94 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
97 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
98 unsigned int sink_count;
99 struct dc_sink *local_sink;
100 unsigned int link_index;
101 enum dc_connection_type type;
102 enum signal_type connector_signal;
103 enum dc_irq_source irq_source_hpd;
104 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
105 bool is_hpd_filter_disabled;
107 bool link_state_valid;
108 bool aux_access_disabled;
109 bool sync_lt_in_progress;
110 enum lttpr_mode lttpr_mode;
111 bool is_internal_display;
113 /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
115 bool is_dig_mapping_flexible;
117 bool edp_sink_present;
119 /* caps is the same as reported_link_cap. link_traing use
120 * reported_link_cap. Will clean up. TODO
122 struct dc_link_settings reported_link_cap;
123 struct dc_link_settings verified_link_cap;
124 struct dc_link_settings cur_link_settings;
125 struct dc_lane_settings cur_lane_setting;
126 struct dc_link_settings preferred_link_setting;
127 struct dc_link_training_overrides preferred_training_settings;
128 struct dp_audio_test_data audio_test_data;
134 uint8_t link_enc_hw_inst;
135 /* DIG link encoder ID. Used as index in link encoder resource pool.
136 * For links with fixed mapping to DIG, this is not changed after dc_link
139 enum engine_id eng_id;
141 bool test_pattern_enabled;
142 union compliance_test_state compliance_test_state;
146 struct ddc_service *ddc;
150 /* Private to DC core */
154 struct dc_context *ctx;
156 struct panel_cntl *panel_cntl;
157 struct link_encoder *link_enc;
158 struct graphics_object_id link_id;
159 /* Endpoint type distinguishes display endpoints which do not have entries
160 * in the BIOS connector table from those that do. Helps when tracking link
161 * encoder to display endpoint assignments.
163 enum display_endpoint_type ep_type;
164 union ddi_channel_mapping ddi_channel_mapping;
165 struct connector_device_tag_info device_tag;
166 struct dpcd_caps dpcd_caps;
167 uint32_t dongle_max_pix_clk;
168 unsigned short chip_caps;
169 unsigned int dpcd_sink_count;
170 #if defined(CONFIG_DRM_AMD_DC_HDCP)
171 struct hdcp_caps hdcp_caps;
173 enum edp_revision edp_revision;
174 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
176 struct psr_settings psr_settings;
178 /* MST record stream using this link */
180 bool dp_keep_receiver_powered;
182 bool dp_skip_reset_segment;
184 struct link_mst_stream_allocation_table mst_stream_alloc_table;
186 struct dc_link_status link_status;
188 struct link_trace link_trace;
189 struct gpio *hpd_gpio;
190 enum dc_link_fec_state fec_state;
193 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
196 * dc_get_link_at_index() - Return an enumerated dc_link.
198 * dc_link order is constant and determined at
199 * boot time. They cannot be created or destroyed.
200 * Use dc_get_caps() to get number of links.
202 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
204 return dc->links[link_index];
207 static inline void get_edp_links(const struct dc *dc,
208 struct dc_link **edp_links,
214 for (i = 0; i < dc->link_count; i++) {
215 // report any eDP links, even unconnected DDI's
216 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
217 edp_links[*edp_num] = dc->links[i];
218 if (++(*edp_num) == MAX_NUM_EDP)
224 /* Set backlight level of an embedded panel (eDP, LVDS).
225 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
226 * and 16 bit fractional, where 1.0 is max backlight value.
228 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
229 uint32_t backlight_pwm_u16_16,
230 uint32_t frame_ramp);
232 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
233 bool dc_link_set_backlight_level_nits(struct dc_link *link,
235 uint32_t backlight_millinits,
236 uint32_t transition_time_in_ms);
238 bool dc_link_get_backlight_level_nits(struct dc_link *link,
239 uint32_t *backlight_millinits,
240 uint32_t *backlight_millinits_peak);
242 bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
244 bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
245 bool dc_link_set_default_brightness_aux(struct dc_link *link);
247 int dc_link_get_backlight_level(const struct dc_link *dc_link);
249 int dc_link_get_target_backlight_pwm(const struct dc_link *link);
251 bool dc_link_set_psr_allow_active(struct dc_link *dc_link, bool enable,
252 bool wait, bool force_static);
254 bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
256 bool dc_link_setup_psr(struct dc_link *dc_link,
257 const struct dc_stream_state *stream, struct psr_config *psr_config,
258 struct psr_context *psr_context);
260 void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
262 /* Request DC to detect if there is a Panel connected.
263 * boot - If this call is during initial boot.
264 * Return false for any type of detection failure or MST detection
265 * true otherwise. True meaning further action is required (status update
266 * and OS notification).
268 enum dc_detect_reason {
272 DETECT_REASON_FALLBACK,
273 DETECT_REASON_RETRAIN
276 bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
277 bool dc_link_get_hpd_state(struct dc_link *dc_link);
278 enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
280 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
282 * true - Downstream port status changed. DM should call DC to do the
284 * false - no change in Downstream port status. No further action required
286 bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
287 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss);
290 * On eDP links this function call will stall until T12 has elapsed.
291 * If the panel is not in power off state, this function will return
294 bool dc_link_wait_for_t12(struct dc_link *link);
296 enum dc_status read_hpd_rx_irq_data(
297 struct dc_link *link,
298 union hpd_irq_data *irq_data);
300 struct dc_sink_init_data;
302 struct dc_sink *dc_link_add_remote_sink(
303 struct dc_link *dc_link,
306 struct dc_sink_init_data *init_data);
308 void dc_link_remove_remote_sink(
309 struct dc_link *link,
310 struct dc_sink *sink);
312 /* Used by diagnostics for virtual link at the moment */
314 void dc_link_dp_set_drive_settings(
315 struct dc_link *link,
316 struct link_training_settings *lt_settings);
318 bool dc_link_dp_perform_link_training_skip_aux(
319 struct dc_link *link,
320 const struct dc_link_settings *link_setting);
322 enum link_training_result dc_link_dp_perform_link_training(
323 struct dc_link *link,
324 const struct dc_link_settings *link_setting,
325 bool skip_video_pattern);
327 bool dc_link_dp_sync_lt_begin(struct dc_link *link);
329 enum link_training_result dc_link_dp_sync_lt_attempt(
330 struct dc_link *link,
331 struct dc_link_settings *link_setting,
332 struct dc_link_training_overrides *lt_settings);
334 bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
336 void dc_link_dp_enable_hpd(const struct dc_link *link);
338 void dc_link_dp_disable_hpd(const struct dc_link *link);
340 bool dc_link_dp_set_test_pattern(
341 struct dc_link *link,
342 enum dp_test_pattern test_pattern,
343 enum dp_test_pattern_color_space test_pattern_color_space,
344 const struct link_training_settings *p_link_settings,
345 const unsigned char *p_custom_pattern,
346 unsigned int cust_pattern_size);
348 bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
350 void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
352 bool dc_link_is_dp_sink_present(struct dc_link *link);
354 bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
356 * DPCD access interfaces
359 #ifdef CONFIG_DRM_AMD_DC_HDCP
360 bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
361 bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
363 void dc_link_set_drive_settings(struct dc *dc,
364 struct link_training_settings *lt_settings,
365 const struct dc_link *link);
366 void dc_link_perform_link_training(struct dc *dc,
367 struct dc_link_settings *link_setting,
368 bool skip_video_pattern);
369 void dc_link_set_preferred_link_settings(struct dc *dc,
370 struct dc_link_settings *link_setting,
371 struct dc_link *link);
372 void dc_link_set_preferred_training_settings(struct dc *dc,
373 struct dc_link_settings *link_setting,
374 struct dc_link_training_overrides *lt_overrides,
375 struct dc_link *link,
376 bool skip_immediate_retrain);
377 void dc_link_enable_hpd(const struct dc_link *link);
378 void dc_link_disable_hpd(const struct dc_link *link);
379 void dc_link_set_test_pattern(struct dc_link *link,
380 enum dp_test_pattern test_pattern,
381 enum dp_test_pattern_color_space test_pattern_color_space,
382 const struct link_training_settings *p_link_settings,
383 const unsigned char *p_custom_pattern,
384 unsigned int cust_pattern_size);
385 uint32_t dc_link_bandwidth_kbps(
386 const struct dc_link *link,
387 const struct dc_link_settings *link_setting);
389 const struct dc_link_settings *dc_link_get_link_cap(
390 const struct dc_link *link);
392 void dc_link_overwrite_extended_receiver_cap(
393 struct dc_link *link);
398 struct i2c_command *cmd);
400 bool dc_submit_i2c_oem(
402 struct i2c_command *cmd);
404 uint32_t dc_bandwidth_in_kbps_from_timing(
405 const struct dc_crtc_timing *timing);
407 bool dc_link_is_fec_supported(const struct dc_link *link);
408 bool dc_link_should_enable_fec(const struct dc_link *link);
410 #endif /* DC_LINK_H_ */