drivers/gpu/drm/amd/display/dc/core/dc_resource.c

   1 /*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 #include "dm_services.h"
  26
  27 #include "resource.h"
  28 #include "include/irq_service_interface.h"
  29 #include "link_encoder.h"
  30 #include "stream_encoder.h"
  31 #include "opp.h"
  32 #include "timing_generator.h"
  33 #include "transform.h"
  34 #include "dpp.h"
  35 #include "core_types.h"
  36 #include "set_mode_types.h"
  37 #include "virtual/virtual_stream_encoder.h"
  38
  39 #include "dce80/dce80_resource.h"
  40 #include "dce100/dce100_resource.h"
  41 #include "dce110/dce110_resource.h"
  42 #include "dce112/dce112_resource.h"
  43 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  44 #include "dcn10/dcn10_resource.h"
  45 #endif
  46 #include "dce120/dce120_resource.h"
  47
  48 enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
  49 {
  50         enum dce_version dc_version = DCE_VERSION_UNKNOWN;
  51         switch (asic_id.chip_family) {
  52
  53         case FAMILY_CI:
  54                 dc_version = DCE_VERSION_8_0;
  55                 break;
  56         case FAMILY_KV:
  57                 if (ASIC_REV_IS_KALINDI(asic_id.hw_internal_rev) ||
  58                     ASIC_REV_IS_BHAVANI(asic_id.hw_internal_rev) ||
  59                     ASIC_REV_IS_GODAVARI(asic_id.hw_internal_rev))
  60                         dc_version = DCE_VERSION_8_3;
  61                 else
  62                         dc_version = DCE_VERSION_8_1;
  63                 break;
  64         case FAMILY_CZ:
  65                 dc_version = DCE_VERSION_11_0;
  66                 break;
  67
  68         case FAMILY_VI:
  69                 if (ASIC_REV_IS_TONGA_P(asic_id.hw_internal_rev) ||
  70                                 ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) {
  71                         dc_version = DCE_VERSION_10_0;
  72                         break;
  73                 }
  74                 if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) ||
  75                                 ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) ||
  76                                 ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
  77                         dc_version = DCE_VERSION_11_2;
  78                 }
  79                 break;
  80         case FAMILY_AI:
  81                 dc_version = DCE_VERSION_12_0;
  82                 break;
  83 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  84         case FAMILY_RV:
  85                 dc_version = DCN_VERSION_1_0;
  86                 break;
  87 #endif
  88         default:
  89                 dc_version = DCE_VERSION_UNKNOWN;
  90                 break;
  91         }
  92         return dc_version;
  93 }
  94
  95 struct resource_pool *dc_create_resource_pool(
  96                                 struct dc  *dc,
  97                                 int num_virtual_links,
  98                                 enum dce_version dc_version,
  99                                 struct hw_asic_id asic_id)
 100 {
 101         struct resource_pool *res_pool = NULL;
 102
 103         switch (dc_version) {
 104         case DCE_VERSION_8_0:
 105                 res_pool = dce80_create_resource_pool(
 106                         num_virtual_links, dc);
 107                 break;
 108         case DCE_VERSION_8_1:
 109                 res_pool = dce81_create_resource_pool(
 110                         num_virtual_links, dc);
 111                 break;
 112         case DCE_VERSION_8_3:
 113                 res_pool = dce83_create_resource_pool(
 114                         num_virtual_links, dc);
 115                 break;
 116         case DCE_VERSION_10_0:
 117                 res_pool = dce100_create_resource_pool(
 118                                 num_virtual_links, dc);
 119                 break;
 120         case DCE_VERSION_11_0:
 121                 res_pool = dce110_create_resource_pool(
 122                         num_virtual_links, dc, asic_id);
 123                 break;
 124         case DCE_VERSION_11_2:
 125                 res_pool = dce112_create_resource_pool(
 126                         num_virtual_links, dc);
 127                 break;
 128         case DCE_VERSION_12_0:
 129                 res_pool = dce120_create_resource_pool(
 130                         num_virtual_links, dc);
 131                 break;
 132
 133 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 134         case DCN_VERSION_1_0:
 135                 res_pool = dcn10_create_resource_pool(
 136                                 num_virtual_links, dc);
 137                 break;
 138 #endif
 139
 140
 141         default:
 142                 break;
 143         }
 144         if (res_pool != NULL) {
 145                 struct dc_firmware_info fw_info = { { 0 } };
 146
 147                 if (dc->ctx->dc_bios->funcs->get_firmware_info(
 148                                 dc->ctx->dc_bios, &fw_info) == BP_RESULT_OK) {
 149                                 res_pool->ref_clock_inKhz = fw_info.pll_info.crystal_frequency;
 150                         } else
 151                                 ASSERT_CRITICAL(false);
 152         }
 153
 154         return res_pool;
 155 }
 156
 157 void dc_destroy_resource_pool(struct dc  *dc)
 158 {
 159         if (dc) {
 160                 if (dc->res_pool)
 161                         dc->res_pool->funcs->destroy(&dc->res_pool);
 162
 163                 kfree(dc->hwseq);
 164         }
 165 }
 166
 167 static void update_num_audio(
 168         const struct resource_straps *straps,
 169         unsigned int *num_audio,
 170         struct audio_support *aud_support)
 171 {
 172         aud_support->dp_audio = true;
 173         aud_support->hdmi_audio_native = false;
 174         aud_support->hdmi_audio_on_dongle = false;
 175
 176         if (straps->hdmi_disable == 0) {
 177                 if (straps->dc_pinstraps_audio & 0x2) {
 178                         aud_support->hdmi_audio_on_dongle = true;
 179                         aud_support->hdmi_audio_native = true;
 180                 }
 181         }
 182
 183         switch (straps->audio_stream_number) {
 184         case 0: /* multi streams supported */
 185                 break;
 186         case 1: /* multi streams not supported */
 187                 *num_audio = 1;
 188                 break;
 189         default:
 190                 DC_ERR("DC: unexpected audio fuse!\n");
 191         }
 192 }
 193
 194 bool resource_construct(
 195         unsigned int num_virtual_links,
 196         struct dc  *dc,
 197         struct resource_pool *pool,
 198         const struct resource_create_funcs *create_funcs)
 199 {
 200         struct dc_context *ctx = dc->ctx;
 201         const struct resource_caps *caps = pool->res_cap;
 202         int i;
 203         unsigned int num_audio = caps->num_audio;
 204         struct resource_straps straps = {0};
 205
 206         if (create_funcs->read_dce_straps)
 207                 create_funcs->read_dce_straps(dc->ctx, &straps);
 208
 209         pool->audio_count = 0;
 210         if (create_funcs->create_audio) {
 211                 /* find the total number of streams available via the
 212                  * AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT
 213                  * registers (one for each pin) starting from pin 1
 214                  * up to the max number of audio pins.
 215                  * We stop on the first pin where
 216                  * PORT_CONNECTIVITY == 1 (as instructed by HW team).
 217                  */
 218                 update_num_audio(&straps, &num_audio, &pool->audio_support);
 219                 for (i = 0; i < pool->pipe_count && i < num_audio; i++) {
 220                         struct audio *aud = create_funcs->create_audio(ctx, i);
 221
 222                         if (aud == NULL) {
 223                                 DC_ERR("DC: failed to create audio!\n");
 224                                 return false;
 225                         }
 226
 227                         if (!aud->funcs->endpoint_valid(aud)) {
 228                                 aud->funcs->destroy(&aud);
 229                                 break;
 230                         }
 231
 232                         pool->audios[i] = aud;
 233                         pool->audio_count++;
 234                 }
 235         }
 236
 237         pool->stream_enc_count = 0;
 238         if (create_funcs->create_stream_encoder) {
 239                 for (i = 0; i < caps->num_stream_encoder; i++) {
 240                         pool->stream_enc[i] = create_funcs->create_stream_encoder(i, ctx);
 241                         if (pool->stream_enc[i] == NULL)
 242                                 DC_ERR("DC: failed to create stream_encoder!\n");
 243                         pool->stream_enc_count++;
 244                 }
 245         }
 246         dc->caps.dynamic_audio = false;
 247         if (pool->audio_count < pool->stream_enc_count) {
 248                 dc->caps.dynamic_audio = true;
 249         }
 250         for (i = 0; i < num_virtual_links; i++) {
 251                 pool->stream_enc[pool->stream_enc_count] =
 252                         virtual_stream_encoder_create(
 253                                         ctx, ctx->dc_bios);
 254                 if (pool->stream_enc[pool->stream_enc_count] == NULL) {
 255                         DC_ERR("DC: failed to create stream_encoder!\n");
 256                         return false;
 257                 }
 258                 pool->stream_enc_count++;
 259         }
 260
 261         dc->hwseq = create_funcs->create_hwseq(ctx);
 262
 263         return true;
 264 }
 265
 266
 267 void resource_unreference_clock_source(
 268                 struct resource_context *res_ctx,
 269                 const struct resource_pool *pool,
 270                 struct clock_source *clock_source)
 271 {
 272         int i;
 273
 274         for (i = 0; i < pool->clk_src_count; i++) {
 275                 if (pool->clock_sources[i] != clock_source)
 276                         continue;
 277
 278                 res_ctx->clock_source_ref_count[i]--;
 279
 280                 break;
 281         }
 282
 283         if (pool->dp_clock_source == clock_source)
 284                 res_ctx->dp_clock_source_ref_count--;
 285 }
 286
 287 void resource_reference_clock_source(
 288                 struct resource_context *res_ctx,
 289                 const struct resource_pool *pool,
 290                 struct clock_source *clock_source)
 291 {
 292         int i;
 293         for (i = 0; i < pool->clk_src_count; i++) {
 294                 if (pool->clock_sources[i] != clock_source)
 295                         continue;
 296
 297                 res_ctx->clock_source_ref_count[i]++;
 298                 break;
 299         }
 300
 301         if (pool->dp_clock_source == clock_source)
 302                 res_ctx->dp_clock_source_ref_count++;
 303 }
 304
 305 bool resource_are_streams_timing_synchronizable(
 306         struct dc_stream_state *stream1,
 307         struct dc_stream_state *stream2)
 308 {
 309         if (stream1->timing.h_total != stream2->timing.h_total)
 310                 return false;
 311
 312         if (stream1->timing.v_total != stream2->timing.v_total)
 313                 return false;
 314
 315         if (stream1->timing.h_addressable
 316                                 != stream2->timing.h_addressable)
 317                 return false;
 318
 319         if (stream1->timing.v_addressable
 320                                 != stream2->timing.v_addressable)
 321                 return false;
 322
 323         if (stream1->timing.pix_clk_khz
 324                                 != stream2->timing.pix_clk_khz)
 325                 return false;
 326
 327         if (stream1->phy_pix_clk != stream2->phy_pix_clk
 328                         && (!dc_is_dp_signal(stream1->signal)
 329                         || !dc_is_dp_signal(stream2->signal)))
 330                 return false;
 331
 332         return true;
 333 }
 334
 335 static bool is_sharable_clk_src(
 336         const struct pipe_ctx *pipe_with_clk_src,
 337         const struct pipe_ctx *pipe)
 338 {
 339         if (pipe_with_clk_src->clock_source == NULL)
 340                 return false;
 341
 342         if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)
 343                 return false;
 344
 345         if (dc_is_dp_signal(pipe_with_clk_src->stream->signal))
 346                 return false;
 347
 348         if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
 349                         && dc_is_dvi_signal(pipe->stream->signal))
 350                 return false;
 351
 352         if (dc_is_hdmi_signal(pipe->stream->signal)
 353                         && dc_is_dvi_signal(pipe_with_clk_src->stream->signal))
 354                 return false;
 355
 356         if (!resource_are_streams_timing_synchronizable(
 357                         pipe_with_clk_src->stream, pipe->stream))
 358                 return false;
 359
 360         return true;
 361 }
 362
 363 struct clock_source *resource_find_used_clk_src_for_sharing(
 364                                         struct resource_context *res_ctx,
 365                                         struct pipe_ctx *pipe_ctx)
 366 {
 367         int i;
 368
 369         for (i = 0; i < MAX_PIPES; i++) {
 370                 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx))
 371                         return res_ctx->pipe_ctx[i].clock_source;
 372         }
 373
 374         return NULL;
 375 }
 376
 377 static enum pixel_format convert_pixel_format_to_dalsurface(
 378                 enum surface_pixel_format surface_pixel_format)
 379 {
 380         enum pixel_format dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
 381
 382         switch (surface_pixel_format) {
 383         case SURFACE_PIXEL_FORMAT_GRPH_PALETA_256_COLORS:
 384                 dal_pixel_format = PIXEL_FORMAT_INDEX8;
 385                 break;
 386         case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:
 387                 dal_pixel_format = PIXEL_FORMAT_RGB565;
 388                 break;
 389         case SURFACE_PIXEL_FORMAT_GRPH_RGB565:
 390                 dal_pixel_format = PIXEL_FORMAT_RGB565;
 391                 break;
 392         case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:
 393                 dal_pixel_format = PIXEL_FORMAT_ARGB8888;
 394                 break;
 395         case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888:
 396                 dal_pixel_format = PIXEL_FORMAT_ARGB8888;
 397                 break;
 398         case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010:
 399                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
 400                 break;
 401         case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010:
 402                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010;
 403                 break;
 404         case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010_XR_BIAS:
 405                 dal_pixel_format = PIXEL_FORMAT_ARGB2101010_XRBIAS;
 406                 break;
 407         case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F:
 408         case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F:
 409                 dal_pixel_format = PIXEL_FORMAT_FP16;
 410                 break;
 411         case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr:
 412         case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb:
 413                 dal_pixel_format = PIXEL_FORMAT_420BPP8;
 414                 break;
 415         case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr:
 416         case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb:
 417                 dal_pixel_format = PIXEL_FORMAT_420BPP10;
 418                 break;
 419         case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
 420         default:
 421                 dal_pixel_format = PIXEL_FORMAT_UNKNOWN;
 422                 break;
 423         }
 424         return dal_pixel_format;
 425 }
 426
 427 static void rect_swap_helper(struct rect *rect)
 428 {
 429         swap(rect->height, rect->width);
 430         swap(rect->x, rect->y);
 431 }
 432
 433 static void calculate_viewport(struct pipe_ctx *pipe_ctx)
 434 {
 435         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 436         const struct dc_stream_state *stream = pipe_ctx->stream;
 437         struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
 438         struct rect surf_src = plane_state->src_rect;
 439         struct rect clip = { 0 };
 440         int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
 441                         || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
 442         bool pri_split = pipe_ctx->bottom_pipe &&
 443                         pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state;
 444         bool sec_split = pipe_ctx->top_pipe &&
 445                         pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state;
 446
 447         if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE ||
 448                 stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
 449                 pri_split = false;
 450                 sec_split = false;
 451         }
 452
 453         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 454                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 455                 rect_swap_helper(&surf_src);
 456
 457         /* The actual clip is an intersection between stream
 458          * source and surface clip
 459          */
 460         clip.x = stream->src.x > plane_state->clip_rect.x ?
 461                         stream->src.x : plane_state->clip_rect.x;
 462
 463         clip.width = stream->src.x + stream->src.width <
 464                         plane_state->clip_rect.x + plane_state->clip_rect.width ?
 465                         stream->src.x + stream->src.width - clip.x :
 466                         plane_state->clip_rect.x + plane_state->clip_rect.width - clip.x ;
 467
 468         clip.y = stream->src.y > plane_state->clip_rect.y ?
 469                         stream->src.y : plane_state->clip_rect.y;
 470
 471         clip.height = stream->src.y + stream->src.height <
 472                         plane_state->clip_rect.y + plane_state->clip_rect.height ?
 473                         stream->src.y + stream->src.height - clip.y :
 474                         plane_state->clip_rect.y + plane_state->clip_rect.height - clip.y ;
 475
 476         /* offset = surf_src.ofs + (clip.ofs - surface->dst_rect.ofs) * scl_ratio
 477          * num_pixels = clip.num_pix * scl_ratio
 478          */
 479         data->viewport.x = surf_src.x + (clip.x - plane_state->dst_rect.x) *
 480                         surf_src.width / plane_state->dst_rect.width;
 481         data->viewport.width = clip.width *
 482                         surf_src.width / plane_state->dst_rect.width;
 483
 484         data->viewport.y = surf_src.y + (clip.y - plane_state->dst_rect.y) *
 485                         surf_src.height / plane_state->dst_rect.height;
 486         data->viewport.height = clip.height *
 487                         surf_src.height / plane_state->dst_rect.height;
 488
 489         /* Round down, compensate in init */
 490         data->viewport_c.x = data->viewport.x / vpc_div;
 491         data->viewport_c.y = data->viewport.y / vpc_div;
 492         data->inits.h_c = (data->viewport.x % vpc_div) != 0 ?
 493                         dal_fixed31_32_half : dal_fixed31_32_zero;
 494         data->inits.v_c = (data->viewport.y % vpc_div) != 0 ?
 495                         dal_fixed31_32_half : dal_fixed31_32_zero;
 496         /* Round up, assume original video size always even dimensions */
 497         data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div;
 498         data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div;
 499
 500         /* Handle hsplit */
 501         if (pri_split || sec_split) {
 502                 /* HMirror XOR Secondary_pipe XOR Rotation_180 */
 503                 bool right_view = (sec_split != plane_state->horizontal_mirror) !=
 504                                         (plane_state->rotation == ROTATION_ANGLE_180);
 505
 506                 if (plane_state->rotation == ROTATION_ANGLE_90
 507                                 || plane_state->rotation == ROTATION_ANGLE_270)
 508                         /* Secondary_pipe XOR Rotation_270 */
 509                         right_view = (plane_state->rotation == ROTATION_ANGLE_270) != sec_split;
 510
 511                 if (right_view) {
 512                         data->viewport.x +=  data->viewport.width / 2;
 513                         data->viewport_c.x +=  data->viewport_c.width / 2;
 514                         /* Ceil offset pipe */
 515                         data->viewport.width = (data->viewport.width + 1) / 2;
 516                         data->viewport_c.width = (data->viewport_c.width + 1) / 2;
 517                 } else {
 518                         data->viewport.width /= 2;
 519                         data->viewport_c.width /= 2;
 520                 }
 521         }
 522
 523         if (plane_state->rotation == ROTATION_ANGLE_90 ||
 524                         plane_state->rotation == ROTATION_ANGLE_270) {
 525                 rect_swap_helper(&data->viewport_c);
 526                 rect_swap_helper(&data->viewport);
 527         }
 528 }
 529
 530 static void calculate_recout(struct pipe_ctx *pipe_ctx, struct view *recout_skip)
 531 {
 532         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 533         const struct dc_stream_state *stream = pipe_ctx->stream;
 534         struct rect surf_src = plane_state->src_rect;
 535         struct rect surf_clip = plane_state->clip_rect;
 536         int recout_full_x, recout_full_y;
 537
 538         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 539                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 540                 rect_swap_helper(&surf_src);
 541
 542         pipe_ctx->plane_res.scl_data.recout.x = stream->dst.x;
 543         if (stream->src.x < surf_clip.x)
 544                 pipe_ctx->plane_res.scl_data.recout.x += (surf_clip.x
 545                         - stream->src.x) * stream->dst.width
 546                                                 / stream->src.width;
 547
 548         pipe_ctx->plane_res.scl_data.recout.width = surf_clip.width *
 549                         stream->dst.width / stream->src.width;
 550         if (pipe_ctx->plane_res.scl_data.recout.width + pipe_ctx->plane_res.scl_data.recout.x >
 551                         stream->dst.x + stream->dst.width)
 552                 pipe_ctx->plane_res.scl_data.recout.width =
 553                         stream->dst.x + stream->dst.width
 554                                                 - pipe_ctx->plane_res.scl_data.recout.x;
 555
 556         pipe_ctx->plane_res.scl_data.recout.y = stream->dst.y;
 557         if (stream->src.y < surf_clip.y)
 558                 pipe_ctx->plane_res.scl_data.recout.y += (surf_clip.y
 559                         - stream->src.y) * stream->dst.height
 560                                                 / stream->src.height;
 561
 562         pipe_ctx->plane_res.scl_data.recout.height = surf_clip.height *
 563                         stream->dst.height / stream->src.height;
 564         if (pipe_ctx->plane_res.scl_data.recout.height + pipe_ctx->plane_res.scl_data.recout.y >
 565                         stream->dst.y + stream->dst.height)
 566                 pipe_ctx->plane_res.scl_data.recout.height =
 567                         stream->dst.y + stream->dst.height
 568                                                 - pipe_ctx->plane_res.scl_data.recout.y;
 569
 570         /* Handle h & vsplit */
 571         if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state ==
 572                 pipe_ctx->plane_state) {
 573                 if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
 574                         pipe_ctx->plane_res.scl_data.recout.y += pipe_ctx->plane_res.scl_data.recout.height / 2;
 575                         /* Floor primary pipe, ceil 2ndary pipe */
 576                         pipe_ctx->plane_res.scl_data.recout.height = (pipe_ctx->plane_res.scl_data.recout.height + 1) / 2;
 577                 } else {
 578                         pipe_ctx->plane_res.scl_data.recout.x += pipe_ctx->plane_res.scl_data.recout.width / 2;
 579                         pipe_ctx->plane_res.scl_data.recout.width = (pipe_ctx->plane_res.scl_data.recout.width + 1) / 2;
 580                 }
 581         } else if (pipe_ctx->bottom_pipe &&
 582                         pipe_ctx->bottom_pipe->plane_state == pipe_ctx->plane_state) {
 583                 if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
 584                         pipe_ctx->plane_res.scl_data.recout.height /= 2;
 585                 else
 586                         pipe_ctx->plane_res.scl_data.recout.width /= 2;
 587         }
 588
 589         /* Unclipped recout offset = stream dst offset + ((surf dst offset - stream surf_src offset)
 590          *                              * 1/ stream scaling ratio) - (surf surf_src offset * 1/ full scl
 591          *                              ratio)
 592          */
 593         recout_full_x = stream->dst.x + (plane_state->dst_rect.x -  stream->src.x)
 594                                         * stream->dst.width / stream->src.width -
 595                         surf_src.x * plane_state->dst_rect.width / surf_src.width
 596                                         * stream->dst.width / stream->src.width;
 597         recout_full_y = stream->dst.y + (plane_state->dst_rect.y -  stream->src.y)
 598                                         * stream->dst.height / stream->src.height -
 599                         surf_src.y * plane_state->dst_rect.height / surf_src.height
 600                                         * stream->dst.height / stream->src.height;
 601
 602         recout_skip->width = pipe_ctx->plane_res.scl_data.recout.x - recout_full_x;
 603         recout_skip->height = pipe_ctx->plane_res.scl_data.recout.y - recout_full_y;
 604 }
 605
 606 static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
 607 {
 608         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 609         const struct dc_stream_state *stream = pipe_ctx->stream;
 610         struct rect surf_src = plane_state->src_rect;
 611         const int in_w = stream->src.width;
 612         const int in_h = stream->src.height;
 613         const int out_w = stream->dst.width;
 614         const int out_h = stream->dst.height;
 615
 616         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 617                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
 618                 rect_swap_helper(&surf_src);
 619
 620         pipe_ctx->plane_res.scl_data.ratios.horz = dal_fixed31_32_from_fraction(
 621                                         surf_src.width,
 622                                         plane_state->dst_rect.width);
 623         pipe_ctx->plane_res.scl_data.ratios.vert = dal_fixed31_32_from_fraction(
 624                                         surf_src.height,
 625                                         plane_state->dst_rect.height);
 626
 627         if (stream->view_format == VIEW_3D_FORMAT_SIDE_BY_SIDE)
 628                 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
 629         else if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM)
 630                 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2;
 631
 632         pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64(
 633                 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h);
 634         pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
 635                 pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);
 636
 637         pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz;
 638         pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert;
 639
 640         if (pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP8
 641                         || pipe_ctx->plane_res.scl_data.format == PIXEL_FORMAT_420BPP10) {
 642                 pipe_ctx->plane_res.scl_data.ratios.horz_c.value /= 2;
 643                 pipe_ctx->plane_res.scl_data.ratios.vert_c.value /= 2;
 644         }
 645 }
 646
 647 static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *recout_skip)
 648 {
 649         struct scaler_data *data = &pipe_ctx->plane_res.scl_data;
 650         struct rect src = pipe_ctx->plane_state->src_rect;
 651         int vpc_div = (data->format == PIXEL_FORMAT_420BPP8
 652                         || data->format == PIXEL_FORMAT_420BPP10) ? 2 : 1;
 653
 654
 655         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 656                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {
 657                 rect_swap_helper(&src);
 658                 rect_swap_helper(&data->viewport_c);
 659                 rect_swap_helper(&data->viewport);
 660         }
 661
 662         /*
 663          * Init calculated according to formula:
 664          *      init = (scaling_ratio + number_of_taps + 1) / 2
 665          *      init_bot = init + scaling_ratio
 666          *      init_c = init + truncated_vp_c_offset(from calculate viewport)
 667          */
 668         data->inits.h = dal_fixed31_32_div_int(
 669                         dal_fixed31_32_add_int(data->ratios.horz, data->taps.h_taps + 1), 2);
 670
 671         data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_div_int(
 672                         dal_fixed31_32_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2));
 673
 674         data->inits.v = dal_fixed31_32_div_int(
 675                         dal_fixed31_32_add_int(data->ratios.vert, data->taps.v_taps + 1), 2);
 676
 677         data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_div_int(
 678                         dal_fixed31_32_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2));
 679
 680
 681         /* Adjust for viewport end clip-off */
 682         if ((data->viewport.x + data->viewport.width) < (src.x + src.width)) {
 683                 int vp_clip = src.x + src.width - data->viewport.width - data->viewport.x;
 684                 int int_part = dal_fixed31_32_floor(
 685                                 dal_fixed31_32_sub(data->inits.h, data->ratios.horz));
 686
 687                 int_part = int_part > 0 ? int_part : 0;
 688                 data->viewport.width += int_part < vp_clip ? int_part : vp_clip;
 689         }
 690         if ((data->viewport.y + data->viewport.height) < (src.y + src.height)) {
 691                 int vp_clip = src.y + src.height - data->viewport.height - data->viewport.y;
 692                 int int_part = dal_fixed31_32_floor(
 693                                 dal_fixed31_32_sub(data->inits.v, data->ratios.vert));
 694
 695                 int_part = int_part > 0 ? int_part : 0;
 696                 data->viewport.height += int_part < vp_clip ? int_part : vp_clip;
 697         }
 698         if ((data->viewport_c.x + data->viewport_c.width) < (src.x + src.width) / vpc_div) {
 699                 int vp_clip = (src.x + src.width) / vpc_div -
 700                                 data->viewport_c.width - data->viewport_c.x;
 701                 int int_part = dal_fixed31_32_floor(
 702                                 dal_fixed31_32_sub(data->inits.h_c, data->ratios.horz_c));
 703
 704                 int_part = int_part > 0 ? int_part : 0;
 705                 data->viewport_c.width += int_part < vp_clip ? int_part : vp_clip;
 706         }
 707         if ((data->viewport_c.y + data->viewport_c.height) < (src.y + src.height) / vpc_div) {
 708                 int vp_clip = (src.y + src.height) / vpc_div -
 709                                 data->viewport_c.height - data->viewport_c.y;
 710                 int int_part = dal_fixed31_32_floor(
 711                                 dal_fixed31_32_sub(data->inits.v_c, data->ratios.vert_c));
 712
 713                 int_part = int_part > 0 ? int_part : 0;
 714                 data->viewport_c.height += int_part < vp_clip ? int_part : vp_clip;
 715         }
 716
 717         /* Adjust for non-0 viewport offset */
 718         if (data->viewport.x) {
 719                 int int_part;
 720
 721                 data->inits.h = dal_fixed31_32_add(data->inits.h, dal_fixed31_32_mul_int(
 722                                 data->ratios.horz, recout_skip->width));
 723                 int_part = dal_fixed31_32_floor(data->inits.h) - data->viewport.x;
 724                 if (int_part < data->taps.h_taps) {
 725                         int int_adj = data->viewport.x >= (data->taps.h_taps - int_part) ?
 726                                                 (data->taps.h_taps - int_part) : data->viewport.x;
 727                         data->viewport.x -= int_adj;
 728                         data->viewport.width += int_adj;
 729                         int_part += int_adj;
 730                 } else if (int_part > data->taps.h_taps) {
 731                         data->viewport.x += int_part - data->taps.h_taps;
 732                         data->viewport.width -= int_part - data->taps.h_taps;
 733                         int_part = data->taps.h_taps;
 734                 }
 735                 data->inits.h.value &= 0xffffffff;
 736                 data->inits.h = dal_fixed31_32_add_int(data->inits.h, int_part);
 737         }
 738
 739         if (data->viewport_c.x) {
 740                 int int_part;
 741
 742                 data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_mul_int(
 743                                 data->ratios.horz_c, recout_skip->width));
 744                 int_part = dal_fixed31_32_floor(data->inits.h_c) - data->viewport_c.x;
 745                 if (int_part < data->taps.h_taps_c) {
 746                         int int_adj = data->viewport_c.x >= (data->taps.h_taps_c - int_part) ?
 747                                         (data->taps.h_taps_c - int_part) : data->viewport_c.x;
 748                         data->viewport_c.x -= int_adj;
 749                         data->viewport_c.width += int_adj;
 750                         int_part += int_adj;
 751                 } else if (int_part > data->taps.h_taps_c) {
 752                         data->viewport_c.x += int_part - data->taps.h_taps_c;
 753                         data->viewport_c.width -= int_part - data->taps.h_taps_c;
 754                         int_part = data->taps.h_taps_c;
 755                 }
 756                 data->inits.h_c.value &= 0xffffffff;
 757                 data->inits.h_c = dal_fixed31_32_add_int(data->inits.h_c, int_part);
 758         }
 759
 760         if (data->viewport.y) {
 761                 int int_part;
 762
 763                 data->inits.v = dal_fixed31_32_add(data->inits.v, dal_fixed31_32_mul_int(
 764                                 data->ratios.vert, recout_skip->height));
 765                 int_part = dal_fixed31_32_floor(data->inits.v) - data->viewport.y;
 766                 if (int_part < data->taps.v_taps) {
 767                         int int_adj = data->viewport.y >= (data->taps.v_taps - int_part) ?
 768                                                 (data->taps.v_taps - int_part) : data->viewport.y;
 769                         data->viewport.y -= int_adj;
 770                         data->viewport.height += int_adj;
 771                         int_part += int_adj;
 772                 } else if (int_part > data->taps.v_taps) {
 773                         data->viewport.y += int_part - data->taps.v_taps;
 774                         data->viewport.height -= int_part - data->taps.v_taps;
 775                         int_part = data->taps.v_taps;
 776                 }
 777                 data->inits.v.value &= 0xffffffff;
 778                 data->inits.v = dal_fixed31_32_add_int(data->inits.v, int_part);
 779         }
 780
 781         if (data->viewport_c.y) {
 782                 int int_part;
 783
 784                 data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_mul_int(
 785                                 data->ratios.vert_c, recout_skip->height));
 786                 int_part = dal_fixed31_32_floor(data->inits.v_c) - data->viewport_c.y;
 787                 if (int_part < data->taps.v_taps_c) {
 788                         int int_adj = data->viewport_c.y >= (data->taps.v_taps_c - int_part) ?
 789                                         (data->taps.v_taps_c - int_part) : data->viewport_c.y;
 790                         data->viewport_c.y -= int_adj;
 791                         data->viewport_c.height += int_adj;
 792                         int_part += int_adj;
 793                 } else if (int_part > data->taps.v_taps_c) {
 794                         data->viewport_c.y += int_part - data->taps.v_taps_c;
 795                         data->viewport_c.height -= int_part - data->taps.v_taps_c;
 796                         int_part = data->taps.v_taps_c;
 797                 }
 798                 data->inits.v_c.value &= 0xffffffff;
 799                 data->inits.v_c = dal_fixed31_32_add_int(data->inits.v_c, int_part);
 800         }
 801
 802         /* Interlaced inits based on final vert inits */
 803         data->inits.v_bot = dal_fixed31_32_add(data->inits.v, data->ratios.vert);
 804         data->inits.v_c_bot = dal_fixed31_32_add(data->inits.v_c, data->ratios.vert_c);
 805
 806         if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
 807                         pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {
 808                 rect_swap_helper(&data->viewport_c);
 809                 rect_swap_helper(&data->viewport);
 810         }
 811 }
 812
 813 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
 814 {
 815         const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
 816         struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
 817         struct view recout_skip = { 0 };
 818         bool res = false;
 819
 820         /* Important: scaling ratio calculation requires pixel format,
 821          * lb depth calculation requires recout and taps require scaling ratios.
 822          * Inits require viewport, taps, ratios and recout of split pipe
 823          */
 824         pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(
 825                         pipe_ctx->plane_state->format);
 826
 827         calculate_scaling_ratios(pipe_ctx);
 828
 829         calculate_viewport(pipe_ctx);
 830
 831         if (pipe_ctx->plane_res.scl_data.viewport.height < 16 || pipe_ctx->plane_res.scl_data.viewport.width < 16)
 832                 return false;
 833
 834         calculate_recout(pipe_ctx, &recout_skip);
 835
 836         /**
 837          * Setting line buffer pixel depth to 24bpp yields banding
 838          * on certain displays, such as the Sharp 4k
 839          */
 840         pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;
 841
 842         pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left;
 843         pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top;
 844
 845         pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right;
 846         pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
 847
 848
 849         /* Taps calculations */
 850         if (pipe_ctx->plane_res.xfm != NULL)
 851                 res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
 852                                 pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 853
 854         if (pipe_ctx->plane_res.dpp != NULL)
 855                 res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
 856                                 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
 857         if (!res) {
 858                 /* Try 24 bpp linebuffer */
 859                 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;
 860
 861                 if (pipe_ctx->plane_res.xfm != NULL)
 862                         res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps(
 863                                         pipe_ctx->plane_res.xfm,
 864                                         &pipe_ctx->plane_res.scl_data,
 865                                         &plane_state->scaling_quality);
 866
 867                 if (pipe_ctx->plane_res.dpp != NULL)
 868                         res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
 869                                         pipe_ctx->plane_res.dpp,
 870                                         &pipe_ctx->plane_res.scl_data,
 871                                         &plane_state->scaling_quality);
 872         }
 873
 874         if (res)
 875                 /* May need to re-check lb size after this in some obscure scenario */
 876                 calculate_inits_and_adj_vp(pipe_ctx, &recout_skip);
 877
 878         dm_logger_write(pipe_ctx->stream->ctx->logger, LOG_SCALER,
 879                                 "%s: Viewport:\nheight:%d width:%d x:%d "
 880                                 "y:%d\n dst_rect:\nheight:%d width:%d x:%d "
 881                                 "y:%d\n",
 882                                 __func__,
 883                                 pipe_ctx->plane_res.scl_data.viewport.height,
 884                                 pipe_ctx->plane_res.scl_data.viewport.width,
 885                                 pipe_ctx->plane_res.scl_data.viewport.x,
 886                                 pipe_ctx->plane_res.scl_data.viewport.y,
 887                                 plane_state->dst_rect.height,
 888                                 plane_state->dst_rect.width,
 889                                 plane_state->dst_rect.x,
 890                                 plane_state->dst_rect.y);
 891
 892         return res;
 893 }
 894
 895
 896 enum dc_status resource_build_scaling_params_for_context(
 897         const struct dc  *dc,
 898         struct dc_state *context)
 899 {
 900         int i;
 901
 902         for (i = 0; i < MAX_PIPES; i++) {
 903                 if (context->res_ctx.pipe_ctx[i].plane_state != NULL &&
 904                                 context->res_ctx.pipe_ctx[i].stream != NULL)
 905                         if (!resource_build_scaling_params(&context->res_ctx.pipe_ctx[i]))
 906                                 return DC_FAIL_SCALING;
 907         }
 908
 909         return DC_OK;
 910 }
 911
 912 struct pipe_ctx *find_idle_secondary_pipe(
 913                 struct resource_context *res_ctx,
 914                 const struct resource_pool *pool)
 915 {
 916         int i;
 917         struct pipe_ctx *secondary_pipe = NULL;
 918
 919         /*
 920          * search backwards for the second pipe to keep pipe
 921          * assignment more consistent
 922          */
 923
 924         for (i = pool->pipe_count - 1; i >= 0; i--) {
 925                 if (res_ctx->pipe_ctx[i].stream == NULL) {
 926                         secondary_pipe = &res_ctx->pipe_ctx[i];
 927                         secondary_pipe->pipe_idx = i;
 928                         break;
 929                 }
 930         }
 931
 932
 933         return secondary_pipe;
 934 }
 935
 936 struct pipe_ctx *resource_get_head_pipe_for_stream(
 937                 struct resource_context *res_ctx,
 938                 struct dc_stream_state *stream)
 939 {
 940         int i;
 941         for (i = 0; i < MAX_PIPES; i++) {
 942                 if (res_ctx->pipe_ctx[i].stream == stream &&
 943                                 !res_ctx->pipe_ctx[i].top_pipe) {
 944                         return &res_ctx->pipe_ctx[i];
 945                         break;
 946                 }
 947         }
 948         return NULL;
 949 }
 950
 951 static struct pipe_ctx *resource_get_tail_pipe_for_stream(
 952                 struct resource_context *res_ctx,
 953                 struct dc_stream_state *stream)
 954 {
 955         struct pipe_ctx *head_pipe, *tail_pipe;
 956         head_pipe = resource_get_head_pipe_for_stream(res_ctx, stream);
 957
 958         if (!head_pipe)
 959                 return NULL;
 960
 961         tail_pipe = head_pipe->bottom_pipe;
 962
 963         while (tail_pipe) {
 964                 head_pipe = tail_pipe;
 965                 tail_pipe = tail_pipe->bottom_pipe;
 966         }
 967
 968         return head_pipe;
 969 }
 970
 971 /*
 972  * A free_pipe for a stream is defined here as a pipe
 973  * that has no surface attached yet
 974  */
 975 static struct pipe_ctx *acquire_free_pipe_for_stream(
 976                 struct dc_state *context,
 977                 const struct resource_pool *pool,
 978                 struct dc_stream_state *stream)
 979 {
 980         int i;
 981         struct resource_context *res_ctx = &context->res_ctx;
 982
 983         struct pipe_ctx *head_pipe = NULL;
 984
 985         /* Find head pipe, which has the back end set up*/
 986
 987         head_pipe = resource_get_head_pipe_for_stream(res_ctx, stream);
 988
 989         if (!head_pipe) {
 990                 ASSERT(0);
 991                 return NULL;
 992         }
 993
 994         if (!head_pipe->plane_state)
 995                 return head_pipe;
 996
 997         /* Re-use pipe already acquired for this stream if available*/
 998         for (i = pool->pipe_count - 1; i >= 0; i--) {
 999                 if (res_ctx->pipe_ctx[i].stream == stream &&
1000                                 !res_ctx->pipe_ctx[i].plane_state) {
1001                         return &res_ctx->pipe_ctx[i];
1002                 }
1003         }
1004
1005         /*
1006          * At this point we have no re-useable pipe for this stream and we need
1007          * to acquire an idle one to satisfy the request
1008          */
1009
1010         if (!pool->funcs->acquire_idle_pipe_for_layer)
1011                 return NULL;
1012
1013         return pool->funcs->acquire_idle_pipe_for_layer(context, pool, stream);
1014
1015 }
1016
1017 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
1018 static int acquire_first_split_pipe(
1019                 struct resource_context *res_ctx,
1020                 const struct resource_pool *pool,
1021                 struct dc_stream_state *stream)
1022 {
1023         int i;
1024
1025         for (i = 0; i < pool->pipe_count; i++) {
1026                 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
1027
1028                 if (pipe_ctx->top_pipe &&
1029                                 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state) {
1030                         pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;
1031                         if (pipe_ctx->bottom_pipe)
1032                                 pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;
1033
1034                         memset(pipe_ctx, 0, sizeof(*pipe_ctx));
1035                         pipe_ctx->stream_res.tg = pool->timing_generators[i];
1036                         pipe_ctx->plane_res.hubp = pool->hubps[i];
1037                         pipe_ctx->plane_res.ipp = pool->ipps[i];
1038                         pipe_ctx->plane_res.dpp = pool->dpps[i];
1039                         pipe_ctx->stream_res.opp = pool->opps[i];
1040                         pipe_ctx->pipe_idx = i;
1041
1042                         pipe_ctx->stream = stream;
1043                         return i;
1044                 }
1045         }
1046         return -1;
1047 }
1048 #endif
1049
1050 bool dc_add_plane_to_context(
1051                 const struct dc *dc,
1052                 struct dc_stream_state *stream,
1053                 struct dc_plane_state *plane_state,
1054                 struct dc_state *context)
1055 {
1056         int i;
1057         struct resource_pool *pool = dc->res_pool;
1058         struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe;
1059         struct dc_stream_status *stream_status = NULL;
1060
1061         for (i = 0; i < context->stream_count; i++)
1062                 if (context->streams[i] == stream) {
1063                         stream_status = &context->stream_status[i];
1064                         break;
1065                 }
1066         if (stream_status == NULL) {
1067                 dm_error("Existing stream not found; failed to attach surface!\n");
1068                 return false;
1069         }
1070
1071
1072         if (stream_status->plane_count == MAX_SURFACE_NUM) {
1073                 dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n",
1074                                 plane_state, MAX_SURFACE_NUM);
1075                 return false;
1076         }
1077
1078         head_pipe = resource_get_head_pipe_for_stream(&context->res_ctx, stream);
1079
1080         if (!head_pipe) {
1081                 dm_error("Head pipe not found for stream_state %p !\n", stream);
1082                 return false;
1083         }
1084
1085         free_pipe = acquire_free_pipe_for_stream(context, pool, stream);
1086
1087 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
1088         if (!free_pipe) {
1089                 int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
1090                 if (pipe_idx >= 0)
1091                         free_pipe = &context->res_ctx.pipe_ctx[pipe_idx];
1092         }
1093 #endif
1094         if (!free_pipe)
1095                 return false;
1096
1097         /* retain new surfaces */
1098         dc_plane_state_retain(plane_state);
1099         free_pipe->plane_state = plane_state;
1100
1101         if (head_pipe != free_pipe) {
1102
1103                 tail_pipe = resource_get_tail_pipe_for_stream(&context->res_ctx, stream);
1104                 ASSERT(tail_pipe);
1105
1106                 free_pipe->stream_res.tg = tail_pipe->stream_res.tg;
1107                 free_pipe->stream_res.opp = tail_pipe->stream_res.opp;
1108                 free_pipe->stream_res.stream_enc = tail_pipe->stream_res.stream_enc;
1109                 free_pipe->stream_res.audio = tail_pipe->stream_res.audio;
1110                 free_pipe->clock_source = tail_pipe->clock_source;
1111                 free_pipe->top_pipe = tail_pipe;
1112                 tail_pipe->bottom_pipe = free_pipe;
1113         }
1114
1115         /* assign new surfaces*/
1116         stream_status->plane_states[stream_status->plane_count] = plane_state;
1117
1118         stream_status->plane_count++;
1119
1120         return true;
1121 }
1122
1123 bool dc_remove_plane_from_context(
1124                 const struct dc *dc,
1125                 struct dc_stream_state *stream,
1126                 struct dc_plane_state *plane_state,
1127                 struct dc_state *context)
1128 {
1129         int i;
1130         struct dc_stream_status *stream_status = NULL;
1131         struct resource_pool *pool = dc->res_pool;
1132
1133         for (i = 0; i < context->stream_count; i++)
1134                 if (context->streams[i] == stream) {
1135                         stream_status = &context->stream_status[i];
1136                         break;
1137                 }
1138
1139         if (stream_status == NULL) {
1140                 dm_error("Existing stream not found; failed to remove plane.\n");
1141                 return false;
1142         }
1143
1144         /* release pipe for plane*/
1145         for (i = pool->pipe_count - 1; i >= 0; i--) {
1146                 struct pipe_ctx *pipe_ctx;
1147
1148                 if (context->res_ctx.pipe_ctx[i].plane_state == plane_state) {
1149                         pipe_ctx = &context->res_ctx.pipe_ctx[i];
1150
1151                         if (pipe_ctx->top_pipe)
1152                                 pipe_ctx->top_pipe->bottom_pipe = pipe_ctx->bottom_pipe;
1153
1154                         /* Second condition is to avoid setting NULL to top pipe
1155                          * of tail pipe making it look like head pipe in subsequent
1156                          * deletes
1157                          */
1158                         if (pipe_ctx->bottom_pipe && pipe_ctx->top_pipe)
1159                                 pipe_ctx->bottom_pipe->top_pipe = pipe_ctx->top_pipe;
1160
1161                         /*
1162                          * For head pipe detach surfaces from pipe for tail
1163                          * pipe just zero it out
1164                          */
1165                         if (!pipe_ctx->top_pipe) {
1166                                 pipe_ctx->plane_state = NULL;
1167                                 pipe_ctx->bottom_pipe = NULL;
1168                         } else  {
1169                                 memset(pipe_ctx, 0, sizeof(*pipe_ctx));
1170                         }
1171                 }
1172         }
1173
1174
1175         for (i = 0; i < stream_status->plane_count; i++) {
1176                 if (stream_status->plane_states[i] == plane_state) {
1177
1178                         dc_plane_state_release(stream_status->plane_states[i]);
1179                         break;
1180                 }
1181         }
1182
1183         if (i == stream_status->plane_count) {
1184                 dm_error("Existing plane_state not found; failed to detach it!\n");
1185                 return false;
1186         }
1187
1188         stream_status->plane_count--;
1189
1190         /* Start at the plane we've just released, and move all the planes one index forward to "trim" the array */
1191         for (; i < stream_status->plane_count; i++)
1192                 stream_status->plane_states[i] = stream_status->plane_states[i + 1];
1193
1194         stream_status->plane_states[stream_status->plane_count] = NULL;
1195
1196         return true;
1197 }
1198
1199 bool dc_rem_all_planes_for_stream(
1200                 const struct dc *dc,
1201                 struct dc_stream_state *stream,
1202                 struct dc_state *context)
1203 {
1204         int i, old_plane_count;
1205         struct dc_stream_status *stream_status = NULL;
1206         struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };
1207
1208         for (i = 0; i < context->stream_count; i++)
1209                         if (context->streams[i] == stream) {
1210                                 stream_status = &context->stream_status[i];
1211                                 break;
1212                         }
1213
1214         if (stream_status == NULL) {
1215                 dm_error("Existing stream %p not found!\n", stream);
1216                 return false;
1217         }
1218
1219         old_plane_count = stream_status->plane_count;
1220
1221         for (i = 0; i < old_plane_count; i++)
1222                 del_planes[i] = stream_status->plane_states[i];
1223
1224         for (i = 0; i < old_plane_count; i++)
1225                 if (!dc_remove_plane_from_context(dc, stream, del_planes[i], context))
1226                         return false;
1227
1228         return true;
1229 }
1230
1231 static bool add_all_planes_for_stream(
1232                 const struct dc *dc,
1233                 struct dc_stream_state *stream,
1234                 const struct dc_validation_set set[],
1235                 int set_count,
1236                 struct dc_state *context)
1237 {
1238         int i, j;
1239
1240         for (i = 0; i < set_count; i++)
1241                 if (set[i].stream == stream)
1242                         break;
1243
1244         if (i == set_count) {
1245                 dm_error("Stream %p not found in set!\n", stream);
1246                 return false;
1247         }
1248
1249         for (j = 0; j < set[i].plane_count; j++)
1250                 if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context))
1251                         return false;
1252
1253         return true;
1254 }
1255
1256 bool dc_add_all_planes_for_stream(
1257                 const struct dc *dc,
1258                 struct dc_stream_state *stream,
1259                 struct dc_plane_state * const *plane_states,
1260                 int plane_count,
1261                 struct dc_state *context)
1262 {
1263         struct dc_validation_set set;
1264         int i;
1265
1266         set.stream = stream;
1267         set.plane_count = plane_count;
1268
1269         for (i = 0; i < plane_count; i++)
1270                 set.plane_states[i] = plane_states[i];
1271
1272         return add_all_planes_for_stream(dc, stream, &set, 1, context);
1273 }
1274
1275
1276
1277 static bool is_timing_changed(struct dc_stream_state *cur_stream,
1278                 struct dc_stream_state *new_stream)
1279 {
1280         if (cur_stream == NULL)
1281                 return true;
1282
1283         /* If sink pointer changed, it means this is a hotplug, we should do
1284          * full hw setting.
1285          */
1286         if (cur_stream->sink != new_stream->sink)
1287                 return true;
1288
1289         /* If output color space is changed, need to reprogram info frames */
1290         if (cur_stream->output_color_space != new_stream->output_color_space)
1291                 return true;
1292
1293         return memcmp(
1294                 &cur_stream->timing,
1295                 &new_stream->timing,
1296                 sizeof(struct dc_crtc_timing)) != 0;
1297 }
1298
1299 static bool are_stream_backends_same(
1300         struct dc_stream_state *stream_a, struct dc_stream_state *stream_b)
1301 {
1302         if (stream_a == stream_b)
1303                 return true;
1304
1305         if (stream_a == NULL || stream_b == NULL)
1306                 return false;
1307
1308         if (is_timing_changed(stream_a, stream_b))
1309                 return false;
1310
1311         return true;
1312 }
1313
1314 bool dc_is_stream_unchanged(
1315         struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1316 {
1317
1318         if (!are_stream_backends_same(old_stream, stream))
1319                 return false;
1320
1321         return true;
1322 }
1323
1324 bool dc_is_stream_scaling_unchanged(
1325         struct dc_stream_state *old_stream, struct dc_stream_state *stream)
1326 {
1327         if (old_stream == stream)
1328                 return true;
1329
1330         if (old_stream == NULL || stream == NULL)
1331                 return false;
1332
1333         if (memcmp(&old_stream->src,
1334                         &stream->src,
1335                         sizeof(struct rect)) != 0)
1336                 return false;
1337
1338         if (memcmp(&old_stream->dst,
1339                         &stream->dst,
1340                         sizeof(struct rect)) != 0)
1341                 return false;
1342
1343         return true;
1344 }
1345
1346 /* Maximum TMDS single link pixel clock 165MHz */
1347 #define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000
1348
1349 static void update_stream_engine_usage(
1350                 struct resource_context *res_ctx,
1351                 const struct resource_pool *pool,
1352                 struct stream_encoder *stream_enc,
1353                 bool acquired)
1354 {
1355         int i;
1356
1357         for (i = 0; i < pool->stream_enc_count; i++) {
1358                 if (pool->stream_enc[i] == stream_enc)
1359                         res_ctx->is_stream_enc_acquired[i] = acquired;
1360         }
1361 }
1362
1363 /* TODO: release audio object */
1364 void update_audio_usage(
1365                 struct resource_context *res_ctx,
1366                 const struct resource_pool *pool,
1367                 struct audio *audio,
1368                 bool acquired)
1369 {
1370         int i;
1371         for (i = 0; i < pool->audio_count; i++) {
1372                 if (pool->audios[i] == audio)
1373                         res_ctx->is_audio_acquired[i] = acquired;
1374         }
1375 }
1376
1377 static int acquire_first_free_pipe(
1378                 struct resource_context *res_ctx,
1379                 const struct resource_pool *pool,
1380                 struct dc_stream_state *stream)
1381 {
1382         int i;
1383
1384         for (i = 0; i < pool->pipe_count; i++) {
1385                 if (!res_ctx->pipe_ctx[i].stream) {
1386                         struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
1387
1388                         pipe_ctx->stream_res.tg = pool->timing_generators[i];
1389                         pipe_ctx->plane_res.mi = pool->mis[i];
1390                         pipe_ctx->plane_res.hubp = pool->hubps[i];
1391                         pipe_ctx->plane_res.ipp = pool->ipps[i];
1392                         pipe_ctx->plane_res.xfm = pool->transforms[i];
1393                         pipe_ctx->plane_res.dpp = pool->dpps[i];
1394                         pipe_ctx->stream_res.opp = pool->opps[i];
1395                         pipe_ctx->pipe_idx = i;
1396
1397
1398                         pipe_ctx->stream = stream;
1399                         return i;
1400                 }
1401         }
1402         return -1;
1403 }
1404
1405 static struct stream_encoder *find_first_free_match_stream_enc_for_link(
1406                 struct resource_context *res_ctx,
1407                 const struct resource_pool *pool,
1408                 struct dc_stream_state *stream)
1409 {
1410         int i;
1411         int j = -1;
1412         struct dc_link *link = stream->sink->link;
1413
1414         for (i = 0; i < pool->stream_enc_count; i++) {
1415                 if (!res_ctx->is_stream_enc_acquired[i] &&
1416                                 pool->stream_enc[i]) {
1417                         /* Store first available for MST second display
1418                          * in daisy chain use case */
1419                         j = i;
1420                         if (pool->stream_enc[i]->id ==
1421                                         link->link_enc->preferred_engine)
1422                                 return pool->stream_enc[i];
1423                 }
1424         }
1425
1426         /*
1427          * below can happen in cases when stream encoder is acquired:
1428          * 1) for second MST display in chain, so preferred engine already
1429          * acquired;
1430          * 2) for another link, which preferred engine already acquired by any
1431          * MST configuration.
1432          *
1433          * If signal is of DP type and preferred engine not found, return last available
1434          *
1435          * TODO - This is just a patch up and a generic solution is
1436          * required for non DP connectors.
1437          */
1438
1439         if (j >= 0 && dc_is_dp_signal(stream->signal))
1440                 return pool->stream_enc[j];
1441
1442         return NULL;
1443 }
1444
1445 static struct audio *find_first_free_audio(
1446                 struct resource_context *res_ctx,
1447                 const struct resource_pool *pool,
1448                 enum engine_id id)
1449 {
1450         int i;
1451         for (i = 0; i < pool->audio_count; i++) {
1452                 if ((res_ctx->is_audio_acquired[i] == false) && (res_ctx->is_stream_enc_acquired[i] == true)) {
1453                         /*we have enough audio endpoint, find the matching inst*/
1454                         if (id != i)
1455                                 continue;
1456
1457                         return pool->audios[i];
1458                 }
1459         }
1460         /*not found the matching one, first come first serve*/
1461         for (i = 0; i < pool->audio_count; i++) {
1462                 if (res_ctx->is_audio_acquired[i] == false) {
1463                         return pool->audios[i];
1464                 }
1465         }
1466         return 0;
1467 }
1468
1469 bool resource_is_stream_unchanged(
1470         struct dc_state *old_context, struct dc_stream_state *stream)
1471 {
1472         int i;
1473
1474         for (i = 0; i < old_context->stream_count; i++) {
1475                 struct dc_stream_state *old_stream = old_context->streams[i];
1476
1477                 if (are_stream_backends_same(old_stream, stream))
1478                                 return true;
1479         }
1480
1481         return false;
1482 }
1483
1484 enum dc_status dc_add_stream_to_ctx(
1485                 struct dc *dc,
1486                 struct dc_state *new_ctx,
1487                 struct dc_stream_state *stream)
1488 {
1489         struct dc_context *dc_ctx = dc->ctx;
1490         enum dc_status res;
1491
1492         if (new_ctx->stream_count >= dc->res_pool->pipe_count) {
1493                 DC_ERROR("Max streams reached, can add stream %p !\n", stream);
1494                 return DC_ERROR_UNEXPECTED;
1495         }
1496
1497         new_ctx->streams[new_ctx->stream_count] = stream;
1498         dc_stream_retain(stream);
1499         new_ctx->stream_count++;
1500
1501         res = dc->res_pool->funcs->add_stream_to_ctx(dc, new_ctx, stream);
1502         if (res != DC_OK)
1503                 DC_ERROR("Adding stream %p to context failed with err %d!\n", stream, res);
1504
1505         return res;
1506 }
1507
1508 enum dc_status dc_remove_stream_from_ctx(
1509                         struct dc *dc,
1510                         struct dc_state *new_ctx,
1511                         struct dc_stream_state *stream)
1512 {
1513         int i;
1514         struct dc_context *dc_ctx = dc->ctx;
1515         struct pipe_ctx *del_pipe = NULL;
1516
1517         /* Release primary pipe */
1518         for (i = 0; i < MAX_PIPES; i++) {
1519                 if (new_ctx->res_ctx.pipe_ctx[i].stream == stream &&
1520                                 !new_ctx->res_ctx.pipe_ctx[i].top_pipe) {
1521                         del_pipe = &new_ctx->res_ctx.pipe_ctx[i];
1522
1523                         ASSERT(del_pipe->stream_res.stream_enc);
1524                         update_stream_engine_usage(
1525                                         &new_ctx->res_ctx,
1526                                                 dc->res_pool,
1527                                         del_pipe->stream_res.stream_enc,
1528                                         false);
1529
1530                         if (del_pipe->stream_res.audio)
1531                                 update_audio_usage(
1532                                         &new_ctx->res_ctx,
1533                                         dc->res_pool,
1534                                         del_pipe->stream_res.audio,
1535                                         false);
1536
1537                         resource_unreference_clock_source(&new_ctx->res_ctx,
1538                                                           dc->res_pool,
1539                                                           del_pipe->clock_source);
1540
1541                         memset(del_pipe, 0, sizeof(*del_pipe));
1542
1543                         break;
1544                 }
1545         }
1546
1547         if (!del_pipe) {
1548                 DC_ERROR("Pipe not found for stream %p !\n", stream);
1549                 return DC_ERROR_UNEXPECTED;
1550         }
1551
1552         for (i = 0; i < new_ctx->stream_count; i++)
1553                 if (new_ctx->streams[i] == stream)
1554                         break;
1555
1556         if (new_ctx->streams[i] != stream) {
1557                 DC_ERROR("Context doesn't have stream %p !\n", stream);
1558                 return DC_ERROR_UNEXPECTED;
1559         }
1560
1561         dc_stream_release(new_ctx->streams[i]);
1562         new_ctx->stream_count--;
1563
1564         /* Trim back arrays */
1565         for (; i < new_ctx->stream_count; i++) {
1566                 new_ctx->streams[i] = new_ctx->streams[i + 1];
1567                 new_ctx->stream_status[i] = new_ctx->stream_status[i + 1];
1568         }
1569
1570         new_ctx->streams[new_ctx->stream_count] = NULL;
1571         memset(
1572                         &new_ctx->stream_status[new_ctx->stream_count],
1573                         0,
1574                         sizeof(new_ctx->stream_status[0]));
1575
1576         return DC_OK;
1577 }
1578
1579 static void copy_pipe_ctx(
1580         const struct pipe_ctx *from_pipe_ctx, struct pipe_ctx *to_pipe_ctx)
1581 {
1582         struct dc_plane_state *plane_state = to_pipe_ctx->plane_state;
1583         struct dc_stream_state *stream = to_pipe_ctx->stream;
1584
1585         *to_pipe_ctx = *from_pipe_ctx;
1586         to_pipe_ctx->stream = stream;
1587         if (plane_state != NULL)
1588                 to_pipe_ctx->plane_state = plane_state;
1589 }
1590
1591 static struct dc_stream_state *find_pll_sharable_stream(
1592                 struct dc_stream_state *stream_needs_pll,
1593                 struct dc_state *context)
1594 {
1595         int i;
1596
1597         for (i = 0; i < context->stream_count; i++) {
1598                 struct dc_stream_state *stream_has_pll = context->streams[i];
1599
1600                 /* We are looking for non dp, non virtual stream */
1601                 if (resource_are_streams_timing_synchronizable(
1602                         stream_needs_pll, stream_has_pll)
1603                         && !dc_is_dp_signal(stream_has_pll->signal)
1604                         && stream_has_pll->sink->link->connector_signal
1605                         != SIGNAL_TYPE_VIRTUAL)
1606                         return stream_has_pll;
1607
1608         }
1609
1610         return NULL;
1611 }
1612
1613 static int get_norm_pix_clk(const struct dc_crtc_timing *timing)
1614 {
1615         uint32_t pix_clk = timing->pix_clk_khz;
1616         uint32_t normalized_pix_clk = pix_clk;
1617
1618         if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
1619                 pix_clk /= 2;
1620         if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) {
1621                 switch (timing->display_color_depth) {
1622                 case COLOR_DEPTH_888:
1623                         normalized_pix_clk = pix_clk;
1624                         break;
1625                 case COLOR_DEPTH_101010:
1626                         normalized_pix_clk = (pix_clk * 30) / 24;
1627                         break;
1628                 case COLOR_DEPTH_121212:
1629                         normalized_pix_clk = (pix_clk * 36) / 24;
1630                 break;
1631                 case COLOR_DEPTH_161616:
1632                         normalized_pix_clk = (pix_clk * 48) / 24;
1633                 break;
1634                 default:
1635                         ASSERT(0);
1636                 break;
1637                 }
1638         }
1639         return normalized_pix_clk;
1640 }
1641
1642 static void calculate_phy_pix_clks(struct dc_stream_state *stream)
1643 {
1644         /* update actual pixel clock on all streams */
1645         if (dc_is_hdmi_signal(stream->signal))
1646                 stream->phy_pix_clk = get_norm_pix_clk(
1647                         &stream->timing);
1648         else
1649                 stream->phy_pix_clk =
1650                         stream->timing.pix_clk_khz;
1651 }
1652
1653 enum dc_status resource_map_pool_resources(
1654                 const struct dc  *dc,
1655                 struct dc_state *context,
1656                 struct dc_stream_state *stream)
1657 {
1658         const struct resource_pool *pool = dc->res_pool;
1659         int i;
1660         struct dc_context *dc_ctx = dc->ctx;
1661         struct pipe_ctx *pipe_ctx = NULL;
1662         int pipe_idx = -1;
1663
1664         /* TODO Check if this is needed */
1665         /*if (!resource_is_stream_unchanged(old_context, stream)) {
1666                         if (stream != NULL && old_context->streams[i] != NULL) {
1667                                 stream->bit_depth_params =
1668                                                 old_context->streams[i]->bit_depth_params;
1669                                 stream->clamping = old_context->streams[i]->clamping;
1670                                 continue;
1671                         }
1672                 }
1673         */
1674
1675         /* acquire new resources */
1676         pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);
1677
1678 #ifdef CONFIG_DRM_AMD_DC_DCN1_0
1679         if (pipe_idx < 0)
1680                 pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);
1681 #endif
1682
1683         if (pipe_idx < 0)
1684                 return DC_NO_CONTROLLER_RESOURCE;
1685
1686         pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx];
1687
1688         pipe_ctx->stream_res.stream_enc =
1689                 find_first_free_match_stream_enc_for_link(
1690                         &context->res_ctx, pool, stream);
1691
1692         if (!pipe_ctx->stream_res.stream_enc)
1693                 return DC_NO_STREAM_ENG_RESOURCE;
1694
1695         update_stream_engine_usage(
1696                 &context->res_ctx, pool,
1697                 pipe_ctx->stream_res.stream_enc,
1698                 true);
1699
1700         /* TODO: Add check if ASIC support and EDID audio */
1701         if (!stream->sink->converter_disable_audio &&
1702             dc_is_audio_capable_signal(pipe_ctx->stream->signal) &&
1703             stream->audio_info.mode_count) {
1704                 pipe_ctx->stream_res.audio = find_first_free_audio(
1705                 &context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id);
1706
1707                 /*
1708                  * Audio assigned in order first come first get.
1709                  * There are asics which has number of audio
1710                  * resources less then number of pipes
1711                  */
1712                 if (pipe_ctx->stream_res.audio)
1713                         update_audio_usage(&context->res_ctx, pool,
1714                                            pipe_ctx->stream_res.audio, true);
1715         }
1716
1717         for (i = 0; i < context->stream_count; i++)
1718                 if (context->streams[i] == stream) {
1719                         context->stream_status[i].primary_otg_inst = pipe_ctx->stream_res.tg->inst;
1720                         context->stream_status[i].stream_enc_inst = pipe_ctx->stream_res.stream_enc->id;
1721                         return DC_OK;
1722                 }
1723
1724         DC_ERROR("Stream %p not found in new ctx!\n", stream);
1725         return DC_ERROR_UNEXPECTED;
1726 }
1727
1728 /* first stream in the context is used to populate the rest */
1729 void validate_guaranteed_copy_streams(
1730                 struct dc_state *context,
1731                 int max_streams)
1732 {
1733         int i;
1734
1735         for (i = 1; i < max_streams; i++) {
1736                 context->streams[i] = context->streams[0];
1737
1738                 copy_pipe_ctx(&context->res_ctx.pipe_ctx[0],
1739                               &context->res_ctx.pipe_ctx[i]);
1740                 context->res_ctx.pipe_ctx[i].stream =
1741                                 context->res_ctx.pipe_ctx[0].stream;
1742
1743                 dc_stream_retain(context->streams[i]);
1744                 context->stream_count++;
1745         }
1746 }
1747
1748 void dc_resource_state_copy_construct_current(
1749                 const struct dc *dc,
1750                 struct dc_state *dst_ctx)
1751 {
1752         dc_resource_state_copy_construct(dc->current_state, dst_ctx);
1753 }
1754
1755
1756 void dc_resource_state_construct(
1757                 const struct dc *dc,
1758                 struct dc_state *dst_ctx)
1759 {
1760         dst_ctx->dis_clk = dc->res_pool->display_clock;
1761 }
1762
1763 enum dc_status dc_validate_global_state(
1764                 struct dc *dc,
1765                 struct dc_state *new_ctx)
1766 {
1767         enum dc_status result = DC_ERROR_UNEXPECTED;
1768         int i, j;
1769
1770         if (!new_ctx)
1771                 return DC_ERROR_UNEXPECTED;
1772
1773         if (dc->res_pool->funcs->validate_global) {
1774                         result = dc->res_pool->funcs->validate_global(dc, new_ctx);
1775                         if (result != DC_OK)
1776                                 return result;
1777         }
1778
1779         for (i = 0; i < new_ctx->stream_count; i++) {
1780                 struct dc_stream_state *stream = new_ctx->streams[i];
1781
1782                 for (j = 0; j < dc->res_pool->pipe_count; j++) {
1783                         struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j];
1784
1785                         if (pipe_ctx->stream != stream)
1786                                 continue;
1787
1788                         /* Switch to dp clock source only if there is
1789                          * no non dp stream that shares the same timing
1790                          * with the dp stream.
1791                          */
1792                         if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
1793                                 !find_pll_sharable_stream(stream, new_ctx)) {
1794
1795                                 resource_unreference_clock_source(
1796                                                 &new_ctx->res_ctx,
1797                                                 dc->res_pool,
1798                                                 pipe_ctx->clock_source);
1799
1800                                 pipe_ctx->clock_source = dc->res_pool->dp_clock_source;
1801                                 resource_reference_clock_source(
1802                                                 &new_ctx->res_ctx,
1803                                                 dc->res_pool,
1804                                                  pipe_ctx->clock_source);
1805                         }
1806                 }
1807         }
1808
1809         result = resource_build_scaling_params_for_context(dc, new_ctx);
1810
1811         if (result == DC_OK)
1812                 if (!dc->res_pool->funcs->validate_bandwidth(dc, new_ctx))
1813                         result = DC_FAIL_BANDWIDTH_VALIDATE;
1814
1815         return result;
1816 }
1817
1818 static void patch_gamut_packet_checksum(
1819                 struct encoder_info_packet *gamut_packet)
1820 {
1821         /* For gamut we recalc checksum */
1822         if (gamut_packet->valid) {
1823                 uint8_t chk_sum = 0;
1824                 uint8_t *ptr;
1825                 uint8_t i;
1826
1827                 /*start of the Gamut data. */
1828                 ptr = &gamut_packet->sb[3];
1829
1830                 for (i = 0; i <= gamut_packet->sb[1]; i++)
1831                         chk_sum += ptr[i];
1832
1833                 gamut_packet->sb[2] = (uint8_t) (0x100 - chk_sum);
1834         }
1835 }
1836
1837 static void set_avi_info_frame(
1838                 struct encoder_info_packet *info_packet,
1839                 struct pipe_ctx *pipe_ctx)
1840 {
1841         struct dc_stream_state *stream = pipe_ctx->stream;
1842         enum dc_color_space color_space = COLOR_SPACE_UNKNOWN;
1843         struct info_frame info_frame = { {0} };
1844         uint32_t pixel_encoding = 0;
1845         enum scanning_type scan_type = SCANNING_TYPE_NODATA;
1846         enum dc_aspect_ratio aspect = ASPECT_RATIO_NO_DATA;
1847         bool itc = false;
1848         uint8_t itc_value = 0;
1849         uint8_t cn0_cn1 = 0;
1850         unsigned int cn0_cn1_value = 0;
1851         uint8_t *check_sum = NULL;
1852         uint8_t byte_index = 0;
1853         union hdmi_info_packet *hdmi_info = &info_frame.avi_info_packet.info_packet_hdmi;
1854         union display_content_support support = {0};
1855         unsigned int vic = pipe_ctx->stream->timing.vic;
1856         enum dc_timing_3d_format format;
1857
1858         color_space = pipe_ctx->stream->output_color_space;
1859         if (color_space == COLOR_SPACE_UNKNOWN)
1860                 color_space = (stream->timing.pixel_encoding == PIXEL_ENCODING_RGB) ?
1861                         COLOR_SPACE_SRGB:COLOR_SPACE_YCBCR709;
1862
1863         /* Initialize header */
1864         hdmi_info->bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI;
1865         /* InfoFrameVersion_3 is defined by CEA861F (Section 6.4), but shall
1866         * not be used in HDMI 2.0 (Section 10.1) */
1867         hdmi_info->bits.header.version = 2;
1868         hdmi_info->bits.header.length = HDMI_AVI_INFOFRAME_SIZE;
1869
1870         /*
1871          * IDO-defined (Y2,Y1,Y0 = 1,1,1) shall not be used by devices built
1872          * according to HDMI 2.0 spec (Section 10.1)
1873          */
1874
1875         switch (stream->timing.pixel_encoding) {
1876         case PIXEL_ENCODING_YCBCR422:
1877                 pixel_encoding = 1;
1878                 break;
1879
1880         case PIXEL_ENCODING_YCBCR444:
1881                 pixel_encoding = 2;
1882                 break;
1883         case PIXEL_ENCODING_YCBCR420:
1884                 pixel_encoding = 3;
1885                 break;
1886
1887         case PIXEL_ENCODING_RGB:
1888         default:
1889                 pixel_encoding = 0;
1890         }
1891
1892         /* Y0_Y1_Y2 : The pixel encoding */
1893         /* H14b AVI InfoFrame has extension on Y-field from 2 bits to 3 bits */
1894         hdmi_info->bits.Y0_Y1_Y2 = pixel_encoding;
1895
1896         /* A0 = 1 Active Format Information valid */
1897         hdmi_info->bits.A0 = ACTIVE_FORMAT_VALID;
1898
1899         /* B0, B1 = 3; Bar info data is valid */
1900         hdmi_info->bits.B0_B1 = BAR_INFO_BOTH_VALID;
1901
1902         hdmi_info->bits.SC0_SC1 = PICTURE_SCALING_UNIFORM;
1903
1904         /* S0, S1 : Underscan / Overscan */
1905         /* TODO: un-hardcode scan type */
1906         scan_type = SCANNING_TYPE_UNDERSCAN;
1907         hdmi_info->bits.S0_S1 = scan_type;
1908
1909         /* C0, C1 : Colorimetry */
1910         if (color_space == COLOR_SPACE_YCBCR709 ||
1911                         color_space == COLOR_SPACE_YCBCR709_LIMITED)
1912                 hdmi_info->bits.C0_C1 = COLORIMETRY_ITU709;
1913         else if (color_space == COLOR_SPACE_YCBCR601 ||
1914                         color_space == COLOR_SPACE_YCBCR601_LIMITED)
1915                 hdmi_info->bits.C0_C1 = COLORIMETRY_ITU601;
1916         else {
1917                 hdmi_info->bits.C0_C1 = COLORIMETRY_NO_DATA;
1918         }
1919         if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||
1920                         color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE ||
1921                         color_space == COLOR_SPACE_2020_YCBCR) {
1922                 hdmi_info->bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR;
1923                 hdmi_info->bits.C0_C1   = COLORIMETRY_EXTENDED;
1924         } else if (color_space == COLOR_SPACE_ADOBERGB) {
1925                 hdmi_info->bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB;
1926                 hdmi_info->bits.C0_C1   = COLORIMETRY_EXTENDED;
1927         }
1928
1929         /* TODO: un-hardcode aspect ratio */
1930         aspect = stream->timing.aspect_ratio;
1931
1932         switch (aspect) {
1933         case ASPECT_RATIO_4_3:
1934         case ASPECT_RATIO_16_9:
1935                 hdmi_info->bits.M0_M1 = aspect;
1936                 break;
1937
1938         case ASPECT_RATIO_NO_DATA:
1939         case ASPECT_RATIO_64_27:
1940         case ASPECT_RATIO_256_135:
1941         default:
1942                 hdmi_info->bits.M0_M1 = 0;
1943         }
1944
1945         /* Active Format Aspect ratio - same as Picture Aspect Ratio. */
1946         hdmi_info->bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE;
1947
1948         /* TODO: un-hardcode cn0_cn1 and itc */
1949
1950         cn0_cn1 = 0;
1951         cn0_cn1_value = 0;
1952
1953         itc = true;
1954         itc_value = 1;
1955
1956         support = stream->sink->edid_caps.content_support;
1957
1958         if (itc) {
1959                 if (!support.bits.valid_content_type) {
1960                         cn0_cn1_value = 0;
1961                 } else {
1962                         if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GRAPHICS) {
1963                                 if (support.bits.graphics_content == 1) {
1964                                         cn0_cn1_value = 0;
1965                                 }
1966                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_PHOTO) {
1967                                 if (support.bits.photo_content == 1) {
1968                                         cn0_cn1_value = 1;
1969                                 } else {
1970                                         cn0_cn1_value = 0;
1971                                         itc_value = 0;
1972                                 }
1973                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_CINEMA) {
1974                                 if (support.bits.cinema_content == 1) {
1975                                         cn0_cn1_value = 2;
1976                                 } else {
1977                                         cn0_cn1_value = 0;
1978                                         itc_value = 0;
1979                                 }
1980                         } else if (cn0_cn1 == DISPLAY_CONTENT_TYPE_GAME) {
1981                                 if (support.bits.game_content == 1) {
1982                                         cn0_cn1_value = 3;
1983                                 } else {
1984                                         cn0_cn1_value = 0;
1985                                         itc_value = 0;
1986                                 }
1987                         }
1988                 }
1989                 hdmi_info->bits.CN0_CN1 = cn0_cn1_value;
1990                 hdmi_info->bits.ITC = itc_value;
1991         }
1992
1993         /* TODO : We should handle YCC quantization */
1994         /* but we do not have matrix calculation */
1995         if (stream->sink->edid_caps.qs_bit == 1 &&
1996                         stream->sink->edid_caps.qy_bit == 1) {
1997                 if (color_space == COLOR_SPACE_SRGB ||
1998                         color_space == COLOR_SPACE_2020_RGB_FULLRANGE) {
1999                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_FULL_RANGE;
2000                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_FULL_RANGE;
2001                 } else if (color_space == COLOR_SPACE_SRGB_LIMITED ||
2002                                         color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) {
2003                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_LIMITED_RANGE;
2004                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
2005                 } else {
2006                         hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
2007                         hdmi_info->bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
2008                 }
2009         } else {
2010                 hdmi_info->bits.Q0_Q1   = RGB_QUANTIZATION_DEFAULT_RANGE;
2011                 hdmi_info->bits.YQ0_YQ1   = YYC_QUANTIZATION_LIMITED_RANGE;
2012         }
2013
2014         ///VIC
2015         format = stream->timing.timing_3d_format;
2016         /*todo, add 3DStereo support*/
2017         if (format != TIMING_3D_FORMAT_NONE) {
2018                 // Based on HDMI specs hdmi vic needs to be converted to cea vic when 3D is enabled
2019                 switch (pipe_ctx->stream->timing.hdmi_vic) {
2020                 case 1:
2021                         vic = 95;
2022                         break;
2023                 case 2:
2024                         vic = 94;
2025                         break;
2026                 case 3:
2027                         vic = 93;
2028                         break;
2029                 case 4:
2030                         vic = 98;
2031                         break;
2032                 default:
2033                         break;
2034                 }
2035         }
2036         hdmi_info->bits.VIC0_VIC7 = vic;
2037
2038         /* pixel repetition
2039          * PR0 - PR3 start from 0 whereas pHwPathMode->mode.timing.flags.pixel
2040          * repetition start from 1 */
2041         hdmi_info->bits.PR0_PR3 = 0;
2042
2043         /* Bar Info
2044          * barTop:    Line Number of End of Top Bar.
2045          * barBottom: Line Number of Start of Bottom Bar.
2046          * barLeft:   Pixel Number of End of Left Bar.
2047          * barRight:  Pixel Number of Start of Right Bar. */
2048         hdmi_info->bits.bar_top = stream->timing.v_border_top;
2049         hdmi_info->bits.bar_bottom = (stream->timing.v_total
2050                         - stream->timing.v_border_bottom + 1);
2051         hdmi_info->bits.bar_left  = stream->timing.h_border_left;
2052         hdmi_info->bits.bar_right = (stream->timing.h_total
2053                         - stream->timing.h_border_right + 1);
2054
2055         /* check_sum - Calculate AFMT_AVI_INFO0 ~ AFMT_AVI_INFO3 */
2056         check_sum = &info_frame.avi_info_packet.info_packet_hdmi.packet_raw_data.sb[0];
2057
2058         *check_sum = HDMI_INFOFRAME_TYPE_AVI + HDMI_AVI_INFOFRAME_SIZE + 2;
2059
2060         for (byte_index = 1; byte_index <= HDMI_AVI_INFOFRAME_SIZE; byte_index++)
2061                 *check_sum += hdmi_info->packet_raw_data.sb[byte_index];
2062
2063         /* one byte complement */
2064         *check_sum = (uint8_t) (0x100 - *check_sum);
2065
2066         /* Store in hw_path_mode */
2067         info_packet->hb0 = hdmi_info->packet_raw_data.hb0;
2068         info_packet->hb1 = hdmi_info->packet_raw_data.hb1;
2069         info_packet->hb2 = hdmi_info->packet_raw_data.hb2;
2070
2071         for (byte_index = 0; byte_index < sizeof(info_frame.avi_info_packet.
2072                                 info_packet_hdmi.packet_raw_data.sb); byte_index++)
2073                 info_packet->sb[byte_index] = info_frame.avi_info_packet.
2074                                 info_packet_hdmi.packet_raw_data.sb[byte_index];
2075
2076         info_packet->valid = true;
2077 }
2078
2079 static void set_vendor_info_packet(
2080                 struct encoder_info_packet *info_packet,
2081                 struct dc_stream_state *stream)
2082 {
2083         uint32_t length = 0;
2084         bool hdmi_vic_mode = false;
2085         uint8_t checksum = 0;
2086         uint32_t i = 0;
2087         enum dc_timing_3d_format format;
2088         // Can be different depending on packet content /*todo*/
2089         // unsigned int length = pPathMode->dolbyVision ? 24 : 5;
2090
2091         info_packet->valid = false;
2092
2093         format = stream->timing.timing_3d_format;
2094         if (stream->view_format == VIEW_3D_FORMAT_NONE)
2095                 format = TIMING_3D_FORMAT_NONE;
2096
2097         /* Can be different depending on packet content */
2098         length = 5;
2099
2100         if (stream->timing.hdmi_vic != 0
2101                         && stream->timing.h_total >= 3840
2102                         && stream->timing.v_total >= 2160)
2103                 hdmi_vic_mode = true;
2104
2105         /* According to HDMI 1.4a CTS, VSIF should be sent
2106          * for both 3D stereo and HDMI VIC modes.
2107          * For all other modes, there is no VSIF sent.  */
2108
2109         if (format == TIMING_3D_FORMAT_NONE && !hdmi_vic_mode)
2110                 return;
2111
2112         /* 24bit IEEE Registration identifier (0x000c03). LSB first. */
2113         info_packet->sb[1] = 0x03;
2114         info_packet->sb[2] = 0x0C;
2115         info_packet->sb[3] = 0x00;
2116
2117         /*PB4: 5 lower bytes = 0 (reserved). 3 higher bits = HDMI_Video_Format.
2118          * The value for HDMI_Video_Format are:
2119          * 0x0 (0b000) - No additional HDMI video format is presented in this
2120          * packet
2121          * 0x1 (0b001) - Extended resolution format present. 1 byte of HDMI_VIC
2122          * parameter follows
2123          * 0x2 (0b010) - 3D format indication present. 3D_Structure and
2124          * potentially 3D_Ext_Data follows
2125          * 0x3..0x7 (0b011..0b111) - reserved for future use */
2126         if (format != TIMING_3D_FORMAT_NONE)
2127                 info_packet->sb[4] = (2 << 5);
2128         else if (hdmi_vic_mode)
2129                 info_packet->sb[4] = (1 << 5);
2130
2131         /* PB5: If PB4 claims 3D timing (HDMI_Video_Format = 0x2):
2132          * 4 lower bites = 0 (reserved). 4 higher bits = 3D_Structure.
2133          * The value for 3D_Structure are:
2134          * 0x0 - Frame Packing
2135          * 0x1 - Field Alternative
2136          * 0x2 - Line Alternative
2137          * 0x3 - Side-by-Side (full)
2138          * 0x4 - L + depth
2139          * 0x5 - L + depth + graphics + graphics-depth
2140          * 0x6 - Top-and-Bottom
2141          * 0x7 - Reserved for future use
2142          * 0x8 - Side-by-Side (Half)
2143          * 0x9..0xE - Reserved for future use
2144          * 0xF - Not used */
2145         switch (format) {
2146         case TIMING_3D_FORMAT_HW_FRAME_PACKING:
2147         case TIMING_3D_FORMAT_SW_FRAME_PACKING:
2148                 info_packet->sb[5] = (0x0 << 4);
2149                 break;
2150
2151         case TIMING_3D_FORMAT_SIDE_BY_SIDE:
2152         case TIMING_3D_FORMAT_SBS_SW_PACKED:
2153                 info_packet->sb[5] = (0x8 << 4);
2154                 length = 6;
2155                 break;
2156
2157         case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
2158         case TIMING_3D_FORMAT_TB_SW_PACKED:
2159                 info_packet->sb[5] = (0x6 << 4);
2160                 break;
2161
2162         default:
2163                 break;
2164         }
2165
2166         /*PB5: If PB4 is set to 0x1 (extended resolution format)
2167          * fill PB5 with the correct HDMI VIC code */
2168         if (hdmi_vic_mode)
2169                 info_packet->sb[5] = stream->timing.hdmi_vic;
2170
2171         /* Header */
2172         info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR; /* VSIF packet type. */
2173         info_packet->hb1 = 0x01; /* Version */
2174
2175         /* 4 lower bits = Length, 4 higher bits = 0 (reserved) */
2176         info_packet->hb2 = (uint8_t) (length);
2177
2178         /* Calculate checksum */
2179         checksum = 0;
2180         checksum += info_packet->hb0;
2181         checksum += info_packet->hb1;
2182         checksum += info_packet->hb2;
2183
2184         for (i = 1; i <= length; i++)
2185                 checksum += info_packet->sb[i];
2186
2187         info_packet->sb[0] = (uint8_t) (0x100 - checksum);
2188
2189         info_packet->valid = true;
2190 }
2191
2192 static void set_spd_info_packet(
2193                 struct encoder_info_packet *info_packet,
2194                 struct dc_stream_state *stream)
2195 {
2196         /* SPD info packet for FreeSync */
2197
2198         unsigned char checksum = 0;
2199         unsigned int idx, payload_size = 0;
2200
2201         /* Check if Freesync is supported. Return if false. If true,
2202          * set the corresponding bit in the info packet
2203          */
2204         if (stream->freesync_ctx.supported == false)
2205                 return;
2206
2207         if (dc_is_hdmi_signal(stream->signal)) {
2208
2209                 /* HEADER */
2210
2211                 /* HB0  = Packet Type = 0x83 (Source Product
2212                  *        Descriptor InfoFrame)
2213                  */
2214                 info_packet->hb0 = HDMI_INFOFRAME_TYPE_SPD;
2215
2216                 /* HB1  = Version = 0x01 */
2217                 info_packet->hb1 = 0x01;
2218
2219                 /* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
2220                 info_packet->hb2 = 0x08;
2221
2222                 payload_size = 0x08;
2223
2224         } else if (dc_is_dp_signal(stream->signal)) {
2225
2226                 /* HEADER */
2227
2228                 /* HB0  = Secondary-data Packet ID = 0 - Only non-zero
2229                  *        when used to associate audio related info packets
2230                  */
2231                 info_packet->hb0 = 0x00;
2232
2233                 /* HB1  = Packet Type = 0x83 (Source Product
2234                  *        Descriptor InfoFrame)
2235                  */
2236                 info_packet->hb1 = HDMI_INFOFRAME_TYPE_SPD;
2237
2238                 /* HB2  = [Bits 7:0 = Least significant eight bits -
2239                  *        For INFOFRAME, the value must be 1Bh]
2240                  */
2241                 info_packet->hb2 = 0x1B;
2242
2243                 /* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
2244                  *        [Bits 1:0 = Most significant two bits = 0x00]
2245                  */
2246                 info_packet->hb3 = 0x04;
2247
2248                 payload_size = 0x1B;
2249         }
2250
2251         /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
2252         info_packet->sb[1] = 0x1A;
2253
2254         /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
2255         info_packet->sb[2] = 0x00;
2256
2257         /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
2258         info_packet->sb[3] = 0x00;
2259
2260         /* PB4 = Reserved */
2261         info_packet->sb[4] = 0x00;
2262
2263         /* PB5 = Reserved */
2264         info_packet->sb[5] = 0x00;
2265
2266         /* PB6 = [Bits 7:3 = Reserved] */
2267         info_packet->sb[6] = 0x00;
2268
2269         if (stream->freesync_ctx.supported == true)
2270                 /* PB6 = [Bit 0 = FreeSync Supported] */
2271                 info_packet->sb[6] |= 0x01;
2272
2273         if (stream->freesync_ctx.enabled == true)
2274                 /* PB6 = [Bit 1 = FreeSync Enabled] */
2275                 info_packet->sb[6] |= 0x02;
2276
2277         if (stream->freesync_ctx.active == true)
2278                 /* PB6 = [Bit 2 = FreeSync Active] */
2279                 info_packet->sb[6] |= 0x04;
2280
2281         /* PB7 = FreeSync Minimum refresh rate (Hz) */
2282         info_packet->sb[7] = (unsigned char) (stream->freesync_ctx.
2283                         min_refresh_in_micro_hz / 1000000);
2284
2285         /* PB8 = FreeSync Maximum refresh rate (Hz)
2286          *
2287          * Note: We do not use the maximum capable refresh rate
2288          * of the panel, because we should never go above the field
2289          * rate of the mode timing set.
2290          */
2291         info_packet->sb[8] = (unsigned char) (stream->freesync_ctx.
2292                         nominal_refresh_in_micro_hz / 1000000);
2293
2294         /* PB9 - PB27  = Reserved */
2295         for (idx = 9; idx <= 27; idx++)
2296                 info_packet->sb[idx] = 0x00;
2297
2298         /* Calculate checksum */
2299         checksum += info_packet->hb0;
2300         checksum += info_packet->hb1;
2301         checksum += info_packet->hb2;
2302         checksum += info_packet->hb3;
2303
2304         for (idx = 1; idx <= payload_size; idx++)
2305                 checksum += info_packet->sb[idx];
2306
2307         /* PB0 = Checksum (one byte complement) */
2308         info_packet->sb[0] = (unsigned char) (0x100 - checksum);
2309
2310         info_packet->valid = true;
2311 }
2312
2313 static void set_hdr_static_info_packet(
2314                 struct encoder_info_packet *info_packet,
2315                 struct dc_stream_state *stream)
2316 {
2317         uint16_t i = 0;
2318         enum signal_type signal = stream->signal;
2319         uint32_t data;
2320
2321         if (!stream->hdr_static_metadata.hdr_supported)
2322                 return;
2323
2324         if (dc_is_hdmi_signal(signal)) {
2325                 info_packet->valid = true;
2326
2327                 info_packet->hb0 = 0x87;
2328                 info_packet->hb1 = 0x01;
2329                 info_packet->hb2 = 0x1A;
2330                 i = 1;
2331         } else if (dc_is_dp_signal(signal)) {
2332                 info_packet->valid = true;
2333
2334                 info_packet->hb0 = 0x00;
2335                 info_packet->hb1 = 0x87;
2336                 info_packet->hb2 = 0x1D;
2337                 info_packet->hb3 = (0x13 << 2);
2338                 i = 2;
2339         }
2340
2341         data = stream->hdr_static_metadata.is_hdr;
2342         info_packet->sb[i++] = data ? 0x02 : 0x00;
2343         info_packet->sb[i++] = 0x00;
2344
2345         data = stream->hdr_static_metadata.chromaticity_green_x / 2;
2346         info_packet->sb[i++] = data & 0xFF;
2347         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2348
2349         data = stream->hdr_static_metadata.chromaticity_green_y / 2;
2350         info_packet->sb[i++] = data & 0xFF;
2351         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2352
2353         data = stream->hdr_static_metadata.chromaticity_blue_x / 2;
2354         info_packet->sb[i++] = data & 0xFF;
2355         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2356
2357         data = stream->hdr_static_metadata.chromaticity_blue_y / 2;
2358         info_packet->sb[i++] = data & 0xFF;
2359         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2360
2361         data = stream->hdr_static_metadata.chromaticity_red_x / 2;
2362         info_packet->sb[i++] = data & 0xFF;
2363         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2364
2365         data = stream->hdr_static_metadata.chromaticity_red_y / 2;
2366         info_packet->sb[i++] = data & 0xFF;
2367         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2368
2369         data = stream->hdr_static_metadata.chromaticity_white_point_x / 2;
2370         info_packet->sb[i++] = data & 0xFF;
2371         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2372
2373         data = stream->hdr_static_metadata.chromaticity_white_point_y / 2;
2374         info_packet->sb[i++] = data & 0xFF;
2375         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2376
2377         data = stream->hdr_static_metadata.max_luminance;
2378         info_packet->sb[i++] = data & 0xFF;
2379         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2380
2381         data = stream->hdr_static_metadata.min_luminance;
2382         info_packet->sb[i++] = data & 0xFF;
2383         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2384
2385         data = stream->hdr_static_metadata.maximum_content_light_level;
2386         info_packet->sb[i++] = data & 0xFF;
2387         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2388
2389         data = stream->hdr_static_metadata.maximum_frame_average_light_level;
2390         info_packet->sb[i++] = data & 0xFF;
2391         info_packet->sb[i++] = (data & 0xFF00) >> 8;
2392
2393         if (dc_is_hdmi_signal(signal)) {
2394                 uint32_t checksum = 0;
2395
2396                 checksum += info_packet->hb0;
2397                 checksum += info_packet->hb1;
2398                 checksum += info_packet->hb2;
2399
2400                 for (i = 1; i <= info_packet->hb2; i++)
2401                         checksum += info_packet->sb[i];
2402
2403                 info_packet->sb[0] = 0x100 - checksum;
2404         } else if (dc_is_dp_signal(signal)) {
2405                 info_packet->sb[0] = 0x01;
2406                 info_packet->sb[1] = 0x1A;
2407         }
2408 }
2409
2410 static void set_vsc_info_packet(
2411                 struct encoder_info_packet *info_packet,
2412                 struct dc_stream_state *stream)
2413 {
2414         unsigned int vscPacketRevision = 0;
2415         unsigned int i;
2416
2417         if (stream->sink->link->psr_enabled) {
2418                 vscPacketRevision = 2;
2419         }
2420
2421         /* VSC packet not needed based on the features
2422          * supported by this DP display
2423          */
2424         if (vscPacketRevision == 0)
2425                 return;
2426
2427         if (vscPacketRevision == 0x2) {
2428                 /* Secondary-data Packet ID = 0*/
2429                 info_packet->hb0 = 0x00;
2430                 /* 07h - Packet Type Value indicating Video
2431                  * Stream Configuration packet
2432                  */
2433                 info_packet->hb1 = 0x07;
2434                 /* 02h = VSC SDP supporting 3D stereo and PSR
2435                  * (applies to eDP v1.3 or higher).
2436                  */
2437                 info_packet->hb2 = 0x02;
2438                 /* 08h = VSC packet supporting 3D stereo + PSR
2439                  * (HB2 = 02h).
2440                  */
2441                 info_packet->hb3 = 0x08;
2442
2443                 for (i = 0; i < 28; i++)
2444                         info_packet->sb[i] = 0;
2445
2446                 info_packet->valid = true;
2447         }
2448
2449         /*TODO: stereo 3D support and extend pixel encoding colorimetry*/
2450 }
2451
2452 void dc_resource_state_destruct(struct dc_state *context)
2453 {
2454         int i, j;
2455
2456         for (i = 0; i < context->stream_count; i++) {
2457                 for (j = 0; j < context->stream_status[i].plane_count; j++)
2458                         dc_plane_state_release(
2459                                 context->stream_status[i].plane_states[j]);
2460
2461                 context->stream_status[i].plane_count = 0;
2462                 dc_stream_release(context->streams[i]);
2463                 context->streams[i] = NULL;
2464         }
2465 }
2466
2467 /*
2468  * Copy src_ctx into dst_ctx and retain all surfaces and streams referenced
2469  * by the src_ctx
2470  */
2471 void dc_resource_state_copy_construct(
2472                 const struct dc_state *src_ctx,
2473                 struct dc_state *dst_ctx)
2474 {
2475         int i, j;
2476         struct kref refcount = dst_ctx->refcount;
2477
2478         *dst_ctx = *src_ctx;
2479
2480         for (i = 0; i < MAX_PIPES; i++) {
2481                 struct pipe_ctx *cur_pipe = &dst_ctx->res_ctx.pipe_ctx[i];
2482
2483                 if (cur_pipe->top_pipe)
2484                         cur_pipe->top_pipe =  &dst_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx];
2485
2486                 if (cur_pipe->bottom_pipe)
2487                         cur_pipe->bottom_pipe = &dst_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx];
2488
2489         }
2490
2491         for (i = 0; i < dst_ctx->stream_count; i++) {
2492                 dc_stream_retain(dst_ctx->streams[i]);
2493                 for (j = 0; j < dst_ctx->stream_status[i].plane_count; j++)
2494                         dc_plane_state_retain(
2495                                 dst_ctx->stream_status[i].plane_states[j]);
2496         }
2497
2498         /* context refcount should not be overridden */
2499         dst_ctx->refcount = refcount;
2500
2501 }
2502
2503 struct clock_source *dc_resource_find_first_free_pll(
2504                 struct resource_context *res_ctx,
2505                 const struct resource_pool *pool)
2506 {
2507         int i;
2508
2509         for (i = 0; i < pool->clk_src_count; ++i) {
2510                 if (res_ctx->clock_source_ref_count[i] == 0)
2511                         return pool->clock_sources[i];
2512         }
2513
2514         return NULL;
2515 }
2516
2517 void resource_build_info_frame(struct pipe_ctx *pipe_ctx)
2518 {
2519         enum signal_type signal = SIGNAL_TYPE_NONE;
2520         struct encoder_info_frame *info = &pipe_ctx->stream_res.encoder_info_frame;
2521
2522         /* default all packets to invalid */
2523         info->avi.valid = false;
2524         info->gamut.valid = false;
2525         info->vendor.valid = false;
2526         info->spd.valid = false;
2527         info->hdrsmd.valid = false;
2528         info->vsc.valid = false;
2529
2530         signal = pipe_ctx->stream->signal;
2531
2532         /* HDMi and DP have different info packets*/
2533         if (dc_is_hdmi_signal(signal)) {
2534                 set_avi_info_frame(&info->avi, pipe_ctx);
2535
2536                 set_vendor_info_packet(&info->vendor, pipe_ctx->stream);
2537
2538                 set_spd_info_packet(&info->spd, pipe_ctx->stream);
2539
2540                 set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);
2541
2542         } else if (dc_is_dp_signal(signal)) {
2543                 set_vsc_info_packet(&info->vsc, pipe_ctx->stream);
2544
2545                 set_spd_info_packet(&info->spd, pipe_ctx->stream);
2546
2547                 set_hdr_static_info_packet(&info->hdrsmd, pipe_ctx->stream);
2548         }
2549
2550         patch_gamut_packet_checksum(&info->gamut);
2551 }
2552
2553 enum dc_status resource_map_clock_resources(
2554                 const struct dc  *dc,
2555                 struct dc_state *context,
2556                 struct dc_stream_state *stream)
2557 {
2558         /* acquire new resources */
2559         const struct resource_pool *pool = dc->res_pool;
2560         struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(
2561                                 &context->res_ctx, stream);
2562
2563         if (!pipe_ctx)
2564                 return DC_ERROR_UNEXPECTED;
2565
2566         if (dc_is_dp_signal(pipe_ctx->stream->signal)
2567                 || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL)
2568                 pipe_ctx->clock_source = pool->dp_clock_source;
2569         else {
2570                 pipe_ctx->clock_source = NULL;
2571
2572                 if (!dc->config.disable_disp_pll_sharing)
2573                         pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing(
2574                                 &context->res_ctx,
2575                                 pipe_ctx);
2576
2577                 if (pipe_ctx->clock_source == NULL)
2578                         pipe_ctx->clock_source =
2579                                 dc_resource_find_first_free_pll(
2580                                         &context->res_ctx,
2581                                         pool);
2582         }
2583
2584         if (pipe_ctx->clock_source == NULL)
2585                 return DC_NO_CLOCK_SOURCE_RESOURCE;
2586
2587         resource_reference_clock_source(
2588                 &context->res_ctx, pool,
2589                 pipe_ctx->clock_source);
2590
2591         return DC_OK;
2592 }
2593
2594 /*
2595  * Note: We need to disable output if clock sources change,
2596  * since bios does optimization and doesn't apply if changing
2597  * PHY when not already disabled.
2598  */
2599 bool pipe_need_reprogram(
2600                 struct pipe_ctx *pipe_ctx_old,
2601                 struct pipe_ctx *pipe_ctx)
2602 {
2603         if (!pipe_ctx_old->stream)
2604                 return false;
2605
2606         if (pipe_ctx_old->stream->sink != pipe_ctx->stream->sink)
2607                 return true;
2608
2609         if (pipe_ctx_old->stream->signal != pipe_ctx->stream->signal)
2610                 return true;
2611
2612         if (pipe_ctx_old->stream_res.audio != pipe_ctx->stream_res.audio)
2613                 return true;
2614
2615         if (pipe_ctx_old->clock_source != pipe_ctx->clock_source
2616                         && pipe_ctx_old->stream != pipe_ctx->stream)
2617                 return true;
2618
2619         if (pipe_ctx_old->stream_res.stream_enc != pipe_ctx->stream_res.stream_enc)
2620                 return true;
2621
2622         if (is_timing_changed(pipe_ctx_old->stream, pipe_ctx->stream))
2623                 return true;
2624
2625
2626         return false;
2627 }
2628
2629 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
2630                 struct bit_depth_reduction_params *fmt_bit_depth)
2631 {
2632         enum dc_dither_option option = stream->dither_option;
2633         enum dc_pixel_encoding pixel_encoding =
2634                         stream->timing.pixel_encoding;
2635
2636         memset(fmt_bit_depth, 0, sizeof(*fmt_bit_depth));
2637
2638         if (option == DITHER_OPTION_DEFAULT) {
2639                 switch (stream->timing.display_color_depth) {
2640                 case COLOR_DEPTH_666:
2641                         option = DITHER_OPTION_SPATIAL6;
2642                         break;
2643                 case COLOR_DEPTH_888:
2644                         option = DITHER_OPTION_SPATIAL8;
2645                         break;
2646                 case COLOR_DEPTH_101010:
2647                         option = DITHER_OPTION_SPATIAL10;
2648                         break;
2649                 default:
2650                         option = DITHER_OPTION_DISABLE;
2651                 }
2652         }
2653
2654         if (option == DITHER_OPTION_DISABLE)
2655                 return;
2656
2657         if (option == DITHER_OPTION_TRUN6) {
2658                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2659                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 0;
2660         } else if (option == DITHER_OPTION_TRUN8 ||
2661                         option == DITHER_OPTION_TRUN8_SPATIAL6 ||
2662                         option == DITHER_OPTION_TRUN8_FM6) {
2663                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2664                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 1;
2665         } else if (option == DITHER_OPTION_TRUN10        ||
2666                         option == DITHER_OPTION_TRUN10_SPATIAL6   ||
2667                         option == DITHER_OPTION_TRUN10_SPATIAL8   ||
2668                         option == DITHER_OPTION_TRUN10_FM8     ||
2669                         option == DITHER_OPTION_TRUN10_FM6     ||
2670                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2671                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2672                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
2673         }
2674
2675         /* special case - Formatter can only reduce by 4 bits at most.
2676          * When reducing from 12 to 6 bits,
2677          * HW recommends we use trunc with round mode
2678          * (if we did nothing, trunc to 10 bits would be used)
2679          * note that any 12->10 bit reduction is ignored prior to DCE8,
2680          * as the input was 10 bits.
2681          */
2682         if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM ||
2683                         option == DITHER_OPTION_SPATIAL6 ||
2684                         option == DITHER_OPTION_FM6) {
2685                 fmt_bit_depth->flags.TRUNCATE_ENABLED = 1;
2686                 fmt_bit_depth->flags.TRUNCATE_DEPTH = 2;
2687                 fmt_bit_depth->flags.TRUNCATE_MODE = 1;
2688         }
2689
2690         /* spatial dither
2691          * note that spatial modes 1-3 are never used
2692          */
2693         if (option == DITHER_OPTION_SPATIAL6_FRAME_RANDOM            ||
2694                         option == DITHER_OPTION_SPATIAL6 ||
2695                         option == DITHER_OPTION_TRUN10_SPATIAL6      ||
2696                         option == DITHER_OPTION_TRUN8_SPATIAL6) {
2697                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2698                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 0;
2699                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2700                 fmt_bit_depth->flags.RGB_RANDOM =
2701                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2702         } else if (option == DITHER_OPTION_SPATIAL8_FRAME_RANDOM            ||
2703                         option == DITHER_OPTION_SPATIAL8 ||
2704                         option == DITHER_OPTION_SPATIAL8_FM6        ||
2705                         option == DITHER_OPTION_TRUN10_SPATIAL8      ||
2706                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2707                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2708                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 1;
2709                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2710                 fmt_bit_depth->flags.RGB_RANDOM =
2711                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2712         } else if (option == DITHER_OPTION_SPATIAL10_FRAME_RANDOM ||
2713                         option == DITHER_OPTION_SPATIAL10 ||
2714                         option == DITHER_OPTION_SPATIAL10_FM8 ||
2715                         option == DITHER_OPTION_SPATIAL10_FM6) {
2716                 fmt_bit_depth->flags.SPATIAL_DITHER_ENABLED = 1;
2717                 fmt_bit_depth->flags.SPATIAL_DITHER_DEPTH = 2;
2718                 fmt_bit_depth->flags.HIGHPASS_RANDOM = 1;
2719                 fmt_bit_depth->flags.RGB_RANDOM =
2720                                 (pixel_encoding == PIXEL_ENCODING_RGB) ? 1 : 0;
2721         }
2722
2723         if (option == DITHER_OPTION_SPATIAL6 ||
2724                         option == DITHER_OPTION_SPATIAL8 ||
2725                         option == DITHER_OPTION_SPATIAL10) {
2726                 fmt_bit_depth->flags.FRAME_RANDOM = 0;
2727         } else {
2728                 fmt_bit_depth->flags.FRAME_RANDOM = 1;
2729         }
2730
2731         //////////////////////
2732         //// temporal dither
2733         //////////////////////
2734         if (option == DITHER_OPTION_FM6           ||
2735                         option == DITHER_OPTION_SPATIAL8_FM6     ||
2736                         option == DITHER_OPTION_SPATIAL10_FM6     ||
2737                         option == DITHER_OPTION_TRUN10_FM6     ||
2738                         option == DITHER_OPTION_TRUN8_FM6      ||
2739                         option == DITHER_OPTION_TRUN10_SPATIAL8_FM6) {
2740                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2741                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 0;
2742         } else if (option == DITHER_OPTION_FM8        ||
2743                         option == DITHER_OPTION_SPATIAL10_FM8  ||
2744                         option == DITHER_OPTION_TRUN10_FM8) {
2745                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2746                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 1;
2747         } else if (option == DITHER_OPTION_FM10) {
2748                 fmt_bit_depth->flags.FRAME_MODULATION_ENABLED = 1;
2749                 fmt_bit_depth->flags.FRAME_MODULATION_DEPTH = 2;
2750         }
2751
2752         fmt_bit_depth->pixel_encoding = pixel_encoding;
2753 }
2754
2755 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
2756 {
2757         struct dc  *core_dc = dc;
2758         struct dc_link *link = stream->sink->link;
2759         struct timing_generator *tg = core_dc->res_pool->timing_generators[0];
2760         enum dc_status res = DC_OK;
2761
2762         calculate_phy_pix_clks(stream);
2763
2764         if (!tg->funcs->validate_timing(tg, &stream->timing))
2765                 res = DC_FAIL_CONTROLLER_VALIDATE;
2766
2767         if (res == DC_OK)
2768                 if (!link->link_enc->funcs->validate_output_with_stream(
2769                                                 link->link_enc, stream))
2770                         res = DC_FAIL_ENC_VALIDATE;
2771
2772         /* TODO: validate audio ASIC caps, encoder */
2773
2774         if (res == DC_OK)
2775                 res = dc_link_validate_mode_timing(stream,
2776                       link,
2777                       &stream->timing);
2778
2779         return res;
2780 }
2781
2782 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
2783 {
2784         enum dc_status res = DC_OK;
2785
2786         /* TODO For now validates pixel format only */
2787         if (dc->res_pool->funcs->validate_plane)
2788                 return dc->res_pool->funcs->validate_plane(plane_state, &dc->caps);
2789
2790         return res;
2791 }