drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 /* #define TRACE_DPCD */
  39
  40 #ifdef TRACE_DPCD
  41 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  42
  43 static inline char *side_band_msg_type_to_str(uint32_t address)
  44 {
  45         static char str[10] = {0};
  46
  47         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  48                 strcpy(str, "DOWN_REQ");
  49         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  50                 strcpy(str, "UP_REP");
  51         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  52                 strcpy(str, "DOWN_REP");
  53         else
  54                 strcpy(str, "UP_REQ");
  55
  56         return str;
  57 }
  58
  59 static void log_dpcd(uint8_t type,
  60                      uint32_t address,
  61                      uint8_t *data,
  62                      uint32_t size,
  63                      bool res)
  64 {
  65         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  66                         (type == DP_AUX_NATIVE_READ) ||
  67                         (type == DP_AUX_I2C_READ) ?
  68                                         "Read" : "Write",
  69                         address,
  70                         SIDE_BAND_MSG(address) ?
  71                                         side_band_msg_type_to_str(address) : "Nop",
  72                         res ? "OK" : "Fail");
  73
  74         if (res) {
  75                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  76         }
  77 }
  78 #endif
  79
  80 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  81                                   struct drm_dp_aux_msg *msg)
  82 {
  83         enum i2c_mot_mode mot = (msg->request & DP_AUX_I2C_MOT) ?
  84                 I2C_MOT_TRUE : I2C_MOT_FALSE;
  85         enum ddc_result res;
  86
  87         switch (msg->request & ~DP_AUX_I2C_MOT) {
  88         case DP_AUX_NATIVE_READ:
  89                 res = dal_ddc_service_read_dpcd_data(
  90                                 TO_DM_AUX(aux)->ddc_service,
  91                                 false,
  92                                 I2C_MOT_UNDEF,
  93                                 msg->address,
  94                                 msg->buffer,
  95                                 msg->size);
  96                 break;
  97         case DP_AUX_NATIVE_WRITE:
  98                 res = dal_ddc_service_write_dpcd_data(
  99                                 TO_DM_AUX(aux)->ddc_service,
 100                                 false,
 101                                 I2C_MOT_UNDEF,
 102                                 msg->address,
 103                                 msg->buffer,
 104                                 msg->size);
 105                 break;
 106         case DP_AUX_I2C_READ:
 107                 res = dal_ddc_service_read_dpcd_data(
 108                                 TO_DM_AUX(aux)->ddc_service,
 109                                 true,
 110                                 mot,
 111                                 msg->address,
 112                                 msg->buffer,
 113                                 msg->size);
 114                 break;
 115         case DP_AUX_I2C_WRITE:
 116                 res = dal_ddc_service_write_dpcd_data(
 117                                 TO_DM_AUX(aux)->ddc_service,
 118                                 true,
 119                                 mot,
 120                                 msg->address,
 121                                 msg->buffer,
 122                                 msg->size);
 123                 break;
 124         default:
 125                 return 0;
 126         }
 127
 128 #ifdef TRACE_DPCD
 129         log_dpcd(msg->request,
 130                  msg->address,
 131                  msg->buffer,
 132                  msg->size,
 133                  r == DDC_RESULT_SUCESSFULL);
 134 #endif
 135
 136         return msg->size;
 137 }
 138
 139 static enum drm_connector_status
 140 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 141 {
 142         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 143         struct amdgpu_dm_connector *master = aconnector->mst_port;
 144
 145         enum drm_connector_status status =
 146                 drm_dp_mst_detect_port(
 147                         connector,
 148                         &master->mst_mgr,
 149                         aconnector->port);
 150
 151         return status;
 152 }
 153
 154 static void
 155 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 156 {
 157         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 158         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 159
 160         drm_encoder_cleanup(&amdgpu_encoder->base);
 161         kfree(amdgpu_encoder);
 162         drm_connector_cleanup(connector);
 163         kfree(amdgpu_dm_connector);
 164 }
 165
 166 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 167         .detect = dm_dp_mst_detect,
 168         .fill_modes = drm_helper_probe_single_connector_modes,
 169         .destroy = dm_dp_mst_connector_destroy,
 170         .reset = amdgpu_dm_connector_funcs_reset,
 171         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 172         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 173         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 174         .atomic_get_property = amdgpu_dm_connector_atomic_get_property
 175 };
 176
 177 static int dm_connector_update_modes(struct drm_connector *connector,
 178                                 struct edid *edid)
 179 {
 180         return drm_add_edid_modes(connector, edid);
 181 }
 182
 183 void dm_dp_mst_dc_sink_create(struct drm_connector *connector)
 184 {
 185         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 186         struct edid *edid;
 187         struct dc_sink *dc_sink;
 188         struct dc_sink_init_data init_params = {
 189                         .link = aconnector->dc_link,
 190                         .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 191
 192         edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 193
 194         if (!edid) {
 195                 drm_mode_connector_update_edid_property(
 196                         &aconnector->base,
 197                         NULL);
 198                 return;
 199         }
 200
 201         aconnector->edid = edid;
 202
 203         dc_sink = dc_link_add_remote_sink(
 204                 aconnector->dc_link,
 205                 (uint8_t *)aconnector->edid,
 206                 (aconnector->edid->extensions + 1) * EDID_LENGTH,
 207                 &init_params);
 208
 209         dc_sink->priv = aconnector;
 210         aconnector->dc_sink = dc_sink;
 211
 212         amdgpu_dm_add_sink_to_freesync_module(
 213                         connector, aconnector->edid);
 214
 215         drm_mode_connector_update_edid_property(
 216                                         &aconnector->base, aconnector->edid);
 217 }
 218
 219 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 220 {
 221         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 222         int ret = 0;
 223
 224         if (!aconnector)
 225                 return dm_connector_update_modes(connector, NULL);
 226
 227         if (!aconnector->edid) {
 228                 struct edid *edid;
 229                 struct dc_sink *dc_sink;
 230                 struct dc_sink_init_data init_params = {
 231                                 .link = aconnector->dc_link,
 232                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 233                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 234
 235                 if (!edid) {
 236                         drm_mode_connector_update_edid_property(
 237                                 &aconnector->base,
 238                                 NULL);
 239                         return ret;
 240                 }
 241
 242                 aconnector->edid = edid;
 243
 244                 dc_sink = dc_link_add_remote_sink(
 245                         aconnector->dc_link,
 246                         (uint8_t *)edid,
 247                         (edid->extensions + 1) * EDID_LENGTH,
 248                         &init_params);
 249
 250                 dc_sink->priv = aconnector;
 251                 aconnector->dc_sink = dc_sink;
 252
 253                 if (aconnector->dc_sink)
 254                         amdgpu_dm_add_sink_to_freesync_module(
 255                                         connector, edid);
 256
 257                 drm_mode_connector_update_edid_property(
 258                                                 &aconnector->base, edid);
 259         }
 260
 261         ret = dm_connector_update_modes(connector, aconnector->edid);
 262
 263         return ret;
 264 }
 265
 266 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
 267 {
 268         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 269
 270         return &amdgpu_dm_connector->mst_encoder->base;
 271 }
 272
 273 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 274         .get_modes = dm_dp_mst_get_modes,
 275         .mode_valid = amdgpu_dm_connector_mode_valid,
 276         .best_encoder = dm_mst_best_encoder,
 277 };
 278
 279 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 280 {
 281         drm_encoder_cleanup(encoder);
 282         kfree(encoder);
 283 }
 284
 285 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 286         .destroy = amdgpu_dm_encoder_destroy,
 287 };
 288
 289 static struct amdgpu_encoder *
 290 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 291 {
 292         struct drm_device *dev = connector->base.dev;
 293         struct amdgpu_device *adev = dev->dev_private;
 294         struct amdgpu_encoder *amdgpu_encoder;
 295         struct drm_encoder *encoder;
 296         const struct drm_connector_helper_funcs *connector_funcs =
 297                 connector->base.helper_private;
 298         struct drm_encoder *enc_master =
 299                 connector_funcs->best_encoder(&connector->base);
 300
 301         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
 302         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 303         if (!amdgpu_encoder)
 304                 return NULL;
 305
 306         encoder = &amdgpu_encoder->base;
 307         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 308
 309         drm_encoder_init(
 310                 dev,
 311                 &amdgpu_encoder->base,
 312                 &amdgpu_dm_encoder_funcs,
 313                 DRM_MODE_ENCODER_DPMST,
 314                 NULL);
 315
 316         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 317
 318         return amdgpu_encoder;
 319 }
 320
 321 static struct drm_connector *
 322 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 323                         struct drm_dp_mst_port *port,
 324                         const char *pathprop)
 325 {
 326         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 327         struct drm_device *dev = master->base.dev;
 328         struct amdgpu_device *adev = dev->dev_private;
 329         struct amdgpu_dm_connector *aconnector;
 330         struct drm_connector *connector;
 331         struct drm_connector_list_iter conn_iter;
 332
 333         drm_connector_list_iter_begin(dev, &conn_iter);
 334         drm_for_each_connector_iter(connector, &conn_iter) {
 335                 aconnector = to_amdgpu_dm_connector(connector);
 336                 if (aconnector->mst_port == master
 337                                 && !aconnector->port) {
 338                         DRM_INFO("DM_MST: reusing connector: %p [id: %d] [master: %p]\n",
 339                                                 aconnector, connector->base.id, aconnector->mst_port);
 340
 341                         aconnector->port = port;
 342                         drm_mode_connector_set_path_property(connector, pathprop);
 343
 344                         drm_connector_list_iter_end(&conn_iter);
 345                         aconnector->mst_connected = true;
 346                         return &aconnector->base;
 347                 }
 348         }
 349         drm_connector_list_iter_end(&conn_iter);
 350
 351         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 352         if (!aconnector)
 353                 return NULL;
 354
 355         connector = &aconnector->base;
 356         aconnector->port = port;
 357         aconnector->mst_port = master;
 358
 359         if (drm_connector_init(
 360                 dev,
 361                 connector,
 362                 &dm_dp_mst_connector_funcs,
 363                 DRM_MODE_CONNECTOR_DisplayPort)) {
 364                 kfree(aconnector);
 365                 return NULL;
 366         }
 367         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 368
 369         amdgpu_dm_connector_init_helper(
 370                 &adev->dm,
 371                 aconnector,
 372                 DRM_MODE_CONNECTOR_DisplayPort,
 373                 master->dc_link,
 374                 master->connector_id);
 375
 376         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 377
 378         /*
 379          * TODO: understand why this one is needed
 380          */
 381         drm_object_attach_property(
 382                 &connector->base,
 383                 dev->mode_config.path_property,
 384                 0);
 385         drm_object_attach_property(
 386                 &connector->base,
 387                 dev->mode_config.tile_property,
 388                 0);
 389
 390         drm_mode_connector_set_path_property(connector, pathprop);
 391
 392         /*
 393          * Initialize connector state before adding the connectror to drm and
 394          * framebuffer lists
 395          */
 396         amdgpu_dm_connector_funcs_reset(connector);
 397
 398         aconnector->mst_connected = true;
 399
 400         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 401                         aconnector, connector->base.id, aconnector->mst_port);
 402
 403         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 404
 405         return connector;
 406 }
 407
 408 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 409                                         struct drm_connector *connector)
 410 {
 411         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 412
 413         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 414                                 aconnector, connector->base.id, aconnector->mst_port);
 415
 416         aconnector->port = NULL;
 417         if (aconnector->dc_sink) {
 418                 amdgpu_dm_remove_sink_from_freesync_module(connector);
 419                 dc_link_remove_remote_sink(aconnector->dc_link, aconnector->dc_sink);
 420                 dc_sink_release(aconnector->dc_sink);
 421                 aconnector->dc_sink = NULL;
 422         }
 423         if (aconnector->edid) {
 424                 kfree(aconnector->edid);
 425                 aconnector->edid = NULL;
 426         }
 427
 428         drm_mode_connector_update_edid_property(
 429                         &aconnector->base,
 430                         NULL);
 431
 432         aconnector->mst_connected = false;
 433 }
 434
 435 static void dm_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
 436 {
 437         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 438         struct drm_device *dev = master->base.dev;
 439
 440         drm_kms_helper_hotplug_event(dev);
 441 }
 442
 443 static void dm_dp_mst_link_status_reset(struct drm_connector *connector)
 444 {
 445         mutex_lock(&connector->dev->mode_config.mutex);
 446         drm_mode_connector_set_link_status_property(connector, DRM_MODE_LINK_STATUS_BAD);
 447         mutex_unlock(&connector->dev->mode_config.mutex);
 448 }
 449
 450 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 451 {
 452         struct drm_device *dev = connector->dev;
 453         struct amdgpu_device *adev = dev->dev_private;
 454         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 455
 456         if (adev->mode_info.rfbdev)
 457                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 458         else
 459                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 460
 461         drm_connector_register(connector);
 462
 463         if (aconnector->mst_connected)
 464                 dm_dp_mst_link_status_reset(connector);
 465 }
 466
 467 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 468         .add_connector = dm_dp_add_mst_connector,
 469         .destroy_connector = dm_dp_destroy_mst_connector,
 470         .hotplug = dm_dp_mst_hotplug,
 471         .register_connector = dm_dp_mst_register_connector
 472 };
 473
 474 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 475                                        struct amdgpu_dm_connector *aconnector)
 476 {
 477         aconnector->dm_dp_aux.aux.name = "dmdc";
 478         aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
 479         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 480         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 481
 482         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 483         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 484         drm_dp_mst_topology_mgr_init(
 485                 &aconnector->mst_mgr,
 486                 dm->adev->ddev,
 487                 &aconnector->dm_dp_aux.aux,
 488                 16,
 489                 4,
 490                 aconnector->connector_id);
 491 }
 492