drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/slab.h>
  25 #include <linux/list.h>
  26 #include <linux/types.h>
  27 #include <linux/printk.h>
  28 #include <linux/bitops.h>
  29 #include <linux/sched.h>
  30 #include "kfd_priv.h"
  31 #include "kfd_device_queue_manager.h"
  32 #include "kfd_mqd_manager.h"
  33 #include "cik_regs.h"
  34 #include "kfd_kernel_queue.h"
  35
  36 /* Size of the per-pipe EOP queue */
  37 #define CIK_HPD_EOP_BYTES_LOG2 11
  38 #define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
  39
  40 static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
  41                                         unsigned int pasid, unsigned int vmid);
  42
  43 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
  44                                         struct queue *q,
  45                                         struct qcm_process_device *qpd);
  46
  47 static int execute_queues_cpsch(struct device_queue_manager *dqm,
  48                                 enum kfd_unmap_queues_filter filter,
  49                                 uint32_t filter_param);
  50 static int unmap_queues_cpsch(struct device_queue_manager *dqm,
  51                                 enum kfd_unmap_queues_filter filter,
  52                                 uint32_t filter_param);
  53
  54 static int map_queues_cpsch(struct device_queue_manager *dqm);
  55
  56 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
  57                                         struct queue *q,
  58                                         struct qcm_process_device *qpd);
  59
  60 static void deallocate_sdma_queue(struct device_queue_manager *dqm,
  61                                 unsigned int sdma_queue_id);
  62
  63 static inline
  64 enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
  65 {
  66         if (type == KFD_QUEUE_TYPE_SDMA)
  67                 return KFD_MQD_TYPE_SDMA;
  68         return KFD_MQD_TYPE_CP;
  69 }
  70
  71 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
  72 {
  73         int i;
  74         int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
  75                 + pipe * dqm->dev->shared_resources.num_queue_per_pipe;
  76
  77         /* queue is available for KFD usage if bit is 1 */
  78         for (i = 0; i <  dqm->dev->shared_resources.num_queue_per_pipe; ++i)
  79                 if (test_bit(pipe_offset + i,
  80                               dqm->dev->shared_resources.queue_bitmap))
  81                         return true;
  82         return false;
  83 }
  84
  85 unsigned int get_queues_num(struct device_queue_manager *dqm)
  86 {
  87         return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
  88                                 KGD_MAX_QUEUES);
  89 }
  90
  91 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
  92 {
  93         return dqm->dev->shared_resources.num_queue_per_pipe;
  94 }
  95
  96 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
  97 {
  98         return dqm->dev->shared_resources.num_pipe_per_mec;
  99 }
 100
 101 void program_sh_mem_settings(struct device_queue_manager *dqm,
 102                                         struct qcm_process_device *qpd)
 103 {
 104         return dqm->dev->kfd2kgd->program_sh_mem_settings(
 105                                                 dqm->dev->kgd, qpd->vmid,
 106                                                 qpd->sh_mem_config,
 107                                                 qpd->sh_mem_ape1_base,
 108                                                 qpd->sh_mem_ape1_limit,
 109                                                 qpd->sh_mem_bases);
 110 }
 111
 112 static int allocate_vmid(struct device_queue_manager *dqm,
 113                         struct qcm_process_device *qpd,
 114                         struct queue *q)
 115 {
 116         int bit, allocated_vmid;
 117
 118         if (dqm->vmid_bitmap == 0)
 119                 return -ENOMEM;
 120
 121         bit = find_first_bit((unsigned long *)&dqm->vmid_bitmap,
 122                                 dqm->dev->vm_info.vmid_num_kfd);
 123         clear_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
 124
 125         allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd;
 126         pr_debug("vmid allocation %d\n", allocated_vmid);
 127         qpd->vmid = allocated_vmid;
 128         q->properties.vmid = allocated_vmid;
 129
 130         set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
 131         program_sh_mem_settings(dqm, qpd);
 132
 133         return 0;
 134 }
 135
 136 static void deallocate_vmid(struct device_queue_manager *dqm,
 137                                 struct qcm_process_device *qpd,
 138                                 struct queue *q)
 139 {
 140         int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd;
 141
 142         /* Release the vmid mapping */
 143         set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
 144
 145         set_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
 146         qpd->vmid = 0;
 147         q->properties.vmid = 0;
 148 }
 149
 150 static int create_queue_nocpsch(struct device_queue_manager *dqm,
 151                                 struct queue *q,
 152                                 struct qcm_process_device *qpd)
 153 {
 154         int retval;
 155
 156         print_queue(q);
 157
 158         mutex_lock(&dqm->lock);
 159
 160         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
 161                 pr_warn("Can't create new usermode queue because %d queues were already created\n",
 162                                 dqm->total_queue_count);
 163                 retval = -EPERM;
 164                 goto out_unlock;
 165         }
 166
 167         if (list_empty(&qpd->queues_list)) {
 168                 retval = allocate_vmid(dqm, qpd, q);
 169                 if (retval)
 170                         goto out_unlock;
 171         }
 172         q->properties.vmid = qpd->vmid;
 173
 174         q->properties.tba_addr = qpd->tba_addr;
 175         q->properties.tma_addr = qpd->tma_addr;
 176
 177         if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
 178                 retval = create_compute_queue_nocpsch(dqm, q, qpd);
 179         else if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
 180                 retval = create_sdma_queue_nocpsch(dqm, q, qpd);
 181         else
 182                 retval = -EINVAL;
 183
 184         if (retval) {
 185                 if (list_empty(&qpd->queues_list))
 186                         deallocate_vmid(dqm, qpd, q);
 187                 goto out_unlock;
 188         }
 189
 190         list_add(&q->list, &qpd->queues_list);
 191         qpd->queue_count++;
 192         if (q->properties.is_active)
 193                 dqm->queue_count++;
 194
 195         if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
 196                 dqm->sdma_queue_count++;
 197
 198         /*
 199          * Unconditionally increment this counter, regardless of the queue's
 200          * type or whether the queue is active.
 201          */
 202         dqm->total_queue_count++;
 203         pr_debug("Total of %d queues are accountable so far\n",
 204                         dqm->total_queue_count);
 205
 206 out_unlock:
 207         mutex_unlock(&dqm->lock);
 208         return retval;
 209 }
 210
 211 static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
 212 {
 213         bool set;
 214         int pipe, bit, i;
 215
 216         set = false;
 217
 218         for (pipe = dqm->next_pipe_to_allocate, i = 0;
 219                         i < get_pipes_per_mec(dqm);
 220                         pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
 221
 222                 if (!is_pipe_enabled(dqm, 0, pipe))
 223                         continue;
 224
 225                 if (dqm->allocated_queues[pipe] != 0) {
 226                         bit = find_first_bit(
 227                                 (unsigned long *)&dqm->allocated_queues[pipe],
 228                                 get_queues_per_pipe(dqm));
 229
 230                         clear_bit(bit,
 231                                 (unsigned long *)&dqm->allocated_queues[pipe]);
 232                         q->pipe = pipe;
 233                         q->queue = bit;
 234                         set = true;
 235                         break;
 236                 }
 237         }
 238
 239         if (!set)
 240                 return -EBUSY;
 241
 242         pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);
 243         /* horizontal hqd allocation */
 244         dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
 245
 246         return 0;
 247 }
 248
 249 static inline void deallocate_hqd(struct device_queue_manager *dqm,
 250                                 struct queue *q)
 251 {
 252         set_bit(q->queue, (unsigned long *)&dqm->allocated_queues[q->pipe]);
 253 }
 254
 255 static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
 256                                         struct queue *q,
 257                                         struct qcm_process_device *qpd)
 258 {
 259         int retval;
 260         struct mqd_manager *mqd;
 261
 262         mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
 263         if (!mqd)
 264                 return -ENOMEM;
 265
 266         retval = allocate_hqd(dqm, q);
 267         if (retval)
 268                 return retval;
 269
 270         retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
 271                                 &q->gart_mqd_addr, &q->properties);
 272         if (retval)
 273                 goto out_deallocate_hqd;
 274
 275         pr_debug("Loading mqd to hqd on pipe %d, queue %d\n",
 276                         q->pipe, q->queue);
 277
 278         dqm->dev->kfd2kgd->set_scratch_backing_va(
 279                         dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid);
 280
 281         if (!q->properties.is_active)
 282                 return 0;
 283
 284         retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, &q->properties,
 285                                q->process->mm);
 286         if (retval)
 287                 goto out_uninit_mqd;
 288
 289         return 0;
 290
 291 out_uninit_mqd:
 292         mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
 293 out_deallocate_hqd:
 294         deallocate_hqd(dqm, q);
 295
 296         return retval;
 297 }
 298
 299 /* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked
 300  * to avoid asynchronized access
 301  */
 302 static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm,
 303                                 struct qcm_process_device *qpd,
 304                                 struct queue *q)
 305 {
 306         int retval;
 307         struct mqd_manager *mqd;
 308
 309         mqd = dqm->ops.get_mqd_manager(dqm,
 310                 get_mqd_type_from_queue_type(q->properties.type));
 311         if (!mqd)
 312                 return -ENOMEM;
 313
 314         if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
 315                 deallocate_hqd(dqm, q);
 316         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
 317                 dqm->sdma_queue_count--;
 318                 deallocate_sdma_queue(dqm, q->sdma_id);
 319         } else {
 320                 pr_debug("q->properties.type %d is invalid\n",
 321                                 q->properties.type);
 322                 return -EINVAL;
 323         }
 324         dqm->total_queue_count--;
 325
 326         retval = mqd->destroy_mqd(mqd, q->mqd,
 327                                 KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
 328                                 KFD_UNMAP_LATENCY_MS,
 329                                 q->pipe, q->queue);
 330         if (retval == -ETIME)
 331                 qpd->reset_wavefronts = true;
 332
 333         mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
 334
 335         list_del(&q->list);
 336         if (list_empty(&qpd->queues_list)) {
 337                 if (qpd->reset_wavefronts) {
 338                         pr_warn("Resetting wave fronts (nocpsch) on dev %p\n",
 339                                         dqm->dev);
 340                         /* dbgdev_wave_reset_wavefronts has to be called before
 341                          * deallocate_vmid(), i.e. when vmid is still in use.
 342                          */
 343                         dbgdev_wave_reset_wavefronts(dqm->dev,
 344                                         qpd->pqm->process);
 345                         qpd->reset_wavefronts = false;
 346                 }
 347
 348                 deallocate_vmid(dqm, qpd, q);
 349         }
 350         qpd->queue_count--;
 351         if (q->properties.is_active)
 352                 dqm->queue_count--;
 353
 354         return retval;
 355 }
 356
 357 static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
 358                                 struct qcm_process_device *qpd,
 359                                 struct queue *q)
 360 {
 361         int retval;
 362
 363         mutex_lock(&dqm->lock);
 364         retval = destroy_queue_nocpsch_locked(dqm, qpd, q);
 365         mutex_unlock(&dqm->lock);
 366
 367         return retval;
 368 }
 369
 370 static int update_queue(struct device_queue_manager *dqm, struct queue *q)
 371 {
 372         int retval;
 373         struct mqd_manager *mqd;
 374         bool prev_active = false;
 375
 376         mutex_lock(&dqm->lock);
 377         mqd = dqm->ops.get_mqd_manager(dqm,
 378                         get_mqd_type_from_queue_type(q->properties.type));
 379         if (!mqd) {
 380                 retval = -ENOMEM;
 381                 goto out_unlock;
 382         }
 383
 384         /* Save previous activity state for counters */
 385         prev_active = q->properties.is_active;
 386
 387         /* Make sure the queue is unmapped before updating the MQD */
 388         if (sched_policy != KFD_SCHED_POLICY_NO_HWS) {
 389                 retval = unmap_queues_cpsch(dqm,
 390                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 391                 if (retval) {
 392                         pr_err("unmap queue failed\n");
 393                         goto out_unlock;
 394                 }
 395         } else if (prev_active &&
 396                    (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
 397                     q->properties.type == KFD_QUEUE_TYPE_SDMA)) {
 398                 retval = mqd->destroy_mqd(mqd, q->mqd,
 399                                 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
 400                                 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
 401                 if (retval) {
 402                         pr_err("destroy mqd failed\n");
 403                         goto out_unlock;
 404                 }
 405         }
 406
 407         retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
 408
 409         /*
 410          * check active state vs. the previous state and modify
 411          * counter accordingly. map_queues_cpsch uses the
 412          * dqm->queue_count to determine whether a new runlist must be
 413          * uploaded.
 414          */
 415         if (q->properties.is_active && !prev_active)
 416                 dqm->queue_count++;
 417         else if (!q->properties.is_active && prev_active)
 418                 dqm->queue_count--;
 419
 420         if (sched_policy != KFD_SCHED_POLICY_NO_HWS)
 421                 retval = map_queues_cpsch(dqm);
 422         else if (q->properties.is_active &&
 423                  (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
 424                   q->properties.type == KFD_QUEUE_TYPE_SDMA))
 425                 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue,
 426                                        &q->properties, q->process->mm);
 427
 428 out_unlock:
 429         mutex_unlock(&dqm->lock);
 430         return retval;
 431 }
 432
 433 static struct mqd_manager *get_mqd_manager(
 434                 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type)
 435 {
 436         struct mqd_manager *mqd;
 437
 438         if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
 439                 return NULL;
 440
 441         pr_debug("mqd type %d\n", type);
 442
 443         mqd = dqm->mqds[type];
 444         if (!mqd) {
 445                 mqd = mqd_manager_init(type, dqm->dev);
 446                 if (!mqd)
 447                         pr_err("mqd manager is NULL");
 448                 dqm->mqds[type] = mqd;
 449         }
 450
 451         return mqd;
 452 }
 453
 454 static int register_process(struct device_queue_manager *dqm,
 455                                         struct qcm_process_device *qpd)
 456 {
 457         struct device_process_node *n;
 458         int retval;
 459
 460         n = kzalloc(sizeof(*n), GFP_KERNEL);
 461         if (!n)
 462                 return -ENOMEM;
 463
 464         n->qpd = qpd;
 465
 466         mutex_lock(&dqm->lock);
 467         list_add(&n->list, &dqm->queues);
 468
 469         retval = dqm->asic_ops.update_qpd(dqm, qpd);
 470
 471         dqm->processes_count++;
 472
 473         mutex_unlock(&dqm->lock);
 474
 475         return retval;
 476 }
 477
 478 static int unregister_process(struct device_queue_manager *dqm,
 479                                         struct qcm_process_device *qpd)
 480 {
 481         int retval;
 482         struct device_process_node *cur, *next;
 483
 484         pr_debug("qpd->queues_list is %s\n",
 485                         list_empty(&qpd->queues_list) ? "empty" : "not empty");
 486
 487         retval = 0;
 488         mutex_lock(&dqm->lock);
 489
 490         list_for_each_entry_safe(cur, next, &dqm->queues, list) {
 491                 if (qpd == cur->qpd) {
 492                         list_del(&cur->list);
 493                         kfree(cur);
 494                         dqm->processes_count--;
 495                         goto out;
 496                 }
 497         }
 498         /* qpd not found in dqm list */
 499         retval = 1;
 500 out:
 501         mutex_unlock(&dqm->lock);
 502         return retval;
 503 }
 504
 505 static int
 506 set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
 507                         unsigned int vmid)
 508 {
 509         uint32_t pasid_mapping;
 510
 511         pasid_mapping = (pasid == 0) ? 0 :
 512                 (uint32_t)pasid |
 513                 ATC_VMID_PASID_MAPPING_VALID;
 514
 515         return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
 516                                                 dqm->dev->kgd, pasid_mapping,
 517                                                 vmid);
 518 }
 519
 520 static void init_interrupts(struct device_queue_manager *dqm)
 521 {
 522         unsigned int i;
 523
 524         for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
 525                 if (is_pipe_enabled(dqm, 0, i))
 526                         dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
 527 }
 528
 529 static int initialize_nocpsch(struct device_queue_manager *dqm)
 530 {
 531         int pipe, queue;
 532
 533         pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
 534
 535         dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
 536                                         sizeof(unsigned int), GFP_KERNEL);
 537         if (!dqm->allocated_queues)
 538                 return -ENOMEM;
 539
 540         mutex_init(&dqm->lock);
 541         INIT_LIST_HEAD(&dqm->queues);
 542         dqm->queue_count = dqm->next_pipe_to_allocate = 0;
 543         dqm->sdma_queue_count = 0;
 544
 545         for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
 546                 int pipe_offset = pipe * get_queues_per_pipe(dqm);
 547
 548                 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
 549                         if (test_bit(pipe_offset + queue,
 550                                      dqm->dev->shared_resources.queue_bitmap))
 551                                 dqm->allocated_queues[pipe] |= 1 << queue;
 552         }
 553
 554         dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
 555         dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
 556
 557         return 0;
 558 }
 559
 560 static void uninitialize(struct device_queue_manager *dqm)
 561 {
 562         int i;
 563
 564         WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
 565
 566         kfree(dqm->allocated_queues);
 567         for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
 568                 kfree(dqm->mqds[i]);
 569         mutex_destroy(&dqm->lock);
 570         kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
 571 }
 572
 573 static int start_nocpsch(struct device_queue_manager *dqm)
 574 {
 575         init_interrupts(dqm);
 576         return 0;
 577 }
 578
 579 static int stop_nocpsch(struct device_queue_manager *dqm)
 580 {
 581         return 0;
 582 }
 583
 584 static int allocate_sdma_queue(struct device_queue_manager *dqm,
 585                                 unsigned int *sdma_queue_id)
 586 {
 587         int bit;
 588
 589         if (dqm->sdma_bitmap == 0)
 590                 return -ENOMEM;
 591
 592         bit = find_first_bit((unsigned long *)&dqm->sdma_bitmap,
 593                                 CIK_SDMA_QUEUES);
 594
 595         clear_bit(bit, (unsigned long *)&dqm->sdma_bitmap);
 596         *sdma_queue_id = bit;
 597
 598         return 0;
 599 }
 600
 601 static void deallocate_sdma_queue(struct device_queue_manager *dqm,
 602                                 unsigned int sdma_queue_id)
 603 {
 604         if (sdma_queue_id >= CIK_SDMA_QUEUES)
 605                 return;
 606         set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap);
 607 }
 608
 609 static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
 610                                         struct queue *q,
 611                                         struct qcm_process_device *qpd)
 612 {
 613         struct mqd_manager *mqd;
 614         int retval;
 615
 616         mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
 617         if (!mqd)
 618                 return -ENOMEM;
 619
 620         retval = allocate_sdma_queue(dqm, &q->sdma_id);
 621         if (retval)
 622                 return retval;
 623
 624         q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
 625         q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
 626
 627         pr_debug("SDMA id is:    %d\n", q->sdma_id);
 628         pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id);
 629         pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id);
 630
 631         dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
 632         retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
 633                                 &q->gart_mqd_addr, &q->properties);
 634         if (retval)
 635                 goto out_deallocate_sdma_queue;
 636
 637         retval = mqd->load_mqd(mqd, q->mqd, 0, 0, &q->properties, NULL);
 638         if (retval)
 639                 goto out_uninit_mqd;
 640
 641         return 0;
 642
 643 out_uninit_mqd:
 644         mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
 645 out_deallocate_sdma_queue:
 646         deallocate_sdma_queue(dqm, q->sdma_id);
 647
 648         return retval;
 649 }
 650
 651 /*
 652  * Device Queue Manager implementation for cp scheduler
 653  */
 654
 655 static int set_sched_resources(struct device_queue_manager *dqm)
 656 {
 657         int i, mec;
 658         struct scheduling_resources res;
 659
 660         res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap;
 661
 662         res.queue_mask = 0;
 663         for (i = 0; i < KGD_MAX_QUEUES; ++i) {
 664                 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
 665                         / dqm->dev->shared_resources.num_pipe_per_mec;
 666
 667                 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
 668                         continue;
 669
 670                 /* only acquire queues from the first MEC */
 671                 if (mec > 0)
 672                         continue;
 673
 674                 /* This situation may be hit in the future if a new HW
 675                  * generation exposes more than 64 queues. If so, the
 676                  * definition of res.queue_mask needs updating
 677                  */
 678                 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
 679                         pr_err("Invalid queue enabled by amdgpu: %d\n", i);
 680                         break;
 681                 }
 682
 683                 res.queue_mask |= (1ull << i);
 684         }
 685         res.gws_mask = res.oac_mask = res.gds_heap_base =
 686                                                 res.gds_heap_size = 0;
 687
 688         pr_debug("Scheduling resources:\n"
 689                         "vmid mask: 0x%8X\n"
 690                         "queue mask: 0x%8llX\n",
 691                         res.vmid_mask, res.queue_mask);
 692
 693         return pm_send_set_resources(&dqm->packets, &res);
 694 }
 695
 696 static int initialize_cpsch(struct device_queue_manager *dqm)
 697 {
 698         pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
 699
 700         mutex_init(&dqm->lock);
 701         INIT_LIST_HEAD(&dqm->queues);
 702         dqm->queue_count = dqm->processes_count = 0;
 703         dqm->sdma_queue_count = 0;
 704         dqm->active_runlist = false;
 705         dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
 706
 707         return 0;
 708 }
 709
 710 static int start_cpsch(struct device_queue_manager *dqm)
 711 {
 712         int retval;
 713
 714         retval = 0;
 715
 716         retval = pm_init(&dqm->packets, dqm);
 717         if (retval)
 718                 goto fail_packet_manager_init;
 719
 720         retval = set_sched_resources(dqm);
 721         if (retval)
 722                 goto fail_set_sched_resources;
 723
 724         pr_debug("Allocating fence memory\n");
 725
 726         /* allocate fence memory on the gart */
 727         retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
 728                                         &dqm->fence_mem);
 729
 730         if (retval)
 731                 goto fail_allocate_vidmem;
 732
 733         dqm->fence_addr = dqm->fence_mem->cpu_ptr;
 734         dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
 735
 736         init_interrupts(dqm);
 737
 738         mutex_lock(&dqm->lock);
 739         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 740         mutex_unlock(&dqm->lock);
 741
 742         return 0;
 743 fail_allocate_vidmem:
 744 fail_set_sched_resources:
 745         pm_uninit(&dqm->packets);
 746 fail_packet_manager_init:
 747         return retval;
 748 }
 749
 750 static int stop_cpsch(struct device_queue_manager *dqm)
 751 {
 752         mutex_lock(&dqm->lock);
 753         unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
 754         mutex_unlock(&dqm->lock);
 755
 756         kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
 757         pm_uninit(&dqm->packets);
 758
 759         return 0;
 760 }
 761
 762 static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
 763                                         struct kernel_queue *kq,
 764                                         struct qcm_process_device *qpd)
 765 {
 766         mutex_lock(&dqm->lock);
 767         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
 768                 pr_warn("Can't create new kernel queue because %d queues were already created\n",
 769                                 dqm->total_queue_count);
 770                 mutex_unlock(&dqm->lock);
 771                 return -EPERM;
 772         }
 773
 774         /*
 775          * Unconditionally increment this counter, regardless of the queue's
 776          * type or whether the queue is active.
 777          */
 778         dqm->total_queue_count++;
 779         pr_debug("Total of %d queues are accountable so far\n",
 780                         dqm->total_queue_count);
 781
 782         list_add(&kq->list, &qpd->priv_queue_list);
 783         dqm->queue_count++;
 784         qpd->is_debug = true;
 785         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 786         mutex_unlock(&dqm->lock);
 787
 788         return 0;
 789 }
 790
 791 static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
 792                                         struct kernel_queue *kq,
 793                                         struct qcm_process_device *qpd)
 794 {
 795         mutex_lock(&dqm->lock);
 796         list_del(&kq->list);
 797         dqm->queue_count--;
 798         qpd->is_debug = false;
 799         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
 800         /*
 801          * Unconditionally decrement this counter, regardless of the queue's
 802          * type.
 803          */
 804         dqm->total_queue_count--;
 805         pr_debug("Total of %d queues are accountable so far\n",
 806                         dqm->total_queue_count);
 807         mutex_unlock(&dqm->lock);
 808 }
 809
 810 static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
 811                         struct qcm_process_device *qpd)
 812 {
 813         int retval;
 814         struct mqd_manager *mqd;
 815
 816         retval = 0;
 817
 818         mutex_lock(&dqm->lock);
 819
 820         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
 821                 pr_warn("Can't create new usermode queue because %d queues were already created\n",
 822                                 dqm->total_queue_count);
 823                 retval = -EPERM;
 824                 goto out;
 825         }
 826
 827         if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
 828                 retval = allocate_sdma_queue(dqm, &q->sdma_id);
 829                 if (retval)
 830                         goto out;
 831                 q->properties.sdma_queue_id =
 832                         q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
 833                 q->properties.sdma_engine_id =
 834                         q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
 835         }
 836         mqd = dqm->ops.get_mqd_manager(dqm,
 837                         get_mqd_type_from_queue_type(q->properties.type));
 838
 839         if (!mqd) {
 840                 retval = -ENOMEM;
 841                 goto out;
 842         }
 843
 844         dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
 845
 846         q->properties.tba_addr = qpd->tba_addr;
 847         q->properties.tma_addr = qpd->tma_addr;
 848         retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
 849                                 &q->gart_mqd_addr, &q->properties);
 850         if (retval)
 851                 goto out;
 852
 853         list_add(&q->list, &qpd->queues_list);
 854         qpd->queue_count++;
 855         if (q->properties.is_active) {
 856                 dqm->queue_count++;
 857                 retval = execute_queues_cpsch(dqm,
 858                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 859         }
 860
 861         if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
 862                 dqm->sdma_queue_count++;
 863         /*
 864          * Unconditionally increment this counter, regardless of the queue's
 865          * type or whether the queue is active.
 866          */
 867         dqm->total_queue_count++;
 868
 869         pr_debug("Total of %d queues are accountable so far\n",
 870                         dqm->total_queue_count);
 871
 872 out:
 873         mutex_unlock(&dqm->lock);
 874         return retval;
 875 }
 876
 877 int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
 878                                 unsigned int fence_value,
 879                                 unsigned int timeout_ms)
 880 {
 881         unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;
 882
 883         while (*fence_addr != fence_value) {
 884                 if (time_after(jiffies, end_jiffies)) {
 885                         pr_err("qcm fence wait loop timeout expired\n");
 886                         return -ETIME;
 887                 }
 888                 schedule();
 889         }
 890
 891         return 0;
 892 }
 893
 894 static int unmap_sdma_queues(struct device_queue_manager *dqm,
 895                                 unsigned int sdma_engine)
 896 {
 897         return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
 898                         KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false,
 899                         sdma_engine);
 900 }
 901
 902 /* dqm->lock mutex has to be locked before calling this function */
 903 static int map_queues_cpsch(struct device_queue_manager *dqm)
 904 {
 905         int retval;
 906
 907         if (dqm->queue_count <= 0 || dqm->processes_count <= 0)
 908                 return 0;
 909
 910         if (dqm->active_runlist)
 911                 return 0;
 912
 913         retval = pm_send_runlist(&dqm->packets, &dqm->queues);
 914         if (retval) {
 915                 pr_err("failed to execute runlist\n");
 916                 return retval;
 917         }
 918         dqm->active_runlist = true;
 919
 920         return retval;
 921 }
 922
 923 /* dqm->lock mutex has to be locked before calling this function */
 924 static int unmap_queues_cpsch(struct device_queue_manager *dqm,
 925                                 enum kfd_unmap_queues_filter filter,
 926                                 uint32_t filter_param)
 927 {
 928         int retval = 0;
 929
 930         if (!dqm->active_runlist)
 931                 return retval;
 932
 933         pr_debug("Before destroying queues, sdma queue count is : %u\n",
 934                 dqm->sdma_queue_count);
 935
 936         if (dqm->sdma_queue_count > 0) {
 937                 unmap_sdma_queues(dqm, 0);
 938                 unmap_sdma_queues(dqm, 1);
 939         }
 940
 941         retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
 942                         filter, filter_param, false, 0);
 943         if (retval)
 944                 return retval;
 945
 946         *dqm->fence_addr = KFD_FENCE_INIT;
 947         pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
 948                                 KFD_FENCE_COMPLETED);
 949         /* should be timed out */
 950         retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
 951                                 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS);
 952         if (retval)
 953                 return retval;
 954
 955         pm_release_ib(&dqm->packets);
 956         dqm->active_runlist = false;
 957
 958         return retval;
 959 }
 960
 961 /* dqm->lock mutex has to be locked before calling this function */
 962 static int execute_queues_cpsch(struct device_queue_manager *dqm,
 963                                 enum kfd_unmap_queues_filter filter,
 964                                 uint32_t filter_param)
 965 {
 966         int retval;
 967
 968         retval = unmap_queues_cpsch(dqm, filter, filter_param);
 969         if (retval) {
 970                 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n");
 971                 return retval;
 972         }
 973
 974         return map_queues_cpsch(dqm);
 975 }
 976
 977 static int destroy_queue_cpsch(struct device_queue_manager *dqm,
 978                                 struct qcm_process_device *qpd,
 979                                 struct queue *q)
 980 {
 981         int retval;
 982         struct mqd_manager *mqd;
 983         bool preempt_all_queues;
 984
 985         preempt_all_queues = false;
 986
 987         retval = 0;
 988
 989         /* remove queue from list to prevent rescheduling after preemption */
 990         mutex_lock(&dqm->lock);
 991
 992         if (qpd->is_debug) {
 993                 /*
 994                  * error, currently we do not allow to destroy a queue
 995                  * of a currently debugged process
 996                  */
 997                 retval = -EBUSY;
 998                 goto failed_try_destroy_debugged_queue;
 999
1000         }
1001
1002         mqd = dqm->ops.get_mqd_manager(dqm,
1003                         get_mqd_type_from_queue_type(q->properties.type));
1004         if (!mqd) {
1005                 retval = -ENOMEM;
1006                 goto failed;
1007         }
1008
1009         if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
1010                 dqm->sdma_queue_count--;
1011                 deallocate_sdma_queue(dqm, q->sdma_id);
1012         }
1013
1014         list_del(&q->list);
1015         qpd->queue_count--;
1016         if (q->properties.is_active) {
1017                 dqm->queue_count--;
1018                 retval = execute_queues_cpsch(dqm,
1019                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1020                 if (retval == -ETIME)
1021                         qpd->reset_wavefronts = true;
1022         }
1023
1024         mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
1025
1026         /*
1027          * Unconditionally decrement this counter, regardless of the queue's
1028          * type
1029          */
1030         dqm->total_queue_count--;
1031         pr_debug("Total of %d queues are accountable so far\n",
1032                         dqm->total_queue_count);
1033
1034         mutex_unlock(&dqm->lock);
1035
1036         return retval;
1037
1038 failed:
1039 failed_try_destroy_debugged_queue:
1040
1041         mutex_unlock(&dqm->lock);
1042         return retval;
1043 }
1044
1045 /*
1046  * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
1047  * stay in user mode.
1048  */
1049 #define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
1050 /* APE1 limit is inclusive and 64K aligned. */
1051 #define APE1_LIMIT_ALIGNMENT 0xFFFF
1052
1053 static bool set_cache_memory_policy(struct device_queue_manager *dqm,
1054                                    struct qcm_process_device *qpd,
1055                                    enum cache_policy default_policy,
1056                                    enum cache_policy alternate_policy,
1057                                    void __user *alternate_aperture_base,
1058                                    uint64_t alternate_aperture_size)
1059 {
1060         bool retval;
1061
1062         mutex_lock(&dqm->lock);
1063
1064         if (alternate_aperture_size == 0) {
1065                 /* base > limit disables APE1 */
1066                 qpd->sh_mem_ape1_base = 1;
1067                 qpd->sh_mem_ape1_limit = 0;
1068         } else {
1069                 /*
1070                  * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
1071                  *                      SH_MEM_APE1_BASE[31:0], 0x0000 }
1072                  * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1073                  *                      SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1074                  * Verify that the base and size parameters can be
1075                  * represented in this format and convert them.
1076                  * Additionally restrict APE1 to user-mode addresses.
1077                  */
1078
1079                 uint64_t base = (uintptr_t)alternate_aperture_base;
1080                 uint64_t limit = base + alternate_aperture_size - 1;
1081
1082                 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 ||
1083                    (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) {
1084                         retval = false;
1085                         goto out;
1086                 }
1087
1088                 qpd->sh_mem_ape1_base = base >> 16;
1089                 qpd->sh_mem_ape1_limit = limit >> 16;
1090         }
1091
1092         retval = dqm->asic_ops.set_cache_memory_policy(
1093                         dqm,
1094                         qpd,
1095                         default_policy,
1096                         alternate_policy,
1097                         alternate_aperture_base,
1098                         alternate_aperture_size);
1099
1100         if ((sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
1101                 program_sh_mem_settings(dqm, qpd);
1102
1103         pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
1104                 qpd->sh_mem_config, qpd->sh_mem_ape1_base,
1105                 qpd->sh_mem_ape1_limit);
1106
1107 out:
1108         mutex_unlock(&dqm->lock);
1109         return retval;
1110 }
1111
1112 static int set_trap_handler(struct device_queue_manager *dqm,
1113                                 struct qcm_process_device *qpd,
1114                                 uint64_t tba_addr,
1115                                 uint64_t tma_addr)
1116 {
1117         uint64_t *tma;
1118
1119         if (dqm->dev->cwsr_enabled) {
1120                 /* Jump from CWSR trap handler to user trap */
1121                 tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET);
1122                 tma[0] = tba_addr;
1123                 tma[1] = tma_addr;
1124         } else {
1125                 qpd->tba_addr = tba_addr;
1126                 qpd->tma_addr = tma_addr;
1127         }
1128
1129         return 0;
1130 }
1131
1132 static int process_termination_nocpsch(struct device_queue_manager *dqm,
1133                 struct qcm_process_device *qpd)
1134 {
1135         struct queue *q, *next;
1136         struct device_process_node *cur, *next_dpn;
1137         int retval = 0;
1138
1139         mutex_lock(&dqm->lock);
1140
1141         /* Clear all user mode queues */
1142         list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1143                 int ret;
1144
1145                 ret = destroy_queue_nocpsch_locked(dqm, qpd, q);
1146                 if (ret)
1147                         retval = ret;
1148         }
1149
1150         /* Unregister process */
1151         list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1152                 if (qpd == cur->qpd) {
1153                         list_del(&cur->list);
1154                         kfree(cur);
1155                         dqm->processes_count--;
1156                         break;
1157                 }
1158         }
1159
1160         mutex_unlock(&dqm->lock);
1161         return retval;
1162 }
1163
1164
1165 static int process_termination_cpsch(struct device_queue_manager *dqm,
1166                 struct qcm_process_device *qpd)
1167 {
1168         int retval;
1169         struct queue *q, *next;
1170         struct kernel_queue *kq, *kq_next;
1171         struct mqd_manager *mqd;
1172         struct device_process_node *cur, *next_dpn;
1173         enum kfd_unmap_queues_filter filter =
1174                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES;
1175
1176         retval = 0;
1177
1178         mutex_lock(&dqm->lock);
1179
1180         /* Clean all kernel queues */
1181         list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
1182                 list_del(&kq->list);
1183                 dqm->queue_count--;
1184                 qpd->is_debug = false;
1185                 dqm->total_queue_count--;
1186                 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
1187         }
1188
1189         /* Clear all user mode queues */
1190         list_for_each_entry(q, &qpd->queues_list, list) {
1191                 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
1192                         dqm->sdma_queue_count--;
1193
1194                 if (q->properties.is_active)
1195                         dqm->queue_count--;
1196
1197                 dqm->total_queue_count--;
1198         }
1199
1200         /* Unregister process */
1201         list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1202                 if (qpd == cur->qpd) {
1203                         list_del(&cur->list);
1204                         kfree(cur);
1205                         dqm->processes_count--;
1206                         break;
1207                 }
1208         }
1209
1210         retval = execute_queues_cpsch(dqm, filter, 0);
1211         if (retval || qpd->reset_wavefronts) {
1212                 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev);
1213                 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process);
1214                 qpd->reset_wavefronts = false;
1215         }
1216
1217         /* lastly, free mqd resources */
1218         list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1219                 mqd = dqm->ops.get_mqd_manager(dqm,
1220                         get_mqd_type_from_queue_type(q->properties.type));
1221                 if (!mqd) {
1222                         retval = -ENOMEM;
1223                         goto out;
1224                 }
1225                 list_del(&q->list);
1226                 qpd->queue_count--;
1227                 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
1228         }
1229
1230 out:
1231         mutex_unlock(&dqm->lock);
1232         return retval;
1233 }
1234
1235 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
1236 {
1237         struct device_queue_manager *dqm;
1238
1239         pr_debug("Loading device queue manager\n");
1240
1241         dqm = kzalloc(sizeof(*dqm), GFP_KERNEL);
1242         if (!dqm)
1243                 return NULL;
1244
1245         dqm->dev = dev;
1246         switch (sched_policy) {
1247         case KFD_SCHED_POLICY_HWS:
1248         case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
1249                 /* initialize dqm for cp scheduling */
1250                 dqm->ops.create_queue = create_queue_cpsch;
1251                 dqm->ops.initialize = initialize_cpsch;
1252                 dqm->ops.start = start_cpsch;
1253                 dqm->ops.stop = stop_cpsch;
1254                 dqm->ops.destroy_queue = destroy_queue_cpsch;
1255                 dqm->ops.update_queue = update_queue;
1256                 dqm->ops.get_mqd_manager = get_mqd_manager;
1257                 dqm->ops.register_process = register_process;
1258                 dqm->ops.unregister_process = unregister_process;
1259                 dqm->ops.uninitialize = uninitialize;
1260                 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
1261                 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
1262                 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
1263                 dqm->ops.set_trap_handler = set_trap_handler;
1264                 dqm->ops.process_termination = process_termination_cpsch;
1265                 break;
1266         case KFD_SCHED_POLICY_NO_HWS:
1267                 /* initialize dqm for no cp scheduling */
1268                 dqm->ops.start = start_nocpsch;
1269                 dqm->ops.stop = stop_nocpsch;
1270                 dqm->ops.create_queue = create_queue_nocpsch;
1271                 dqm->ops.destroy_queue = destroy_queue_nocpsch;
1272                 dqm->ops.update_queue = update_queue;
1273                 dqm->ops.get_mqd_manager = get_mqd_manager;
1274                 dqm->ops.register_process = register_process;
1275                 dqm->ops.unregister_process = unregister_process;
1276                 dqm->ops.initialize = initialize_nocpsch;
1277                 dqm->ops.uninitialize = uninitialize;
1278                 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
1279                 dqm->ops.set_trap_handler = set_trap_handler;
1280                 dqm->ops.process_termination = process_termination_nocpsch;
1281                 break;
1282         default:
1283                 pr_err("Invalid scheduling policy %d\n", sched_policy);
1284                 goto out_free;
1285         }
1286
1287         switch (dev->device_info->asic_family) {
1288         case CHIP_CARRIZO:
1289                 device_queue_manager_init_vi(&dqm->asic_ops);
1290                 break;
1291
1292         case CHIP_KAVERI:
1293                 device_queue_manager_init_cik(&dqm->asic_ops);
1294                 break;
1295         default:
1296                 WARN(1, "Unexpected ASIC family %u",
1297                      dev->device_info->asic_family);
1298                 goto out_free;
1299         }
1300
1301         if (!dqm->ops.initialize(dqm))
1302                 return dqm;
1303
1304 out_free:
1305         kfree(dqm);
1306         return NULL;
1307 }
1308
1309 void device_queue_manager_uninit(struct device_queue_manager *dqm)
1310 {
1311         dqm->ops.uninitialize(dqm);
1312         kfree(dqm);
1313 }
1314
1315 #if defined(CONFIG_DEBUG_FS)
1316
1317 static void seq_reg_dump(struct seq_file *m,
1318                          uint32_t (*dump)[2], uint32_t n_regs)
1319 {
1320         uint32_t i, count;
1321
1322         for (i = 0, count = 0; i < n_regs; i++) {
1323                 if (count == 0 ||
1324                     dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) {
1325                         seq_printf(m, "%s    %08x: %08x",
1326                                    i ? "\n" : "",
1327                                    dump[i][0], dump[i][1]);
1328                         count = 7;
1329                 } else {
1330                         seq_printf(m, " %08x", dump[i][1]);
1331                         count--;
1332                 }
1333         }
1334
1335         seq_puts(m, "\n");
1336 }
1337
1338 int dqm_debugfs_hqds(struct seq_file *m, void *data)
1339 {
1340         struct device_queue_manager *dqm = data;
1341         uint32_t (*dump)[2], n_regs;
1342         int pipe, queue;
1343         int r = 0;
1344
1345         for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
1346                 int pipe_offset = pipe * get_queues_per_pipe(dqm);
1347
1348                 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) {
1349                         if (!test_bit(pipe_offset + queue,
1350                                       dqm->dev->shared_resources.queue_bitmap))
1351                                 continue;
1352
1353                         r = dqm->dev->kfd2kgd->hqd_dump(
1354                                 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1355                         if (r)
1356                                 break;
1357
1358                         seq_printf(m, "  CP Pipe %d, Queue %d\n",
1359                                   pipe, queue);
1360                         seq_reg_dump(m, dump, n_regs);
1361
1362                         kfree(dump);
1363                 }
1364         }
1365
1366         for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) {
1367                 for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) {
1368                         r = dqm->dev->kfd2kgd->hqd_sdma_dump(
1369                                 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1370                         if (r)
1371                                 break;
1372
1373                         seq_printf(m, "  SDMA Engine %d, RLC %d\n",
1374                                   pipe, queue);
1375                         seq_reg_dump(m, dump, n_regs);
1376
1377                         kfree(dump);
1378                 }
1379         }
1380
1381         return r;
1382 }
1383
1384 #endif