2 * Copyright 2015-2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include <linux/pci.h>
24 #include <linux/acpi.h>
27 #include "kfd_topology.h"
28 #include "kfd_iommu.h"
30 /* GPU Processor ID base for dGPUs for which VCRAT needs to be created.
31 * GPU processor ID are expressed with Bit[31]=1.
32 * The base is set to 0x8000_0000 + 0x1000 to avoid collision with GPU IDs
35 static uint32_t gpu_processor_id_low = 0x80001000;
37 /* Return the next available gpu_processor_id and increment it for next GPU
38 * @total_cu_count - Total CUs present in the GPU including ones
41 static inline unsigned int get_and_inc_gpu_processor_id(
42 unsigned int total_cu_count)
44 int current_id = gpu_processor_id_low;
46 gpu_processor_id_low += total_cu_count;
50 /* Static table to describe GPU Cache information */
51 struct kfd_gpu_cache_info {
55 /* Indicates how many Compute Units share this cache
56 * Value = 1 indicates the cache is not shared
58 uint32_t num_cu_shared;
61 static struct kfd_gpu_cache_info kaveri_cache_info[] = {
63 /* TCP L1 Cache per CU */
66 .flags = (CRAT_CACHE_FLAGS_ENABLED |
67 CRAT_CACHE_FLAGS_DATA_CACHE |
68 CRAT_CACHE_FLAGS_SIMD_CACHE),
73 /* Scalar L1 Instruction Cache (in SQC module) per bank */
76 .flags = (CRAT_CACHE_FLAGS_ENABLED |
77 CRAT_CACHE_FLAGS_INST_CACHE |
78 CRAT_CACHE_FLAGS_SIMD_CACHE),
82 /* Scalar L1 Data Cache (in SQC module) per bank */
85 .flags = (CRAT_CACHE_FLAGS_ENABLED |
86 CRAT_CACHE_FLAGS_DATA_CACHE |
87 CRAT_CACHE_FLAGS_SIMD_CACHE),
91 /* TODO: Add L2 Cache information */
95 static struct kfd_gpu_cache_info carrizo_cache_info[] = {
97 /* TCP L1 Cache per CU */
100 .flags = (CRAT_CACHE_FLAGS_ENABLED |
101 CRAT_CACHE_FLAGS_DATA_CACHE |
102 CRAT_CACHE_FLAGS_SIMD_CACHE),
106 /* Scalar L1 Instruction Cache (in SQC module) per bank */
109 .flags = (CRAT_CACHE_FLAGS_ENABLED |
110 CRAT_CACHE_FLAGS_INST_CACHE |
111 CRAT_CACHE_FLAGS_SIMD_CACHE),
115 /* Scalar L1 Data Cache (in SQC module) per bank. */
118 .flags = (CRAT_CACHE_FLAGS_ENABLED |
119 CRAT_CACHE_FLAGS_DATA_CACHE |
120 CRAT_CACHE_FLAGS_SIMD_CACHE),
124 /* TODO: Add L2 Cache information */
127 /* NOTE: In future if more information is added to struct kfd_gpu_cache_info
128 * the following ASICs may need a separate table.
130 #define hawaii_cache_info kaveri_cache_info
131 #define tonga_cache_info carrizo_cache_info
132 #define fiji_cache_info carrizo_cache_info
133 #define polaris10_cache_info carrizo_cache_info
134 #define polaris11_cache_info carrizo_cache_info
135 /* TODO - check & update Vega10 cache details */
136 #define vega10_cache_info carrizo_cache_info
137 #define raven_cache_info carrizo_cache_info
139 static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev,
140 struct crat_subtype_computeunit *cu)
142 dev->node_props.cpu_cores_count = cu->num_cpu_cores;
143 dev->node_props.cpu_core_id_base = cu->processor_id_low;
144 if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT)
145 dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
147 pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores,
148 cu->processor_id_low);
151 static void kfd_populated_cu_info_gpu(struct kfd_topology_device *dev,
152 struct crat_subtype_computeunit *cu)
154 dev->node_props.simd_id_base = cu->processor_id_low;
155 dev->node_props.simd_count = cu->num_simd_cores;
156 dev->node_props.lds_size_in_kb = cu->lds_size_in_kb;
157 dev->node_props.max_waves_per_simd = cu->max_waves_simd;
158 dev->node_props.wave_front_size = cu->wave_front_size;
159 dev->node_props.array_count = cu->array_count;
160 dev->node_props.cu_per_simd_array = cu->num_cu_per_array;
161 dev->node_props.simd_per_cu = cu->num_simd_per_cu;
162 dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu;
163 if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE)
164 dev->node_props.capability |= HSA_CAP_HOT_PLUGGABLE;
165 pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low);
168 /* kfd_parse_subtype_cu - parse compute unit subtypes and attach it to correct
169 * topology device present in the device_list
171 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu,
172 struct list_head *device_list)
174 struct kfd_topology_device *dev;
176 pr_debug("Found CU entry in CRAT table with proximity_domain=%d caps=%x\n",
177 cu->proximity_domain, cu->hsa_capability);
178 list_for_each_entry(dev, device_list, list) {
179 if (cu->proximity_domain == dev->proximity_domain) {
180 if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT)
181 kfd_populated_cu_info_cpu(dev, cu);
183 if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT)
184 kfd_populated_cu_info_gpu(dev, cu);
192 static struct kfd_mem_properties *
193 find_subtype_mem(uint32_t heap_type, uint32_t flags, uint32_t width,
194 struct kfd_topology_device *dev)
196 struct kfd_mem_properties *props;
198 list_for_each_entry(props, &dev->mem_props, list) {
199 if (props->heap_type == heap_type
200 && props->flags == flags
201 && props->width == width)
207 /* kfd_parse_subtype_mem - parse memory subtypes and attach it to correct
208 * topology device present in the device_list
210 static int kfd_parse_subtype_mem(struct crat_subtype_memory *mem,
211 struct list_head *device_list)
213 struct kfd_mem_properties *props;
214 struct kfd_topology_device *dev;
216 uint64_t size_in_bytes;
220 pr_debug("Found memory entry in CRAT table with proximity_domain=%d\n",
221 mem->proximity_domain);
222 list_for_each_entry(dev, device_list, list) {
223 if (mem->proximity_domain == dev->proximity_domain) {
224 /* We're on GPU node */
225 if (dev->node_props.cpu_cores_count == 0) {
227 if (mem->visibility_type == 0)
229 HSA_MEM_HEAP_TYPE_FB_PRIVATE;
232 heap_type = mem->visibility_type;
234 heap_type = HSA_MEM_HEAP_TYPE_SYSTEM;
236 if (mem->flags & CRAT_MEM_FLAGS_HOT_PLUGGABLE)
237 flags |= HSA_MEM_FLAGS_HOT_PLUGGABLE;
238 if (mem->flags & CRAT_MEM_FLAGS_NON_VOLATILE)
239 flags |= HSA_MEM_FLAGS_NON_VOLATILE;
242 ((uint64_t)mem->length_high << 32) +
246 /* Multiple banks of the same type are aggregated into
247 * one. User mode doesn't care about multiple physical
248 * memory segments. It's managed as a single virtual
249 * heap for user mode.
251 props = find_subtype_mem(heap_type, flags, width, dev);
253 props->size_in_bytes += size_in_bytes;
257 props = kfd_alloc_struct(props);
261 props->heap_type = heap_type;
262 props->flags = flags;
263 props->size_in_bytes = size_in_bytes;
264 props->width = width;
266 dev->node_props.mem_banks_count++;
267 list_add_tail(&props->list, &dev->mem_props);
276 /* kfd_parse_subtype_cache - parse cache subtypes and attach it to correct
277 * topology device present in the device_list
279 static int kfd_parse_subtype_cache(struct crat_subtype_cache *cache,
280 struct list_head *device_list)
282 struct kfd_cache_properties *props;
283 struct kfd_topology_device *dev;
285 uint32_t total_num_of_cu;
287 id = cache->processor_id_low;
289 pr_debug("Found cache entry in CRAT table with processor_id=%d\n", id);
290 list_for_each_entry(dev, device_list, list) {
291 total_num_of_cu = (dev->node_props.array_count *
292 dev->node_props.cu_per_simd_array);
294 /* Cache infomration in CRAT doesn't have proximity_domain
295 * information as it is associated with a CPU core or GPU
296 * Compute Unit. So map the cache using CPU core Id or SIMD
298 * TODO: This works because currently we can safely assume that
299 * Compute Units are parsed before caches are parsed. In
300 * future, remove this dependency
302 if ((id >= dev->node_props.cpu_core_id_base &&
303 id <= dev->node_props.cpu_core_id_base +
304 dev->node_props.cpu_cores_count) ||
305 (id >= dev->node_props.simd_id_base &&
306 id < dev->node_props.simd_id_base +
308 props = kfd_alloc_struct(props);
312 props->processor_id_low = id;
313 props->cache_level = cache->cache_level;
314 props->cache_size = cache->cache_size;
315 props->cacheline_size = cache->cache_line_size;
316 props->cachelines_per_tag = cache->lines_per_tag;
317 props->cache_assoc = cache->associativity;
318 props->cache_latency = cache->cache_latency;
319 memcpy(props->sibling_map, cache->sibling_map,
320 sizeof(props->sibling_map));
322 if (cache->flags & CRAT_CACHE_FLAGS_DATA_CACHE)
323 props->cache_type |= HSA_CACHE_TYPE_DATA;
324 if (cache->flags & CRAT_CACHE_FLAGS_INST_CACHE)
325 props->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
326 if (cache->flags & CRAT_CACHE_FLAGS_CPU_CACHE)
327 props->cache_type |= HSA_CACHE_TYPE_CPU;
328 if (cache->flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
329 props->cache_type |= HSA_CACHE_TYPE_HSACU;
332 dev->node_props.caches_count++;
333 list_add_tail(&props->list, &dev->cache_props);
342 /* kfd_parse_subtype_iolink - parse iolink subtypes and attach it to correct
343 * topology device present in the device_list
345 static int kfd_parse_subtype_iolink(struct crat_subtype_iolink *iolink,
346 struct list_head *device_list)
348 struct kfd_iolink_properties *props = NULL, *props2;
349 struct kfd_topology_device *dev, *to_dev;
353 id_from = iolink->proximity_domain_from;
354 id_to = iolink->proximity_domain_to;
356 pr_debug("Found IO link entry in CRAT table with id_from=%d, id_to %d\n",
358 list_for_each_entry(dev, device_list, list) {
359 if (id_from == dev->proximity_domain) {
360 props = kfd_alloc_struct(props);
364 props->node_from = id_from;
365 props->node_to = id_to;
366 props->ver_maj = iolink->version_major;
367 props->ver_min = iolink->version_minor;
368 props->iolink_type = iolink->io_interface_type;
370 if (props->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS)
372 else if (props->iolink_type == CRAT_IOLINK_TYPE_XGMI)
375 props->weight = node_distance(id_from, id_to);
377 props->min_latency = iolink->minimum_latency;
378 props->max_latency = iolink->maximum_latency;
379 props->min_bandwidth = iolink->minimum_bandwidth_mbs;
380 props->max_bandwidth = iolink->maximum_bandwidth_mbs;
381 props->rec_transfer_size =
382 iolink->recommended_transfer_size;
384 dev->io_link_count++;
385 dev->node_props.io_links_count++;
386 list_add_tail(&props->list, &dev->io_link_props);
391 /* CPU topology is created before GPUs are detected, so CPU->GPU
392 * links are not built at that time. If a PCIe type is discovered, it
393 * means a GPU is detected and we are adding GPU->CPU to the topology.
394 * At this time, also add the corresponded CPU->GPU link if GPU
396 * For xGMI, we only added the link with one direction in the crat
397 * table, add corresponded reversed direction link now.
399 if (props && (iolink->flags & CRAT_IOLINK_FLAGS_BI_DIRECTIONAL)) {
400 to_dev = kfd_topology_device_by_proximity_domain(id_to);
403 /* same everything but the other direction */
404 props2 = kmemdup(props, sizeof(*props2), GFP_KERNEL);
405 props2->node_from = id_to;
406 props2->node_to = id_from;
408 to_dev->io_link_count++;
409 to_dev->node_props.io_links_count++;
410 list_add_tail(&props2->list, &to_dev->io_link_props);
416 /* kfd_parse_subtype - parse subtypes and attach it to correct topology device
417 * present in the device_list
418 * @sub_type_hdr - subtype section of crat_image
419 * @device_list - list of topology devices present in this crat_image
421 static int kfd_parse_subtype(struct crat_subtype_generic *sub_type_hdr,
422 struct list_head *device_list)
424 struct crat_subtype_computeunit *cu;
425 struct crat_subtype_memory *mem;
426 struct crat_subtype_cache *cache;
427 struct crat_subtype_iolink *iolink;
430 switch (sub_type_hdr->type) {
431 case CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY:
432 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
433 ret = kfd_parse_subtype_cu(cu, device_list);
435 case CRAT_SUBTYPE_MEMORY_AFFINITY:
436 mem = (struct crat_subtype_memory *)sub_type_hdr;
437 ret = kfd_parse_subtype_mem(mem, device_list);
439 case CRAT_SUBTYPE_CACHE_AFFINITY:
440 cache = (struct crat_subtype_cache *)sub_type_hdr;
441 ret = kfd_parse_subtype_cache(cache, device_list);
443 case CRAT_SUBTYPE_TLB_AFFINITY:
445 * For now, nothing to do here
447 pr_debug("Found TLB entry in CRAT table (not processing)\n");
449 case CRAT_SUBTYPE_CCOMPUTE_AFFINITY:
451 * For now, nothing to do here
453 pr_debug("Found CCOMPUTE entry in CRAT table (not processing)\n");
455 case CRAT_SUBTYPE_IOLINK_AFFINITY:
456 iolink = (struct crat_subtype_iolink *)sub_type_hdr;
457 ret = kfd_parse_subtype_iolink(iolink, device_list);
460 pr_warn("Unknown subtype %d in CRAT\n",
467 /* kfd_parse_crat_table - parse CRAT table. For each node present in CRAT
468 * create a kfd_topology_device and add in to device_list. Also parse
469 * CRAT subtypes and attach it to appropriate kfd_topology_device
470 * @crat_image - input image containing CRAT
471 * @device_list - [OUT] list of kfd_topology_device generated after
473 * @proximity_domain - Proximity domain of the first device in the table
475 * Return - 0 if successful else -ve value
477 int kfd_parse_crat_table(void *crat_image, struct list_head *device_list,
478 uint32_t proximity_domain)
480 struct kfd_topology_device *top_dev = NULL;
481 struct crat_subtype_generic *sub_type_hdr;
484 struct crat_header *crat_table = (struct crat_header *)crat_image;
491 if (!list_empty(device_list)) {
492 pr_warn("Error device list should be empty\n");
496 num_nodes = crat_table->num_domains;
497 image_len = crat_table->length;
499 pr_info("Parsing CRAT table with %d nodes\n", num_nodes);
501 for (node_id = 0; node_id < num_nodes; node_id++) {
502 top_dev = kfd_create_topology_device(device_list);
505 top_dev->proximity_domain = proximity_domain++;
513 memcpy(top_dev->oem_id, crat_table->oem_id, CRAT_OEMID_LENGTH);
514 memcpy(top_dev->oem_table_id, crat_table->oem_table_id,
515 CRAT_OEMTABLEID_LENGTH);
516 top_dev->oem_revision = crat_table->oem_revision;
518 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1);
519 while ((char *)sub_type_hdr + sizeof(struct crat_subtype_generic) <
520 ((char *)crat_image) + image_len) {
521 if (sub_type_hdr->flags & CRAT_SUBTYPE_FLAGS_ENABLED) {
522 ret = kfd_parse_subtype(sub_type_hdr, device_list);
527 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
528 sub_type_hdr->length);
533 kfd_release_topology_device_list(device_list);
538 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
539 static int fill_in_pcache(struct crat_subtype_cache *pcache,
540 struct kfd_gpu_cache_info *pcache_info,
541 struct kfd_cu_info *cu_info,
544 int cache_type, unsigned int cu_processor_id,
547 unsigned int cu_sibling_map_mask;
550 /* First check if enough memory is available */
551 if (sizeof(struct crat_subtype_cache) > mem_available)
554 cu_sibling_map_mask = cu_bitmask;
555 cu_sibling_map_mask >>= cu_block;
556 cu_sibling_map_mask &=
557 ((1 << pcache_info[cache_type].num_cu_shared) - 1);
558 first_active_cu = ffs(cu_sibling_map_mask);
560 /* CU could be inactive. In case of shared cache find the first active
561 * CU. and incase of non-shared cache check if the CU is inactive. If
562 * inactive active skip it
564 if (first_active_cu) {
565 memset(pcache, 0, sizeof(struct crat_subtype_cache));
566 pcache->type = CRAT_SUBTYPE_CACHE_AFFINITY;
567 pcache->length = sizeof(struct crat_subtype_cache);
568 pcache->flags = pcache_info[cache_type].flags;
569 pcache->processor_id_low = cu_processor_id
570 + (first_active_cu - 1);
571 pcache->cache_level = pcache_info[cache_type].cache_level;
572 pcache->cache_size = pcache_info[cache_type].cache_size;
574 /* Sibling map is w.r.t processor_id_low, so shift out
577 cu_sibling_map_mask =
578 cu_sibling_map_mask >> (first_active_cu - 1);
580 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF);
581 pcache->sibling_map[1] =
582 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
583 pcache->sibling_map[2] =
584 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
585 pcache->sibling_map[3] =
586 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
592 /* kfd_fill_gpu_cache_info - Fill GPU cache info using kfd_gpu_cache_info
595 * @kdev - [IN] GPU device
596 * @gpu_processor_id - [IN] GPU processor ID to which these caches
598 * @available_size - [IN] Amount of memory available in pcache
599 * @cu_info - [IN] Compute Unit info obtained from KGD
600 * @pcache - [OUT] memory into which cache data is to be filled in.
601 * @size_filled - [OUT] amount of data used up in pcache.
602 * @num_of_entries - [OUT] number of caches added
604 static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
605 int gpu_processor_id,
607 struct kfd_cu_info *cu_info,
608 struct crat_subtype_cache *pcache,
612 struct kfd_gpu_cache_info *pcache_info;
613 int num_of_cache_types = 0;
616 int mem_available = available_size;
617 unsigned int cu_processor_id;
620 switch (kdev->device_info->asic_family) {
622 pcache_info = kaveri_cache_info;
623 num_of_cache_types = ARRAY_SIZE(kaveri_cache_info);
626 pcache_info = hawaii_cache_info;
627 num_of_cache_types = ARRAY_SIZE(hawaii_cache_info);
630 pcache_info = carrizo_cache_info;
631 num_of_cache_types = ARRAY_SIZE(carrizo_cache_info);
634 pcache_info = tonga_cache_info;
635 num_of_cache_types = ARRAY_SIZE(tonga_cache_info);
638 pcache_info = fiji_cache_info;
639 num_of_cache_types = ARRAY_SIZE(fiji_cache_info);
642 pcache_info = polaris10_cache_info;
643 num_of_cache_types = ARRAY_SIZE(polaris10_cache_info);
646 pcache_info = polaris11_cache_info;
647 num_of_cache_types = ARRAY_SIZE(polaris11_cache_info);
651 pcache_info = vega10_cache_info;
652 num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
655 pcache_info = raven_cache_info;
656 num_of_cache_types = ARRAY_SIZE(raven_cache_info);
665 /* For each type of cache listed in the kfd_gpu_cache_info table,
666 * go through all available Compute Units.
667 * The [i,j,k] loop will
668 * if kfd_gpu_cache_info.num_cu_shared = 1
669 * will parse through all available CU
670 * If (kfd_gpu_cache_info.num_cu_shared != 1)
671 * then it will consider only one CU from
675 for (ct = 0; ct < num_of_cache_types; ct++) {
676 cu_processor_id = gpu_processor_id;
677 for (i = 0; i < cu_info->num_shader_engines; i++) {
678 for (j = 0; j < cu_info->num_shader_arrays_per_engine;
680 for (k = 0; k < cu_info->num_cu_per_sh;
681 k += pcache_info[ct].num_cu_shared) {
683 ret = fill_in_pcache(pcache,
687 cu_info->cu_bitmap[i][j],
704 /* Move to next CU block */
706 pcache_info[ct].num_cu_shared;
712 pr_debug("Added [%d] GPU cache entries\n", *num_of_entries);
718 * kfd_create_crat_image_acpi - Allocates memory for CRAT image and
719 * copies CRAT from ACPI (if available).
720 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory
722 * @crat_image: CRAT read from ACPI. If no CRAT in ACPI then
723 * crat_image will be NULL
724 * @size: [OUT] size of crat_image
726 * Return 0 if successful else return error code
728 int kfd_create_crat_image_acpi(void **crat_image, size_t *size)
730 struct acpi_table_header *crat_table;
739 /* Fetch the CRAT table from ACPI */
740 status = acpi_get_table(CRAT_SIGNATURE, 0, &crat_table);
741 if (status == AE_NOT_FOUND) {
742 pr_warn("CRAT table not found\n");
744 } else if (ACPI_FAILURE(status)) {
745 const char *err = acpi_format_exception(status);
747 pr_err("CRAT table error: %s\n", err);
752 pr_info("CRAT table disabled by module option\n");
756 pcrat_image = kmalloc(crat_table->length, GFP_KERNEL);
760 memcpy(pcrat_image, crat_table, crat_table->length);
762 *crat_image = pcrat_image;
763 *size = crat_table->length;
768 /* Memory required to create Virtual CRAT.
769 * Since there is no easy way to predict the amount of memory required, the
770 * following amount are allocated for CPU and GPU Virtual CRAT. This is
771 * expected to cover all known conditions. But to be safe additional check
772 * is put in the code to ensure we don't overwrite.
774 #define VCRAT_SIZE_FOR_CPU (2 * PAGE_SIZE)
775 #define VCRAT_SIZE_FOR_GPU (3 * PAGE_SIZE)
777 /* kfd_fill_cu_for_cpu - Fill in Compute info for the given CPU NUMA node
779 * @numa_node_id: CPU NUMA node id
780 * @avail_size: Available size in the memory
781 * @sub_type_hdr: Memory into which compute info will be filled in
783 * Return 0 if successful else return -ve value
785 static int kfd_fill_cu_for_cpu(int numa_node_id, int *avail_size,
786 int proximity_domain,
787 struct crat_subtype_computeunit *sub_type_hdr)
789 const struct cpumask *cpumask;
791 *avail_size -= sizeof(struct crat_subtype_computeunit);
795 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit));
797 /* Fill in subtype header data */
798 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY;
799 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit);
800 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
802 cpumask = cpumask_of_node(numa_node_id);
804 /* Fill in CU data */
805 sub_type_hdr->flags |= CRAT_CU_FLAGS_CPU_PRESENT;
806 sub_type_hdr->proximity_domain = proximity_domain;
807 sub_type_hdr->processor_id_low = kfd_numa_node_to_apic_id(numa_node_id);
808 if (sub_type_hdr->processor_id_low == -1)
811 sub_type_hdr->num_cpu_cores = cpumask_weight(cpumask);
816 /* kfd_fill_mem_info_for_cpu - Fill in Memory info for the given CPU NUMA node
818 * @numa_node_id: CPU NUMA node id
819 * @avail_size: Available size in the memory
820 * @sub_type_hdr: Memory into which compute info will be filled in
822 * Return 0 if successful else return -ve value
824 static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size,
825 int proximity_domain,
826 struct crat_subtype_memory *sub_type_hdr)
828 uint64_t mem_in_bytes = 0;
832 *avail_size -= sizeof(struct crat_subtype_memory);
836 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_memory));
838 /* Fill in subtype header data */
839 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY;
840 sub_type_hdr->length = sizeof(struct crat_subtype_memory);
841 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
843 /* Fill in Memory Subunit data */
845 /* Unlike si_meminfo, si_meminfo_node is not exported. So
846 * the following lines are duplicated from si_meminfo_node
849 pgdat = NODE_DATA(numa_node_id);
850 for (zone_type = 0; zone_type < MAX_NR_ZONES; zone_type++)
851 mem_in_bytes += pgdat->node_zones[zone_type].managed_pages;
852 mem_in_bytes <<= PAGE_SHIFT;
854 sub_type_hdr->length_low = lower_32_bits(mem_in_bytes);
855 sub_type_hdr->length_high = upper_32_bits(mem_in_bytes);
856 sub_type_hdr->proximity_domain = proximity_domain;
861 static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size,
862 uint32_t *num_entries,
863 struct crat_subtype_iolink *sub_type_hdr)
866 struct cpuinfo_x86 *c = &cpu_data(0);
869 if (c->x86_vendor == X86_VENDOR_AMD)
870 link_type = CRAT_IOLINK_TYPE_HYPERTRANSPORT;
872 link_type = CRAT_IOLINK_TYPE_QPI_1_1;
876 /* Create IO links from this node to other CPU nodes */
877 for_each_online_node(nid) {
878 if (nid == numa_node_id) /* node itself */
881 *avail_size -= sizeof(struct crat_subtype_iolink);
885 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_iolink));
887 /* Fill in subtype header data */
888 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY;
889 sub_type_hdr->length = sizeof(struct crat_subtype_iolink);
890 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
892 /* Fill in IO link data */
893 sub_type_hdr->proximity_domain_from = numa_node_id;
894 sub_type_hdr->proximity_domain_to = nid;
895 sub_type_hdr->io_interface_type = link_type;
904 /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU
906 * @pcrat_image: Fill in VCRAT for CPU
907 * @size: [IN] allocated size of crat_image.
908 * [OUT] actual size of data filled in crat_image
910 static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size)
912 struct crat_header *crat_table = (struct crat_header *)pcrat_image;
913 struct acpi_table_header *acpi_table;
915 struct crat_subtype_generic *sub_type_hdr;
916 int avail_size = *size;
918 uint32_t entries = 0;
921 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU)
924 /* Fill in CRAT Header.
925 * Modify length and total_entries as subunits are added.
927 avail_size -= sizeof(struct crat_header);
931 memset(crat_table, 0, sizeof(struct crat_header));
932 memcpy(&crat_table->signature, CRAT_SIGNATURE,
933 sizeof(crat_table->signature));
934 crat_table->length = sizeof(struct crat_header);
936 status = acpi_get_table("DSDT", 0, &acpi_table);
938 pr_warn("DSDT table not found for OEM information\n");
940 crat_table->oem_revision = acpi_table->revision;
941 memcpy(crat_table->oem_id, acpi_table->oem_id,
943 memcpy(crat_table->oem_table_id, acpi_table->oem_table_id,
944 CRAT_OEMTABLEID_LENGTH);
946 crat_table->total_entries = 0;
947 crat_table->num_domains = 0;
949 sub_type_hdr = (struct crat_subtype_generic *)(crat_table+1);
951 for_each_online_node(numa_node_id) {
952 if (kfd_numa_node_to_apic_id(numa_node_id) == -1)
955 /* Fill in Subtype: Compute Unit */
956 ret = kfd_fill_cu_for_cpu(numa_node_id, &avail_size,
957 crat_table->num_domains,
958 (struct crat_subtype_computeunit *)sub_type_hdr);
961 crat_table->length += sub_type_hdr->length;
962 crat_table->total_entries++;
964 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
965 sub_type_hdr->length);
967 /* Fill in Subtype: Memory */
968 ret = kfd_fill_mem_info_for_cpu(numa_node_id, &avail_size,
969 crat_table->num_domains,
970 (struct crat_subtype_memory *)sub_type_hdr);
973 crat_table->length += sub_type_hdr->length;
974 crat_table->total_entries++;
976 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
977 sub_type_hdr->length);
979 /* Fill in Subtype: IO Link */
980 ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size,
982 (struct crat_subtype_iolink *)sub_type_hdr);
985 crat_table->length += (sub_type_hdr->length * entries);
986 crat_table->total_entries += entries;
988 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
989 sub_type_hdr->length * entries);
991 crat_table->num_domains++;
994 /* TODO: Add cache Subtype for CPU.
995 * Currently, CPU cache information is available in function
996 * detect_cache_attributes(cpu) defined in the file
997 * ./arch/x86/kernel/cpu/intel_cacheinfo.c. This function is not
998 * exported and to get the same information the code needs to be
1002 *size = crat_table->length;
1003 pr_info("Virtual CRAT table created for CPU\n");
1008 static int kfd_fill_gpu_memory_affinity(int *avail_size,
1009 struct kfd_dev *kdev, uint8_t type, uint64_t size,
1010 struct crat_subtype_memory *sub_type_hdr,
1011 uint32_t proximity_domain,
1012 const struct kfd_local_mem_info *local_mem_info)
1014 *avail_size -= sizeof(struct crat_subtype_memory);
1015 if (*avail_size < 0)
1018 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_memory));
1019 sub_type_hdr->type = CRAT_SUBTYPE_MEMORY_AFFINITY;
1020 sub_type_hdr->length = sizeof(struct crat_subtype_memory);
1021 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED;
1023 sub_type_hdr->proximity_domain = proximity_domain;
1025 pr_debug("Fill gpu memory affinity - type 0x%x size 0x%llx\n",
1028 sub_type_hdr->length_low = lower_32_bits(size);
1029 sub_type_hdr->length_high = upper_32_bits(size);
1031 sub_type_hdr->width = local_mem_info->vram_width;
1032 sub_type_hdr->visibility_type = type;
1037 /* kfd_fill_gpu_direct_io_link - Fill in direct io link from GPU
1039 * @avail_size: Available size in the memory
1040 * @kdev - [IN] GPU device
1041 * @sub_type_hdr: Memory into which io link info will be filled in
1042 * @proximity_domain - proximity domain of the GPU node
1044 * Return 0 if successful else return -ve value
1046 static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size,
1047 struct kfd_dev *kdev,
1048 struct crat_subtype_iolink *sub_type_hdr,
1049 uint32_t proximity_domain)
1051 *avail_size -= sizeof(struct crat_subtype_iolink);
1052 if (*avail_size < 0)
1055 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink));
1057 /* Fill in subtype header data */
1058 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY;
1059 sub_type_hdr->length = sizeof(struct crat_subtype_iolink);
1060 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED;
1061 if (kfd_dev_is_large_bar(kdev))
1062 sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
1064 /* Fill in IOLINK subtype.
1065 * TODO: Fill-in other fields of iolink subtype
1067 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_PCIEXPRESS;
1068 sub_type_hdr->proximity_domain_from = proximity_domain;
1070 if (kdev->pdev->dev.numa_node == NUMA_NO_NODE)
1071 sub_type_hdr->proximity_domain_to = 0;
1073 sub_type_hdr->proximity_domain_to = kdev->pdev->dev.numa_node;
1075 sub_type_hdr->proximity_domain_to = 0;
1080 static int kfd_fill_gpu_xgmi_link_to_gpu(int *avail_size,
1081 struct kfd_dev *kdev,
1082 struct crat_subtype_iolink *sub_type_hdr,
1083 uint32_t proximity_domain_from,
1084 uint32_t proximity_domain_to)
1086 *avail_size -= sizeof(struct crat_subtype_iolink);
1087 if (*avail_size < 0)
1090 memset((void *)sub_type_hdr, 0, sizeof(struct crat_subtype_iolink));
1092 sub_type_hdr->type = CRAT_SUBTYPE_IOLINK_AFFINITY;
1093 sub_type_hdr->length = sizeof(struct crat_subtype_iolink);
1094 sub_type_hdr->flags |= CRAT_SUBTYPE_FLAGS_ENABLED |
1095 CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
1097 sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI;
1098 sub_type_hdr->proximity_domain_from = proximity_domain_from;
1099 sub_type_hdr->proximity_domain_to = proximity_domain_to;
1103 /* kfd_create_vcrat_image_gpu - Create Virtual CRAT for CPU
1105 * @pcrat_image: Fill in VCRAT for GPU
1106 * @size: [IN] allocated size of crat_image.
1107 * [OUT] actual size of data filled in crat_image
1109 static int kfd_create_vcrat_image_gpu(void *pcrat_image,
1110 size_t *size, struct kfd_dev *kdev,
1111 uint32_t proximity_domain)
1113 struct crat_header *crat_table = (struct crat_header *)pcrat_image;
1114 struct crat_subtype_generic *sub_type_hdr;
1115 struct kfd_local_mem_info local_mem_info;
1116 struct kfd_topology_device *peer_dev;
1117 struct crat_subtype_computeunit *cu;
1118 struct kfd_cu_info cu_info;
1119 int avail_size = *size;
1120 uint32_t total_num_of_cu;
1121 int num_of_cache_entries = 0;
1122 int cache_mem_filled = 0;
1126 if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_GPU)
1129 /* Fill the CRAT Header.
1130 * Modify length and total_entries as subunits are added.
1132 avail_size -= sizeof(struct crat_header);
1136 memset(crat_table, 0, sizeof(struct crat_header));
1138 memcpy(&crat_table->signature, CRAT_SIGNATURE,
1139 sizeof(crat_table->signature));
1140 /* Change length as we add more subtypes*/
1141 crat_table->length = sizeof(struct crat_header);
1142 crat_table->num_domains = 1;
1143 crat_table->total_entries = 0;
1145 /* Fill in Subtype: Compute Unit
1146 * First fill in the sub type header and then sub type data
1148 avail_size -= sizeof(struct crat_subtype_computeunit);
1152 sub_type_hdr = (struct crat_subtype_generic *)(crat_table + 1);
1153 memset(sub_type_hdr, 0, sizeof(struct crat_subtype_computeunit));
1155 sub_type_hdr->type = CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY;
1156 sub_type_hdr->length = sizeof(struct crat_subtype_computeunit);
1157 sub_type_hdr->flags = CRAT_SUBTYPE_FLAGS_ENABLED;
1159 /* Fill CU subtype data */
1160 cu = (struct crat_subtype_computeunit *)sub_type_hdr;
1161 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT;
1162 cu->proximity_domain = proximity_domain;
1164 kdev->kfd2kgd->get_cu_info(kdev->kgd, &cu_info);
1165 cu->num_simd_per_cu = cu_info.simd_per_cu;
1166 cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number;
1167 cu->max_waves_simd = cu_info.max_waves_per_simd;
1169 cu->wave_front_size = cu_info.wave_front_size;
1170 cu->array_count = cu_info.num_shader_arrays_per_engine *
1171 cu_info.num_shader_engines;
1172 total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh);
1173 cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu);
1174 cu->num_cu_per_array = cu_info.num_cu_per_sh;
1175 cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu;
1176 cu->num_banks = cu_info.num_shader_engines;
1177 cu->lds_size_in_kb = cu_info.lds_size;
1179 cu->hsa_capability = 0;
1181 /* Check if this node supports IOMMU. During parsing this flag will
1182 * translate to HSA_CAP_ATS_PRESENT
1184 if (!kfd_iommu_check_device(kdev))
1185 cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT;
1187 crat_table->length += sub_type_hdr->length;
1188 crat_table->total_entries++;
1190 /* Fill in Subtype: Memory. Only on systems with large BAR (no
1191 * private FB), report memory as public. On other systems
1192 * report the total FB size (public+private) as a single
1195 kdev->kfd2kgd->get_local_mem_info(kdev->kgd, &local_mem_info);
1196 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1197 sub_type_hdr->length);
1200 local_mem_info.local_mem_size_private = 0;
1202 if (local_mem_info.local_mem_size_private == 0)
1203 ret = kfd_fill_gpu_memory_affinity(&avail_size,
1204 kdev, HSA_MEM_HEAP_TYPE_FB_PUBLIC,
1205 local_mem_info.local_mem_size_public,
1206 (struct crat_subtype_memory *)sub_type_hdr,
1210 ret = kfd_fill_gpu_memory_affinity(&avail_size,
1211 kdev, HSA_MEM_HEAP_TYPE_FB_PRIVATE,
1212 local_mem_info.local_mem_size_public +
1213 local_mem_info.local_mem_size_private,
1214 (struct crat_subtype_memory *)sub_type_hdr,
1220 crat_table->length += sizeof(struct crat_subtype_memory);
1221 crat_table->total_entries++;
1223 /* TODO: Fill in cache information. This information is NOT readily
1226 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1227 sub_type_hdr->length);
1228 ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low,
1231 (struct crat_subtype_cache *)sub_type_hdr,
1233 &num_of_cache_entries);
1238 crat_table->length += cache_mem_filled;
1239 crat_table->total_entries += num_of_cache_entries;
1240 avail_size -= cache_mem_filled;
1242 /* Fill in Subtype: IO_LINKS
1243 * Only direct links are added here which is Link from GPU to
1244 * to its NUMA node. Indirect links are added by userspace.
1246 sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1248 ret = kfd_fill_gpu_direct_io_link_to_cpu(&avail_size, kdev,
1249 (struct crat_subtype_iolink *)sub_type_hdr, proximity_domain);
1254 crat_table->length += sub_type_hdr->length;
1255 crat_table->total_entries++;
1258 /* Fill in Subtype: IO_LINKS
1259 * Direct links from GPU to other GPUs through xGMI.
1260 * We will loop GPUs that already be processed (with lower value
1261 * of proximity_domain), add the link for the GPUs with same
1262 * hive id (from this GPU to other GPU) . The reversed iolink
1263 * (from other GPU to this GPU) will be added
1264 * in kfd_parse_subtype_iolink.
1266 if (kdev->hive_id) {
1267 for (nid = 0; nid < proximity_domain; ++nid) {
1268 peer_dev = kfd_topology_device_by_proximity_domain(nid);
1271 if (peer_dev->gpu->hive_id != kdev->hive_id)
1273 sub_type_hdr = (typeof(sub_type_hdr))(
1274 (char *)sub_type_hdr +
1275 sizeof(struct crat_subtype_iolink));
1276 ret = kfd_fill_gpu_xgmi_link_to_gpu(
1278 (struct crat_subtype_iolink *)sub_type_hdr,
1279 proximity_domain, nid);
1282 crat_table->length += sub_type_hdr->length;
1283 crat_table->total_entries++;
1286 *size = crat_table->length;
1287 pr_info("Virtual CRAT table created for GPU\n");
1292 /* kfd_create_crat_image_virtual - Allocates memory for CRAT image and
1293 * creates a Virtual CRAT (VCRAT) image
1295 * NOTE: Call kfd_destroy_crat_image to free CRAT image memory
1297 * @crat_image: VCRAT image created because ACPI does not have a
1298 * CRAT for this device
1299 * @size: [OUT] size of virtual crat_image
1300 * @flags: COMPUTE_UNIT_CPU - Create VCRAT for CPU device
1301 * COMPUTE_UNIT_GPU - Create VCRAT for GPU
1302 * (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU) - Create VCRAT for APU
1303 * -- this option is not currently implemented.
1304 * The assumption is that all AMD APUs will have CRAT
1305 * @kdev: Valid kfd_device required if flags contain COMPUTE_UNIT_GPU
1307 * Return 0 if successful else return -ve value
1309 int kfd_create_crat_image_virtual(void **crat_image, size_t *size,
1310 int flags, struct kfd_dev *kdev,
1311 uint32_t proximity_domain)
1313 void *pcrat_image = NULL;
1321 /* Allocate one VCRAT_SIZE_FOR_CPU for CPU virtual CRAT image and
1322 * VCRAT_SIZE_FOR_GPU for GPU virtual CRAT image. This should cover
1323 * all the current conditions. A check is put not to overwrite beyond
1327 case COMPUTE_UNIT_CPU:
1328 pcrat_image = kmalloc(VCRAT_SIZE_FOR_CPU, GFP_KERNEL);
1331 *size = VCRAT_SIZE_FOR_CPU;
1332 ret = kfd_create_vcrat_image_cpu(pcrat_image, size);
1334 case COMPUTE_UNIT_GPU:
1337 pcrat_image = kmalloc(VCRAT_SIZE_FOR_GPU, GFP_KERNEL);
1340 *size = VCRAT_SIZE_FOR_GPU;
1341 ret = kfd_create_vcrat_image_gpu(pcrat_image, size, kdev,
1344 case (COMPUTE_UNIT_CPU | COMPUTE_UNIT_GPU):
1347 pr_err("VCRAT not implemented for APU\n");
1354 *crat_image = pcrat_image;
1362 /* kfd_destroy_crat_image
1364 * @crat_image: [IN] - crat_image from kfd_create_crat_image_xxx(..)
1367 void kfd_destroy_crat_image(void *crat_image)