drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef __AMDGPU_TTM_H__
  25 #define __AMDGPU_TTM_H__
  26
  27 #include <linux/dma-direction.h>
  28 #include <drm/gpu_scheduler.h>
  29 #include "amdgpu_vram_mgr.h"
  30 #include "amdgpu.h"
  31
  32 #define AMDGPU_PL_GDS           (TTM_PL_PRIV + 0)
  33 #define AMDGPU_PL_GWS           (TTM_PL_PRIV + 1)
  34 #define AMDGPU_PL_OA            (TTM_PL_PRIV + 2)
  35 #define AMDGPU_PL_PREEMPT       (TTM_PL_PRIV + 3)
  36
  37 #define AMDGPU_GTT_MAX_TRANSFER_SIZE    512
  38 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
  39
  40 #define AMDGPU_POISON   0xd0bed0be
  41
  42 struct amdgpu_gtt_mgr {
  43         struct ttm_resource_manager manager;
  44         struct drm_mm mm;
  45         spinlock_t lock;
  46 };
  47
  48 struct amdgpu_mman {
  49         struct ttm_device               bdev;
  50         bool                            initialized;
  51         void __iomem                    *aper_base_kaddr;
  52
  53         /* buffer handling */
  54         const struct amdgpu_buffer_funcs        *buffer_funcs;
  55         struct amdgpu_ring                      *buffer_funcs_ring;
  56         bool                                    buffer_funcs_enabled;
  57
  58         struct mutex                            gtt_window_lock;
  59         /* Scheduler entity for buffer moves */
  60         struct drm_sched_entity                 entity;
  61
  62         struct amdgpu_vram_mgr vram_mgr;
  63         struct amdgpu_gtt_mgr gtt_mgr;
  64         struct ttm_resource_manager preempt_mgr;
  65
  66         uint64_t                stolen_vga_size;
  67         struct amdgpu_bo        *stolen_vga_memory;
  68         uint64_t                stolen_extended_size;
  69         struct amdgpu_bo        *stolen_extended_memory;
  70         bool                    keep_stolen_vga_memory;
  71
  72         struct amdgpu_bo        *stolen_reserved_memory;
  73         uint64_t                stolen_reserved_offset;
  74         uint64_t                stolen_reserved_size;
  75
  76         /* discovery */
  77         uint8_t                         *discovery_bin;
  78         uint32_t                        discovery_tmr_size;
  79         struct amdgpu_bo                *discovery_memory;
  80
  81         /* firmware VRAM reservation */
  82         u64             fw_vram_usage_start_offset;
  83         u64             fw_vram_usage_size;
  84         struct amdgpu_bo        *fw_vram_usage_reserved_bo;
  85         void            *fw_vram_usage_va;
  86
  87         /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
  88         struct amdgpu_bo        *sdma_access_bo;
  89         void                    *sdma_access_ptr;
  90 };
  91
  92 struct amdgpu_copy_mem {
  93         struct ttm_buffer_object        *bo;
  94         struct ttm_resource             *mem;
  95         unsigned long                   offset;
  96 };
  97
  98 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
  99 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
 100 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
 101 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
 102 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
 103 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
 104
 105 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
 106 void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
 107
 108 uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
 109
 110 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
 111 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
 112                               struct ttm_resource *mem,
 113                               u64 offset, u64 size,
 114                               struct device *dev,
 115                               enum dma_data_direction dir,
 116                               struct sg_table **sgt);
 117 void amdgpu_vram_mgr_free_sgt(struct device *dev,
 118                               enum dma_data_direction dir,
 119                               struct sg_table *sgt);
 120 uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
 121 int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
 122                                   uint64_t start, uint64_t size);
 123 int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
 124                                       uint64_t start);
 125
 126 int amdgpu_ttm_init(struct amdgpu_device *adev);
 127 void amdgpu_ttm_fini(struct amdgpu_device *adev);
 128 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
 129                                         bool enable);
 130
 131 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
 132                        uint64_t dst_offset, uint32_t byte_count,
 133                        struct dma_resv *resv,
 134                        struct dma_fence **fence, bool direct_submit,
 135                        bool vm_needs_flush, bool tmz);
 136 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 137                                const struct amdgpu_copy_mem *src,
 138                                const struct amdgpu_copy_mem *dst,
 139                                uint64_t size, bool tmz,
 140                                struct dma_resv *resv,
 141                                struct dma_fence **f);
 142 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 143                         uint32_t src_data,
 144                         struct dma_resv *resv,
 145                         struct dma_fence **fence);
 146
 147 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 148 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
 149 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
 150
 151 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
 152 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
 153 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
 154 #else
 155 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
 156                                                struct page **pages)
 157 {
 158         return -EPERM;
 159 }
 160 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
 161 {
 162         return false;
 163 }
 164 #endif
 165
 166 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
 167 int amdgpu_ttm_tt_get_userptr(const struct ttm_buffer_object *tbo,
 168                               uint64_t *user_addr);
 169 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
 170                               uint64_t addr, uint32_t flags);
 171 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
 172 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
 173 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
 174                                   unsigned long end, unsigned long *userptr);
 175 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
 176                                        int *last_invalidated);
 177 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
 178 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
 179 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
 180 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
 181                                  struct ttm_resource *mem);
 182 int amdgpu_ttm_evict_resources(struct amdgpu_device *adev, int mem_type);
 183
 184 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
 185
 186 #endif