2 * Copyright 2021 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
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24 #ifndef __AMDGPU_RESET_H__
25 #define __AMDGPU_RESET_H__
29 enum AMDGPU_RESET_FLAGS {
31 AMDGPU_NEED_FULL_RESET = 0,
32 AMDGPU_SKIP_HW_RESET = 1,
35 struct amdgpu_reset_context {
36 enum amd_reset_method method;
37 struct amdgpu_device *reset_req_dev;
38 struct amdgpu_job *job;
39 struct amdgpu_hive_info *hive;
43 struct amdgpu_reset_handler {
44 enum amd_reset_method reset_method;
45 struct list_head handler_list;
46 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl,
47 struct amdgpu_reset_context *context);
48 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl,
49 struct amdgpu_reset_context *context);
50 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl,
51 struct amdgpu_reset_context *context);
52 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl,
53 struct amdgpu_reset_context *context);
54 int (*restore_env)(struct amdgpu_reset_control *reset_ctl,
55 struct amdgpu_reset_context *context);
57 int (*do_reset)(struct amdgpu_device *adev);
60 struct amdgpu_reset_control {
62 struct work_struct reset_work;
63 struct mutex reset_lock;
64 struct list_head reset_handlers;
66 enum amd_reset_method active_reset;
67 struct amdgpu_reset_handler *(*get_reset_handler)(
68 struct amdgpu_reset_control *reset_ctl,
69 struct amdgpu_reset_context *context);
70 void (*async_reset)(struct work_struct *work);
73 int amdgpu_reset_init(struct amdgpu_device *adev);
74 int amdgpu_reset_fini(struct amdgpu_device *adev);
76 int amdgpu_reset_prepare_hwcontext(struct amdgpu_device *adev,
77 struct amdgpu_reset_context *reset_context);
79 int amdgpu_reset_perform_reset(struct amdgpu_device *adev,
80 struct amdgpu_reset_context *reset_context);
82 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl,
83 struct amdgpu_reset_handler *handler);