2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 #include "amd_shared.h"
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include "amdgpu_pm.h"
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_powerplay.h"
37 static int amdgpu_pp_early_init(void *handle)
39 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
40 struct amd_powerplay *amd_pp;
43 amd_pp = &(adev->powerplay);
44 amd_pp->pp_handle = (void *)adev;
46 switch (adev->asic_type) {
57 amd_pp->cgs_device = amdgpu_cgs_create_device(adev);
58 amd_pp->ip_funcs = &pp_ip_funcs;
59 amd_pp->pp_funcs = &pp_dpm_funcs;
61 /* These chips don't have powerplay implemenations */
62 #ifdef CONFIG_DRM_AMDGPU_SI
68 amd_pp->ip_funcs = &si_dpm_ip_funcs;
69 amd_pp->pp_funcs = &si_dpm_funcs;
72 #ifdef CONFIG_DRM_AMDGPU_CIK
75 if (amdgpu_dpm == -1) {
76 amd_pp->ip_funcs = &ci_dpm_ip_funcs;
77 amd_pp->pp_funcs = &ci_dpm_funcs;
79 amd_pp->cgs_device = amdgpu_cgs_create_device(adev);
80 amd_pp->ip_funcs = &pp_ip_funcs;
81 amd_pp->pp_funcs = &pp_dpm_funcs;
87 amd_pp->ip_funcs = &kv_dpm_ip_funcs;
88 amd_pp->pp_funcs = &kv_dpm_funcs;
96 if (adev->powerplay.ip_funcs->early_init)
97 ret = adev->powerplay.ip_funcs->early_init(
98 amd_pp->cgs_device ? amd_pp->cgs_device :
105 static int amdgpu_pp_late_init(void *handle)
108 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
110 if (adev->powerplay.ip_funcs->late_init)
111 ret = adev->powerplay.ip_funcs->late_init(
112 adev->powerplay.pp_handle);
117 static int amdgpu_pp_sw_init(void *handle)
120 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
122 if (adev->powerplay.ip_funcs->sw_init)
123 ret = adev->powerplay.ip_funcs->sw_init(
124 adev->powerplay.pp_handle);
129 static int amdgpu_pp_sw_fini(void *handle)
132 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
134 if (adev->powerplay.ip_funcs->sw_fini)
135 ret = adev->powerplay.ip_funcs->sw_fini(
136 adev->powerplay.pp_handle);
143 static int amdgpu_pp_hw_init(void *handle)
146 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
148 if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
149 amdgpu_ucode_init_bo(adev);
151 if (adev->powerplay.ip_funcs->hw_init)
152 ret = adev->powerplay.ip_funcs->hw_init(
153 adev->powerplay.pp_handle);
158 static int amdgpu_pp_hw_fini(void *handle)
161 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
163 if (adev->powerplay.ip_funcs->hw_fini)
164 ret = adev->powerplay.ip_funcs->hw_fini(
165 adev->powerplay.pp_handle);
167 if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
168 amdgpu_ucode_fini_bo(adev);
173 static void amdgpu_pp_late_fini(void *handle)
175 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
177 if (adev->powerplay.ip_funcs->late_fini)
178 adev->powerplay.ip_funcs->late_fini(
179 adev->powerplay.pp_handle);
181 if (adev->powerplay.cgs_device)
182 amdgpu_cgs_destroy_device(adev->powerplay.cgs_device);
185 static int amdgpu_pp_suspend(void *handle)
188 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
190 if (adev->powerplay.ip_funcs->suspend)
191 ret = adev->powerplay.ip_funcs->suspend(
192 adev->powerplay.pp_handle);
196 static int amdgpu_pp_resume(void *handle)
199 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
201 if (adev->powerplay.ip_funcs->resume)
202 ret = adev->powerplay.ip_funcs->resume(
203 adev->powerplay.pp_handle);
207 static int amdgpu_pp_set_clockgating_state(void *handle,
208 enum amd_clockgating_state state)
211 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
213 if (adev->powerplay.ip_funcs->set_clockgating_state)
214 ret = adev->powerplay.ip_funcs->set_clockgating_state(
215 adev->powerplay.pp_handle, state);
219 static int amdgpu_pp_set_powergating_state(void *handle,
220 enum amd_powergating_state state)
223 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
225 if (adev->powerplay.ip_funcs->set_powergating_state)
226 ret = adev->powerplay.ip_funcs->set_powergating_state(
227 adev->powerplay.pp_handle, state);
232 static bool amdgpu_pp_is_idle(void *handle)
235 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
237 if (adev->powerplay.ip_funcs->is_idle)
238 ret = adev->powerplay.ip_funcs->is_idle(
239 adev->powerplay.pp_handle);
243 static int amdgpu_pp_wait_for_idle(void *handle)
246 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
248 if (adev->powerplay.ip_funcs->wait_for_idle)
249 ret = adev->powerplay.ip_funcs->wait_for_idle(
250 adev->powerplay.pp_handle);
254 static int amdgpu_pp_soft_reset(void *handle)
257 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
259 if (adev->powerplay.ip_funcs->soft_reset)
260 ret = adev->powerplay.ip_funcs->soft_reset(
261 adev->powerplay.pp_handle);
265 static const struct amd_ip_funcs amdgpu_pp_ip_funcs = {
266 .name = "amdgpu_powerplay",
267 .early_init = amdgpu_pp_early_init,
268 .late_init = amdgpu_pp_late_init,
269 .sw_init = amdgpu_pp_sw_init,
270 .sw_fini = amdgpu_pp_sw_fini,
271 .hw_init = amdgpu_pp_hw_init,
272 .hw_fini = amdgpu_pp_hw_fini,
273 .late_fini = amdgpu_pp_late_fini,
274 .suspend = amdgpu_pp_suspend,
275 .resume = amdgpu_pp_resume,
276 .is_idle = amdgpu_pp_is_idle,
277 .wait_for_idle = amdgpu_pp_wait_for_idle,
278 .soft_reset = amdgpu_pp_soft_reset,
279 .set_clockgating_state = amdgpu_pp_set_clockgating_state,
280 .set_powergating_state = amdgpu_pp_set_powergating_state,
283 const struct amdgpu_ip_block_version amdgpu_pp_ip_block =
285 .type = AMD_IP_BLOCK_TYPE_SMC,
289 .funcs = &amdgpu_pp_ip_funcs,