2 * STMicroelectronics ConneXt (STA2X11) GPIO driver
4 * Copyright 2012 ST Microelectronics (Alessandro Rubini)
5 * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.
6 * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 * See the GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/gpio/driver.h>
27 #include <linux/bitops.h>
28 #include <linux/interrupt.h>
29 #include <linux/irq.h>
30 #include <linux/pci.h>
31 #include <linux/platform_device.h>
32 #include <linux/mfd/sta2x11-mfd.h>
43 u32 afsela; /* 0x20 */
54 void __iomem *reg_base;
55 struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS];
56 struct gpio_chip gpio;
58 /* FIXME: save the whole config here (AF, ...) */
59 unsigned irq_type[GSTA_NR_GPIO];
66 static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
68 struct gsta_gpio *chip = gpiochip_get_data(gpio);
69 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
70 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
73 writel(bit, ®s->dats);
75 writel(bit, ®s->datc);
78 static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)
80 struct gsta_gpio *chip = gpiochip_get_data(gpio);
81 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
82 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
84 return !!(readl(®s->dat) & bit);
87 static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
90 struct gsta_gpio *chip = gpiochip_get_data(gpio);
91 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
92 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
94 writel(bit, ®s->dirs);
95 /* Data register after direction, otherwise pullup/down is selected */
97 writel(bit, ®s->dats);
99 writel(bit, ®s->datc);
103 static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
105 struct gsta_gpio *chip = gpiochip_get_data(gpio);
106 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
107 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
109 writel(bit, ®s->dirc);
113 static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
115 struct gsta_gpio *chip = gpiochip_get_data(gpio);
116 return chip->irq_base + offset;
119 static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */
121 struct gpio_chip *gpio = &chip->gpio;
124 * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts
125 * from the end. However, for compatibility, we need the first
126 * ConneXt device to start from gpio 0: it's the main chipset
127 * on most boards so documents and drivers assume gpio0..gpio127
129 static int gpio_base;
131 gpio->label = dev_name(chip->dev);
132 gpio->owner = THIS_MODULE;
133 gpio->direction_input = gsta_gpio_direction_input;
134 gpio->get = gsta_gpio_get;
135 gpio->direction_output = gsta_gpio_direction_output;
136 gpio->set = gsta_gpio_set;
137 gpio->dbg_show = NULL;
138 gpio->base = gpio_base;
139 gpio->ngpio = GSTA_NR_GPIO;
140 gpio->can_sleep = false;
141 gpio->to_irq = gsta_gpio_to_irq;
144 * After the first device, turn to dynamic gpio numbers.
145 * For example, with ARCH_NR_GPIOS = 256 we can fit two cards
152 * Special method: alternate functions and pullup/pulldown. This is only
153 * invoked on startup to configure gpio's according to platform data.
154 * FIXME : this functionality shall be managed (and exported to other drivers)
155 * via the pin control subsystem.
157 static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)
159 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
161 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
165 pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);
167 if (cfg == PINMUX_TYPE_NONE)
170 /* Alternate function or not? */
171 spin_lock_irqsave(&chip->lock, flags);
172 val = readl(®s->afsela);
173 if (cfg == PINMUX_TYPE_FUNCTION)
177 writel(val | bit, ®s->afsela);
178 if (cfg == PINMUX_TYPE_FUNCTION) {
179 spin_unlock_irqrestore(&chip->lock, flags);
183 /* not alternate function: set details */
185 case PINMUX_TYPE_OUTPUT_LOW:
186 writel(bit, ®s->dirs);
187 writel(bit, ®s->datc);
189 case PINMUX_TYPE_OUTPUT_HIGH:
190 writel(bit, ®s->dirs);
191 writel(bit, ®s->dats);
193 case PINMUX_TYPE_INPUT:
194 writel(bit, ®s->dirc);
195 val = readl(®s->pdis) | bit;
196 writel(val, ®s->pdis);
198 case PINMUX_TYPE_INPUT_PULLUP:
199 writel(bit, ®s->dirc);
200 val = readl(®s->pdis) & ~bit;
201 writel(val, ®s->pdis);
202 writel(bit, ®s->dats);
204 case PINMUX_TYPE_INPUT_PULLDOWN:
205 writel(bit, ®s->dirc);
206 val = readl(®s->pdis) & ~bit;
207 writel(val, ®s->pdis);
208 writel(bit, ®s->datc);
213 spin_unlock_irqrestore(&chip->lock, flags);
215 pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",
216 __func__, chip, nr, cfg);
223 static void gsta_irq_disable(struct irq_data *data)
225 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
226 struct gsta_gpio *chip = gc->private;
227 int nr = data->irq - chip->irq_base;
228 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
229 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
233 spin_lock_irqsave(&chip->lock, flags);
234 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) {
235 val = readl(®s->rimsc) & ~bit;
236 writel(val, ®s->rimsc);
238 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) {
239 val = readl(®s->fimsc) & ~bit;
240 writel(val, ®s->fimsc);
242 spin_unlock_irqrestore(&chip->lock, flags);
246 static void gsta_irq_enable(struct irq_data *data)
248 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
249 struct gsta_gpio *chip = gc->private;
250 int nr = data->irq - chip->irq_base;
251 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
252 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
257 type = chip->irq_type[nr];
259 spin_lock_irqsave(&chip->lock, flags);
260 val = readl(®s->rimsc);
261 if (type & IRQ_TYPE_EDGE_RISING)
262 writel(val | bit, ®s->rimsc);
264 writel(val & ~bit, ®s->rimsc);
265 val = readl(®s->rimsc);
266 if (type & IRQ_TYPE_EDGE_FALLING)
267 writel(val | bit, ®s->fimsc);
269 writel(val & ~bit, ®s->fimsc);
270 spin_unlock_irqrestore(&chip->lock, flags);
274 static int gsta_irq_type(struct irq_data *d, unsigned int type)
276 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
277 struct gsta_gpio *chip = gc->private;
278 int nr = d->irq - chip->irq_base;
280 /* We only support edge interrupts */
281 if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) {
282 pr_debug("%s: unsupported type 0x%x\n", __func__, type);
286 chip->irq_type[nr] = type; /* used for enable/disable */
292 static irqreturn_t gsta_gpio_handler(int irq, void *dev_id)
294 struct gsta_gpio *chip = dev_id;
295 struct gsta_regs __iomem *regs;
298 irqreturn_t ret = IRQ_NONE;
300 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
301 regs = chip->regs[i];
302 base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK;
303 while ((is = readl(®s->is))) {
306 generic_handle_irq(irq);
307 writel(1 << nr, ®s->ic);
314 static int gsta_alloc_irq_chip(struct gsta_gpio *chip)
316 struct irq_chip_generic *gc;
317 struct irq_chip_type *ct;
320 gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1,
322 chip->reg_base, handle_simple_irq);
329 ct->chip.irq_set_type = gsta_irq_type;
330 ct->chip.irq_disable = gsta_irq_disable;
331 ct->chip.irq_enable = gsta_irq_enable;
333 /* FIXME: this makes at most 32 interrupts. Request 0 by now */
334 rv = devm_irq_setup_generic_chip(chip->dev, gc,
335 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */,
336 0, IRQ_NOREQUEST | IRQ_NOPROBE, 0);
340 /* Set up all all 128 interrupts: code from setup_generic_chip */
342 struct irq_chip_type *ct = gc->chip_types;
344 for (j = 0; j < GSTA_NR_GPIO; j++) {
345 i = chip->irq_base + j;
346 irq_set_chip_and_handler(i, &ct->chip, ct->handler);
347 irq_set_chip_data(i, gc);
348 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
350 gc->irq_cnt = i - gc->irq_base;
356 /* The platform device used here is instantiated by the MFD device */
357 static int gsta_probe(struct platform_device *dev)
360 struct pci_dev *pdev;
361 struct sta2x11_gpio_pdata *gpio_pdata;
362 struct gsta_gpio *chip;
364 pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);
365 gpio_pdata = dev_get_platdata(&pdev->dev);
367 if (gpio_pdata == NULL)
368 dev_err(&dev->dev, "no gpio config\n");
369 pr_debug("gpio config: %p\n", gpio_pdata);
371 chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL);
374 chip->dev = &dev->dev;
375 chip->reg_base = devm_platform_ioremap_resource(dev, 0);
376 if (IS_ERR(chip->reg_base))
377 return PTR_ERR(chip->reg_base);
379 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
380 chip->regs[i] = chip->reg_base + i * 4096;
381 /* disable all irqs */
382 writel(0, &chip->regs[i]->rimsc);
383 writel(0, &chip->regs[i]->fimsc);
384 writel(~0, &chip->regs[i]->ic);
386 spin_lock_init(&chip->lock);
387 gsta_gpio_setup(chip);
389 for (i = 0; i < GSTA_NR_GPIO; i++)
390 gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
392 /* 384 was used in previous code: be compatible for other drivers */
393 err = devm_irq_alloc_descs(&dev->dev, -1, 384,
394 GSTA_NR_GPIO, NUMA_NO_NODE);
396 dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n",
400 chip->irq_base = err;
402 err = gsta_alloc_irq_chip(chip);
406 err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler,
407 IRQF_SHARED, KBUILD_MODNAME, chip);
409 dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n",
414 err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);
416 dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n",
421 platform_set_drvdata(dev, chip);
425 static struct platform_driver sta2x11_gpio_platform_driver = {
427 .name = "sta2x11-gpio",
428 .suppress_bind_attrs = true,
432 builtin_platform_driver(sta2x11_gpio_platform_driver);