2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
27 #include <asm/unaligned.h>
29 #define PCA953X_INPUT 0x00
30 #define PCA953X_OUTPUT 0x01
31 #define PCA953X_INVERT 0x02
32 #define PCA953X_DIRECTION 0x03
34 #define REG_ADDR_MASK 0x3f
35 #define REG_ADDR_EXT 0x40
36 #define REG_ADDR_AI 0x80
38 #define PCA957X_IN 0x00
39 #define PCA957X_INVRT 0x01
40 #define PCA957X_BKEN 0x02
41 #define PCA957X_PUPD 0x03
42 #define PCA957X_CFG 0x04
43 #define PCA957X_OUT 0x05
44 #define PCA957X_MSK 0x06
45 #define PCA957X_INTS 0x07
47 #define PCAL953X_OUT_STRENGTH 0x20
48 #define PCAL953X_IN_LATCH 0x22
49 #define PCAL953X_PULL_EN 0x23
50 #define PCAL953X_PULL_SEL 0x24
51 #define PCAL953X_INT_MASK 0x25
52 #define PCAL953X_INT_STAT 0x26
53 #define PCAL953X_OUT_CONF 0x27
55 #define PCAL6524_INT_EDGE 0x28
56 #define PCAL6524_INT_CLR 0x2a
57 #define PCAL6524_IN_STATUS 0x2b
58 #define PCAL6524_OUT_INDCONF 0x2c
59 #define PCAL6524_DEBOUNCE 0x2d
61 #define PCA_GPIO_MASK 0x00FF
63 #define PCAL_GPIO_MASK 0x1f
64 #define PCAL_PINCTRL_MASK 0x60
66 #define PCA_INT 0x0100
67 #define PCA_PCAL 0x0200
68 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
69 #define PCA953X_TYPE 0x1000
70 #define PCA957X_TYPE 0x2000
71 #define PCA_TYPE_MASK 0xF000
73 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
75 static const struct i2c_device_id pca953x_id[] = {
76 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
77 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
78 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
79 { "pca9536", 4 | PCA953X_TYPE, },
80 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
81 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
82 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
83 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
84 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
85 { "pca9556", 8 | PCA953X_TYPE, },
86 { "pca9557", 8 | PCA953X_TYPE, },
87 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
88 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
89 { "pca9698", 40 | PCA953X_TYPE, },
91 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
93 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
95 { "max7310", 8 | PCA953X_TYPE, },
96 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
98 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
99 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
100 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
102 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
103 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
104 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
105 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
106 { "xra1202", 8 | PCA953X_TYPE },
109 MODULE_DEVICE_TABLE(i2c, pca953x_id);
111 static const struct acpi_device_id pca953x_acpi_ids[] = {
112 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
115 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
120 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
122 struct pca953x_reg_config {
129 static const struct pca953x_reg_config pca953x_regs = {
130 .direction = PCA953X_DIRECTION,
131 .output = PCA953X_OUTPUT,
132 .input = PCA953X_INPUT,
133 .invert = PCA953X_INVERT,
136 static const struct pca953x_reg_config pca957x_regs = {
137 .direction = PCA957X_CFG,
138 .output = PCA957X_OUT,
140 .invert = PCA957X_INVRT,
143 struct pca953x_chip {
145 struct mutex i2c_lock;
146 struct regmap *regmap;
148 #ifdef CONFIG_GPIO_PCA953X_IRQ
149 struct mutex irq_lock;
150 u8 irq_mask[MAX_BANK];
151 u8 irq_stat[MAX_BANK];
152 u8 irq_trig_raise[MAX_BANK];
153 u8 irq_trig_fall[MAX_BANK];
154 struct irq_chip irq_chip;
157 struct i2c_client *client;
158 struct gpio_chip gpio_chip;
159 const char *const *names;
160 unsigned long driver_data;
161 struct regulator *regulator;
163 const struct pca953x_reg_config *regs;
166 static int pca953x_bank_shift(struct pca953x_chip *chip)
168 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
171 #define PCA953x_BANK_INPUT BIT(0)
172 #define PCA953x_BANK_OUTPUT BIT(1)
173 #define PCA953x_BANK_POLARITY BIT(2)
174 #define PCA953x_BANK_CONFIG BIT(3)
176 #define PCA957x_BANK_INPUT BIT(0)
177 #define PCA957x_BANK_POLARITY BIT(1)
178 #define PCA957x_BANK_BUSHOLD BIT(2)
179 #define PCA957x_BANK_CONFIG BIT(4)
180 #define PCA957x_BANK_OUTPUT BIT(5)
182 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
183 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
184 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
185 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
186 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
189 * We care about the following registers:
190 * - Standard set, below 0x40, each port can be replicated up to 8 times
192 * Input port 0x00 + 0 * bank_size R
193 * Output port 0x00 + 1 * bank_size RW
194 * Polarity Inversion port 0x00 + 2 * bank_size RW
195 * Configuration port 0x00 + 3 * bank_size RW
196 * - PCA957x with mixed up registers
197 * Input port 0x00 + 0 * bank_size R
198 * Polarity Inversion port 0x00 + 1 * bank_size RW
199 * Bus hold port 0x00 + 2 * bank_size RW
200 * Configuration port 0x00 + 4 * bank_size RW
201 * Output port 0x00 + 5 * bank_size RW
203 * - Extended set, above 0x40, often chip specific.
204 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
205 * Input latch register 0x40 + 2 * bank_size RW
206 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
207 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
208 * Interrupt mask register 0x40 + 5 * bank_size RW
209 * Interrupt status register 0x40 + 6 * bank_size R
211 * - Registers with bit 0x80 set, the AI bit
212 * The bit is cleared and the registers fall into one of the
216 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
219 int bank_shift = pca953x_bank_shift(chip);
220 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
221 int offset = reg & (BIT(bank_shift) - 1);
223 /* Special PCAL extended register check. */
224 if (reg & REG_ADDR_EXT) {
225 if (!(chip->driver_data & PCA_PCAL))
230 /* Register is not in the matching bank. */
231 if (!(BIT(bank) & checkbank))
234 /* Register is not within allowed range of bank. */
235 if (offset >= NBANK(chip))
241 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
243 struct pca953x_chip *chip = dev_get_drvdata(dev);
246 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
247 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
248 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
250 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
251 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
252 PCA957x_BANK_BUSHOLD;
255 if (chip->driver_data & PCA_PCAL) {
256 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
257 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
258 PCAL9xxx_BANK_IRQ_STAT;
261 return pca953x_check_register(chip, reg, bank);
264 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
266 struct pca953x_chip *chip = dev_get_drvdata(dev);
269 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
270 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
273 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
274 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
277 if (chip->driver_data & PCA_PCAL)
278 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
279 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
281 return pca953x_check_register(chip, reg, bank);
284 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
286 struct pca953x_chip *chip = dev_get_drvdata(dev);
289 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
290 bank = PCA953x_BANK_INPUT;
292 bank = PCA957x_BANK_INPUT;
294 if (chip->driver_data & PCA_PCAL)
295 bank |= PCAL9xxx_BANK_IRQ_STAT;
297 return pca953x_check_register(chip, reg, bank);
300 static const struct regmap_config pca953x_i2c_regmap = {
304 .readable_reg = pca953x_readable_register,
305 .writeable_reg = pca953x_writeable_register,
306 .volatile_reg = pca953x_volatile_register,
308 .cache_type = REGCACHE_RBTREE,
309 .max_register = 0x7f,
312 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
313 bool write, bool addrinc)
315 int bank_shift = pca953x_bank_shift(chip);
316 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
317 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
318 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
320 /* Single byte read doesn't need AI bit set. */
324 /* Chips with 24 and more GPIOs always support Auto Increment */
325 if (write && NBANK(chip) > 2)
326 regaddr |= REG_ADDR_AI;
328 /* PCA9575 needs address-increment on multi-byte writes */
329 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
330 regaddr |= REG_ADDR_AI;
335 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
337 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
340 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
342 dev_err(&chip->client->dev, "failed writing register\n");
349 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
351 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
354 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
356 dev_err(&chip->client->dev, "failed reading register\n");
363 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
365 struct pca953x_chip *chip = gpiochip_get_data(gc);
366 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
368 u8 bit = BIT(off % BANK_SZ);
371 mutex_lock(&chip->i2c_lock);
372 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
373 mutex_unlock(&chip->i2c_lock);
377 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
378 unsigned off, int val)
380 struct pca953x_chip *chip = gpiochip_get_data(gc);
381 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
383 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
385 u8 bit = BIT(off % BANK_SZ);
388 mutex_lock(&chip->i2c_lock);
389 /* set output level */
390 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
395 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
397 mutex_unlock(&chip->i2c_lock);
401 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
403 struct pca953x_chip *chip = gpiochip_get_data(gc);
404 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
406 u8 bit = BIT(off % BANK_SZ);
410 mutex_lock(&chip->i2c_lock);
411 ret = regmap_read(chip->regmap, inreg, ®_val);
412 mutex_unlock(&chip->i2c_lock);
414 /* NOTE: diagnostic already emitted; that's all we should
415 * do unless gpio_*_value_cansleep() calls become different
416 * from their nonsleeping siblings (and report faults).
421 return !!(reg_val & bit);
424 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
426 struct pca953x_chip *chip = gpiochip_get_data(gc);
427 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
429 u8 bit = BIT(off % BANK_SZ);
431 mutex_lock(&chip->i2c_lock);
432 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
433 mutex_unlock(&chip->i2c_lock);
436 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
438 struct pca953x_chip *chip = gpiochip_get_data(gc);
439 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
441 u8 bit = BIT(off % BANK_SZ);
445 mutex_lock(&chip->i2c_lock);
446 ret = regmap_read(chip->regmap, dirreg, ®_val);
447 mutex_unlock(&chip->i2c_lock);
451 return !!(reg_val & bit);
454 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
455 unsigned long *mask, unsigned long *bits)
457 struct pca953x_chip *chip = gpiochip_get_data(gc);
458 unsigned int bank_mask, bank_val;
460 u8 reg_val[MAX_BANK];
463 mutex_lock(&chip->i2c_lock);
464 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
468 for (bank = 0; bank < NBANK(chip); bank++) {
469 bank_mask = mask[bank / sizeof(*mask)] >>
470 ((bank % sizeof(*mask)) * 8);
472 bank_val = bits[bank / sizeof(*bits)] >>
473 ((bank % sizeof(*bits)) * 8);
474 bank_val &= bank_mask;
475 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
479 pca953x_write_regs(chip, chip->regs->output, reg_val);
481 mutex_unlock(&chip->i2c_lock);
484 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
486 unsigned long config)
488 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
490 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
492 u8 bit = BIT(offset % BANK_SZ);
496 * pull-up/pull-down configuration requires PCAL extended
499 if (!(chip->driver_data & PCA_PCAL))
502 mutex_lock(&chip->i2c_lock);
504 /* Disable pull-up/pull-down */
505 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
509 /* Configure pull-up/pull-down */
510 if (config == PIN_CONFIG_BIAS_PULL_UP)
511 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
512 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
513 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
517 /* Enable pull-up/pull-down */
518 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
521 mutex_unlock(&chip->i2c_lock);
525 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
526 unsigned long config)
528 struct pca953x_chip *chip = gpiochip_get_data(gc);
531 case PIN_CONFIG_BIAS_PULL_UP:
532 case PIN_CONFIG_BIAS_PULL_DOWN:
533 return pca953x_gpio_set_pull_up_down(chip, offset, config);
539 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
541 struct gpio_chip *gc;
543 gc = &chip->gpio_chip;
545 gc->direction_input = pca953x_gpio_direction_input;
546 gc->direction_output = pca953x_gpio_direction_output;
547 gc->get = pca953x_gpio_get_value;
548 gc->set = pca953x_gpio_set_value;
549 gc->get_direction = pca953x_gpio_get_direction;
550 gc->set_multiple = pca953x_gpio_set_multiple;
551 gc->set_config = pca953x_gpio_set_config;
552 gc->can_sleep = true;
554 gc->base = chip->gpio_start;
556 gc->label = dev_name(&chip->client->dev);
557 gc->parent = &chip->client->dev;
558 gc->owner = THIS_MODULE;
559 gc->names = chip->names;
562 #ifdef CONFIG_GPIO_PCA953X_IRQ
563 static void pca953x_irq_mask(struct irq_data *d)
565 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
566 struct pca953x_chip *chip = gpiochip_get_data(gc);
568 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
571 static void pca953x_irq_unmask(struct irq_data *d)
573 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
574 struct pca953x_chip *chip = gpiochip_get_data(gc);
576 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
579 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
581 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
582 struct pca953x_chip *chip = gpiochip_get_data(gc);
584 return irq_set_irq_wake(chip->client->irq, on);
587 static void pca953x_irq_bus_lock(struct irq_data *d)
589 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
590 struct pca953x_chip *chip = gpiochip_get_data(gc);
592 mutex_lock(&chip->irq_lock);
595 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
597 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
598 struct pca953x_chip *chip = gpiochip_get_data(gc);
601 u8 invert_irq_mask[MAX_BANK];
602 int reg_direction[MAX_BANK];
604 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
607 if (chip->driver_data & PCA_PCAL) {
608 /* Enable latch on interrupt-enabled inputs */
609 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
611 for (i = 0; i < NBANK(chip); i++)
612 invert_irq_mask[i] = ~chip->irq_mask[i];
614 /* Unmask enabled interrupts */
615 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
618 /* Look for any newly setup interrupt */
619 for (i = 0; i < NBANK(chip); i++) {
620 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
621 new_irqs &= reg_direction[i];
624 level = __ffs(new_irqs);
625 pca953x_gpio_direction_input(&chip->gpio_chip,
626 level + (BANK_SZ * i));
627 new_irqs &= ~(1 << level);
631 mutex_unlock(&chip->irq_lock);
634 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
636 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
637 struct pca953x_chip *chip = gpiochip_get_data(gc);
638 int bank_nb = d->hwirq / BANK_SZ;
639 u8 mask = 1 << (d->hwirq % BANK_SZ);
641 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
642 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
647 if (type & IRQ_TYPE_EDGE_FALLING)
648 chip->irq_trig_fall[bank_nb] |= mask;
650 chip->irq_trig_fall[bank_nb] &= ~mask;
652 if (type & IRQ_TYPE_EDGE_RISING)
653 chip->irq_trig_raise[bank_nb] |= mask;
655 chip->irq_trig_raise[bank_nb] &= ~mask;
660 static void pca953x_irq_shutdown(struct irq_data *d)
662 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
663 struct pca953x_chip *chip = gpiochip_get_data(gc);
664 u8 mask = 1 << (d->hwirq % BANK_SZ);
666 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
667 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
670 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
672 u8 cur_stat[MAX_BANK];
673 u8 old_stat[MAX_BANK];
674 bool pending_seen = false;
675 bool trigger_seen = false;
676 u8 trigger[MAX_BANK];
677 int reg_direction[MAX_BANK];
680 if (chip->driver_data & PCA_PCAL) {
681 /* Read the current interrupt status from the device */
682 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
686 /* Check latched inputs and clear interrupt status */
687 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
691 for (i = 0; i < NBANK(chip); i++) {
692 /* Apply filter for rising/falling edge selection */
693 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
694 (cur_stat[i] & chip->irq_trig_raise[i]);
695 pending[i] &= trigger[i];
703 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
707 /* Remove output pins from the equation */
708 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
710 for (i = 0; i < NBANK(chip); i++)
711 cur_stat[i] &= reg_direction[i];
713 memcpy(old_stat, chip->irq_stat, NBANK(chip));
715 for (i = 0; i < NBANK(chip); i++) {
716 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
724 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
726 for (i = 0; i < NBANK(chip); i++) {
727 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
728 (cur_stat[i] & chip->irq_trig_raise[i]);
729 pending[i] &= trigger[i];
737 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
739 struct pca953x_chip *chip = devid;
740 u8 pending[MAX_BANK];
742 unsigned nhandled = 0;
745 if (!pca953x_irq_pending(chip, pending))
748 for (i = 0; i < NBANK(chip); i++) {
750 level = __ffs(pending[i]);
751 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
752 level + (BANK_SZ * i)));
753 pending[i] &= ~(1 << level);
758 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
761 static int pca953x_irq_setup(struct pca953x_chip *chip,
764 struct i2c_client *client = chip->client;
765 struct irq_chip *irq_chip = &chip->irq_chip;
766 int reg_direction[MAX_BANK];
775 if (!(chip->driver_data & PCA_INT))
778 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
783 * There is no way to know which GPIO line generated the
784 * interrupt. We have to rely on the previous read for
787 regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
789 for (i = 0; i < NBANK(chip); i++)
790 chip->irq_stat[i] &= reg_direction[i];
791 mutex_init(&chip->irq_lock);
793 ret = devm_request_threaded_irq(&client->dev, client->irq,
794 NULL, pca953x_irq_handler,
795 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
797 dev_name(&client->dev), chip);
799 dev_err(&client->dev, "failed to request irq %d\n",
804 irq_chip->name = dev_name(&chip->client->dev);
805 irq_chip->irq_mask = pca953x_irq_mask;
806 irq_chip->irq_unmask = pca953x_irq_unmask;
807 irq_chip->irq_set_wake = pca953x_irq_set_wake;
808 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
809 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
810 irq_chip->irq_set_type = pca953x_irq_set_type;
811 irq_chip->irq_shutdown = pca953x_irq_shutdown;
813 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
814 irq_base, handle_simple_irq,
817 dev_err(&client->dev,
818 "could not connect irqchip to gpiochip\n");
822 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
827 #else /* CONFIG_GPIO_PCA953X_IRQ */
828 static int pca953x_irq_setup(struct pca953x_chip *chip,
831 struct i2c_client *client = chip->client;
833 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
834 dev_warn(&client->dev, "interrupt support not compiled in\n");
840 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
845 ret = regcache_sync_region(chip->regmap, chip->regs->output,
846 chip->regs->output + NBANK(chip));
850 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
851 chip->regs->direction + NBANK(chip));
855 /* set platform specific polarity inversion */
857 memset(val, 0xFF, NBANK(chip));
859 memset(val, 0, NBANK(chip));
861 ret = pca953x_write_regs(chip, chip->regs->invert, val);
866 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
871 ret = device_pca95xx_init(chip, invert);
875 /* To enable register 6, 7 to control pull up and pull down */
876 memset(val, 0x02, NBANK(chip));
877 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
886 static const struct of_device_id pca953x_dt_ids[];
888 static int pca953x_probe(struct i2c_client *client,
889 const struct i2c_device_id *i2c_id)
891 struct pca953x_platform_data *pdata;
892 struct pca953x_chip *chip;
896 struct regulator *reg;
898 chip = devm_kzalloc(&client->dev,
899 sizeof(struct pca953x_chip), GFP_KERNEL);
903 pdata = dev_get_platdata(&client->dev);
905 irq_base = pdata->irq_base;
906 chip->gpio_start = pdata->gpio_base;
907 invert = pdata->invert;
908 chip->names = pdata->names;
910 struct gpio_desc *reset_gpio;
912 chip->gpio_start = -1;
916 * See if we need to de-assert a reset pin.
918 * There is no known ACPI-enabled platforms that are
919 * using "reset" GPIO. Otherwise any of those platform
920 * must use _DSD method with corresponding property.
922 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
924 if (IS_ERR(reset_gpio))
925 return PTR_ERR(reset_gpio);
928 chip->client = client;
930 reg = devm_regulator_get(&client->dev, "vcc");
933 if (ret != -EPROBE_DEFER)
934 dev_err(&client->dev, "reg get err: %d\n", ret);
937 ret = regulator_enable(reg);
939 dev_err(&client->dev, "reg en err: %d\n", ret);
942 chip->regulator = reg;
945 chip->driver_data = i2c_id->driver_data;
947 const struct acpi_device_id *acpi_id;
948 struct device *dev = &client->dev;
950 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
951 if (!chip->driver_data) {
952 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
958 chip->driver_data = acpi_id->driver_data;
962 i2c_set_clientdata(client, chip);
964 chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
965 if (IS_ERR(chip->regmap)) {
966 ret = PTR_ERR(chip->regmap);
970 regcache_mark_dirty(chip->regmap);
972 mutex_init(&chip->i2c_lock);
974 * In case we have an i2c-mux controlled by a GPIO provided by an
975 * expander using the same driver higher on the device tree, read the
976 * i2c adapter nesting depth and use the retrieved value as lockdep
977 * subclass for chip->i2c_lock.
979 * REVISIT: This solution is not complete. It protects us from lockdep
980 * false positives when the expander controlling the i2c-mux is on
981 * a different level on the device tree, but not when it's on the same
982 * level on a different branch (in which case the subclass number
983 * would be the same).
985 * TODO: Once a correct solution is developed, a similar fix should be
986 * applied to all other i2c-controlled GPIO expanders (and potentially
989 lockdep_set_subclass(&chip->i2c_lock,
990 i2c_adapter_depth(client->adapter));
992 /* initialize cached registers from their original values.
993 * we can't share this chip with another i2c master.
995 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
997 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
998 chip->regs = &pca953x_regs;
999 ret = device_pca95xx_init(chip, invert);
1001 chip->regs = &pca957x_regs;
1002 ret = device_pca957x_init(chip, invert);
1007 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1011 ret = pca953x_irq_setup(chip, irq_base);
1015 if (pdata && pdata->setup) {
1016 ret = pdata->setup(client, chip->gpio_chip.base,
1017 chip->gpio_chip.ngpio, pdata->context);
1019 dev_warn(&client->dev, "setup failed, %d\n", ret);
1025 regulator_disable(chip->regulator);
1029 static int pca953x_remove(struct i2c_client *client)
1031 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1032 struct pca953x_chip *chip = i2c_get_clientdata(client);
1035 if (pdata && pdata->teardown) {
1036 ret = pdata->teardown(client, chip->gpio_chip.base,
1037 chip->gpio_chip.ngpio, pdata->context);
1039 dev_err(&client->dev, "%s failed, %d\n",
1045 regulator_disable(chip->regulator);
1050 #ifdef CONFIG_PM_SLEEP
1051 static int pca953x_regcache_sync(struct device *dev)
1053 struct pca953x_chip *chip = dev_get_drvdata(dev);
1057 * The ordering between direction and output is important,
1058 * sync these registers first and only then sync the rest.
1060 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1061 chip->regs->direction + NBANK(chip));
1063 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1067 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1068 chip->regs->output + NBANK(chip));
1070 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1074 #ifdef CONFIG_GPIO_PCA953X_IRQ
1075 if (chip->driver_data & PCA_PCAL) {
1076 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1077 PCAL953X_IN_LATCH + NBANK(chip));
1079 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1084 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1085 PCAL953X_INT_MASK + NBANK(chip));
1087 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1097 static int pca953x_suspend(struct device *dev)
1099 struct pca953x_chip *chip = dev_get_drvdata(dev);
1101 regcache_cache_only(chip->regmap, true);
1103 regulator_disable(chip->regulator);
1108 static int pca953x_resume(struct device *dev)
1110 struct pca953x_chip *chip = dev_get_drvdata(dev);
1113 ret = regulator_enable(chip->regulator);
1115 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1119 regcache_cache_only(chip->regmap, false);
1120 regcache_mark_dirty(chip->regmap);
1121 ret = pca953x_regcache_sync(dev);
1125 ret = regcache_sync(chip->regmap);
1127 dev_err(dev, "Failed to restore register map: %d\n", ret);
1135 /* convenience to stop overlong match-table lines */
1136 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1137 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1139 static const struct of_device_id pca953x_dt_ids[] = {
1140 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1141 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1142 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1143 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1144 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1145 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1146 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1147 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1148 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1149 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1150 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1151 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1152 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1153 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1155 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1156 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1158 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1159 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1160 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1161 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1162 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1164 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1165 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1166 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1167 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1168 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1170 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1172 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1176 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1178 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1180 static struct i2c_driver pca953x_driver = {
1183 .pm = &pca953x_pm_ops,
1184 .of_match_table = pca953x_dt_ids,
1185 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1187 .probe = pca953x_probe,
1188 .remove = pca953x_remove,
1189 .id_table = pca953x_id,
1192 static int __init pca953x_init(void)
1194 return i2c_add_driver(&pca953x_driver);
1196 /* register after i2c postcore initcall and before
1197 * subsys initcalls that may rely on these GPIOs
1199 subsys_initcall(pca953x_init);
1201 static void __exit pca953x_exit(void)
1203 i2c_del_driver(&pca953x_driver);
1205 module_exit(pca953x_exit);
1207 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1208 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1209 MODULE_LICENSE("GPL");