1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES 104-DIO-48E series
4 * Copyright (C) 2016 William Breathitt Gray
6 * This driver supports the following ACCES devices: 104-DIO-48E and
9 #include <linux/bits.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/ioport.h>
13 #include <linux/irq.h>
14 #include <linux/isa.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/regmap.h>
19 #include <linux/types.h>
21 #include "gpio-i8255.h"
23 MODULE_IMPORT_NS(I8255);
25 #define DIO48E_EXTENT 16
26 #define MAX_NUM_DIO48E max_num_isa_dev(DIO48E_EXTENT)
28 static unsigned int base[MAX_NUM_DIO48E];
29 static unsigned int num_dio48e;
30 module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
31 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
33 static unsigned int irq[MAX_NUM_DIO48E];
34 static unsigned int num_irq;
35 module_param_hw_array(irq, uint, irq, &num_irq, 0);
36 MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
38 #define DIO48E_ENABLE_INTERRUPT 0xB
39 #define DIO48E_DISABLE_INTERRUPT DIO48E_ENABLE_INTERRUPT
40 #define DIO48E_CLEAR_INTERRUPT 0xF
42 #define DIO48E_NUM_PPI 2
44 static const struct regmap_range dio48e_wr_ranges[] = {
45 regmap_reg_range(0x0, 0x9), regmap_reg_range(0xB, 0xB),
46 regmap_reg_range(0xD, 0xD), regmap_reg_range(0xF, 0xF),
48 static const struct regmap_range dio48e_rd_ranges[] = {
49 regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x6),
50 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
51 regmap_reg_range(0xF, 0xF),
53 static const struct regmap_range dio48e_volatile_ranges[] = {
54 i8255_volatile_regmap_range(0x0), i8255_volatile_regmap_range(0x4),
55 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
56 regmap_reg_range(0xF, 0xF),
58 static const struct regmap_range dio48e_precious_ranges[] = {
59 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
60 regmap_reg_range(0xF, 0xF),
62 static const struct regmap_access_table dio48e_wr_table = {
63 .yes_ranges = dio48e_wr_ranges,
64 .n_yes_ranges = ARRAY_SIZE(dio48e_wr_ranges),
66 static const struct regmap_access_table dio48e_rd_table = {
67 .yes_ranges = dio48e_rd_ranges,
68 .n_yes_ranges = ARRAY_SIZE(dio48e_rd_ranges),
70 static const struct regmap_access_table dio48e_volatile_table = {
71 .yes_ranges = dio48e_volatile_ranges,
72 .n_yes_ranges = ARRAY_SIZE(dio48e_volatile_ranges),
74 static const struct regmap_access_table dio48e_precious_table = {
75 .yes_ranges = dio48e_precious_ranges,
76 .n_yes_ranges = ARRAY_SIZE(dio48e_precious_ranges),
78 static const struct regmap_config dio48e_regmap_config = {
84 .wr_table = &dio48e_wr_table,
85 .rd_table = &dio48e_rd_table,
86 .volatile_table = &dio48e_volatile_table,
87 .precious_table = &dio48e_precious_table,
88 .cache_type = REGCACHE_FLAT,
89 .use_raw_spinlock = true,
92 /* only bit 3 on each respective Port C supports interrupts */
93 #define DIO48E_REGMAP_IRQ(_ppi) \
94 [19 + (_ppi) * 24] = { \
96 .type = { .types_supported = IRQ_TYPE_EDGE_RISING }, \
99 static const struct regmap_irq dio48e_regmap_irqs[] = {
100 DIO48E_REGMAP_IRQ(0), DIO48E_REGMAP_IRQ(1),
103 static int dio48e_handle_mask_sync(struct regmap *const map, const int index,
104 const unsigned int mask_buf_def,
105 const unsigned int mask_buf,
106 void *const irq_drv_data)
108 unsigned int *const irq_mask = irq_drv_data;
109 const unsigned int prev_mask = *irq_mask;
113 /* exit early if no change since the previous mask */
114 if (mask_buf == prev_mask)
117 /* remember the current mask for the next mask sync */
118 *irq_mask = mask_buf;
120 /* if all previously masked, enable interrupts when unmasking */
121 if (prev_mask == mask_buf_def) {
122 err = regmap_write(map, DIO48E_CLEAR_INTERRUPT, 0x00);
125 return regmap_write(map, DIO48E_ENABLE_INTERRUPT, 0x00);
128 /* if all are currently masked, disable interrupts */
129 if (mask_buf == mask_buf_def)
130 return regmap_read(map, DIO48E_DISABLE_INTERRUPT, &val);
135 #define DIO48E_NGPIO 48
136 static const char *dio48e_names[DIO48E_NGPIO] = {
137 "PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
138 "PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
139 "PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0",
140 "PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
141 "PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
142 "PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
143 "PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
144 "PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
145 "PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
146 "PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5",
147 "PPI Group 1 Port A 6", "PPI Group 1 Port A 7", "PPI Group 1 Port B 0",
148 "PPI Group 1 Port B 1", "PPI Group 1 Port B 2", "PPI Group 1 Port B 3",
149 "PPI Group 1 Port B 4", "PPI Group 1 Port B 5", "PPI Group 1 Port B 6",
150 "PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1",
151 "PPI Group 1 Port C 2", "PPI Group 1 Port C 3", "PPI Group 1 Port C 4",
152 "PPI Group 1 Port C 5", "PPI Group 1 Port C 6", "PPI Group 1 Port C 7"
155 static int dio48e_irq_init_hw(struct regmap *const map)
159 /* Disable IRQ by default */
160 return regmap_read(map, DIO48E_DISABLE_INTERRUPT, &val);
163 static int dio48e_probe(struct device *dev, unsigned int id)
165 const char *const name = dev_name(dev);
166 struct i8255_regmap_config config = {};
170 struct regmap_irq_chip *chip;
171 unsigned int irq_mask;
172 struct regmap_irq_chip_data *chip_data;
174 if (!devm_request_region(dev, base[id], DIO48E_EXTENT, name)) {
175 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
176 base[id], base[id] + DIO48E_EXTENT);
180 regs = devm_ioport_map(dev, base[id], DIO48E_EXTENT);
184 map = devm_regmap_init_mmio(dev, regs, &dio48e_regmap_config);
186 return dev_err_probe(dev, PTR_ERR(map),
187 "Unable to initialize register map\n");
189 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
193 chip->irq_drv_data = devm_kzalloc(dev, sizeof(irq_mask), GFP_KERNEL);
194 if (!chip->irq_drv_data)
198 chip->mask_base = DIO48E_ENABLE_INTERRUPT;
199 chip->ack_base = DIO48E_CLEAR_INTERRUPT;
200 chip->no_status = true;
202 chip->irqs = dio48e_regmap_irqs;
203 chip->num_irqs = ARRAY_SIZE(dio48e_regmap_irqs);
204 chip->handle_mask_sync = dio48e_handle_mask_sync;
206 /* Initialize to prevent spurious interrupts before we're ready */
207 err = dio48e_irq_init_hw(map);
211 err = devm_regmap_add_irq_chip(dev, map, irq[id], 0, 0, chip, &chip_data);
213 return dev_err_probe(dev, err, "IRQ registration failed\n");
217 config.num_ppi = DIO48E_NUM_PPI;
218 config.names = dio48e_names;
219 config.domain = regmap_irq_get_domain(chip_data);
221 return devm_i8255_regmap_register(dev, &config);
224 static struct isa_driver dio48e_driver = {
225 .probe = dio48e_probe,
227 .name = "104-dio-48e"
230 module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq);
232 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
233 MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
234 MODULE_LICENSE("GPL v2");