1 // SPDX-License-Identifier: GPL-2.0
3 * Lattice FPGA programming over slave SPI sysCONFIG interface.
6 #include <linux/spi/spi.h>
8 #include "lattice-sysconfig.h"
10 static const u32 ecp5_spi_max_speed_hz = 60000000;
12 static int sysconfig_spi_cmd_transfer(struct sysconfig_priv *priv,
13 const void *tx_buf, size_t tx_len,
14 void *rx_buf, size_t rx_len)
16 struct spi_device *spi = to_spi_device(priv->dev);
18 return spi_write_then_read(spi, tx_buf, tx_len, rx_buf, rx_len);
21 static int sysconfig_spi_bitstream_burst_init(struct sysconfig_priv *priv)
23 const u8 lsc_bitstream_burst[] = SYSCONFIG_LSC_BITSTREAM_BURST;
24 struct spi_device *spi = to_spi_device(priv->dev);
25 struct spi_transfer xfer = {};
26 struct spi_message msg;
31 buf_len = sizeof(lsc_bitstream_burst);
33 buf = kmemdup(lsc_bitstream_burst, buf_len, GFP_KERNEL);
41 spi_message_init_with_transfers(&msg, &xfer, 1);
44 * Lock SPI bus for exclusive usage until FPGA programming is done.
45 * SPI bus will be released in sysconfig_spi_bitstream_burst_complete().
47 spi_bus_lock(spi->controller);
49 ret = spi_sync_locked(spi, &msg);
51 spi_bus_unlock(spi->controller);
58 static int sysconfig_spi_bitstream_burst_write(struct sysconfig_priv *priv,
59 const char *buf, size_t len)
61 struct spi_device *spi = to_spi_device(priv->dev);
62 struct spi_transfer xfer = {
67 struct spi_message msg;
69 spi_message_init_with_transfers(&msg, &xfer, 1);
71 return spi_sync_locked(spi, &msg);
74 static int sysconfig_spi_bitstream_burst_complete(struct sysconfig_priv *priv)
76 struct spi_device *spi = to_spi_device(priv->dev);
78 /* Bitstream burst write is done, release SPI bus */
79 spi_bus_unlock(spi->controller);
81 /* Toggle CS to finish bitstream write */
82 return spi_write(spi, NULL, 0);
85 static int sysconfig_spi_probe(struct spi_device *spi)
87 const struct spi_device_id *dev_id;
88 struct device *dev = &spi->dev;
89 struct sysconfig_priv *priv;
90 const u32 *spi_max_speed;
92 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
96 spi_max_speed = device_get_match_data(dev);
98 dev_id = spi_get_device_id(spi);
102 spi_max_speed = (const u32 *)dev_id->driver_data;
108 if (spi->max_speed_hz > *spi_max_speed) {
109 dev_err(dev, "SPI speed %u is too high, maximum speed is %u\n",
110 spi->max_speed_hz, *spi_max_speed);
115 priv->command_transfer = sysconfig_spi_cmd_transfer;
116 priv->bitstream_burst_write_init = sysconfig_spi_bitstream_burst_init;
117 priv->bitstream_burst_write = sysconfig_spi_bitstream_burst_write;
118 priv->bitstream_burst_write_complete = sysconfig_spi_bitstream_burst_complete;
120 return sysconfig_probe(priv);
123 static const struct spi_device_id sysconfig_spi_ids[] = {
125 .name = "sysconfig-ecp5",
126 .driver_data = (kernel_ulong_t)&ecp5_spi_max_speed_hz,
129 MODULE_DEVICE_TABLE(spi, sysconfig_spi_ids);
131 #if IS_ENABLED(CONFIG_OF)
132 static const struct of_device_id sysconfig_of_ids[] = {
134 .compatible = "lattice,sysconfig-ecp5",
135 .data = &ecp5_spi_max_speed_hz,
138 MODULE_DEVICE_TABLE(of, sysconfig_of_ids);
139 #endif /* IS_ENABLED(CONFIG_OF) */
141 static struct spi_driver lattice_sysconfig_driver = {
142 .probe = sysconfig_spi_probe,
143 .id_table = sysconfig_spi_ids,
145 .name = "lattice_sysconfig_spi_fpga_mgr",
146 .of_match_table = of_match_ptr(sysconfig_of_ids),
149 module_spi_driver(lattice_sysconfig_driver);
151 MODULE_DESCRIPTION("Lattice sysCONFIG Slave SPI FPGA Manager");
152 MODULE_LICENSE("GPL");