2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex);
43 static LIST_HEAD(mc_devices);
45 unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
48 struct mem_ctl_info *mci = dimm->mci;
52 for (i = 0; i < mci->n_layers; i++) {
53 n = snprintf(p, len, "%s %d ",
54 edac_layer_name[mci->layers[i].type],
66 #ifdef CONFIG_EDAC_DEBUG
68 static void edac_mc_dump_channel(struct rank_info *chan)
70 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx);
71 edac_dbg(4, " channel = %p\n", chan);
72 edac_dbg(4, " channel->csrow = %p\n", chan->csrow);
73 edac_dbg(4, " channel->dimm = %p\n", chan->dimm);
76 static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
80 edac_dimm_info_location(dimm, location, sizeof(location));
82 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
83 dimm->mci->mem_is_per_rank ? "rank" : "dimm",
84 number, location, dimm->csrow, dimm->cschannel);
85 edac_dbg(4, " dimm = %p\n", dimm);
86 edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
87 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
88 edac_dbg(4, " dimm->grain = %d\n", dimm->grain);
89 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
92 static void edac_mc_dump_csrow(struct csrow_info *csrow)
94 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
95 edac_dbg(4, " csrow = %p\n", csrow);
96 edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page);
97 edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page);
98 edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask);
99 edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels);
100 edac_dbg(4, " csrow->channels = %p\n", csrow->channels);
101 edac_dbg(4, " csrow->mci = %p\n", csrow->mci);
104 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
106 edac_dbg(3, "\tmci = %p\n", mci);
107 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
108 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
109 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
110 edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
111 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
112 mci->nr_csrows, mci->csrows);
113 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
114 mci->tot_dimms, mci->dimms);
115 edac_dbg(3, "\tdev = %p\n", mci->pdev);
116 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
117 mci->mod_name, mci->ctl_name);
118 edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
121 #endif /* CONFIG_EDAC_DEBUG */
124 * keep those in sync with the enum mem_type
126 const char *edac_mem_types[] = {
128 "Reserved csrow type",
129 "Unknown csrow type",
130 "Fast page mode RAM",
131 "Extended data out RAM",
132 "Burst Extended data out RAM",
133 "Single data rate SDRAM",
134 "Registered single data rate SDRAM",
135 "Double data rate SDRAM",
136 "Registered Double data rate SDRAM",
138 "Unbuffered DDR2 RAM",
139 "Fully buffered DDR2",
140 "Registered DDR2 RAM",
142 "Unbuffered DDR3 RAM",
143 "Registered DDR3 RAM",
145 EXPORT_SYMBOL_GPL(edac_mem_types);
148 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
149 * @p: pointer to a pointer with the memory offset to be used. At
150 * return, this will be incremented to point to the next offset
151 * @size: Size of the data structure to be reserved
152 * @n_elems: Number of elements that should be reserved
154 * If 'size' is a constant, the compiler will optimize this whole function
155 * down to either a no-op or the addition of a constant to the value of '*p'.
157 * The 'p' pointer is absolutely needed to keep the proper advancing
158 * further in memory to the proper offsets when allocating the struct along
159 * with its embedded structs, as edac_device_alloc_ctl_info() does it
160 * above, for example.
162 * At return, the pointer 'p' will be incremented to be used on a next call
165 void *edac_align_ptr(void **p, unsigned size, int n_elems)
170 *p += size * n_elems;
173 * 'p' can possibly be an unaligned item X such that sizeof(X) is
174 * 'size'. Adjust 'p' so that its alignment is at least as
175 * stringent as what the compiler would provide for X and return
176 * the aligned result.
177 * Here we assume that the alignment of a "long long" is the most
178 * stringent alignment that the compiler will ever provide by default.
179 * As far as I know, this is a reasonable assumption.
181 if (size > sizeof(long))
182 align = sizeof(long long);
183 else if (size > sizeof(int))
184 align = sizeof(long);
185 else if (size > sizeof(short))
187 else if (size > sizeof(char))
188 align = sizeof(short);
199 return (void *)(((unsigned long)ptr) + align - r);
203 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
204 * @mc_num: Memory controller number
205 * @n_layers: Number of MC hierarchy layers
206 * layers: Describes each layer as seen by the Memory Controller
207 * @size_pvt: size of private storage needed
210 * Everything is kmalloc'ed as one big chunk - more efficient.
211 * Only can be used if all structures have the same lifetime - otherwise
212 * you have to allocate and initialize your own structures.
214 * Use edac_mc_free() to free mc structures allocated by this function.
216 * NOTE: drivers handle multi-rank memories in different ways: in some
217 * drivers, one multi-rank memory stick is mapped as one entry, while, in
218 * others, a single multi-rank memory stick would be mapped into several
219 * entries. Currently, this function will allocate multiple struct dimm_info
220 * on such scenarios, as grouping the multiple ranks require drivers change.
224 * On success: struct mem_ctl_info pointer
226 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
228 struct edac_mc_layer *layers,
231 struct mem_ctl_info *mci;
232 struct edac_mc_layer *layer;
233 struct csrow_info *csr;
234 struct rank_info *chan;
235 struct dimm_info *dimm;
236 u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
237 unsigned pos[EDAC_MAX_LAYERS];
238 unsigned size, tot_dimms = 1, count = 1;
239 unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
240 void *pvt, *p, *ptr = NULL;
241 int i, j, row, chn, n, len, off;
242 bool per_rank = false;
244 BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
246 * Calculate the total amount of dimms and csrows/cschannels while
247 * in the old API emulation mode
249 for (i = 0; i < n_layers; i++) {
250 tot_dimms *= layers[i].size;
251 if (layers[i].is_virt_csrow)
252 tot_csrows *= layers[i].size;
254 tot_channels *= layers[i].size;
256 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
260 /* Figure out the offsets of the various items from the start of an mc
261 * structure. We want the alignment of each item to be at least as
262 * stringent as what the compiler would provide if we could simply
263 * hardcode everything into a single struct.
265 mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
266 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
267 for (i = 0; i < n_layers; i++) {
268 count *= layers[i].size;
269 edac_dbg(4, "errcount layer %d size %d\n", i, count);
270 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
271 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
272 tot_errcount += 2 * count;
275 edac_dbg(4, "allocating %d error counters\n", tot_errcount);
276 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
277 size = ((unsigned long)pvt) + sz_pvt;
279 edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
282 per_rank ? "ranks" : "dimms",
283 tot_csrows * tot_channels);
285 mci = kzalloc(size, GFP_KERNEL);
289 /* Adjust pointers so they point within the memory we just allocated
290 * rather than an imaginary chunk of memory located at address 0.
292 layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
293 for (i = 0; i < n_layers; i++) {
294 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
295 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
297 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
299 /* setup index and various internal pointers */
300 mci->mc_idx = mc_num;
301 mci->tot_dimms = tot_dimms;
303 mci->n_layers = n_layers;
305 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
306 mci->nr_csrows = tot_csrows;
307 mci->num_cschannel = tot_channels;
308 mci->mem_is_per_rank = per_rank;
311 * Alocate and fill the csrow/channels structs
313 mci->csrows = kcalloc(sizeof(*mci->csrows), tot_csrows, GFP_KERNEL);
316 for (row = 0; row < tot_csrows; row++) {
317 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
320 mci->csrows[row] = csr;
321 csr->csrow_idx = row;
323 csr->nr_channels = tot_channels;
324 csr->channels = kcalloc(sizeof(*csr->channels), tot_channels,
329 for (chn = 0; chn < tot_channels; chn++) {
330 chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
333 csr->channels[chn] = chan;
334 chan->chan_idx = chn;
340 * Allocate and fill the dimm structs
342 mci->dimms = kcalloc(sizeof(*mci->dimms), tot_dimms, GFP_KERNEL);
346 memset(&pos, 0, sizeof(pos));
349 for (i = 0; i < tot_dimms; i++) {
350 chan = mci->csrows[row]->channels[chn];
351 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
352 if (off < 0 || off >= tot_dimms) {
353 edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
357 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
360 mci->dimms[off] = dimm;
364 * Copy DIMM location and initialize it.
366 len = sizeof(dimm->label);
368 n = snprintf(p, len, "mc#%u", mc_num);
371 for (j = 0; j < n_layers; j++) {
372 n = snprintf(p, len, "%s#%u",
373 edac_layer_name[layers[j].type],
377 dimm->location[j] = pos[j];
383 /* Link it to the csrows old API data */
386 dimm->cschannel = chn;
388 /* Increment csrow location */
390 if (row == tot_csrows) {
395 /* Increment dimm location */
396 for (j = n_layers - 1; j >= 0; j--) {
398 if (pos[j] < layers[j].size)
404 mci->op_state = OP_ALLOC;
406 /* at this point, the root kobj is valid, and in order to
407 * 'free' the object, then the function:
408 * edac_mc_unregister_sysfs_main_kobj() must be called
409 * which will perform kobj unregistration and the actual free
410 * will occur during the kobject callback operation
417 for (i = 0; i < tot_dimms; i++)
418 kfree(mci->dimms[i]);
422 for (chn = 0; chn < tot_channels; chn++) {
423 csr = mci->csrows[chn];
425 for (chn = 0; chn < tot_channels; chn++)
426 kfree(csr->channels[chn]);
429 kfree(mci->csrows[i]);
437 EXPORT_SYMBOL_GPL(edac_mc_alloc);
441 * 'Free' a previously allocated 'mci' structure
442 * @mci: pointer to a struct mem_ctl_info structure
444 void edac_mc_free(struct mem_ctl_info *mci)
448 /* the mci instance is freed here, when the sysfs object is dropped */
449 edac_unregister_sysfs(mci);
451 EXPORT_SYMBOL_GPL(edac_mc_free);
457 * scan list of controllers looking for the one that manages
459 * @dev: pointer to a struct device related with the MCI
461 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
463 struct mem_ctl_info *mci;
464 struct list_head *item;
468 list_for_each(item, &mc_devices) {
469 mci = list_entry(item, struct mem_ctl_info, link);
471 if (mci->pdev == dev)
477 EXPORT_SYMBOL_GPL(find_mci_by_dev);
480 * handler for EDAC to check if NMI type handler has asserted interrupt
482 static int edac_mc_assert_error_check_and_clear(void)
486 if (edac_op_state == EDAC_OPSTATE_POLL)
489 old_state = edac_err_assert;
496 * edac_mc_workq_function
497 * performs the operation scheduled by a workq request
499 static void edac_mc_workq_function(struct work_struct *work_req)
501 struct delayed_work *d_work = to_delayed_work(work_req);
502 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
504 mutex_lock(&mem_ctls_mutex);
506 /* if this control struct has movd to offline state, we are done */
507 if (mci->op_state == OP_OFFLINE) {
508 mutex_unlock(&mem_ctls_mutex);
512 /* Only poll controllers that are running polled and have a check */
513 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
514 mci->edac_check(mci);
516 mutex_unlock(&mem_ctls_mutex);
519 queue_delayed_work(edac_workqueue, &mci->work,
520 msecs_to_jiffies(edac_mc_get_poll_msec()));
524 * edac_mc_workq_setup
525 * initialize a workq item for this mci
526 * passing in the new delay period in msec
530 * called with the mem_ctls_mutex held
532 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
536 /* if this instance is not in the POLL state, then simply return */
537 if (mci->op_state != OP_RUNNING_POLL)
540 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
541 queue_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
545 * edac_mc_workq_teardown
546 * stop the workq processing on this mci
550 * called WITHOUT lock held
552 static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
556 if (mci->op_state != OP_RUNNING_POLL)
559 status = cancel_delayed_work(&mci->work);
561 edac_dbg(0, "not canceled, flush the queue\n");
563 /* workq instance might be running, wait for it */
564 flush_workqueue(edac_workqueue);
569 * edac_mc_reset_delay_period(unsigned long value)
571 * user space has updated our poll period value, need to
572 * reset our workq delays
574 void edac_mc_reset_delay_period(int value)
576 struct mem_ctl_info *mci;
577 struct list_head *item;
579 mutex_lock(&mem_ctls_mutex);
581 /* scan the list and turn off all workq timers, doing so under lock
583 list_for_each(item, &mc_devices) {
584 mci = list_entry(item, struct mem_ctl_info, link);
586 if (mci->op_state == OP_RUNNING_POLL)
587 cancel_delayed_work(&mci->work);
590 mutex_unlock(&mem_ctls_mutex);
593 /* re-walk the list, and reset the poll delay */
594 mutex_lock(&mem_ctls_mutex);
596 list_for_each(item, &mc_devices) {
597 mci = list_entry(item, struct mem_ctl_info, link);
599 edac_mc_workq_setup(mci, (unsigned long) value);
602 mutex_unlock(&mem_ctls_mutex);
607 /* Return 0 on success, 1 on failure.
608 * Before calling this function, caller must
609 * assign a unique value to mci->mc_idx.
613 * called with the mem_ctls_mutex lock held
615 static int add_mc_to_global_list(struct mem_ctl_info *mci)
617 struct list_head *item, *insert_before;
618 struct mem_ctl_info *p;
620 insert_before = &mc_devices;
622 p = find_mci_by_dev(mci->pdev);
623 if (unlikely(p != NULL))
626 list_for_each(item, &mc_devices) {
627 p = list_entry(item, struct mem_ctl_info, link);
629 if (p->mc_idx >= mci->mc_idx) {
630 if (unlikely(p->mc_idx == mci->mc_idx))
633 insert_before = item;
638 list_add_tail_rcu(&mci->link, insert_before);
639 atomic_inc(&edac_handlers);
643 edac_printk(KERN_WARNING, EDAC_MC,
644 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
645 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
649 edac_printk(KERN_WARNING, EDAC_MC,
650 "bug in low-level driver: attempt to assign\n"
651 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
655 static void del_mc_from_global_list(struct mem_ctl_info *mci)
657 atomic_dec(&edac_handlers);
658 list_del_rcu(&mci->link);
660 /* these are for safe removal of devices from global list while
661 * NMI handlers may be traversing list
664 INIT_LIST_HEAD(&mci->link);
668 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
670 * If found, return a pointer to the structure.
673 * Caller must hold mem_ctls_mutex.
675 struct mem_ctl_info *edac_mc_find(int idx)
677 struct list_head *item;
678 struct mem_ctl_info *mci;
680 list_for_each(item, &mc_devices) {
681 mci = list_entry(item, struct mem_ctl_info, link);
683 if (mci->mc_idx >= idx) {
684 if (mci->mc_idx == idx)
693 EXPORT_SYMBOL(edac_mc_find);
696 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
697 * create sysfs entries associated with mci structure
698 * @mci: pointer to the mci structure to be added to the list
705 /* FIXME - should a warning be printed if no error detection? correction? */
706 int edac_mc_add_mc(struct mem_ctl_info *mci)
710 #ifdef CONFIG_EDAC_DEBUG
711 if (edac_debug_level >= 3)
712 edac_mc_dump_mci(mci);
714 if (edac_debug_level >= 4) {
717 for (i = 0; i < mci->nr_csrows; i++) {
718 struct csrow_info *csrow = mci->csrows[i];
722 for (j = 0; j < csrow->nr_channels; j++)
723 nr_pages += csrow->channels[j]->dimm->nr_pages;
726 edac_mc_dump_csrow(csrow);
727 for (j = 0; j < csrow->nr_channels; j++)
728 if (csrow->channels[j]->dimm->nr_pages)
729 edac_mc_dump_channel(csrow->channels[j]);
731 for (i = 0; i < mci->tot_dimms; i++)
732 if (mci->dimms[i]->nr_pages)
733 edac_mc_dump_dimm(mci->dimms[i], i);
736 mutex_lock(&mem_ctls_mutex);
738 if (add_mc_to_global_list(mci))
741 /* set load time so that error rate can be tracked */
742 mci->start_time = jiffies;
744 if (edac_create_sysfs_mci_device(mci)) {
745 edac_mc_printk(mci, KERN_WARNING,
746 "failed to create sysfs device\n");
750 /* If there IS a check routine, then we are running POLLED */
751 if (mci->edac_check != NULL) {
752 /* This instance is NOW RUNNING */
753 mci->op_state = OP_RUNNING_POLL;
755 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
757 mci->op_state = OP_RUNNING_INTERRUPT;
760 /* Report action taken */
761 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
762 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
764 mutex_unlock(&mem_ctls_mutex);
768 del_mc_from_global_list(mci);
771 mutex_unlock(&mem_ctls_mutex);
774 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
777 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
778 * remove mci structure from global list
779 * @pdev: Pointer to 'struct device' representing mci structure to remove.
781 * Return pointer to removed mci structure, or NULL if device not found.
783 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
785 struct mem_ctl_info *mci;
789 mutex_lock(&mem_ctls_mutex);
791 /* find the requested mci struct in the global list */
792 mci = find_mci_by_dev(dev);
794 mutex_unlock(&mem_ctls_mutex);
798 del_mc_from_global_list(mci);
799 mutex_unlock(&mem_ctls_mutex);
801 /* flush workq processes */
802 edac_mc_workq_teardown(mci);
804 /* marking MCI offline */
805 mci->op_state = OP_OFFLINE;
807 /* remove from sysfs */
808 edac_remove_sysfs_mci_device(mci);
810 edac_printk(KERN_INFO, EDAC_MC,
811 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
812 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
816 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
818 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
823 unsigned long flags = 0;
827 /* ECC error page was not in our memory. Ignore it. */
828 if (!pfn_valid(page))
831 /* Find the actual page structure then map it and fix */
832 pg = pfn_to_page(page);
835 local_irq_save(flags);
837 virt_addr = kmap_atomic(pg);
839 /* Perform architecture specific atomic scrub operation */
840 atomic_scrub(virt_addr + offset, size);
842 /* Unmap and complete */
843 kunmap_atomic(virt_addr);
846 local_irq_restore(flags);
849 /* FIXME - should return -1 */
850 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
852 struct csrow_info **csrows = mci->csrows;
855 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
858 for (i = 0; i < mci->nr_csrows; i++) {
859 struct csrow_info *csrow = csrows[i];
861 for (j = 0; j < csrow->nr_channels; j++) {
862 struct dimm_info *dimm = csrow->channels[j]->dimm;
868 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
870 csrow->first_page, page, csrow->last_page,
873 if ((page >= csrow->first_page) &&
874 (page <= csrow->last_page) &&
875 ((page & csrow->page_mask) ==
876 (csrow->first_page & csrow->page_mask))) {
883 edac_mc_printk(mci, KERN_ERR,
884 "could not look up page error address %lx\n",
885 (unsigned long)page);
889 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
891 const char *edac_layer_name[] = {
892 [EDAC_MC_LAYER_BRANCH] = "branch",
893 [EDAC_MC_LAYER_CHANNEL] = "channel",
894 [EDAC_MC_LAYER_SLOT] = "slot",
895 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
897 EXPORT_SYMBOL_GPL(edac_layer_name);
899 static void edac_inc_ce_error(struct mem_ctl_info *mci,
900 bool enable_per_layer_report,
901 const int pos[EDAC_MAX_LAYERS])
907 if (!enable_per_layer_report) {
908 mci->ce_noinfo_count++;
912 for (i = 0; i < mci->n_layers; i++) {
916 mci->ce_per_layer[i][index]++;
918 if (i < mci->n_layers - 1)
919 index *= mci->layers[i + 1].size;
923 static void edac_inc_ue_error(struct mem_ctl_info *mci,
924 bool enable_per_layer_report,
925 const int pos[EDAC_MAX_LAYERS])
931 if (!enable_per_layer_report) {
932 mci->ce_noinfo_count++;
936 for (i = 0; i < mci->n_layers; i++) {
940 mci->ue_per_layer[i][index]++;
942 if (i < mci->n_layers - 1)
943 index *= mci->layers[i + 1].size;
947 static void edac_ce_error(struct mem_ctl_info *mci,
948 const int pos[EDAC_MAX_LAYERS],
950 const char *location,
953 const char *other_detail,
954 const bool enable_per_layer_report,
955 const unsigned long page_frame_number,
956 const unsigned long offset_in_page,
959 unsigned long remapped_page;
961 if (edac_mc_get_log_ce()) {
962 if (other_detail && *other_detail)
963 edac_mc_printk(mci, KERN_WARNING,
964 "CE %s on %s (%s %s - %s)\n",
965 msg, label, location,
966 detail, other_detail);
968 edac_mc_printk(mci, KERN_WARNING,
969 "CE %s on %s (%s %s)\n",
970 msg, label, location,
973 edac_inc_ce_error(mci, enable_per_layer_report, pos);
975 if (mci->scrub_mode & SCRUB_SW_SRC) {
977 * Some memory controllers (called MCs below) can remap
978 * memory so that it is still available at a different
979 * address when PCI devices map into memory.
980 * MC's that can't do this, lose the memory where PCI
981 * devices are mapped. This mapping is MC-dependent
982 * and so we call back into the MC driver for it to
983 * map the MC page to a physical (CPU) page which can
984 * then be mapped to a virtual page - which can then
987 remapped_page = mci->ctl_page_to_phys ?
988 mci->ctl_page_to_phys(mci, page_frame_number) :
991 edac_mc_scrub_block(remapped_page,
992 offset_in_page, grain);
996 static void edac_ue_error(struct mem_ctl_info *mci,
997 const int pos[EDAC_MAX_LAYERS],
999 const char *location,
1002 const char *other_detail,
1003 const bool enable_per_layer_report)
1005 if (edac_mc_get_log_ue()) {
1006 if (other_detail && *other_detail)
1007 edac_mc_printk(mci, KERN_WARNING,
1008 "UE %s on %s (%s %s - %s)\n",
1009 msg, label, location, detail,
1012 edac_mc_printk(mci, KERN_WARNING,
1013 "UE %s on %s (%s %s)\n",
1014 msg, label, location, detail);
1017 if (edac_mc_get_panic_on_ue()) {
1018 if (other_detail && *other_detail)
1019 panic("UE %s on %s (%s%s - %s)\n",
1020 msg, label, location, detail, other_detail);
1022 panic("UE %s on %s (%s%s)\n",
1023 msg, label, location, detail);
1026 edac_inc_ue_error(mci, enable_per_layer_report, pos);
1029 #define OTHER_LABEL " or "
1032 * edac_mc_handle_error - reports a memory event to userspace
1034 * @type: severity of the error (CE/UE/Fatal)
1035 * @mci: a struct mem_ctl_info pointer
1036 * @page_frame_number: mem page where the error occurred
1037 * @offset_in_page: offset of the error inside the page
1038 * @syndrome: ECC syndrome
1039 * @top_layer: Memory layer[0] position
1040 * @mid_layer: Memory layer[1] position
1041 * @low_layer: Memory layer[2] position
1042 * @msg: Message meaningful to the end users that
1043 * explains the event
1044 * @other_detail: Technical details about the event that
1045 * may help hardware manufacturers and
1046 * EDAC developers to analyse the event
1048 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1049 struct mem_ctl_info *mci,
1050 const unsigned long page_frame_number,
1051 const unsigned long offset_in_page,
1052 const unsigned long syndrome,
1053 const int top_layer,
1054 const int mid_layer,
1055 const int low_layer,
1057 const char *other_detail)
1059 /* FIXME: too much for stack: move it to some pre-alocated area */
1060 char detail[80], location[80];
1061 char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
1063 int row = -1, chan = -1;
1064 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1067 bool enable_per_layer_report = false;
1068 u16 error_count; /* FIXME: make it a parameter */
1071 edac_dbg(3, "MC%d\n", mci->mc_idx);
1074 * Check if the event report is consistent and if the memory
1075 * location is known. If it is known, enable_per_layer_report will be
1076 * true, the DIMM(s) label info will be filled and the per-layer
1077 * error counters will be incremented.
1079 for (i = 0; i < mci->n_layers; i++) {
1080 if (pos[i] >= (int)mci->layers[i].size) {
1081 if (type == HW_EVENT_ERR_CORRECTED)
1086 edac_mc_printk(mci, KERN_ERR,
1087 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1088 edac_layer_name[mci->layers[i].type],
1089 pos[i], mci->layers[i].size);
1091 * Instead of just returning it, let's use what's
1092 * known about the error. The increment routines and
1093 * the DIMM filter logic will do the right thing by
1094 * pointing the likely damaged DIMMs.
1099 enable_per_layer_report = true;
1103 * Get the dimm label/grain that applies to the match criteria.
1104 * As the error algorithm may not be able to point to just one memory
1105 * stick, the logic here will get all possible labels that could
1106 * pottentially be affected by the error.
1107 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1108 * to have only the MC channel and the MC dimm (also called "branch")
1109 * but the channel is not known, as the memory is arranged in pairs,
1110 * where each memory belongs to a separate channel within the same
1116 for (i = 0; i < mci->tot_dimms; i++) {
1117 struct dimm_info *dimm = mci->dimms[i];
1119 if (top_layer >= 0 && top_layer != dimm->location[0])
1121 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1123 if (low_layer >= 0 && low_layer != dimm->location[2])
1126 /* get the max grain, over the error match range */
1127 if (dimm->grain > grain)
1128 grain = dimm->grain;
1131 * If the error is memory-controller wide, there's no need to
1132 * seek for the affected DIMMs because the whole
1133 * channel/memory controller/... may be affected.
1134 * Also, don't show errors for empty DIMM slots.
1136 if (enable_per_layer_report && dimm->nr_pages) {
1138 strcpy(p, OTHER_LABEL);
1139 p += strlen(OTHER_LABEL);
1141 strcpy(p, dimm->label);
1146 * get csrow/channel of the DIMM, in order to allow
1147 * incrementing the compat API counters
1149 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1150 mci->mem_is_per_rank ? "rank" : "dimm",
1151 dimm->csrow, dimm->cschannel);
1154 else if (row >= 0 && row != dimm->csrow)
1158 chan = dimm->cschannel;
1159 else if (chan >= 0 && chan != dimm->cschannel)
1164 if (!enable_per_layer_report) {
1165 strcpy(label, "any memory");
1167 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1169 strcpy(label, "unknown memory");
1170 if (type == HW_EVENT_ERR_CORRECTED) {
1172 mci->csrows[row]->ce_count++;
1174 mci->csrows[row]->channels[chan]->ce_count++;
1178 mci->csrows[row]->ue_count++;
1181 /* Fill the RAM location data */
1183 for (i = 0; i < mci->n_layers; i++) {
1187 p += sprintf(p, "%s:%d ",
1188 edac_layer_name[mci->layers[i].type],
1194 /* Report the error via the trace interface */
1196 error_count = 1; /* FIXME: allow change it */
1197 grain_bits = fls_long(grain) + 1;
1198 trace_mc_event(type, msg, label, error_count,
1199 mci->mc_idx, top_layer, mid_layer, low_layer,
1200 PAGES_TO_MiB(page_frame_number) | offset_in_page,
1201 grain_bits, syndrome, other_detail);
1203 /* Memory type dependent details about the error */
1204 if (type == HW_EVENT_ERR_CORRECTED) {
1205 snprintf(detail, sizeof(detail),
1206 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1207 page_frame_number, offset_in_page,
1209 edac_ce_error(mci, pos, msg, location, label, detail,
1210 other_detail, enable_per_layer_report,
1211 page_frame_number, offset_in_page, grain);
1213 snprintf(detail, sizeof(detail),
1214 "page:0x%lx offset:0x%lx grain:%ld",
1215 page_frame_number, offset_in_page, grain);
1217 edac_ue_error(mci, pos, msg, location, label, detail,
1218 other_detail, enable_per_layer_report);
1221 EXPORT_SYMBOL_GPL(edac_mc_handle_error);