drivers/edac/edac_mc.c

   1 /*
   2  * edac_mc kernel module
   3  * (C) 2005, 2006 Linux Networx (http://lnxi.com)
   4  * This file may be distributed under the terms of the
   5  * GNU General Public License.
   6  *
   7  * Written by Thayne Harbaugh
   8  * Based on work by Dan Hollis <goemon at anime dot net> and others.
   9  *      http://www.anime.net/~goemon/linux-ecc/
  10  *
  11  * Modified by Dave Peterson and Doug Thompson
  12  *
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/smp.h>
  20 #include <linux/init.h>
  21 #include <linux/sysctl.h>
  22 #include <linux/highmem.h>
  23 #include <linux/timer.h>
  24 #include <linux/slab.h>
  25 #include <linux/jiffies.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/list.h>
  28 #include <linux/ctype.h>
  29 #include <linux/edac.h>
  30 #include <linux/bitops.h>
  31 #include <linux/uaccess.h>
  32 #include <asm/page.h>
  33 #include "edac_mc.h"
  34 #include "edac_module.h"
  35 #include <ras/ras_event.h>
  36
  37 #ifdef CONFIG_EDAC_ATOMIC_SCRUB
  38 #include <asm/edac.h>
  39 #else
  40 #define edac_atomic_scrub(va, size) do { } while (0)
  41 #endif
  42
  43 int edac_op_state = EDAC_OPSTATE_INVAL;
  44 EXPORT_SYMBOL_GPL(edac_op_state);
  45
  46 /* lock to memory controller's control array */
  47 static DEFINE_MUTEX(mem_ctls_mutex);
  48 static LIST_HEAD(mc_devices);
  49
  50 /*
  51  * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
  52  *      apei/ghes and i7core_edac to be used at the same time.
  53  */
  54 static const char *edac_mc_owner;
  55
  56 static struct mem_ctl_info *error_desc_to_mci(struct edac_raw_error_desc *e)
  57 {
  58         return container_of(e, struct mem_ctl_info, error_desc);
  59 }
  60
  61 unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf,
  62                                      unsigned int len)
  63 {
  64         struct mem_ctl_info *mci = dimm->mci;
  65         int i, n, count = 0;
  66         char *p = buf;
  67
  68         for (i = 0; i < mci->n_layers; i++) {
  69                 n = scnprintf(p, len, "%s %d ",
  70                               edac_layer_name[mci->layers[i].type],
  71                               dimm->location[i]);
  72                 p += n;
  73                 len -= n;
  74                 count += n;
  75         }
  76
  77         return count;
  78 }
  79
  80 #ifdef CONFIG_EDAC_DEBUG
  81
  82 static void edac_mc_dump_channel(struct rank_info *chan)
  83 {
  84         edac_dbg(4, "  channel->chan_idx = %d\n", chan->chan_idx);
  85         edac_dbg(4, "    channel = %p\n", chan);
  86         edac_dbg(4, "    channel->csrow = %p\n", chan->csrow);
  87         edac_dbg(4, "    channel->dimm = %p\n", chan->dimm);
  88 }
  89
  90 static void edac_mc_dump_dimm(struct dimm_info *dimm)
  91 {
  92         char location[80];
  93
  94         if (!dimm->nr_pages)
  95                 return;
  96
  97         edac_dimm_info_location(dimm, location, sizeof(location));
  98
  99         edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
 100                  dimm->mci->csbased ? "rank" : "dimm",
 101                  dimm->idx, location, dimm->csrow, dimm->cschannel);
 102         edac_dbg(4, "  dimm = %p\n", dimm);
 103         edac_dbg(4, "  dimm->label = '%s'\n", dimm->label);
 104         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 105         edac_dbg(4, "  dimm->grain = %d\n", dimm->grain);
 106         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 107 }
 108
 109 static void edac_mc_dump_csrow(struct csrow_info *csrow)
 110 {
 111         edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
 112         edac_dbg(4, "  csrow = %p\n", csrow);
 113         edac_dbg(4, "  csrow->first_page = 0x%lx\n", csrow->first_page);
 114         edac_dbg(4, "  csrow->last_page = 0x%lx\n", csrow->last_page);
 115         edac_dbg(4, "  csrow->page_mask = 0x%lx\n", csrow->page_mask);
 116         edac_dbg(4, "  csrow->nr_channels = %d\n", csrow->nr_channels);
 117         edac_dbg(4, "  csrow->channels = %p\n", csrow->channels);
 118         edac_dbg(4, "  csrow->mci = %p\n", csrow->mci);
 119 }
 120
 121 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
 122 {
 123         edac_dbg(3, "\tmci = %p\n", mci);
 124         edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
 125         edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
 126         edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
 127         edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
 128         edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
 129                  mci->nr_csrows, mci->csrows);
 130         edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
 131                  mci->tot_dimms, mci->dimms);
 132         edac_dbg(3, "\tdev = %p\n", mci->pdev);
 133         edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
 134                  mci->mod_name, mci->ctl_name);
 135         edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
 136 }
 137
 138 #endif                          /* CONFIG_EDAC_DEBUG */
 139
 140 const char * const edac_mem_types[] = {
 141         [MEM_EMPTY]     = "Empty",
 142         [MEM_RESERVED]  = "Reserved",
 143         [MEM_UNKNOWN]   = "Unknown",
 144         [MEM_FPM]       = "FPM",
 145         [MEM_EDO]       = "EDO",
 146         [MEM_BEDO]      = "BEDO",
 147         [MEM_SDR]       = "Unbuffered-SDR",
 148         [MEM_RDR]       = "Registered-SDR",
 149         [MEM_DDR]       = "Unbuffered-DDR",
 150         [MEM_RDDR]      = "Registered-DDR",
 151         [MEM_RMBS]      = "RMBS",
 152         [MEM_DDR2]      = "Unbuffered-DDR2",
 153         [MEM_FB_DDR2]   = "FullyBuffered-DDR2",
 154         [MEM_RDDR2]     = "Registered-DDR2",
 155         [MEM_XDR]       = "XDR",
 156         [MEM_DDR3]      = "Unbuffered-DDR3",
 157         [MEM_RDDR3]     = "Registered-DDR3",
 158         [MEM_LRDDR3]    = "Load-Reduced-DDR3-RAM",
 159         [MEM_LPDDR3]    = "Low-Power-DDR3-RAM",
 160         [MEM_DDR4]      = "Unbuffered-DDR4",
 161         [MEM_RDDR4]     = "Registered-DDR4",
 162         [MEM_LPDDR4]    = "Low-Power-DDR4-RAM",
 163         [MEM_LRDDR4]    = "Load-Reduced-DDR4-RAM",
 164         [MEM_DDR5]      = "Unbuffered-DDR5",
 165         [MEM_RDDR5]     = "Registered-DDR5",
 166         [MEM_LRDDR5]    = "Load-Reduced-DDR5-RAM",
 167         [MEM_NVDIMM]    = "Non-volatile-RAM",
 168         [MEM_WIO2]      = "Wide-IO-2",
 169         [MEM_HBM2]      = "High-bandwidth-memory-Gen2",
 170 };
 171 EXPORT_SYMBOL_GPL(edac_mem_types);
 172
 173 /**
 174  * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
 175  * @p:          pointer to a pointer with the memory offset to be used. At
 176  *              return, this will be incremented to point to the next offset
 177  * @size:       Size of the data structure to be reserved
 178  * @n_elems:    Number of elements that should be reserved
 179  *
 180  * If 'size' is a constant, the compiler will optimize this whole function
 181  * down to either a no-op or the addition of a constant to the value of '*p'.
 182  *
 183  * The 'p' pointer is absolutely needed to keep the proper advancing
 184  * further in memory to the proper offsets when allocating the struct along
 185  * with its embedded structs, as edac_device_alloc_ctl_info() does it
 186  * above, for example.
 187  *
 188  * At return, the pointer 'p' will be incremented to be used on a next call
 189  * to this function.
 190  */
 191 void *edac_align_ptr(void **p, unsigned int size, int n_elems)
 192 {
 193         unsigned int align, r;
 194         void *ptr = *p;
 195
 196         *p += size * n_elems;
 197
 198         /*
 199          * 'p' can possibly be an unaligned item X such that sizeof(X) is
 200          * 'size'.  Adjust 'p' so that its alignment is at least as
 201          * stringent as what the compiler would provide for X and return
 202          * the aligned result.
 203          * Here we assume that the alignment of a "long long" is the most
 204          * stringent alignment that the compiler will ever provide by default.
 205          * As far as I know, this is a reasonable assumption.
 206          */
 207         if (size > sizeof(long))
 208                 align = sizeof(long long);
 209         else if (size > sizeof(int))
 210                 align = sizeof(long);
 211         else if (size > sizeof(short))
 212                 align = sizeof(int);
 213         else if (size > sizeof(char))
 214                 align = sizeof(short);
 215         else
 216                 return (char *)ptr;
 217
 218         r = (unsigned long)p % align;
 219
 220         if (r == 0)
 221                 return (char *)ptr;
 222
 223         *p += align - r;
 224
 225         return (void *)(((unsigned long)ptr) + align - r);
 226 }
 227
 228 static void _edac_mc_free(struct mem_ctl_info *mci)
 229 {
 230         put_device(&mci->dev);
 231 }
 232
 233 static void mci_release(struct device *dev)
 234 {
 235         struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
 236         struct csrow_info *csr;
 237         int i, chn, row;
 238
 239         if (mci->dimms) {
 240                 for (i = 0; i < mci->tot_dimms; i++)
 241                         kfree(mci->dimms[i]);
 242                 kfree(mci->dimms);
 243         }
 244
 245         if (mci->csrows) {
 246                 for (row = 0; row < mci->nr_csrows; row++) {
 247                         csr = mci->csrows[row];
 248                         if (!csr)
 249                                 continue;
 250
 251                         if (csr->channels) {
 252                                 for (chn = 0; chn < mci->num_cschannel; chn++)
 253                                         kfree(csr->channels[chn]);
 254                                 kfree(csr->channels);
 255                         }
 256                         kfree(csr);
 257                 }
 258                 kfree(mci->csrows);
 259         }
 260         kfree(mci);
 261 }
 262
 263 static int edac_mc_alloc_csrows(struct mem_ctl_info *mci)
 264 {
 265         unsigned int tot_channels = mci->num_cschannel;
 266         unsigned int tot_csrows = mci->nr_csrows;
 267         unsigned int row, chn;
 268
 269         /*
 270          * Alocate and fill the csrow/channels structs
 271          */
 272         mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
 273         if (!mci->csrows)
 274                 return -ENOMEM;
 275
 276         for (row = 0; row < tot_csrows; row++) {
 277                 struct csrow_info *csr;
 278
 279                 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
 280                 if (!csr)
 281                         return -ENOMEM;
 282
 283                 mci->csrows[row] = csr;
 284                 csr->csrow_idx = row;
 285                 csr->mci = mci;
 286                 csr->nr_channels = tot_channels;
 287                 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
 288                                         GFP_KERNEL);
 289                 if (!csr->channels)
 290                         return -ENOMEM;
 291
 292                 for (chn = 0; chn < tot_channels; chn++) {
 293                         struct rank_info *chan;
 294
 295                         chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
 296                         if (!chan)
 297                                 return -ENOMEM;
 298
 299                         csr->channels[chn] = chan;
 300                         chan->chan_idx = chn;
 301                         chan->csrow = csr;
 302                 }
 303         }
 304
 305         return 0;
 306 }
 307
 308 static int edac_mc_alloc_dimms(struct mem_ctl_info *mci)
 309 {
 310         unsigned int pos[EDAC_MAX_LAYERS];
 311         unsigned int row, chn, idx;
 312         int layer;
 313         void *p;
 314
 315         /*
 316          * Allocate and fill the dimm structs
 317          */
 318         mci->dimms  = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
 319         if (!mci->dimms)
 320                 return -ENOMEM;
 321
 322         memset(&pos, 0, sizeof(pos));
 323         row = 0;
 324         chn = 0;
 325         for (idx = 0; idx < mci->tot_dimms; idx++) {
 326                 struct dimm_info *dimm;
 327                 struct rank_info *chan;
 328                 int n, len;
 329
 330                 chan = mci->csrows[row]->channels[chn];
 331
 332                 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
 333                 if (!dimm)
 334                         return -ENOMEM;
 335                 mci->dimms[idx] = dimm;
 336                 dimm->mci = mci;
 337                 dimm->idx = idx;
 338
 339                 /*
 340                  * Copy DIMM location and initialize it.
 341                  */
 342                 len = sizeof(dimm->label);
 343                 p = dimm->label;
 344                 n = scnprintf(p, len, "mc#%u", mci->mc_idx);
 345                 p += n;
 346                 len -= n;
 347                 for (layer = 0; layer < mci->n_layers; layer++) {
 348                         n = scnprintf(p, len, "%s#%u",
 349                                       edac_layer_name[mci->layers[layer].type],
 350                                       pos[layer]);
 351                         p += n;
 352                         len -= n;
 353                         dimm->location[layer] = pos[layer];
 354                 }
 355
 356                 /* Link it to the csrows old API data */
 357                 chan->dimm = dimm;
 358                 dimm->csrow = row;
 359                 dimm->cschannel = chn;
 360
 361                 /* Increment csrow location */
 362                 if (mci->layers[0].is_virt_csrow) {
 363                         chn++;
 364                         if (chn == mci->num_cschannel) {
 365                                 chn = 0;
 366                                 row++;
 367                         }
 368                 } else {
 369                         row++;
 370                         if (row == mci->nr_csrows) {
 371                                 row = 0;
 372                                 chn++;
 373                         }
 374                 }
 375
 376                 /* Increment dimm location */
 377                 for (layer = mci->n_layers - 1; layer >= 0; layer--) {
 378                         pos[layer]++;
 379                         if (pos[layer] < mci->layers[layer].size)
 380                                 break;
 381                         pos[layer] = 0;
 382                 }
 383         }
 384
 385         return 0;
 386 }
 387
 388 struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num,
 389                                    unsigned int n_layers,
 390                                    struct edac_mc_layer *layers,
 391                                    unsigned int sz_pvt)
 392 {
 393         struct mem_ctl_info *mci;
 394         struct edac_mc_layer *layer;
 395         unsigned int idx, size, tot_dimms = 1;
 396         unsigned int tot_csrows = 1, tot_channels = 1;
 397         void *pvt, *ptr = NULL;
 398         bool per_rank = false;
 399
 400         if (WARN_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0))
 401                 return NULL;
 402
 403         /*
 404          * Calculate the total amount of dimms and csrows/cschannels while
 405          * in the old API emulation mode
 406          */
 407         for (idx = 0; idx < n_layers; idx++) {
 408                 tot_dimms *= layers[idx].size;
 409
 410                 if (layers[idx].is_virt_csrow)
 411                         tot_csrows *= layers[idx].size;
 412                 else
 413                         tot_channels *= layers[idx].size;
 414
 415                 if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT)
 416                         per_rank = true;
 417         }
 418
 419         /* Figure out the offsets of the various items from the start of an mc
 420          * structure.  We want the alignment of each item to be at least as
 421          * stringent as what the compiler would provide if we could simply
 422          * hardcode everything into a single struct.
 423          */
 424         mci     = edac_align_ptr(&ptr, sizeof(*mci), 1);
 425         layer   = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
 426         pvt     = edac_align_ptr(&ptr, sz_pvt, 1);
 427         size    = ((unsigned long)pvt) + sz_pvt;
 428
 429         edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
 430                  size,
 431                  tot_dimms,
 432                  per_rank ? "ranks" : "dimms",
 433                  tot_csrows * tot_channels);
 434
 435         mci = kzalloc(size, GFP_KERNEL);
 436         if (mci == NULL)
 437                 return NULL;
 438
 439         mci->dev.release = mci_release;
 440         device_initialize(&mci->dev);
 441
 442         /* Adjust pointers so they point within the memory we just allocated
 443          * rather than an imaginary chunk of memory located at address 0.
 444          */
 445         layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
 446         pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
 447
 448         /* setup index and various internal pointers */
 449         mci->mc_idx = mc_num;
 450         mci->tot_dimms = tot_dimms;
 451         mci->pvt_info = pvt;
 452         mci->n_layers = n_layers;
 453         mci->layers = layer;
 454         memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
 455         mci->nr_csrows = tot_csrows;
 456         mci->num_cschannel = tot_channels;
 457         mci->csbased = per_rank;
 458
 459         if (edac_mc_alloc_csrows(mci))
 460                 goto error;
 461
 462         if (edac_mc_alloc_dimms(mci))
 463                 goto error;
 464
 465         mci->op_state = OP_ALLOC;
 466
 467         return mci;
 468
 469 error:
 470         _edac_mc_free(mci);
 471
 472         return NULL;
 473 }
 474 EXPORT_SYMBOL_GPL(edac_mc_alloc);
 475
 476 void edac_mc_free(struct mem_ctl_info *mci)
 477 {
 478         edac_dbg(1, "\n");
 479
 480         _edac_mc_free(mci);
 481 }
 482 EXPORT_SYMBOL_GPL(edac_mc_free);
 483
 484 bool edac_has_mcs(void)
 485 {
 486         bool ret;
 487
 488         mutex_lock(&mem_ctls_mutex);
 489
 490         ret = list_empty(&mc_devices);
 491
 492         mutex_unlock(&mem_ctls_mutex);
 493
 494         return !ret;
 495 }
 496 EXPORT_SYMBOL_GPL(edac_has_mcs);
 497
 498 /* Caller must hold mem_ctls_mutex */
 499 static struct mem_ctl_info *__find_mci_by_dev(struct device *dev)
 500 {
 501         struct mem_ctl_info *mci;
 502         struct list_head *item;
 503
 504         edac_dbg(3, "\n");
 505
 506         list_for_each(item, &mc_devices) {
 507                 mci = list_entry(item, struct mem_ctl_info, link);
 508
 509                 if (mci->pdev == dev)
 510                         return mci;
 511         }
 512
 513         return NULL;
 514 }
 515
 516 /**
 517  * find_mci_by_dev
 518  *
 519  *      scan list of controllers looking for the one that manages
 520  *      the 'dev' device
 521  * @dev: pointer to a struct device related with the MCI
 522  */
 523 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
 524 {
 525         struct mem_ctl_info *ret;
 526
 527         mutex_lock(&mem_ctls_mutex);
 528         ret = __find_mci_by_dev(dev);
 529         mutex_unlock(&mem_ctls_mutex);
 530
 531         return ret;
 532 }
 533 EXPORT_SYMBOL_GPL(find_mci_by_dev);
 534
 535 /*
 536  * edac_mc_workq_function
 537  *      performs the operation scheduled by a workq request
 538  */
 539 static void edac_mc_workq_function(struct work_struct *work_req)
 540 {
 541         struct delayed_work *d_work = to_delayed_work(work_req);
 542         struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
 543
 544         mutex_lock(&mem_ctls_mutex);
 545
 546         if (mci->op_state != OP_RUNNING_POLL) {
 547                 mutex_unlock(&mem_ctls_mutex);
 548                 return;
 549         }
 550
 551         if (edac_op_state == EDAC_OPSTATE_POLL)
 552                 mci->edac_check(mci);
 553
 554         mutex_unlock(&mem_ctls_mutex);
 555
 556         /* Queue ourselves again. */
 557         edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 558 }
 559
 560 /*
 561  * edac_mc_reset_delay_period(unsigned long value)
 562  *
 563  *      user space has updated our poll period value, need to
 564  *      reset our workq delays
 565  */
 566 void edac_mc_reset_delay_period(unsigned long value)
 567 {
 568         struct mem_ctl_info *mci;
 569         struct list_head *item;
 570
 571         mutex_lock(&mem_ctls_mutex);
 572
 573         list_for_each(item, &mc_devices) {
 574                 mci = list_entry(item, struct mem_ctl_info, link);
 575
 576                 if (mci->op_state == OP_RUNNING_POLL)
 577                         edac_mod_work(&mci->work, value);
 578         }
 579         mutex_unlock(&mem_ctls_mutex);
 580 }
 581
 582
 583
 584 /* Return 0 on success, 1 on failure.
 585  * Before calling this function, caller must
 586  * assign a unique value to mci->mc_idx.
 587  *
 588  *      locking model:
 589  *
 590  *              called with the mem_ctls_mutex lock held
 591  */
 592 static int add_mc_to_global_list(struct mem_ctl_info *mci)
 593 {
 594         struct list_head *item, *insert_before;
 595         struct mem_ctl_info *p;
 596
 597         insert_before = &mc_devices;
 598
 599         p = __find_mci_by_dev(mci->pdev);
 600         if (unlikely(p != NULL))
 601                 goto fail0;
 602
 603         list_for_each(item, &mc_devices) {
 604                 p = list_entry(item, struct mem_ctl_info, link);
 605
 606                 if (p->mc_idx >= mci->mc_idx) {
 607                         if (unlikely(p->mc_idx == mci->mc_idx))
 608                                 goto fail1;
 609
 610                         insert_before = item;
 611                         break;
 612                 }
 613         }
 614
 615         list_add_tail_rcu(&mci->link, insert_before);
 616         return 0;
 617
 618 fail0:
 619         edac_printk(KERN_WARNING, EDAC_MC,
 620                 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
 621                 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
 622         return 1;
 623
 624 fail1:
 625         edac_printk(KERN_WARNING, EDAC_MC,
 626                 "bug in low-level driver: attempt to assign\n"
 627                 "    duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
 628         return 1;
 629 }
 630
 631 static int del_mc_from_global_list(struct mem_ctl_info *mci)
 632 {
 633         list_del_rcu(&mci->link);
 634
 635         /* these are for safe removal of devices from global list while
 636          * NMI handlers may be traversing list
 637          */
 638         synchronize_rcu();
 639         INIT_LIST_HEAD(&mci->link);
 640
 641         return list_empty(&mc_devices);
 642 }
 643
 644 struct mem_ctl_info *edac_mc_find(int idx)
 645 {
 646         struct mem_ctl_info *mci;
 647         struct list_head *item;
 648
 649         mutex_lock(&mem_ctls_mutex);
 650
 651         list_for_each(item, &mc_devices) {
 652                 mci = list_entry(item, struct mem_ctl_info, link);
 653                 if (mci->mc_idx == idx)
 654                         goto unlock;
 655         }
 656
 657         mci = NULL;
 658 unlock:
 659         mutex_unlock(&mem_ctls_mutex);
 660         return mci;
 661 }
 662 EXPORT_SYMBOL(edac_mc_find);
 663
 664 const char *edac_get_owner(void)
 665 {
 666         return edac_mc_owner;
 667 }
 668 EXPORT_SYMBOL_GPL(edac_get_owner);
 669
 670 /* FIXME - should a warning be printed if no error detection? correction? */
 671 int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
 672                                const struct attribute_group **groups)
 673 {
 674         int ret = -EINVAL;
 675         edac_dbg(0, "\n");
 676
 677 #ifdef CONFIG_EDAC_DEBUG
 678         if (edac_debug_level >= 3)
 679                 edac_mc_dump_mci(mci);
 680
 681         if (edac_debug_level >= 4) {
 682                 struct dimm_info *dimm;
 683                 int i;
 684
 685                 for (i = 0; i < mci->nr_csrows; i++) {
 686                         struct csrow_info *csrow = mci->csrows[i];
 687                         u32 nr_pages = 0;
 688                         int j;
 689
 690                         for (j = 0; j < csrow->nr_channels; j++)
 691                                 nr_pages += csrow->channels[j]->dimm->nr_pages;
 692                         if (!nr_pages)
 693                                 continue;
 694                         edac_mc_dump_csrow(csrow);
 695                         for (j = 0; j < csrow->nr_channels; j++)
 696                                 if (csrow->channels[j]->dimm->nr_pages)
 697                                         edac_mc_dump_channel(csrow->channels[j]);
 698                 }
 699
 700                 mci_for_each_dimm(mci, dimm)
 701                         edac_mc_dump_dimm(dimm);
 702         }
 703 #endif
 704         mutex_lock(&mem_ctls_mutex);
 705
 706         if (edac_mc_owner && edac_mc_owner != mci->mod_name) {
 707                 ret = -EPERM;
 708                 goto fail0;
 709         }
 710
 711         if (add_mc_to_global_list(mci))
 712                 goto fail0;
 713
 714         /* set load time so that error rate can be tracked */
 715         mci->start_time = jiffies;
 716
 717         mci->bus = edac_get_sysfs_subsys();
 718
 719         if (edac_create_sysfs_mci_device(mci, groups)) {
 720                 edac_mc_printk(mci, KERN_WARNING,
 721                         "failed to create sysfs device\n");
 722                 goto fail1;
 723         }
 724
 725         if (mci->edac_check) {
 726                 mci->op_state = OP_RUNNING_POLL;
 727
 728                 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
 729                 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 730
 731         } else {
 732                 mci->op_state = OP_RUNNING_INTERRUPT;
 733         }
 734
 735         /* Report action taken */
 736         edac_mc_printk(mci, KERN_INFO,
 737                 "Giving out device to module %s controller %s: DEV %s (%s)\n",
 738                 mci->mod_name, mci->ctl_name, mci->dev_name,
 739                 edac_op_state_to_string(mci->op_state));
 740
 741         edac_mc_owner = mci->mod_name;
 742
 743         mutex_unlock(&mem_ctls_mutex);
 744         return 0;
 745
 746 fail1:
 747         del_mc_from_global_list(mci);
 748
 749 fail0:
 750         mutex_unlock(&mem_ctls_mutex);
 751         return ret;
 752 }
 753 EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
 754
 755 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
 756 {
 757         struct mem_ctl_info *mci;
 758
 759         edac_dbg(0, "\n");
 760
 761         mutex_lock(&mem_ctls_mutex);
 762
 763         /* find the requested mci struct in the global list */
 764         mci = __find_mci_by_dev(dev);
 765         if (mci == NULL) {
 766                 mutex_unlock(&mem_ctls_mutex);
 767                 return NULL;
 768         }
 769
 770         /* mark MCI offline: */
 771         mci->op_state = OP_OFFLINE;
 772
 773         if (del_mc_from_global_list(mci))
 774                 edac_mc_owner = NULL;
 775
 776         mutex_unlock(&mem_ctls_mutex);
 777
 778         if (mci->edac_check)
 779                 edac_stop_work(&mci->work);
 780
 781         /* remove from sysfs */
 782         edac_remove_sysfs_mci_device(mci);
 783
 784         edac_printk(KERN_INFO, EDAC_MC,
 785                 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
 786                 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
 787
 788         return mci;
 789 }
 790 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
 791
 792 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
 793                                 u32 size)
 794 {
 795         struct page *pg;
 796         void *virt_addr;
 797         unsigned long flags = 0;
 798
 799         edac_dbg(3, "\n");
 800
 801         /* ECC error page was not in our memory. Ignore it. */
 802         if (!pfn_valid(page))
 803                 return;
 804
 805         /* Find the actual page structure then map it and fix */
 806         pg = pfn_to_page(page);
 807
 808         if (PageHighMem(pg))
 809                 local_irq_save(flags);
 810
 811         virt_addr = kmap_atomic(pg);
 812
 813         /* Perform architecture specific atomic scrub operation */
 814         edac_atomic_scrub(virt_addr + offset, size);
 815
 816         /* Unmap and complete */
 817         kunmap_atomic(virt_addr);
 818
 819         if (PageHighMem(pg))
 820                 local_irq_restore(flags);
 821 }
 822
 823 /* FIXME - should return -1 */
 824 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
 825 {
 826         struct csrow_info **csrows = mci->csrows;
 827         int row, i, j, n;
 828
 829         edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
 830         row = -1;
 831
 832         for (i = 0; i < mci->nr_csrows; i++) {
 833                 struct csrow_info *csrow = csrows[i];
 834                 n = 0;
 835                 for (j = 0; j < csrow->nr_channels; j++) {
 836                         struct dimm_info *dimm = csrow->channels[j]->dimm;
 837                         n += dimm->nr_pages;
 838                 }
 839                 if (n == 0)
 840                         continue;
 841
 842                 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
 843                          mci->mc_idx,
 844                          csrow->first_page, page, csrow->last_page,
 845                          csrow->page_mask);
 846
 847                 if ((page >= csrow->first_page) &&
 848                     (page <= csrow->last_page) &&
 849                     ((page & csrow->page_mask) ==
 850                      (csrow->first_page & csrow->page_mask))) {
 851                         row = i;
 852                         break;
 853                 }
 854         }
 855
 856         if (row == -1)
 857                 edac_mc_printk(mci, KERN_ERR,
 858                         "could not look up page error address %lx\n",
 859                         (unsigned long)page);
 860
 861         return row;
 862 }
 863 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
 864
 865 const char *edac_layer_name[] = {
 866         [EDAC_MC_LAYER_BRANCH] = "branch",
 867         [EDAC_MC_LAYER_CHANNEL] = "channel",
 868         [EDAC_MC_LAYER_SLOT] = "slot",
 869         [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
 870         [EDAC_MC_LAYER_ALL_MEM] = "memory",
 871 };
 872 EXPORT_SYMBOL_GPL(edac_layer_name);
 873
 874 static void edac_inc_ce_error(struct edac_raw_error_desc *e)
 875 {
 876         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
 877         struct mem_ctl_info *mci = error_desc_to_mci(e);
 878         struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
 879
 880         mci->ce_mc += e->error_count;
 881
 882         if (dimm)
 883                 dimm->ce_count += e->error_count;
 884         else
 885                 mci->ce_noinfo_count += e->error_count;
 886 }
 887
 888 static void edac_inc_ue_error(struct edac_raw_error_desc *e)
 889 {
 890         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
 891         struct mem_ctl_info *mci = error_desc_to_mci(e);
 892         struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
 893
 894         mci->ue_mc += e->error_count;
 895
 896         if (dimm)
 897                 dimm->ue_count += e->error_count;
 898         else
 899                 mci->ue_noinfo_count += e->error_count;
 900 }
 901
 902 static void edac_ce_error(struct edac_raw_error_desc *e)
 903 {
 904         struct mem_ctl_info *mci = error_desc_to_mci(e);
 905         unsigned long remapped_page;
 906
 907         if (edac_mc_get_log_ce()) {
 908                 edac_mc_printk(mci, KERN_WARNING,
 909                         "%d CE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx%s%s)\n",
 910                         e->error_count, e->msg,
 911                         *e->msg ? " " : "",
 912                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 913                         e->grain, e->syndrome,
 914                         *e->other_detail ? " - " : "",
 915                         e->other_detail);
 916         }
 917
 918         edac_inc_ce_error(e);
 919
 920         if (mci->scrub_mode == SCRUB_SW_SRC) {
 921                 /*
 922                         * Some memory controllers (called MCs below) can remap
 923                         * memory so that it is still available at a different
 924                         * address when PCI devices map into memory.
 925                         * MC's that can't do this, lose the memory where PCI
 926                         * devices are mapped. This mapping is MC-dependent
 927                         * and so we call back into the MC driver for it to
 928                         * map the MC page to a physical (CPU) page which can
 929                         * then be mapped to a virtual page - which can then
 930                         * be scrubbed.
 931                         */
 932                 remapped_page = mci->ctl_page_to_phys ?
 933                         mci->ctl_page_to_phys(mci, e->page_frame_number) :
 934                         e->page_frame_number;
 935
 936                 edac_mc_scrub_block(remapped_page, e->offset_in_page, e->grain);
 937         }
 938 }
 939
 940 static void edac_ue_error(struct edac_raw_error_desc *e)
 941 {
 942         struct mem_ctl_info *mci = error_desc_to_mci(e);
 943
 944         if (edac_mc_get_log_ue()) {
 945                 edac_mc_printk(mci, KERN_WARNING,
 946                         "%d UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
 947                         e->error_count, e->msg,
 948                         *e->msg ? " " : "",
 949                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 950                         e->grain,
 951                         *e->other_detail ? " - " : "",
 952                         e->other_detail);
 953         }
 954
 955         edac_inc_ue_error(e);
 956
 957         if (edac_mc_get_panic_on_ue()) {
 958                 panic("UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
 959                         e->msg,
 960                         *e->msg ? " " : "",
 961                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 962                         e->grain,
 963                         *e->other_detail ? " - " : "",
 964                         e->other_detail);
 965         }
 966 }
 967
 968 static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan)
 969 {
 970         struct mem_ctl_info *mci = error_desc_to_mci(e);
 971         enum hw_event_mc_err_type type = e->type;
 972         u16 count = e->error_count;
 973
 974         if (row < 0)
 975                 return;
 976
 977         edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
 978
 979         if (type == HW_EVENT_ERR_CORRECTED) {
 980                 mci->csrows[row]->ce_count += count;
 981                 if (chan >= 0)
 982                         mci->csrows[row]->channels[chan]->ce_count += count;
 983         } else {
 984                 mci->csrows[row]->ue_count += count;
 985         }
 986 }
 987
 988 void edac_raw_mc_handle_error(struct edac_raw_error_desc *e)
 989 {
 990         struct mem_ctl_info *mci = error_desc_to_mci(e);
 991         u8 grain_bits;
 992
 993         /* Sanity-check driver-supplied grain value. */
 994         if (WARN_ON_ONCE(!e->grain))
 995                 e->grain = 1;
 996
 997         grain_bits = fls_long(e->grain - 1);
 998
 999         /* Report the error via the trace interface */
1000         if (IS_ENABLED(CONFIG_RAS))
1001                 trace_mc_event(e->type, e->msg, e->label, e->error_count,
1002                                mci->mc_idx, e->top_layer, e->mid_layer,
1003                                e->low_layer,
1004                                (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
1005                                grain_bits, e->syndrome, e->other_detail);
1006
1007         if (e->type == HW_EVENT_ERR_CORRECTED)
1008                 edac_ce_error(e);
1009         else
1010                 edac_ue_error(e);
1011 }
1012 EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
1013
1014 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1015                           struct mem_ctl_info *mci,
1016                           const u16 error_count,
1017                           const unsigned long page_frame_number,
1018                           const unsigned long offset_in_page,
1019                           const unsigned long syndrome,
1020                           const int top_layer,
1021                           const int mid_layer,
1022                           const int low_layer,
1023                           const char *msg,
1024                           const char *other_detail)
1025 {
1026         struct dimm_info *dimm;
1027         char *p, *end;
1028         int row = -1, chan = -1;
1029         int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1030         int i, n_labels = 0;
1031         struct edac_raw_error_desc *e = &mci->error_desc;
1032         bool any_memory = true;
1033         const char *prefix;
1034
1035         edac_dbg(3, "MC%d\n", mci->mc_idx);
1036
1037         /* Fills the error report buffer */
1038         memset(e, 0, sizeof (*e));
1039         e->error_count = error_count;
1040         e->type = type;
1041         e->top_layer = top_layer;
1042         e->mid_layer = mid_layer;
1043         e->low_layer = low_layer;
1044         e->page_frame_number = page_frame_number;
1045         e->offset_in_page = offset_in_page;
1046         e->syndrome = syndrome;
1047         /* need valid strings here for both: */
1048         e->msg = msg ?: "";
1049         e->other_detail = other_detail ?: "";
1050
1051         /*
1052          * Check if the event report is consistent and if the memory location is
1053          * known. If it is, the DIMM(s) label info will be filled and the DIMM's
1054          * error counters will be incremented.
1055          */
1056         for (i = 0; i < mci->n_layers; i++) {
1057                 if (pos[i] >= (int)mci->layers[i].size) {
1058
1059                         edac_mc_printk(mci, KERN_ERR,
1060                                        "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1061                                        edac_layer_name[mci->layers[i].type],
1062                                        pos[i], mci->layers[i].size);
1063                         /*
1064                          * Instead of just returning it, let's use what's
1065                          * known about the error. The increment routines and
1066                          * the DIMM filter logic will do the right thing by
1067                          * pointing the likely damaged DIMMs.
1068                          */
1069                         pos[i] = -1;
1070                 }
1071                 if (pos[i] >= 0)
1072                         any_memory = false;
1073         }
1074
1075         /*
1076          * Get the dimm label/grain that applies to the match criteria.
1077          * As the error algorithm may not be able to point to just one memory
1078          * stick, the logic here will get all possible labels that could
1079          * pottentially be affected by the error.
1080          * On FB-DIMM memory controllers, for uncorrected errors, it is common
1081          * to have only the MC channel and the MC dimm (also called "branch")
1082          * but the channel is not known, as the memory is arranged in pairs,
1083          * where each memory belongs to a separate channel within the same
1084          * branch.
1085          */
1086         p = e->label;
1087         *p = '\0';
1088         end = p + sizeof(e->label);
1089         prefix = "";
1090
1091         mci_for_each_dimm(mci, dimm) {
1092                 if (top_layer >= 0 && top_layer != dimm->location[0])
1093                         continue;
1094                 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1095                         continue;
1096                 if (low_layer >= 0 && low_layer != dimm->location[2])
1097                         continue;
1098
1099                 /* get the max grain, over the error match range */
1100                 if (dimm->grain > e->grain)
1101                         e->grain = dimm->grain;
1102
1103                 /*
1104                  * If the error is memory-controller wide, there's no need to
1105                  * seek for the affected DIMMs because the whole channel/memory
1106                  * controller/... may be affected. Also, don't show errors for
1107                  * empty DIMM slots.
1108                  */
1109                 if (!dimm->nr_pages)
1110                         continue;
1111
1112                 n_labels++;
1113                 if (n_labels > EDAC_MAX_LABELS) {
1114                         p = e->label;
1115                         *p = '\0';
1116                 } else {
1117                         p += scnprintf(p, end - p, "%s%s", prefix, dimm->label);
1118                         prefix = OTHER_LABEL;
1119                 }
1120
1121                 /*
1122                  * get csrow/channel of the DIMM, in order to allow
1123                  * incrementing the compat API counters
1124                  */
1125                 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1126                         mci->csbased ? "rank" : "dimm",
1127                         dimm->csrow, dimm->cschannel);
1128                 if (row == -1)
1129                         row = dimm->csrow;
1130                 else if (row >= 0 && row != dimm->csrow)
1131                         row = -2;
1132
1133                 if (chan == -1)
1134                         chan = dimm->cschannel;
1135                 else if (chan >= 0 && chan != dimm->cschannel)
1136                         chan = -2;
1137         }
1138
1139         if (any_memory)
1140                 strscpy(e->label, "any memory", sizeof(e->label));
1141         else if (!*e->label)
1142                 strscpy(e->label, "unknown memory", sizeof(e->label));
1143
1144         edac_inc_csrow(e, row, chan);
1145
1146         /* Fill the RAM location data */
1147         p = e->location;
1148         end = p + sizeof(e->location);
1149         prefix = "";
1150
1151         for (i = 0; i < mci->n_layers; i++) {
1152                 if (pos[i] < 0)
1153                         continue;
1154
1155                 p += scnprintf(p, end - p, "%s%s:%d", prefix,
1156                                edac_layer_name[mci->layers[i].type], pos[i]);
1157                 prefix = " ";
1158         }
1159
1160         edac_raw_mc_handle_error(e);
1161 }
1162 EXPORT_SYMBOL_GPL(edac_mc_handle_error);