drivers/dma/dmatest.c

   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  * Copyright (C) 2013 Intel Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/delay.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/dmaengine.h>
  16 #include <linux/freezer.h>
  17 #include <linux/init.h>
  18 #include <linux/kthread.h>
  19 #include <linux/sched/task.h>
  20 #include <linux/module.h>
  21 #include <linux/moduleparam.h>
  22 #include <linux/random.h>
  23 #include <linux/slab.h>
  24 #include <linux/wait.h>
  25
  26 static unsigned int test_buf_size = 16384;
  27 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  28 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  29
  30 static char test_channel[20];
  31 module_param_string(channel, test_channel, sizeof(test_channel),
  32                 S_IRUGO | S_IWUSR);
  33 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  34
  35 static char test_device[32];
  36 module_param_string(device, test_device, sizeof(test_device),
  37                 S_IRUGO | S_IWUSR);
  38 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  39
  40 static unsigned int threads_per_chan = 1;
  41 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  42 MODULE_PARM_DESC(threads_per_chan,
  43                 "Number of threads to start per channel (default: 1)");
  44
  45 static unsigned int max_channels;
  46 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  47 MODULE_PARM_DESC(max_channels,
  48                 "Maximum number of channels to use (default: all)");
  49
  50 static unsigned int iterations;
  51 module_param(iterations, uint, S_IRUGO | S_IWUSR);
  52 MODULE_PARM_DESC(iterations,
  53                 "Iterations before stopping test (default: infinite)");
  54
  55 static unsigned int dmatest;
  56 module_param(dmatest, uint, S_IRUGO | S_IWUSR);
  57 MODULE_PARM_DESC(dmatest,
  58                 "dmatest 0-memcpy 1-memset (default: 0)");
  59
  60 static unsigned int xor_sources = 3;
  61 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  62 MODULE_PARM_DESC(xor_sources,
  63                 "Number of xor source buffers (default: 3)");
  64
  65 static unsigned int pq_sources = 3;
  66 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  67 MODULE_PARM_DESC(pq_sources,
  68                 "Number of p+q source buffers (default: 3)");
  69
  70 static int timeout = 3000;
  71 module_param(timeout, uint, S_IRUGO | S_IWUSR);
  72 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  73                  "Pass -1 for infinite timeout");
  74
  75 static bool noverify;
  76 module_param(noverify, bool, S_IRUGO | S_IWUSR);
  77 MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)");
  78
  79 static bool norandom;
  80 module_param(norandom, bool, 0644);
  81 MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)");
  82
  83 static bool verbose;
  84 module_param(verbose, bool, S_IRUGO | S_IWUSR);
  85 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  86
  87 /**
  88  * struct dmatest_params - test parameters.
  89  * @buf_size:           size of the memcpy test buffer
  90  * @channel:            bus ID of the channel to test
  91  * @device:             bus ID of the DMA Engine to test
  92  * @threads_per_chan:   number of threads to start per channel
  93  * @max_channels:       maximum number of channels to use
  94  * @iterations:         iterations before stopping test
  95  * @xor_sources:        number of xor source buffers
  96  * @pq_sources:         number of p+q source buffers
  97  * @timeout:            transfer timeout in msec, -1 for infinite timeout
  98  */
  99 struct dmatest_params {
 100         unsigned int    buf_size;
 101         char            channel[20];
 102         char            device[32];
 103         unsigned int    threads_per_chan;
 104         unsigned int    max_channels;
 105         unsigned int    iterations;
 106         unsigned int    xor_sources;
 107         unsigned int    pq_sources;
 108         int             timeout;
 109         bool            noverify;
 110         bool            norandom;
 111 };
 112
 113 /**
 114  * struct dmatest_info - test information.
 115  * @params:             test parameters
 116  * @lock:               access protection to the fields of this structure
 117  */
 118 static struct dmatest_info {
 119         /* Test parameters */
 120         struct dmatest_params   params;
 121
 122         /* Internal state */
 123         struct list_head        channels;
 124         unsigned int            nr_channels;
 125         struct mutex            lock;
 126         bool                    did_init;
 127 } test_info = {
 128         .channels = LIST_HEAD_INIT(test_info.channels),
 129         .lock = __MUTEX_INITIALIZER(test_info.lock),
 130 };
 131
 132 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
 133 static int dmatest_run_get(char *val, const struct kernel_param *kp);
 134 static const struct kernel_param_ops run_ops = {
 135         .set = dmatest_run_set,
 136         .get = dmatest_run_get,
 137 };
 138 static bool dmatest_run;
 139 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
 140 MODULE_PARM_DESC(run, "Run the test (default: false)");
 141
 142 /* Maximum amount of mismatched bytes in buffer to print */
 143 #define MAX_ERROR_COUNT         32
 144
 145 /*
 146  * Initialization patterns. All bytes in the source buffer has bit 7
 147  * set, all bytes in the destination buffer has bit 7 cleared.
 148  *
 149  * Bit 6 is set for all bytes which are to be copied by the DMA
 150  * engine. Bit 5 is set for all bytes which are to be overwritten by
 151  * the DMA engine.
 152  *
 153  * The remaining bits are the inverse of a counter which increments by
 154  * one for each byte address.
 155  */
 156 #define PATTERN_SRC             0x80
 157 #define PATTERN_DST             0x00
 158 #define PATTERN_COPY            0x40
 159 #define PATTERN_OVERWRITE       0x20
 160 #define PATTERN_COUNT_MASK      0x1f
 161 #define PATTERN_MEMSET_IDX      0x01
 162
 163 /* poor man's completion - we want to use wait_event_freezable() on it */
 164 struct dmatest_done {
 165         bool                    done;
 166         wait_queue_head_t       *wait;
 167 };
 168
 169 struct dmatest_thread {
 170         struct list_head        node;
 171         struct dmatest_info     *info;
 172         struct task_struct      *task;
 173         struct dma_chan         *chan;
 174         u8                      **srcs;
 175         u8                      **usrcs;
 176         u8                      **dsts;
 177         u8                      **udsts;
 178         enum dma_transaction_type type;
 179         wait_queue_head_t done_wait;
 180         struct dmatest_done test_done;
 181         bool                    done;
 182 };
 183
 184 struct dmatest_chan {
 185         struct list_head        node;
 186         struct dma_chan         *chan;
 187         struct list_head        threads;
 188 };
 189
 190 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
 191 static bool wait;
 192
 193 static bool is_threaded_test_run(struct dmatest_info *info)
 194 {
 195         struct dmatest_chan *dtc;
 196
 197         list_for_each_entry(dtc, &info->channels, node) {
 198                 struct dmatest_thread *thread;
 199
 200                 list_for_each_entry(thread, &dtc->threads, node) {
 201                         if (!thread->done)
 202                                 return true;
 203                 }
 204         }
 205
 206         return false;
 207 }
 208
 209 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
 210 {
 211         struct dmatest_info *info = &test_info;
 212         struct dmatest_params *params = &info->params;
 213
 214         if (params->iterations)
 215                 wait_event(thread_wait, !is_threaded_test_run(info));
 216         wait = true;
 217         return param_get_bool(val, kp);
 218 }
 219
 220 static const struct kernel_param_ops wait_ops = {
 221         .get = dmatest_wait_get,
 222         .set = param_set_bool,
 223 };
 224 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
 225 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
 226
 227 static bool dmatest_match_channel(struct dmatest_params *params,
 228                 struct dma_chan *chan)
 229 {
 230         if (params->channel[0] == '\0')
 231                 return true;
 232         return strcmp(dma_chan_name(chan), params->channel) == 0;
 233 }
 234
 235 static bool dmatest_match_device(struct dmatest_params *params,
 236                 struct dma_device *device)
 237 {
 238         if (params->device[0] == '\0')
 239                 return true;
 240         return strcmp(dev_name(device->dev), params->device) == 0;
 241 }
 242
 243 static unsigned long dmatest_random(void)
 244 {
 245         unsigned long buf;
 246
 247         prandom_bytes(&buf, sizeof(buf));
 248         return buf;
 249 }
 250
 251 static inline u8 gen_inv_idx(u8 index, bool is_memset)
 252 {
 253         u8 val = is_memset ? PATTERN_MEMSET_IDX : index;
 254
 255         return ~val & PATTERN_COUNT_MASK;
 256 }
 257
 258 static inline u8 gen_src_value(u8 index, bool is_memset)
 259 {
 260         return PATTERN_SRC | gen_inv_idx(index, is_memset);
 261 }
 262
 263 static inline u8 gen_dst_value(u8 index, bool is_memset)
 264 {
 265         return PATTERN_DST | gen_inv_idx(index, is_memset);
 266 }
 267
 268 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
 269                 unsigned int buf_size, bool is_memset)
 270 {
 271         unsigned int i;
 272         u8 *buf;
 273
 274         for (; (buf = *bufs); bufs++) {
 275                 for (i = 0; i < start; i++)
 276                         buf[i] = gen_src_value(i, is_memset);
 277                 for ( ; i < start + len; i++)
 278                         buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY;
 279                 for ( ; i < buf_size; i++)
 280                         buf[i] = gen_src_value(i, is_memset);
 281                 buf++;
 282         }
 283 }
 284
 285 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
 286                 unsigned int buf_size, bool is_memset)
 287 {
 288         unsigned int i;
 289         u8 *buf;
 290
 291         for (; (buf = *bufs); bufs++) {
 292                 for (i = 0; i < start; i++)
 293                         buf[i] = gen_dst_value(i, is_memset);
 294                 for ( ; i < start + len; i++)
 295                         buf[i] = gen_dst_value(i, is_memset) |
 296                                                 PATTERN_OVERWRITE;
 297                 for ( ; i < buf_size; i++)
 298                         buf[i] = gen_dst_value(i, is_memset);
 299         }
 300 }
 301
 302 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 303                 unsigned int counter, bool is_srcbuf, bool is_memset)
 304 {
 305         u8              diff = actual ^ pattern;
 306         u8              expected = pattern | gen_inv_idx(counter, is_memset);
 307         const char      *thread_name = current->comm;
 308
 309         if (is_srcbuf)
 310                 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
 311                         thread_name, index, expected, actual);
 312         else if ((pattern & PATTERN_COPY)
 313                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 314                 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
 315                         thread_name, index, expected, actual);
 316         else if (diff & PATTERN_SRC)
 317                 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
 318                         thread_name, index, expected, actual);
 319         else
 320                 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
 321                         thread_name, index, expected, actual);
 322 }
 323
 324 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 325                 unsigned int end, unsigned int counter, u8 pattern,
 326                 bool is_srcbuf, bool is_memset)
 327 {
 328         unsigned int i;
 329         unsigned int error_count = 0;
 330         u8 actual;
 331         u8 expected;
 332         u8 *buf;
 333         unsigned int counter_orig = counter;
 334
 335         for (; (buf = *bufs); bufs++) {
 336                 counter = counter_orig;
 337                 for (i = start; i < end; i++) {
 338                         actual = buf[i];
 339                         expected = pattern | gen_inv_idx(counter, is_memset);
 340                         if (actual != expected) {
 341                                 if (error_count < MAX_ERROR_COUNT)
 342                                         dmatest_mismatch(actual, pattern, i,
 343                                                          counter, is_srcbuf,
 344                                                          is_memset);
 345                                 error_count++;
 346                         }
 347                         counter++;
 348                 }
 349         }
 350
 351         if (error_count > MAX_ERROR_COUNT)
 352                 pr_warn("%s: %u errors suppressed\n",
 353                         current->comm, error_count - MAX_ERROR_COUNT);
 354
 355         return error_count;
 356 }
 357
 358
 359 static void dmatest_callback(void *arg)
 360 {
 361         struct dmatest_done *done = arg;
 362         struct dmatest_thread *thread =
 363                 container_of(done, struct dmatest_thread, test_done);
 364         if (!thread->done) {
 365                 done->done = true;
 366                 wake_up_all(done->wait);
 367         } else {
 368                 /*
 369                  * If thread->done, it means that this callback occurred
 370                  * after the parent thread has cleaned up. This can
 371                  * happen in the case that driver doesn't implement
 372                  * the terminate_all() functionality and a dma operation
 373                  * did not occur within the timeout period
 374                  */
 375                 WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
 376         }
 377 }
 378
 379 static unsigned int min_odd(unsigned int x, unsigned int y)
 380 {
 381         unsigned int val = min(x, y);
 382
 383         return val % 2 ? val : val - 1;
 384 }
 385
 386 static void result(const char *err, unsigned int n, unsigned int src_off,
 387                    unsigned int dst_off, unsigned int len, unsigned long data)
 388 {
 389         pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 390                 current->comm, n, err, src_off, dst_off, len, data);
 391 }
 392
 393 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
 394                        unsigned int dst_off, unsigned int len,
 395                        unsigned long data)
 396 {
 397         pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 398                  current->comm, n, err, src_off, dst_off, len, data);
 399 }
 400
 401 #define verbose_result(err, n, src_off, dst_off, len, data) ({  \
 402         if (verbose)                                            \
 403                 result(err, n, src_off, dst_off, len, data);    \
 404         else                                                    \
 405                 dbg_result(err, n, src_off, dst_off, len, data);\
 406 })
 407
 408 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
 409 {
 410         unsigned long long per_sec = 1000000;
 411
 412         if (runtime <= 0)
 413                 return 0;
 414
 415         /* drop precision until runtime is 32-bits */
 416         while (runtime > UINT_MAX) {
 417                 runtime >>= 1;
 418                 per_sec <<= 1;
 419         }
 420
 421         per_sec *= val;
 422         do_div(per_sec, runtime);
 423         return per_sec;
 424 }
 425
 426 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
 427 {
 428         return dmatest_persec(runtime, len >> 10);
 429 }
 430
 431 /*
 432  * This function repeatedly tests DMA transfers of various lengths and
 433  * offsets for a given operation type until it is told to exit by
 434  * kthread_stop(). There may be multiple threads running this function
 435  * in parallel for a single channel, and there may be multiple channels
 436  * being tested in parallel.
 437  *
 438  * Before each test, the source and destination buffer is initialized
 439  * with a known pattern. This pattern is different depending on
 440  * whether it's in an area which is supposed to be copied or
 441  * overwritten, and different in the source and destination buffers.
 442  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 443  * we'll notice.
 444  */
 445 static int dmatest_func(void *data)
 446 {
 447         struct dmatest_thread   *thread = data;
 448         struct dmatest_done     *done = &thread->test_done;
 449         struct dmatest_info     *info;
 450         struct dmatest_params   *params;
 451         struct dma_chan         *chan;
 452         struct dma_device       *dev;
 453         unsigned int            error_count;
 454         unsigned int            failed_tests = 0;
 455         unsigned int            total_tests = 0;
 456         dma_cookie_t            cookie;
 457         enum dma_status         status;
 458         enum dma_ctrl_flags     flags;
 459         u8                      *pq_coefs = NULL;
 460         int                     ret;
 461         int                     src_cnt;
 462         int                     dst_cnt;
 463         int                     i;
 464         ktime_t                 ktime, start, diff;
 465         ktime_t                 filltime = 0;
 466         ktime_t                 comparetime = 0;
 467         s64                     runtime = 0;
 468         unsigned long long      total_len = 0;
 469         u8                      align = 0;
 470         bool                    is_memset = false;
 471
 472         set_freezable();
 473
 474         ret = -ENOMEM;
 475
 476         smp_rmb();
 477         info = thread->info;
 478         params = &info->params;
 479         chan = thread->chan;
 480         dev = chan->device;
 481         if (thread->type == DMA_MEMCPY) {
 482                 align = dev->copy_align;
 483                 src_cnt = dst_cnt = 1;
 484         } else if (thread->type == DMA_MEMSET) {
 485                 align = dev->fill_align;
 486                 src_cnt = dst_cnt = 1;
 487                 is_memset = true;
 488         } else if (thread->type == DMA_XOR) {
 489                 /* force odd to ensure dst = src */
 490                 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
 491                 dst_cnt = 1;
 492                 align = dev->xor_align;
 493         } else if (thread->type == DMA_PQ) {
 494                 /* force odd to ensure dst = src */
 495                 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
 496                 dst_cnt = 2;
 497                 align = dev->pq_align;
 498
 499                 pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
 500                 if (!pq_coefs)
 501                         goto err_thread_type;
 502
 503                 for (i = 0; i < src_cnt; i++)
 504                         pq_coefs[i] = 1;
 505         } else
 506                 goto err_thread_type;
 507
 508         thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 509         if (!thread->srcs)
 510                 goto err_srcs;
 511
 512         thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 513         if (!thread->usrcs)
 514                 goto err_usrcs;
 515
 516         for (i = 0; i < src_cnt; i++) {
 517                 thread->usrcs[i] = kmalloc(params->buf_size + align,
 518                                            GFP_KERNEL);
 519                 if (!thread->usrcs[i])
 520                         goto err_srcbuf;
 521
 522                 /* align srcs to alignment restriction */
 523                 if (align)
 524                         thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align);
 525                 else
 526                         thread->srcs[i] = thread->usrcs[i];
 527         }
 528         thread->srcs[i] = NULL;
 529
 530         thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 531         if (!thread->dsts)
 532                 goto err_dsts;
 533
 534         thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 535         if (!thread->udsts)
 536                 goto err_udsts;
 537
 538         for (i = 0; i < dst_cnt; i++) {
 539                 thread->udsts[i] = kmalloc(params->buf_size + align,
 540                                            GFP_KERNEL);
 541                 if (!thread->udsts[i])
 542                         goto err_dstbuf;
 543
 544                 /* align dsts to alignment restriction */
 545                 if (align)
 546                         thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align);
 547                 else
 548                         thread->dsts[i] = thread->udsts[i];
 549         }
 550         thread->dsts[i] = NULL;
 551
 552         set_user_nice(current, 10);
 553
 554         /*
 555          * src and dst buffers are freed by ourselves below
 556          */
 557         flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
 558
 559         ktime = ktime_get();
 560         while (!kthread_should_stop()
 561                && !(params->iterations && total_tests >= params->iterations)) {
 562                 struct dma_async_tx_descriptor *tx = NULL;
 563                 struct dmaengine_unmap_data *um;
 564                 dma_addr_t srcs[src_cnt];
 565                 dma_addr_t *dsts;
 566                 unsigned int src_off, dst_off, len;
 567
 568                 total_tests++;
 569
 570                 /* Check if buffer count fits into map count variable (u8) */
 571                 if ((src_cnt + dst_cnt) >= 255) {
 572                         pr_err("too many buffers (%d of 255 supported)\n",
 573                                src_cnt + dst_cnt);
 574                         break;
 575                 }
 576
 577                 if (1 << align > params->buf_size) {
 578                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 579                                params->buf_size, 1 << align);
 580                         break;
 581                 }
 582
 583                 if (params->norandom)
 584                         len = params->buf_size;
 585                 else
 586                         len = dmatest_random() % params->buf_size + 1;
 587
 588                 len = (len >> align) << align;
 589                 if (!len)
 590                         len = 1 << align;
 591
 592                 total_len += len;
 593
 594                 if (params->norandom) {
 595                         src_off = 0;
 596                         dst_off = 0;
 597                 } else {
 598                         src_off = dmatest_random() % (params->buf_size - len + 1);
 599                         dst_off = dmatest_random() % (params->buf_size - len + 1);
 600
 601                         src_off = (src_off >> align) << align;
 602                         dst_off = (dst_off >> align) << align;
 603                 }
 604
 605                 if (!params->noverify) {
 606                         start = ktime_get();
 607                         dmatest_init_srcs(thread->srcs, src_off, len,
 608                                           params->buf_size, is_memset);
 609                         dmatest_init_dsts(thread->dsts, dst_off, len,
 610                                           params->buf_size, is_memset);
 611
 612                         diff = ktime_sub(ktime_get(), start);
 613                         filltime = ktime_add(filltime, diff);
 614                 }
 615
 616                 um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt,
 617                                               GFP_KERNEL);
 618                 if (!um) {
 619                         failed_tests++;
 620                         result("unmap data NULL", total_tests,
 621                                src_off, dst_off, len, ret);
 622                         continue;
 623                 }
 624
 625                 um->len = params->buf_size;
 626                 for (i = 0; i < src_cnt; i++) {
 627                         void *buf = thread->srcs[i];
 628                         struct page *pg = virt_to_page(buf);
 629                         unsigned long pg_off = offset_in_page(buf);
 630
 631                         um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
 632                                                    um->len, DMA_TO_DEVICE);
 633                         srcs[i] = um->addr[i] + src_off;
 634                         ret = dma_mapping_error(dev->dev, um->addr[i]);
 635                         if (ret) {
 636                                 dmaengine_unmap_put(um);
 637                                 result("src mapping error", total_tests,
 638                                        src_off, dst_off, len, ret);
 639                                 failed_tests++;
 640                                 continue;
 641                         }
 642                         um->to_cnt++;
 643                 }
 644                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 645                 dsts = &um->addr[src_cnt];
 646                 for (i = 0; i < dst_cnt; i++) {
 647                         void *buf = thread->dsts[i];
 648                         struct page *pg = virt_to_page(buf);
 649                         unsigned long pg_off = offset_in_page(buf);
 650
 651                         dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
 652                                                DMA_BIDIRECTIONAL);
 653                         ret = dma_mapping_error(dev->dev, dsts[i]);
 654                         if (ret) {
 655                                 dmaengine_unmap_put(um);
 656                                 result("dst mapping error", total_tests,
 657                                        src_off, dst_off, len, ret);
 658                                 failed_tests++;
 659                                 continue;
 660                         }
 661                         um->bidi_cnt++;
 662                 }
 663
 664                 if (thread->type == DMA_MEMCPY)
 665                         tx = dev->device_prep_dma_memcpy(chan,
 666                                                          dsts[0] + dst_off,
 667                                                          srcs[0], len, flags);
 668                 else if (thread->type == DMA_MEMSET)
 669                         tx = dev->device_prep_dma_memset(chan,
 670                                                 dsts[0] + dst_off,
 671                                                 *(thread->srcs[0] + src_off),
 672                                                 len, flags);
 673                 else if (thread->type == DMA_XOR)
 674                         tx = dev->device_prep_dma_xor(chan,
 675                                                       dsts[0] + dst_off,
 676                                                       srcs, src_cnt,
 677                                                       len, flags);
 678                 else if (thread->type == DMA_PQ) {
 679                         dma_addr_t dma_pq[dst_cnt];
 680
 681                         for (i = 0; i < dst_cnt; i++)
 682                                 dma_pq[i] = dsts[i] + dst_off;
 683                         tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
 684                                                      src_cnt, pq_coefs,
 685                                                      len, flags);
 686                 }
 687
 688                 if (!tx) {
 689                         dmaengine_unmap_put(um);
 690                         result("prep error", total_tests, src_off,
 691                                dst_off, len, ret);
 692                         msleep(100);
 693                         failed_tests++;
 694                         continue;
 695                 }
 696
 697                 done->done = false;
 698                 tx->callback = dmatest_callback;
 699                 tx->callback_param = done;
 700                 cookie = tx->tx_submit(tx);
 701
 702                 if (dma_submit_error(cookie)) {
 703                         dmaengine_unmap_put(um);
 704                         result("submit error", total_tests, src_off,
 705                                dst_off, len, ret);
 706                         msleep(100);
 707                         failed_tests++;
 708                         continue;
 709                 }
 710                 dma_async_issue_pending(chan);
 711
 712                 wait_event_freezable_timeout(thread->done_wait, done->done,
 713                                              msecs_to_jiffies(params->timeout));
 714
 715                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 716
 717                 if (!done->done) {
 718                         dmaengine_unmap_put(um);
 719                         result("test timed out", total_tests, src_off, dst_off,
 720                                len, 0);
 721                         failed_tests++;
 722                         continue;
 723                 } else if (status != DMA_COMPLETE) {
 724                         dmaengine_unmap_put(um);
 725                         result(status == DMA_ERROR ?
 726                                "completion error status" :
 727                                "completion busy status", total_tests, src_off,
 728                                dst_off, len, ret);
 729                         failed_tests++;
 730                         continue;
 731                 }
 732
 733                 dmaengine_unmap_put(um);
 734
 735                 if (params->noverify) {
 736                         verbose_result("test passed", total_tests, src_off,
 737                                        dst_off, len, 0);
 738                         continue;
 739                 }
 740
 741                 start = ktime_get();
 742                 pr_debug("%s: verifying source buffer...\n", current->comm);
 743                 error_count = dmatest_verify(thread->srcs, 0, src_off,
 744                                 0, PATTERN_SRC, true, is_memset);
 745                 error_count += dmatest_verify(thread->srcs, src_off,
 746                                 src_off + len, src_off,
 747                                 PATTERN_SRC | PATTERN_COPY, true, is_memset);
 748                 error_count += dmatest_verify(thread->srcs, src_off + len,
 749                                 params->buf_size, src_off + len,
 750                                 PATTERN_SRC, true, is_memset);
 751
 752                 pr_debug("%s: verifying dest buffer...\n", current->comm);
 753                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 754                                 0, PATTERN_DST, false, is_memset);
 755
 756                 error_count += dmatest_verify(thread->dsts, dst_off,
 757                                 dst_off + len, src_off,
 758                                 PATTERN_SRC | PATTERN_COPY, false, is_memset);
 759
 760                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 761                                 params->buf_size, dst_off + len,
 762                                 PATTERN_DST, false, is_memset);
 763
 764                 diff = ktime_sub(ktime_get(), start);
 765                 comparetime = ktime_add(comparetime, diff);
 766
 767                 if (error_count) {
 768                         result("data error", total_tests, src_off, dst_off,
 769                                len, error_count);
 770                         failed_tests++;
 771                 } else {
 772                         verbose_result("test passed", total_tests, src_off,
 773                                        dst_off, len, 0);
 774                 }
 775         }
 776         ktime = ktime_sub(ktime_get(), ktime);
 777         ktime = ktime_sub(ktime, comparetime);
 778         ktime = ktime_sub(ktime, filltime);
 779         runtime = ktime_to_us(ktime);
 780
 781         ret = 0;
 782 err_dstbuf:
 783         for (i = 0; thread->udsts[i]; i++)
 784                 kfree(thread->udsts[i]);
 785         kfree(thread->udsts);
 786 err_udsts:
 787         kfree(thread->dsts);
 788 err_dsts:
 789 err_srcbuf:
 790         for (i = 0; thread->usrcs[i]; i++)
 791                 kfree(thread->usrcs[i]);
 792         kfree(thread->usrcs);
 793 err_usrcs:
 794         kfree(thread->srcs);
 795 err_srcs:
 796         kfree(pq_coefs);
 797 err_thread_type:
 798         pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
 799                 current->comm, total_tests, failed_tests,
 800                 dmatest_persec(runtime, total_tests),
 801                 dmatest_KBs(runtime, total_len), ret);
 802
 803         /* terminate all transfers on specified channels */
 804         if (ret || failed_tests)
 805                 dmaengine_terminate_all(chan);
 806
 807         thread->done = true;
 808         wake_up(&thread_wait);
 809
 810         return ret;
 811 }
 812
 813 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 814 {
 815         struct dmatest_thread   *thread;
 816         struct dmatest_thread   *_thread;
 817         int                     ret;
 818
 819         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 820                 ret = kthread_stop(thread->task);
 821                 pr_debug("thread %s exited with status %d\n",
 822                          thread->task->comm, ret);
 823                 list_del(&thread->node);
 824                 put_task_struct(thread->task);
 825                 kfree(thread);
 826         }
 827
 828         /* terminate all transfers on specified channels */
 829         dmaengine_terminate_all(dtc->chan);
 830
 831         kfree(dtc);
 832 }
 833
 834 static int dmatest_add_threads(struct dmatest_info *info,
 835                 struct dmatest_chan *dtc, enum dma_transaction_type type)
 836 {
 837         struct dmatest_params *params = &info->params;
 838         struct dmatest_thread *thread;
 839         struct dma_chan *chan = dtc->chan;
 840         char *op;
 841         unsigned int i;
 842
 843         if (type == DMA_MEMCPY)
 844                 op = "copy";
 845         else if (type == DMA_MEMSET)
 846                 op = "set";
 847         else if (type == DMA_XOR)
 848                 op = "xor";
 849         else if (type == DMA_PQ)
 850                 op = "pq";
 851         else
 852                 return -EINVAL;
 853
 854         for (i = 0; i < params->threads_per_chan; i++) {
 855                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 856                 if (!thread) {
 857                         pr_warn("No memory for %s-%s%u\n",
 858                                 dma_chan_name(chan), op, i);
 859                         break;
 860                 }
 861                 thread->info = info;
 862                 thread->chan = dtc->chan;
 863                 thread->type = type;
 864                 thread->test_done.wait = &thread->done_wait;
 865                 init_waitqueue_head(&thread->done_wait);
 866                 smp_wmb();
 867                 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
 868                                 dma_chan_name(chan), op, i);
 869                 if (IS_ERR(thread->task)) {
 870                         pr_warn("Failed to create thread %s-%s%u\n",
 871                                 dma_chan_name(chan), op, i);
 872                         kfree(thread);
 873                         break;
 874                 }
 875
 876                 /* srcbuf and dstbuf are allocated by the thread itself */
 877                 get_task_struct(thread->task);
 878                 list_add_tail(&thread->node, &dtc->threads);
 879                 wake_up_process(thread->task);
 880         }
 881
 882         return i;
 883 }
 884
 885 static int dmatest_add_channel(struct dmatest_info *info,
 886                 struct dma_chan *chan)
 887 {
 888         struct dmatest_chan     *dtc;
 889         struct dma_device       *dma_dev = chan->device;
 890         unsigned int            thread_count = 0;
 891         int cnt;
 892
 893         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 894         if (!dtc) {
 895                 pr_warn("No memory for %s\n", dma_chan_name(chan));
 896                 return -ENOMEM;
 897         }
 898
 899         dtc->chan = chan;
 900         INIT_LIST_HEAD(&dtc->threads);
 901
 902         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 903                 if (dmatest == 0) {
 904                         cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
 905                         thread_count += cnt > 0 ? cnt : 0;
 906                 }
 907         }
 908
 909         if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) {
 910                 if (dmatest == 1) {
 911                         cnt = dmatest_add_threads(info, dtc, DMA_MEMSET);
 912                         thread_count += cnt > 0 ? cnt : 0;
 913                 }
 914         }
 915
 916         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 917                 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
 918                 thread_count += cnt > 0 ? cnt : 0;
 919         }
 920         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 921                 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
 922                 thread_count += cnt > 0 ? cnt : 0;
 923         }
 924
 925         pr_info("Started %u threads using %s\n",
 926                 thread_count, dma_chan_name(chan));
 927
 928         list_add_tail(&dtc->node, &info->channels);
 929         info->nr_channels++;
 930
 931         return 0;
 932 }
 933
 934 static bool filter(struct dma_chan *chan, void *param)
 935 {
 936         struct dmatest_params *params = param;
 937
 938         if (!dmatest_match_channel(params, chan) ||
 939             !dmatest_match_device(params, chan->device))
 940                 return false;
 941         else
 942                 return true;
 943 }
 944
 945 static void request_channels(struct dmatest_info *info,
 946                              enum dma_transaction_type type)
 947 {
 948         dma_cap_mask_t mask;
 949
 950         dma_cap_zero(mask);
 951         dma_cap_set(type, mask);
 952         for (;;) {
 953                 struct dmatest_params *params = &info->params;
 954                 struct dma_chan *chan;
 955
 956                 chan = dma_request_channel(mask, filter, params);
 957                 if (chan) {
 958                         if (dmatest_add_channel(info, chan)) {
 959                                 dma_release_channel(chan);
 960                                 break; /* add_channel failed, punt */
 961                         }
 962                 } else
 963                         break; /* no more channels available */
 964                 if (params->max_channels &&
 965                     info->nr_channels >= params->max_channels)
 966                         break; /* we have all we need */
 967         }
 968 }
 969
 970 static void run_threaded_test(struct dmatest_info *info)
 971 {
 972         struct dmatest_params *params = &info->params;
 973
 974         /* Copy test parameters */
 975         params->buf_size = test_buf_size;
 976         strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
 977         strlcpy(params->device, strim(test_device), sizeof(params->device));
 978         params->threads_per_chan = threads_per_chan;
 979         params->max_channels = max_channels;
 980         params->iterations = iterations;
 981         params->xor_sources = xor_sources;
 982         params->pq_sources = pq_sources;
 983         params->timeout = timeout;
 984         params->noverify = noverify;
 985         params->norandom = norandom;
 986
 987         request_channels(info, DMA_MEMCPY);
 988         request_channels(info, DMA_MEMSET);
 989         request_channels(info, DMA_XOR);
 990         request_channels(info, DMA_PQ);
 991 }
 992
 993 static void stop_threaded_test(struct dmatest_info *info)
 994 {
 995         struct dmatest_chan *dtc, *_dtc;
 996         struct dma_chan *chan;
 997
 998         list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
 999                 list_del(&dtc->node);
1000                 chan = dtc->chan;
1001                 dmatest_cleanup_channel(dtc);
1002                 pr_debug("dropped channel %s\n", dma_chan_name(chan));
1003                 dma_release_channel(chan);
1004         }
1005
1006         info->nr_channels = 0;
1007 }
1008
1009 static void restart_threaded_test(struct dmatest_info *info, bool run)
1010 {
1011         /* we might be called early to set run=, defer running until all
1012          * parameters have been evaluated
1013          */
1014         if (!info->did_init)
1015                 return;
1016
1017         /* Stop any running test first */
1018         stop_threaded_test(info);
1019
1020         /* Run test with new parameters */
1021         run_threaded_test(info);
1022 }
1023
1024 static int dmatest_run_get(char *val, const struct kernel_param *kp)
1025 {
1026         struct dmatest_info *info = &test_info;
1027
1028         mutex_lock(&info->lock);
1029         if (is_threaded_test_run(info)) {
1030                 dmatest_run = true;
1031         } else {
1032                 stop_threaded_test(info);
1033                 dmatest_run = false;
1034         }
1035         mutex_unlock(&info->lock);
1036
1037         return param_get_bool(val, kp);
1038 }
1039
1040 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1041 {
1042         struct dmatest_info *info = &test_info;
1043         int ret;
1044
1045         mutex_lock(&info->lock);
1046         ret = param_set_bool(val, kp);
1047         if (ret) {
1048                 mutex_unlock(&info->lock);
1049                 return ret;
1050         }
1051
1052         if (is_threaded_test_run(info))
1053                 ret = -EBUSY;
1054         else if (dmatest_run)
1055                 restart_threaded_test(info, dmatest_run);
1056
1057         mutex_unlock(&info->lock);
1058
1059         return ret;
1060 }
1061
1062 static int __init dmatest_init(void)
1063 {
1064         struct dmatest_info *info = &test_info;
1065         struct dmatest_params *params = &info->params;
1066
1067         if (dmatest_run) {
1068                 mutex_lock(&info->lock);
1069                 run_threaded_test(info);
1070                 mutex_unlock(&info->lock);
1071         }
1072
1073         if (params->iterations && wait)
1074                 wait_event(thread_wait, !is_threaded_test_run(info));
1075
1076         /* module parameters are stable, inittime tests are started,
1077          * let userspace take over 'run' control
1078          */
1079         info->did_init = true;
1080
1081         return 0;
1082 }
1083 /* when compiled-in wait for drivers to load first */
1084 late_initcall(dmatest_init);
1085
1086 static void __exit dmatest_exit(void)
1087 {
1088         struct dmatest_info *info = &test_info;
1089
1090         mutex_lock(&info->lock);
1091         stop_threaded_test(info);
1092         mutex_unlock(&info->lock);
1093 }
1094 module_exit(dmatest_exit);
1095
1096 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1097 MODULE_LICENSE("GPL v2");