2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2013 Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dmaengine.h>
16 #include <linux/freezer.h>
17 #include <linux/init.h>
18 #include <linux/kthread.h>
19 #include <linux/sched/task.h>
20 #include <linux/module.h>
21 #include <linux/moduleparam.h>
22 #include <linux/random.h>
23 #include <linux/slab.h>
24 #include <linux/wait.h>
26 static unsigned int test_buf_size = 16384;
27 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
28 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
30 static char test_device[32];
31 module_param_string(device, test_device, sizeof(test_device),
33 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
35 static unsigned int threads_per_chan = 1;
36 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
37 MODULE_PARM_DESC(threads_per_chan,
38 "Number of threads to start per channel (default: 1)");
40 static unsigned int max_channels;
41 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
42 MODULE_PARM_DESC(max_channels,
43 "Maximum number of channels to use (default: all)");
45 static unsigned int iterations;
46 module_param(iterations, uint, S_IRUGO | S_IWUSR);
47 MODULE_PARM_DESC(iterations,
48 "Iterations before stopping test (default: infinite)");
50 static unsigned int dmatest;
51 module_param(dmatest, uint, S_IRUGO | S_IWUSR);
52 MODULE_PARM_DESC(dmatest,
53 "dmatest 0-memcpy 1-memset (default: 0)");
55 static unsigned int xor_sources = 3;
56 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
57 MODULE_PARM_DESC(xor_sources,
58 "Number of xor source buffers (default: 3)");
60 static unsigned int pq_sources = 3;
61 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
62 MODULE_PARM_DESC(pq_sources,
63 "Number of p+q source buffers (default: 3)");
65 static int timeout = 3000;
66 module_param(timeout, uint, S_IRUGO | S_IWUSR);
67 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
68 "Pass -1 for infinite timeout");
71 module_param(noverify, bool, S_IRUGO | S_IWUSR);
72 MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)");
75 module_param(norandom, bool, 0644);
76 MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)");
79 module_param(verbose, bool, S_IRUGO | S_IWUSR);
80 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
82 static int alignment = -1;
83 module_param(alignment, int, 0644);
84 MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not used (-1))");
86 static unsigned int transfer_size;
87 module_param(transfer_size, uint, 0644);
88 MODULE_PARM_DESC(transfer_size, "Optional custom transfer size in bytes (default: not used (0))");
91 * struct dmatest_params - test parameters.
92 * @buf_size: size of the memcpy test buffer
93 * @channel: bus ID of the channel to test
94 * @device: bus ID of the DMA Engine to test
95 * @threads_per_chan: number of threads to start per channel
96 * @max_channels: maximum number of channels to use
97 * @iterations: iterations before stopping test
98 * @xor_sources: number of xor source buffers
99 * @pq_sources: number of p+q source buffers
100 * @timeout: transfer timeout in msec, -1 for infinite timeout
102 struct dmatest_params {
103 unsigned int buf_size;
106 unsigned int threads_per_chan;
107 unsigned int max_channels;
108 unsigned int iterations;
109 unsigned int xor_sources;
110 unsigned int pq_sources;
115 unsigned int transfer_size;
119 * struct dmatest_info - test information.
120 * @params: test parameters
121 * @lock: access protection to the fields of this structure
123 static struct dmatest_info {
124 /* Test parameters */
125 struct dmatest_params params;
128 struct list_head channels;
129 unsigned int nr_channels;
133 .channels = LIST_HEAD_INIT(test_info.channels),
134 .lock = __MUTEX_INITIALIZER(test_info.lock),
137 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
138 static int dmatest_run_get(char *val, const struct kernel_param *kp);
139 static const struct kernel_param_ops run_ops = {
140 .set = dmatest_run_set,
141 .get = dmatest_run_get,
143 static bool dmatest_run;
144 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
145 MODULE_PARM_DESC(run, "Run the test (default: false)");
147 static int dmatest_chan_set(const char *val, const struct kernel_param *kp);
148 static int dmatest_chan_get(char *val, const struct kernel_param *kp);
149 static const struct kernel_param_ops multi_chan_ops = {
150 .set = dmatest_chan_set,
151 .get = dmatest_chan_get,
154 static char test_channel[20];
155 static struct kparam_string newchan_kps = {
156 .string = test_channel,
159 module_param_cb(channel, &multi_chan_ops, &newchan_kps, 0644);
160 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
162 static int dmatest_test_list_get(char *val, const struct kernel_param *kp);
163 static const struct kernel_param_ops test_list_ops = {
164 .get = dmatest_test_list_get,
166 module_param_cb(test_list, &test_list_ops, NULL, 0444);
167 MODULE_PARM_DESC(test_list, "Print current test list");
169 /* Maximum amount of mismatched bytes in buffer to print */
170 #define MAX_ERROR_COUNT 32
173 * Initialization patterns. All bytes in the source buffer has bit 7
174 * set, all bytes in the destination buffer has bit 7 cleared.
176 * Bit 6 is set for all bytes which are to be copied by the DMA
177 * engine. Bit 5 is set for all bytes which are to be overwritten by
180 * The remaining bits are the inverse of a counter which increments by
181 * one for each byte address.
183 #define PATTERN_SRC 0x80
184 #define PATTERN_DST 0x00
185 #define PATTERN_COPY 0x40
186 #define PATTERN_OVERWRITE 0x20
187 #define PATTERN_COUNT_MASK 0x1f
188 #define PATTERN_MEMSET_IDX 0x01
190 /* Fixed point arithmetic ops */
191 #define FIXPT_SHIFT 8
192 #define FIXPNT_MASK 0xFF
193 #define FIXPT_TO_INT(a) ((a) >> FIXPT_SHIFT)
194 #define INT_TO_FIXPT(a) ((a) << FIXPT_SHIFT)
195 #define FIXPT_GET_FRAC(a) ((((a) & FIXPNT_MASK) * 100) >> FIXPT_SHIFT)
197 /* poor man's completion - we want to use wait_event_freezable() on it */
198 struct dmatest_done {
200 wait_queue_head_t *wait;
203 struct dmatest_thread {
204 struct list_head node;
205 struct dmatest_info *info;
206 struct task_struct *task;
207 struct dma_chan *chan;
212 enum dma_transaction_type type;
213 wait_queue_head_t done_wait;
214 struct dmatest_done test_done;
219 struct dmatest_chan {
220 struct list_head node;
221 struct dma_chan *chan;
222 struct list_head threads;
225 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
228 static bool is_threaded_test_run(struct dmatest_info *info)
230 struct dmatest_chan *dtc;
232 list_for_each_entry(dtc, &info->channels, node) {
233 struct dmatest_thread *thread;
235 list_for_each_entry(thread, &dtc->threads, node) {
244 static bool is_threaded_test_pending(struct dmatest_info *info)
246 struct dmatest_chan *dtc;
248 list_for_each_entry(dtc, &info->channels, node) {
249 struct dmatest_thread *thread;
251 list_for_each_entry(thread, &dtc->threads, node) {
260 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
262 struct dmatest_info *info = &test_info;
263 struct dmatest_params *params = &info->params;
265 if (params->iterations)
266 wait_event(thread_wait, !is_threaded_test_run(info));
268 return param_get_bool(val, kp);
271 static const struct kernel_param_ops wait_ops = {
272 .get = dmatest_wait_get,
273 .set = param_set_bool,
275 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
276 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
278 static bool dmatest_match_channel(struct dmatest_params *params,
279 struct dma_chan *chan)
281 if (params->channel[0] == '\0')
283 return strcmp(dma_chan_name(chan), params->channel) == 0;
286 static bool dmatest_match_device(struct dmatest_params *params,
287 struct dma_device *device)
289 if (params->device[0] == '\0')
291 return strcmp(dev_name(device->dev), params->device) == 0;
294 static unsigned long dmatest_random(void)
298 prandom_bytes(&buf, sizeof(buf));
302 static inline u8 gen_inv_idx(u8 index, bool is_memset)
304 u8 val = is_memset ? PATTERN_MEMSET_IDX : index;
306 return ~val & PATTERN_COUNT_MASK;
309 static inline u8 gen_src_value(u8 index, bool is_memset)
311 return PATTERN_SRC | gen_inv_idx(index, is_memset);
314 static inline u8 gen_dst_value(u8 index, bool is_memset)
316 return PATTERN_DST | gen_inv_idx(index, is_memset);
319 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
320 unsigned int buf_size, bool is_memset)
325 for (; (buf = *bufs); bufs++) {
326 for (i = 0; i < start; i++)
327 buf[i] = gen_src_value(i, is_memset);
328 for ( ; i < start + len; i++)
329 buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY;
330 for ( ; i < buf_size; i++)
331 buf[i] = gen_src_value(i, is_memset);
336 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
337 unsigned int buf_size, bool is_memset)
342 for (; (buf = *bufs); bufs++) {
343 for (i = 0; i < start; i++)
344 buf[i] = gen_dst_value(i, is_memset);
345 for ( ; i < start + len; i++)
346 buf[i] = gen_dst_value(i, is_memset) |
348 for ( ; i < buf_size; i++)
349 buf[i] = gen_dst_value(i, is_memset);
353 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
354 unsigned int counter, bool is_srcbuf, bool is_memset)
356 u8 diff = actual ^ pattern;
357 u8 expected = pattern | gen_inv_idx(counter, is_memset);
358 const char *thread_name = current->comm;
361 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
362 thread_name, index, expected, actual);
363 else if ((pattern & PATTERN_COPY)
364 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
365 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
366 thread_name, index, expected, actual);
367 else if (diff & PATTERN_SRC)
368 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
369 thread_name, index, expected, actual);
371 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
372 thread_name, index, expected, actual);
375 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
376 unsigned int end, unsigned int counter, u8 pattern,
377 bool is_srcbuf, bool is_memset)
380 unsigned int error_count = 0;
384 unsigned int counter_orig = counter;
386 for (; (buf = *bufs); bufs++) {
387 counter = counter_orig;
388 for (i = start; i < end; i++) {
390 expected = pattern | gen_inv_idx(counter, is_memset);
391 if (actual != expected) {
392 if (error_count < MAX_ERROR_COUNT)
393 dmatest_mismatch(actual, pattern, i,
402 if (error_count > MAX_ERROR_COUNT)
403 pr_warn("%s: %u errors suppressed\n",
404 current->comm, error_count - MAX_ERROR_COUNT);
410 static void dmatest_callback(void *arg)
412 struct dmatest_done *done = arg;
413 struct dmatest_thread *thread =
414 container_of(done, struct dmatest_thread, test_done);
417 wake_up_all(done->wait);
420 * If thread->done, it means that this callback occurred
421 * after the parent thread has cleaned up. This can
422 * happen in the case that driver doesn't implement
423 * the terminate_all() functionality and a dma operation
424 * did not occur within the timeout period
426 WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
430 static unsigned int min_odd(unsigned int x, unsigned int y)
432 unsigned int val = min(x, y);
434 return val % 2 ? val : val - 1;
437 static void result(const char *err, unsigned int n, unsigned int src_off,
438 unsigned int dst_off, unsigned int len, unsigned long data)
440 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
441 current->comm, n, err, src_off, dst_off, len, data);
444 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
445 unsigned int dst_off, unsigned int len,
448 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
449 current->comm, n, err, src_off, dst_off, len, data);
452 #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
454 result(err, n, src_off, dst_off, len, data); \
456 dbg_result(err, n, src_off, dst_off, len, data);\
459 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
461 unsigned long long per_sec = 1000000;
466 /* drop precision until runtime is 32-bits */
467 while (runtime > UINT_MAX) {
473 per_sec = INT_TO_FIXPT(per_sec);
474 do_div(per_sec, runtime);
479 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
481 return FIXPT_TO_INT(dmatest_persec(runtime, len >> 10));
485 * This function repeatedly tests DMA transfers of various lengths and
486 * offsets for a given operation type until it is told to exit by
487 * kthread_stop(). There may be multiple threads running this function
488 * in parallel for a single channel, and there may be multiple channels
489 * being tested in parallel.
491 * Before each test, the source and destination buffer is initialized
492 * with a known pattern. This pattern is different depending on
493 * whether it's in an area which is supposed to be copied or
494 * overwritten, and different in the source and destination buffers.
495 * So if the DMA engine doesn't copy exactly what we tell it to copy,
498 static int dmatest_func(void *data)
500 struct dmatest_thread *thread = data;
501 struct dmatest_done *done = &thread->test_done;
502 struct dmatest_info *info;
503 struct dmatest_params *params;
504 struct dma_chan *chan;
505 struct dma_device *dev;
506 unsigned int error_count;
507 unsigned int failed_tests = 0;
508 unsigned int total_tests = 0;
510 enum dma_status status;
511 enum dma_ctrl_flags flags;
517 ktime_t ktime, start, diff;
518 ktime_t filltime = 0;
519 ktime_t comparetime = 0;
521 unsigned long long total_len = 0;
522 unsigned long long iops = 0;
524 bool is_memset = false;
533 thread->pending = false;
535 params = &info->params;
538 if (thread->type == DMA_MEMCPY) {
539 align = params->alignment < 0 ? dev->copy_align :
541 src_cnt = dst_cnt = 1;
542 } else if (thread->type == DMA_MEMSET) {
543 align = params->alignment < 0 ? dev->fill_align :
545 src_cnt = dst_cnt = 1;
547 } else if (thread->type == DMA_XOR) {
548 /* force odd to ensure dst = src */
549 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
551 align = params->alignment < 0 ? dev->xor_align :
553 } else if (thread->type == DMA_PQ) {
554 /* force odd to ensure dst = src */
555 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
557 align = params->alignment < 0 ? dev->pq_align :
560 pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
562 goto err_thread_type;
564 for (i = 0; i < src_cnt; i++)
567 goto err_thread_type;
569 /* Check if buffer count fits into map count variable (u8) */
570 if ((src_cnt + dst_cnt) >= 255) {
571 pr_err("too many buffers (%d of 255 supported)\n",
576 if (1 << align > params->buf_size) {
577 pr_err("%u-byte buffer too small for %d-byte alignment\n",
578 params->buf_size, 1 << align);
582 thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
586 thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
590 for (i = 0; i < src_cnt; i++) {
591 thread->usrcs[i] = kmalloc(params->buf_size + align,
593 if (!thread->usrcs[i])
596 /* align srcs to alignment restriction */
598 thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align);
600 thread->srcs[i] = thread->usrcs[i];
602 thread->srcs[i] = NULL;
604 thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
608 thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
612 for (i = 0; i < dst_cnt; i++) {
613 thread->udsts[i] = kmalloc(params->buf_size + align,
615 if (!thread->udsts[i])
618 /* align dsts to alignment restriction */
620 thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align);
622 thread->dsts[i] = thread->udsts[i];
624 thread->dsts[i] = NULL;
626 set_user_nice(current, 10);
628 srcs = kcalloc(src_cnt, sizeof(dma_addr_t), GFP_KERNEL);
632 dma_pq = kcalloc(dst_cnt, sizeof(dma_addr_t), GFP_KERNEL);
637 * src and dst buffers are freed by ourselves below
639 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
642 while (!kthread_should_stop()
643 && !(params->iterations && total_tests >= params->iterations)) {
644 struct dma_async_tx_descriptor *tx = NULL;
645 struct dmaengine_unmap_data *um;
647 unsigned int src_off, dst_off, len;
651 if (params->transfer_size) {
652 if (params->transfer_size >= params->buf_size) {
653 pr_err("%u-byte transfer size must be lower than %u-buffer size\n",
654 params->transfer_size, params->buf_size);
657 len = params->transfer_size;
658 } else if (params->norandom) {
659 len = params->buf_size;
661 len = dmatest_random() % params->buf_size + 1;
664 /* Do not alter transfer size explicitly defined by user */
665 if (!params->transfer_size) {
666 len = (len >> align) << align;
672 if (params->norandom) {
676 src_off = dmatest_random() % (params->buf_size - len + 1);
677 dst_off = dmatest_random() % (params->buf_size - len + 1);
679 src_off = (src_off >> align) << align;
680 dst_off = (dst_off >> align) << align;
683 if (!params->noverify) {
685 dmatest_init_srcs(thread->srcs, src_off, len,
686 params->buf_size, is_memset);
687 dmatest_init_dsts(thread->dsts, dst_off, len,
688 params->buf_size, is_memset);
690 diff = ktime_sub(ktime_get(), start);
691 filltime = ktime_add(filltime, diff);
694 um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt,
698 result("unmap data NULL", total_tests,
699 src_off, dst_off, len, ret);
703 um->len = params->buf_size;
704 for (i = 0; i < src_cnt; i++) {
705 void *buf = thread->srcs[i];
706 struct page *pg = virt_to_page(buf);
707 unsigned long pg_off = offset_in_page(buf);
709 um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
710 um->len, DMA_TO_DEVICE);
711 srcs[i] = um->addr[i] + src_off;
712 ret = dma_mapping_error(dev->dev, um->addr[i]);
714 result("src mapping error", total_tests,
715 src_off, dst_off, len, ret);
716 goto error_unmap_continue;
720 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
721 dsts = &um->addr[src_cnt];
722 for (i = 0; i < dst_cnt; i++) {
723 void *buf = thread->dsts[i];
724 struct page *pg = virt_to_page(buf);
725 unsigned long pg_off = offset_in_page(buf);
727 dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
729 ret = dma_mapping_error(dev->dev, dsts[i]);
731 result("dst mapping error", total_tests,
732 src_off, dst_off, len, ret);
733 goto error_unmap_continue;
738 if (thread->type == DMA_MEMCPY)
739 tx = dev->device_prep_dma_memcpy(chan,
741 srcs[0], len, flags);
742 else if (thread->type == DMA_MEMSET)
743 tx = dev->device_prep_dma_memset(chan,
745 *(thread->srcs[0] + src_off),
747 else if (thread->type == DMA_XOR)
748 tx = dev->device_prep_dma_xor(chan,
752 else if (thread->type == DMA_PQ) {
753 for (i = 0; i < dst_cnt; i++)
754 dma_pq[i] = dsts[i] + dst_off;
755 tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
761 result("prep error", total_tests, src_off,
764 goto error_unmap_continue;
768 tx->callback = dmatest_callback;
769 tx->callback_param = done;
770 cookie = tx->tx_submit(tx);
772 if (dma_submit_error(cookie)) {
773 result("submit error", total_tests, src_off,
776 goto error_unmap_continue;
778 dma_async_issue_pending(chan);
780 wait_event_freezable_timeout(thread->done_wait, done->done,
781 msecs_to_jiffies(params->timeout));
783 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
786 result("test timed out", total_tests, src_off, dst_off,
788 goto error_unmap_continue;
789 } else if (status != DMA_COMPLETE) {
790 result(status == DMA_ERROR ?
791 "completion error status" :
792 "completion busy status", total_tests, src_off,
794 goto error_unmap_continue;
797 dmaengine_unmap_put(um);
799 if (params->noverify) {
800 verbose_result("test passed", total_tests, src_off,
806 pr_debug("%s: verifying source buffer...\n", current->comm);
807 error_count = dmatest_verify(thread->srcs, 0, src_off,
808 0, PATTERN_SRC, true, is_memset);
809 error_count += dmatest_verify(thread->srcs, src_off,
810 src_off + len, src_off,
811 PATTERN_SRC | PATTERN_COPY, true, is_memset);
812 error_count += dmatest_verify(thread->srcs, src_off + len,
813 params->buf_size, src_off + len,
814 PATTERN_SRC, true, is_memset);
816 pr_debug("%s: verifying dest buffer...\n", current->comm);
817 error_count += dmatest_verify(thread->dsts, 0, dst_off,
818 0, PATTERN_DST, false, is_memset);
820 error_count += dmatest_verify(thread->dsts, dst_off,
821 dst_off + len, src_off,
822 PATTERN_SRC | PATTERN_COPY, false, is_memset);
824 error_count += dmatest_verify(thread->dsts, dst_off + len,
825 params->buf_size, dst_off + len,
826 PATTERN_DST, false, is_memset);
828 diff = ktime_sub(ktime_get(), start);
829 comparetime = ktime_add(comparetime, diff);
832 result("data error", total_tests, src_off, dst_off,
836 verbose_result("test passed", total_tests, src_off,
842 error_unmap_continue:
843 dmaengine_unmap_put(um);
846 ktime = ktime_sub(ktime_get(), ktime);
847 ktime = ktime_sub(ktime, comparetime);
848 ktime = ktime_sub(ktime, filltime);
849 runtime = ktime_to_us(ktime);
856 for (i = 0; thread->udsts[i]; i++)
857 kfree(thread->udsts[i]);
858 kfree(thread->udsts);
863 for (i = 0; thread->usrcs[i]; i++)
864 kfree(thread->usrcs[i]);
865 kfree(thread->usrcs);
871 iops = dmatest_persec(runtime, total_tests);
872 pr_info("%s: summary %u tests, %u failures %llu.%02llu iops %llu KB/s (%d)\n",
873 current->comm, total_tests, failed_tests,
874 FIXPT_TO_INT(iops), FIXPT_GET_FRAC(iops),
875 dmatest_KBs(runtime, total_len), ret);
877 /* terminate all transfers on specified channels */
878 if (ret || failed_tests)
879 dmaengine_terminate_sync(chan);
882 wake_up(&thread_wait);
887 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
889 struct dmatest_thread *thread;
890 struct dmatest_thread *_thread;
893 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
894 ret = kthread_stop(thread->task);
895 pr_debug("thread %s exited with status %d\n",
896 thread->task->comm, ret);
897 list_del(&thread->node);
898 put_task_struct(thread->task);
902 /* terminate all transfers on specified channels */
903 dmaengine_terminate_sync(dtc->chan);
908 static int dmatest_add_threads(struct dmatest_info *info,
909 struct dmatest_chan *dtc, enum dma_transaction_type type)
911 struct dmatest_params *params = &info->params;
912 struct dmatest_thread *thread;
913 struct dma_chan *chan = dtc->chan;
917 if (type == DMA_MEMCPY)
919 else if (type == DMA_MEMSET)
921 else if (type == DMA_XOR)
923 else if (type == DMA_PQ)
928 for (i = 0; i < params->threads_per_chan; i++) {
929 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
931 pr_warn("No memory for %s-%s%u\n",
932 dma_chan_name(chan), op, i);
936 thread->chan = dtc->chan;
938 thread->test_done.wait = &thread->done_wait;
939 init_waitqueue_head(&thread->done_wait);
941 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
942 dma_chan_name(chan), op, i);
943 if (IS_ERR(thread->task)) {
944 pr_warn("Failed to create thread %s-%s%u\n",
945 dma_chan_name(chan), op, i);
950 /* srcbuf and dstbuf are allocated by the thread itself */
951 get_task_struct(thread->task);
952 list_add_tail(&thread->node, &dtc->threads);
953 thread->pending = true;
959 static int dmatest_add_channel(struct dmatest_info *info,
960 struct dma_chan *chan)
962 struct dmatest_chan *dtc;
963 struct dma_device *dma_dev = chan->device;
964 unsigned int thread_count = 0;
967 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
969 pr_warn("No memory for %s\n", dma_chan_name(chan));
974 INIT_LIST_HEAD(&dtc->threads);
976 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
978 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
979 thread_count += cnt > 0 ? cnt : 0;
983 if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) {
985 cnt = dmatest_add_threads(info, dtc, DMA_MEMSET);
986 thread_count += cnt > 0 ? cnt : 0;
990 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
991 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
992 thread_count += cnt > 0 ? cnt : 0;
994 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
995 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
996 thread_count += cnt > 0 ? cnt : 0;
999 pr_info("Added %u threads using %s\n",
1000 thread_count, dma_chan_name(chan));
1002 list_add_tail(&dtc->node, &info->channels);
1003 info->nr_channels++;
1008 static bool filter(struct dma_chan *chan, void *param)
1010 struct dmatest_params *params = param;
1012 if (!dmatest_match_channel(params, chan) ||
1013 !dmatest_match_device(params, chan->device))
1019 static void request_channels(struct dmatest_info *info,
1020 enum dma_transaction_type type)
1022 dma_cap_mask_t mask;
1025 dma_cap_set(type, mask);
1027 struct dmatest_params *params = &info->params;
1028 struct dma_chan *chan;
1030 chan = dma_request_channel(mask, filter, params);
1032 if (dmatest_add_channel(info, chan)) {
1033 dma_release_channel(chan);
1034 break; /* add_channel failed, punt */
1037 break; /* no more channels available */
1038 if (params->max_channels &&
1039 info->nr_channels >= params->max_channels)
1040 break; /* we have all we need */
1044 static void add_threaded_test(struct dmatest_info *info)
1046 struct dmatest_params *params = &info->params;
1048 /* Copy test parameters */
1049 params->buf_size = test_buf_size;
1050 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
1051 strlcpy(params->device, strim(test_device), sizeof(params->device));
1052 params->threads_per_chan = threads_per_chan;
1053 params->max_channels = max_channels;
1054 params->iterations = iterations;
1055 params->xor_sources = xor_sources;
1056 params->pq_sources = pq_sources;
1057 params->timeout = timeout;
1058 params->noverify = noverify;
1059 params->norandom = norandom;
1060 params->alignment = alignment;
1061 params->transfer_size = transfer_size;
1063 request_channels(info, DMA_MEMCPY);
1064 request_channels(info, DMA_MEMSET);
1065 request_channels(info, DMA_XOR);
1066 request_channels(info, DMA_PQ);
1069 static void run_pending_tests(struct dmatest_info *info)
1071 struct dmatest_chan *dtc;
1072 unsigned int thread_count = 0;
1074 list_for_each_entry(dtc, &info->channels, node) {
1075 struct dmatest_thread *thread;
1078 list_for_each_entry(thread, &dtc->threads, node) {
1079 wake_up_process(thread->task);
1082 pr_info("Started %u threads using %s\n",
1083 thread_count, dma_chan_name(dtc->chan));
1087 static void stop_threaded_test(struct dmatest_info *info)
1089 struct dmatest_chan *dtc, *_dtc;
1090 struct dma_chan *chan;
1092 list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
1093 list_del(&dtc->node);
1095 dmatest_cleanup_channel(dtc);
1096 pr_debug("dropped channel %s\n", dma_chan_name(chan));
1097 dma_release_channel(chan);
1100 info->nr_channels = 0;
1103 static void start_threaded_tests(struct dmatest_info *info)
1105 /* we might be called early to set run=, defer running until all
1106 * parameters have been evaluated
1108 if (!info->did_init)
1111 run_pending_tests(info);
1114 static int dmatest_run_get(char *val, const struct kernel_param *kp)
1116 struct dmatest_info *info = &test_info;
1118 mutex_lock(&info->lock);
1119 if (is_threaded_test_run(info)) {
1122 if (!is_threaded_test_pending(info))
1123 stop_threaded_test(info);
1124 dmatest_run = false;
1126 mutex_unlock(&info->lock);
1128 return param_get_bool(val, kp);
1131 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1133 struct dmatest_info *info = &test_info;
1136 mutex_lock(&info->lock);
1137 ret = param_set_bool(val, kp);
1139 mutex_unlock(&info->lock);
1141 } else if (dmatest_run) {
1142 if (is_threaded_test_pending(info))
1143 start_threaded_tests(info);
1145 pr_info("Could not start test, no channels configured\n");
1147 stop_threaded_test(info);
1150 mutex_unlock(&info->lock);
1155 static int dmatest_chan_set(const char *val, const struct kernel_param *kp)
1157 struct dmatest_info *info = &test_info;
1158 struct dmatest_chan *dtc;
1159 char chan_reset_val[20];
1162 mutex_lock(&info->lock);
1163 ret = param_set_copystring(val, kp);
1165 mutex_unlock(&info->lock);
1168 /*Clear any previously run threads */
1169 if (!is_threaded_test_run(info) && !is_threaded_test_pending(info))
1170 stop_threaded_test(info);
1171 /* Reject channels that are already registered */
1172 if (is_threaded_test_pending(info)) {
1173 list_for_each_entry(dtc, &info->channels, node) {
1174 if (strcmp(dma_chan_name(dtc->chan),
1175 strim(test_channel)) == 0) {
1176 dtc = list_last_entry(&info->channels,
1177 struct dmatest_chan,
1179 strlcpy(chan_reset_val,
1180 dma_chan_name(dtc->chan),
1181 sizeof(chan_reset_val));
1188 add_threaded_test(info);
1190 /* Check if channel was added successfully */
1191 dtc = list_last_entry(&info->channels, struct dmatest_chan, node);
1195 * if new channel was not successfully added, revert the
1196 * "test_channel" string to the name of the last successfully
1197 * added channel. exception for when users issues empty string
1198 * to channel parameter.
1200 if ((strcmp(dma_chan_name(dtc->chan), strim(test_channel)) != 0)
1201 && (strcmp("", strim(test_channel)) != 0)) {
1203 strlcpy(chan_reset_val, dma_chan_name(dtc->chan),
1204 sizeof(chan_reset_val));
1209 /* Clear test_channel if no channels were added successfully */
1210 strlcpy(chan_reset_val, "", sizeof(chan_reset_val));
1215 mutex_unlock(&info->lock);
1220 param_set_copystring(chan_reset_val, kp);
1221 mutex_unlock(&info->lock);
1226 static int dmatest_chan_get(char *val, const struct kernel_param *kp)
1228 struct dmatest_info *info = &test_info;
1230 mutex_lock(&info->lock);
1231 if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) {
1232 stop_threaded_test(info);
1233 strlcpy(test_channel, "", sizeof(test_channel));
1235 mutex_unlock(&info->lock);
1237 return param_get_string(val, kp);
1240 static int dmatest_test_list_get(char *val, const struct kernel_param *kp)
1242 struct dmatest_info *info = &test_info;
1243 struct dmatest_chan *dtc;
1244 unsigned int thread_count = 0;
1246 list_for_each_entry(dtc, &info->channels, node) {
1247 struct dmatest_thread *thread;
1250 list_for_each_entry(thread, &dtc->threads, node) {
1253 pr_info("%u threads using %s\n",
1254 thread_count, dma_chan_name(dtc->chan));
1260 static int __init dmatest_init(void)
1262 struct dmatest_info *info = &test_info;
1263 struct dmatest_params *params = &info->params;
1266 mutex_lock(&info->lock);
1267 add_threaded_test(info);
1268 run_pending_tests(info);
1269 mutex_unlock(&info->lock);
1272 if (params->iterations && wait)
1273 wait_event(thread_wait, !is_threaded_test_run(info));
1275 /* module parameters are stable, inittime tests are started,
1276 * let userspace take over 'run' control
1278 info->did_init = true;
1282 /* when compiled-in wait for drivers to load first */
1283 late_initcall(dmatest_init);
1285 static void __exit dmatest_exit(void)
1287 struct dmatest_info *info = &test_info;
1289 mutex_lock(&info->lock);
1290 stop_threaded_test(info);
1291 mutex_unlock(&info->lock);
1293 module_exit(dmatest_exit);
1295 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1296 MODULE_LICENSE("GPL v2");