1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Apple ADMAC support"
90 depends on ARCH_APPLE || COMPILE_TEST
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
97 tristate "Arm DMA-350 support"
98 depends on ARM || ARM64 || COMPILE_TEST
100 select DMA_VIRTUAL_CHANNELS
102 Enable support for the Arm DMA-350 controller.
105 tristate "Atmel AHB DMA support"
108 select DMA_VIRTUAL_CHANNELS
110 Support the Atmel AHB DMA controller.
113 tristate "Atmel XDMA support"
117 Support the Atmel XDMA controller.
120 tristate "Analog Devices AXI-DMAC DMA support"
121 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
123 select DMA_VIRTUAL_CHANNELS
126 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
127 controller is often used in Analog Devices' reference designs for FPGA
131 tristate "Broadcom SBA RAID engine support"
132 depends on ARM64 || COMPILE_TEST
133 depends on MAILBOX && RAID6_PQ
135 select DMA_ENGINE_RAID
136 select ASYNC_TX_DISABLE_XOR_VAL_DMA
137 select ASYNC_TX_DISABLE_PQ_VAL_DMA
138 default m if ARCH_BCM_IPROC
140 Enable support for Broadcom SBA RAID Engine. The SBA RAID
141 engine is available on most of the Broadcom iProc SoCs. It
142 has the capability to offload memcpy, xor and pq computation
146 tristate "BCM2835 DMA engine support"
147 depends on ARCH_BCM2835
149 select DMA_VIRTUAL_CHANNELS
152 tristate "JZ4780 DMA support"
153 depends on MIPS || COMPILE_TEST
155 select DMA_VIRTUAL_CHANNELS
157 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
158 If you have a board based on such a SoC and wish to use DMA for
159 devices which can use the DMA controller, say Y or M here.
162 tristate "SA-11x0 DMA support"
163 depends on ARCH_SA1100 || COMPILE_TEST
165 select DMA_VIRTUAL_CHANNELS
167 Support the DMA engine found on Intel StrongARM SA-1100 and
168 SA-1110 SoCs. This DMA engine can only be used with on-chip
172 tristate "Allwinner A10 DMA SoCs support"
173 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNIV
174 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNIV)
176 select DMA_VIRTUAL_CHANNELS
178 Enable support for the DMA controller present in the sun4i,
179 sun5i and sun7i Allwinner ARM SoCs.
182 tristate "Allwinner A31 SoCs DMA support"
183 depends on ARCH_SUNXI || COMPILE_TEST
184 depends on RESET_CONTROLLER
186 select DMA_VIRTUAL_CHANNELS
188 Support for the DMA engine first found in Allwinner A31 SoCs.
191 tristate "Synopsys DesignWare AXI DMA support"
195 select DMA_VIRTUAL_CHANNELS
197 Enable support for Synopsys DesignWare AXI DMA controller.
198 NOTE: This driver wasn't tested on 64 bit platform because
199 of lack 64 bit platform with Synopsys DW AXI DMAC.
202 bool "Cirrus Logic EP93xx DMA support"
203 depends on ARCH_EP93XX || COMPILE_TEST
206 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
209 tristate "Freescale Elo series DMA support"
212 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
214 Enable support for the Freescale Elo series DMA controllers.
215 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
216 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
217 some Txxx and Bxxx parts.
220 tristate "Freescale eDMA engine support"
224 select DMA_VIRTUAL_CHANNELS
226 Support the Freescale eDMA engine with programmable channel
227 multiplexing capability for DMA request sources(slot).
228 This module can be found on Freescale Vybrid and LS-1 SoCs.
231 tristate "NXP Layerscape qDMA engine support"
232 depends on ARM || ARM64
234 select DMA_VIRTUAL_CHANNELS
235 select DMA_ENGINE_RAID
236 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
238 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
239 Channel virtualization is supported through enqueuing of DMA jobs to,
240 or dequeuing DMA jobs from, different work queues.
241 This module can be found on NXP Layerscape SoCs.
242 The qdma driver only work on SoCs with a DPAA hardware block.
245 tristate "Freescale RAID engine Support"
246 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
248 select DMA_ENGINE_RAID
250 Enable support for Freescale RAID Engine. RAID Engine is
251 available on some QorIQ SoCs (like P5020/P5040). It has
252 the capability to offload memcpy, xor and pq computation
256 tristate "HiSilicon DMA Engine support"
257 depends on ARCH_HISI || COMPILE_TEST
260 select DMA_VIRTUAL_CHANNELS
262 Support HiSilicon Kunpeng DMA engine.
265 tristate "IMG MDC support"
266 depends on MIPS || COMPILE_TEST
267 depends on MFD_SYSCON
269 select DMA_VIRTUAL_CHANNELS
271 Enable support for the IMG multi-threaded DMA controller (MDC).
274 tristate "i.MX DMA support"
278 Support the i.MX DMA engine. This engine is integrated into
279 Freescale i.MX1/21/27 chips.
282 tristate "i.MX SDMA support"
285 select DMA_VIRTUAL_CHANNELS
287 Support the i.MX SDMA engine. This engine is integrated into
288 Freescale i.MX25/31/35/51/53/6 chips.
291 tristate "Intel integrated DMA 64-bit support"
294 select DMA_VIRTUAL_CHANNELS
296 Enable DMA support for Intel Low Power Subsystem such as found on
299 config INTEL_IDXD_BUS
304 tristate "Intel Data Accelerators support"
305 depends on PCI && X86_64 && !UML
311 Enable support for the Intel(R) data accelerators present
314 Say Y if you have such a platform.
318 config INTEL_IDXD_COMPAT
319 bool "Legacy behavior for idxd driver"
320 depends on PCI && X86_64
321 select INTEL_IDXD_BUS
323 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
324 The old behavior performed driver bind/unbind for device and wq
325 devices all under the dsa driver. The compat driver will emulate
326 the legacy behavior in order to allow existing support apps (i.e.
327 accel-config) to continue function. It is expected that accel-config
328 v3.2 and earlier will need the compat mode. A distro with later
329 accel-config version can disable this compat config.
331 Say Y if you have old applications that require such behavior.
335 # Config symbol that collects all the dependencies that's necessary to
336 # support shared virtual memory for the devices supported by idxd.
337 config INTEL_IDXD_SVM
338 bool "Accelerator Shared Virtual Memory Support"
339 depends on INTEL_IDXD
340 depends on INTEL_IOMMU_SVM
345 config INTEL_IDXD_PERFMON
346 bool "Intel Data Accelerators performance monitor support"
347 depends on INTEL_IDXD
349 Enable performance monitor (pmu) support for the Intel(R)
350 data accelerators present in Intel Xeon CPU. With this
351 enabled, perf can be used to monitor the DSA (Intel Data
352 Streaming Accelerator) events described in the Intel DSA
358 tristate "Intel I/OAT DMA support"
359 depends on PCI && X86_64 && !UML
361 select DMA_ENGINE_RAID
364 Enable support for the Intel(R) I/OAT DMA engine present
365 in recent Intel Xeon chipsets.
367 Say Y here if you have such a chipset.
372 tristate "Hisilicon K3 DMA support"
373 depends on ARCH_HISI || COMPILE_TEST
375 select DMA_VIRTUAL_CHANNELS
377 Support the DMA engine for Hisilicon K3 platform
380 config LOONGSON1_APB_DMA
381 tristate "Loongson1 APB DMA support"
382 depends on MACH_LOONGSON32 || COMPILE_TEST
384 select DMA_VIRTUAL_CHANNELS
386 This selects support for the APB DMA controller in Loongson1 SoCs,
387 which is required by Loongson1 NAND and audio support.
389 config LOONGSON2_APB_DMA
390 tristate "Loongson2 APB DMA support"
391 depends on LOONGARCH || COMPILE_TEST
393 select DMA_VIRTUAL_CHANNELS
395 Support for the Loongson2 APB DMA controller driver. The
396 DMA controller is having single DMA channel which can be
397 configured for different peripherals like audio, nand, sdio
398 etc which is in APB bus.
400 This DMA controller transfers data from memory to peripheral fifo.
401 It does not support memory to memory data transfer.
403 config LPC18XX_DMAMUX
404 bool "NXP LPC18xx/43xx DMA MUX for PL080"
405 depends on ARCH_LPC18XX || COMPILE_TEST
406 depends on OF && AMBA_PL08X
409 Enable support for DMA on NXP LPC18xx/43xx platforms
410 with PL080 and multiplexed DMA request lines.
412 config LPC32XX_DMAMUX
413 bool "NXP LPC32xx DMA MUX for PL080"
414 depends on ARCH_LPC32XX || COMPILE_TEST
415 depends on OF && AMBA_PL08X
418 Support for PL080 multiplexed DMA request lines on
422 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
423 depends on M5441x || (COMPILE_TEST && FSL_EDMA=n)
425 select DMA_VIRTUAL_CHANNELS
427 Support the Freescale ColdFire eDMA engine, 64-channel
428 implementation that performs complex data transfers with
429 minimal intervention from a host processor.
430 This module can be found on Freescale ColdFire mcf5441x SoCs.
432 config MILBEAUT_HDMAC
433 tristate "Milbeaut AHB DMA support"
434 depends on ARCH_MILBEAUT || COMPILE_TEST
437 select DMA_VIRTUAL_CHANNELS
439 Say yes here to support the Socionext Milbeaut
442 config MILBEAUT_XDMAC
443 tristate "Milbeaut AXI DMA support"
444 depends on ARCH_MILBEAUT || COMPILE_TEST
447 select DMA_VIRTUAL_CHANNELS
449 Say yes here to support the Socionext Milbeaut
453 tristate "MMP PDMA support"
454 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
457 Support the MMP PDMA engine for PXA and MMP platform.
460 tristate "MMP Two-Channel DMA support"
461 depends on ARCH_MMP || COMPILE_TEST
463 select GENERIC_ALLOCATOR
465 Support the MMP Two-Channel DMA engine.
466 This engine used for MMP Audio DMA and pxa910 SQU.
469 tristate "MOXART DMA support"
470 depends on ARCH_MOXART
472 select DMA_VIRTUAL_CHANNELS
474 Enable support for the MOXA ART SoC DMA controller.
476 Say Y here if you enabled MMP ADMA, otherwise say N.
479 tristate "Freescale MPC512x built-in DMA engine support"
480 depends on PPC_MPC512x || PPC_MPC831x
483 Enable support for the Freescale MPC512x built-in DMA engine.
486 bool "Marvell XOR engine support"
487 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
489 select DMA_ENGINE_RAID
490 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
492 Enable support for the Marvell XOR engine.
495 bool "Marvell XOR engine version 2 support "
498 select DMA_ENGINE_RAID
499 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
500 select GENERIC_MSI_IRQ
502 Enable support for the Marvell version 2 XOR engine.
504 This engine provides acceleration for copy, XOR and RAID6
505 operations, and is available on Marvell Armada 7K and 8K
509 bool "MXS DMA support"
510 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
514 Support the MXS DMA engine. This engine including APBH-DMA
515 and APBX-DMA is integrated into some Freescale chips.
518 tristate "Renesas Type-AXI NBPF DMA support"
520 depends on ARM || COMPILE_TEST
522 Support for "Type-AXI" NBPF DMA IPs from Renesas
525 tristate "Actions Semi Owl SoCs DMA support"
526 depends on ARCH_ACTIONS
528 select DMA_VIRTUAL_CHANNELS
530 Enable support for the Actions Semi Owl SoCs DMA controller.
533 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
534 depends on PCI && (X86_32 || COMPILE_TEST)
537 Enable support for Intel EG20T PCH DMA engine.
539 This driver also can be used for LAPIS Semiconductor IOH(Input/
540 Output Hub), ML7213, ML7223 and ML7831.
541 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
542 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
543 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
544 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
547 tristate "DMA API Driver for PL330"
551 Select if your platform has one or more PL330 DMACs.
552 You need to provide platform specific settings via
553 platform_data for a dma-pl330 device.
556 bool "PXA DMA support"
557 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
559 select DMA_VIRTUAL_CHANNELS
561 Support the DMA engine for PXA. It is also compatible with MMP PDMA
562 platform. The internal DMA IP of all PXA variants is supported, with
563 16 to 32 channels for peripheral to memory or memory to memory
567 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
571 Some PLX ExpressLane PCI Switches support additional DMA engines.
572 These are exposed via extra functions on the switch's
573 upstream port. Each function exposes one DMA channel.
576 bool "ST-Ericsson DMA40 support"
577 depends on ARCH_U8500
581 Support for ST-Ericsson DMA40 controller
584 tristate "ST FDMA dmaengine support"
586 depends on REMOTEPROC
587 select ST_SLIM_REMOTEPROC
589 select DMA_VIRTUAL_CHANNELS
591 Enable support for ST FDMA controller.
592 It supports 16 independent DMA channels, accepts up to 32 DMA requests
594 Say Y here if you have such a chipset.
598 tristate "Spreadtrum DMA support"
599 depends on ARCH_SPRD || COMPILE_TEST
601 select DMA_VIRTUAL_CHANNELS
603 Enable support for the on-chip DMA controller on Spreadtrum platform.
606 tristate "Toshiba TXx9 SoC DMA support"
607 depends on MACH_TX49XX
610 Support the TXx9 SoC internal DMA controller. This can be
611 integrated in chips such as the Toshiba TX4927/38/39.
613 config TEGRA186_GPC_DMA
614 tristate "NVIDIA Tegra GPC DMA support"
615 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
618 select DMA_VIRTUAL_CHANNELS
620 Support for the NVIDIA Tegra General Purpose Central DMA controller.
621 The DMA controller has multiple DMA channels which can be configured
622 for different peripherals like UART, SPI, etc which are on APB bus.
623 This DMA controller transfers data from memory to peripheral FIFO
624 or vice versa. It also supports memory to memory data transfer.
626 config TEGRA20_APB_DMA
627 tristate "NVIDIA Tegra20 APB DMA support"
628 depends on ARCH_TEGRA || COMPILE_TEST
631 Support for the NVIDIA Tegra20 APB DMA controller driver. The
632 DMA controller is having multiple DMA channel which can be
633 configured for different peripherals like audio, UART, SPI,
634 I2C etc which is in APB bus.
635 This DMA controller transfers data from memory to peripheral fifo
636 or vice versa. It does not support memory to memory data transfer.
639 tristate "NVIDIA Tegra210 ADMA support"
640 depends on (ARCH_TEGRA || COMPILE_TEST)
642 select DMA_VIRTUAL_CHANNELS
644 Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA
645 controller driver. The DMA controller has multiple DMA channels
646 and is used to service various audio clients in the Tegra210
647 audio processing engine (APE). This DMA controller transfers
648 data from memory to peripheral and vice versa. It does not
649 support memory to memory data transfer.
652 tristate "Timberdale FPGA DMA support"
653 depends on MFD_TIMBERDALE || COMPILE_TEST
656 Enable support for the Timberdale FPGA DMA engine.
658 config UNIPHIER_MDMAC
659 tristate "UniPhier MIO DMAC"
660 depends on ARCH_UNIPHIER || COMPILE_TEST
663 select DMA_VIRTUAL_CHANNELS
665 Enable support for the MIO DMAC (Media I/O DMA controller) on the
666 UniPhier platform. This DMA controller is used as the external
667 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
669 config UNIPHIER_XDMAC
670 tristate "UniPhier XDMAC support"
671 depends on ARCH_UNIPHIER || COMPILE_TEST
674 select DMA_VIRTUAL_CHANNELS
676 Enable support for the XDMAC (external DMA controller) on the
677 UniPhier platform. This DMA controller can transfer data from
678 memory to memory, memory to peripheral and peripheral to memory.
681 tristate "APM X-Gene DMA support"
682 depends on ARCH_XGENE || COMPILE_TEST
684 select DMA_ENGINE_RAID
685 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
687 Enable support for the APM X-Gene SoC DMA engine.
690 tristate "Xilinx AXI DMAS Engine"
694 Enable support for Xilinx AXI VDMA Soft IP.
696 AXI VDMA engine provides high-bandwidth direct memory access
697 between memory and AXI4-Stream video type target
698 peripherals including peripherals which support AXI4-
699 Stream Video Protocol. It has two stream interfaces/
700 channels, Memory Mapped to Stream (MM2S) and Stream to
701 Memory Mapped (S2MM) for the data transfers.
702 AXI CDMA engine provides high-bandwidth direct memory access
703 between a memory-mapped source address and a memory-mapped
705 AXI DMA engine provides high-bandwidth one dimensional direct
706 memory access between memory and AXI4-Stream target peripherals.
707 AXI MCDMA engine provides high-bandwidth direct memory access
708 between memory and AXI4-Stream target peripherals. It provides
709 the scatter gather interface with multiple channels independent
710 configuration support.
713 tristate "Xilinx DMA/Bridge Subsystem DMA Engine"
716 select DMA_VIRTUAL_CHANNELS
719 Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA
720 provides high performance block data movement between Host memory
721 and the DMA subsystem. These direct memory transfers can be both in
722 the Host to Card (H2C) and Card to Host (C2H) transfers.
723 The core also provides up to 16 user interrupt wires that generate
724 interrupts to the host.
726 config XILINX_ZYNQMP_DMA
727 tristate "Xilinx ZynqMP DMA Engine"
728 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
731 Enable support for Xilinx ZynqMP DMA controller.
733 config XILINX_ZYNQMP_DPDMA
734 tristate "Xilinx DPDMA Engine"
735 depends on HAS_IOMEM && OF
737 select DMA_VIRTUAL_CHANNELS
739 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
740 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
741 driver provides the dmaengine required by the DisplayPort subsystem
745 source "drivers/dma/amd/Kconfig"
747 source "drivers/dma/bestcomm/Kconfig"
749 source "drivers/dma/mediatek/Kconfig"
751 source "drivers/dma/qcom/Kconfig"
753 source "drivers/dma/dw/Kconfig"
755 source "drivers/dma/dw-edma/Kconfig"
757 source "drivers/dma/hsu/Kconfig"
759 source "drivers/dma/sf-pdma/Kconfig"
761 source "drivers/dma/sh/Kconfig"
763 source "drivers/dma/ti/Kconfig"
765 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
767 source "drivers/dma/lgm/Kconfig"
769 source "drivers/dma/stm32/Kconfig"
772 comment "DMA Clients"
773 depends on DMA_ENGINE
776 bool "Async_tx: Offload support for the async_tx api"
777 depends on DMA_ENGINE
779 This allows the async_tx api to take advantage of offload engines for
780 memcpy, memset, xor, and raid6 p+q operations. If your platform has
781 a dma engine that can perform raid operations and you have enabled
787 tristate "DMA Test client"
788 depends on DMA_ENGINE
789 select DMA_ENGINE_RAID
791 Simple DMA test client. Say N unless you're debugging a
794 config DMA_ENGINE_RAID