1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 Broadcom
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/errno.h>
10 #include <linux/kernel.h>
11 #include <linux/interrupt.h>
12 #include <linux/platform_device.h>
13 #include <linux/scatterlist.h>
14 #include <linux/crypto.h>
15 #include <linux/kthread.h>
16 #include <linux/rtnetlink.h>
17 #include <linux/sched.h>
18 #include <linux/of_address.h>
19 #include <linux/of_device.h>
21 #include <linux/bitops.h>
23 #include <crypto/algapi.h>
24 #include <crypto/aead.h>
25 #include <crypto/internal/aead.h>
26 #include <crypto/aes.h>
27 #include <crypto/internal/des.h>
28 #include <crypto/hmac.h>
29 #include <crypto/sha.h>
30 #include <crypto/md5.h>
31 #include <crypto/authenc.h>
32 #include <crypto/skcipher.h>
33 #include <crypto/hash.h>
34 #include <crypto/sha3.h>
42 /* ================= Device Structure ================== */
44 struct device_private iproc_priv;
46 /* ==================== Parameters ===================== */
48 int flow_debug_logging;
49 module_param(flow_debug_logging, int, 0644);
50 MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
52 int packet_debug_logging;
53 module_param(packet_debug_logging, int, 0644);
54 MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
56 int debug_logging_sleep;
57 module_param(debug_logging_sleep, int, 0644);
58 MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
61 * The value of these module parameters is used to set the priority for each
62 * algo type when this driver registers algos with the kernel crypto API.
63 * To use a priority other than the default, set the priority in the insmod or
64 * modprobe. Changing the module priority after init time has no effect.
66 * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
67 * algos, but more preferred than generic software algos.
69 static int cipher_pri = 150;
70 module_param(cipher_pri, int, 0644);
71 MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
73 static int hash_pri = 100;
74 module_param(hash_pri, int, 0644);
75 MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
77 static int aead_pri = 150;
78 module_param(aead_pri, int, 0644);
79 MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
81 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
82 * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
88 static char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
90 * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
91 * is set dynamically after reading SPU type from device tree.
93 #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
95 /* min and max time to sleep before retrying when mbox queue is full. usec */
96 #define MBOX_SLEEP_MIN 800
97 #define MBOX_SLEEP_MAX 1000
100 * select_channel() - Select a SPU channel to handle a crypto request. Selects
101 * channel in round robin order.
103 * Return: channel index
105 static u8 select_channel(void)
107 u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
109 return chan_idx % iproc_priv.spu.num_chan;
113 * spu_skcipher_rx_sg_create() - Build up the scatterlist of buffers used to
114 * receive a SPU response message for an skcipher request. Includes buffers to
115 * catch SPU message headers and the response data.
116 * @mssg: mailbox message containing the receive sg
117 * @rctx: crypto request context
118 * @rx_frag_num: number of scatterlist elements required to hold the
119 * SPU response message
120 * @chunksize: Number of bytes of response data expected
121 * @stat_pad_len: Number of bytes required to pad the STAT field to
124 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
125 * when the request completes, whether the request is handled successfully or
133 spu_skcipher_rx_sg_create(struct brcm_message *mssg,
134 struct iproc_reqctx_s *rctx,
136 unsigned int chunksize, u32 stat_pad_len)
138 struct spu_hw *spu = &iproc_priv.spu;
139 struct scatterlist *sg; /* used to build sgs in mbox message */
140 struct iproc_ctx_s *ctx = rctx->ctx;
141 u32 datalen; /* Number of bytes of response data expected */
143 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
149 sg_init_table(sg, rx_frag_num);
150 /* Space for SPU message header */
151 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
153 /* If XTS tweak in payload, add buffer to receive encrypted tweak */
154 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
155 spu->spu_xts_tweak_in_payload())
156 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
159 /* Copy in each dst sg entry from request, up to chunksize */
160 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
161 rctx->dst_nents, chunksize);
162 if (datalen < chunksize) {
163 pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
164 __func__, chunksize, datalen);
168 if (ctx->cipher.alg == CIPHER_ALG_RC4)
169 /* Add buffer to catch 260-byte SUPDT field for RC4 */
170 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
173 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
175 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
176 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
182 * spu_skcipher_tx_sg_create() - Build up the scatterlist of buffers used to
183 * send a SPU request message for an skcipher request. Includes SPU message
184 * headers and the request data.
185 * @mssg: mailbox message containing the transmit sg
186 * @rctx: crypto request context
187 * @tx_frag_num: number of scatterlist elements required to construct the
188 * SPU request message
189 * @chunksize: Number of bytes of request data
190 * @pad_len: Number of pad bytes
192 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
193 * when the request completes, whether the request is handled successfully or
201 spu_skcipher_tx_sg_create(struct brcm_message *mssg,
202 struct iproc_reqctx_s *rctx,
203 u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
205 struct spu_hw *spu = &iproc_priv.spu;
206 struct scatterlist *sg; /* used to build sgs in mbox message */
207 struct iproc_ctx_s *ctx = rctx->ctx;
208 u32 datalen; /* Number of bytes of response data expected */
211 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
213 if (unlikely(!mssg->spu.src))
217 sg_init_table(sg, tx_frag_num);
219 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
220 BCM_HDR_LEN + ctx->spu_req_hdr_len);
222 /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
223 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
224 spu->spu_xts_tweak_in_payload())
225 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
227 /* Copy in each src sg entry from request, up to chunksize */
228 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
229 rctx->src_nents, chunksize);
230 if (unlikely(datalen < chunksize)) {
231 pr_err("%s(): failed to copy src sg to mbox msg",
237 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
239 stat_len = spu->spu_tx_status_len();
241 memset(rctx->msg_buf.tx_stat, 0, stat_len);
242 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
247 static int mailbox_send_message(struct brcm_message *mssg, u32 flags,
252 struct device *dev = &(iproc_priv.pdev->dev);
254 err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg);
255 if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
256 while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
258 * Mailbox queue is full. Since MAY_SLEEP is set, assume
259 * not in atomic context and we can wait and try again.
262 usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
263 err = mbox_send_message(iproc_priv.mbox[chan_idx],
265 atomic_inc(&iproc_priv.mb_no_spc);
269 atomic_inc(&iproc_priv.mb_send_fail);
273 /* Check error returned by mailbox controller */
275 if (unlikely(err < 0)) {
276 dev_err(dev, "message error %d", err);
277 /* Signal txdone for mailbox channel */
280 /* Signal txdone for mailbox channel */
281 mbox_client_txdone(iproc_priv.mbox[chan_idx], err);
286 * handle_skcipher_req() - Submit as much of a block cipher request as fits in
287 * a single SPU request message, starting at the current position in the request
289 * @rctx: Crypto request context
291 * This may be called on the crypto API thread, or, when a request is so large
292 * it must be broken into multiple SPU messages, on the thread used to invoke
293 * the response callback. When requests are broken into multiple SPU
294 * messages, we assume subsequent messages depend on previous results, and
295 * thus always wait for previous results before submitting the next message.
296 * Because requests are submitted in lock step like this, there is no need
297 * to synchronize access to request data structures.
299 * Return: -EINPROGRESS: request has been accepted and result will be returned
301 * Any other value indicates an error
303 static int handle_skcipher_req(struct iproc_reqctx_s *rctx)
305 struct spu_hw *spu = &iproc_priv.spu;
306 struct crypto_async_request *areq = rctx->parent;
307 struct skcipher_request *req =
308 container_of(areq, struct skcipher_request, base);
309 struct iproc_ctx_s *ctx = rctx->ctx;
310 struct spu_cipher_parms cipher_parms;
312 unsigned int chunksize = 0; /* Num bytes of request to submit */
313 int remaining = 0; /* Bytes of request still to process */
314 int chunk_start; /* Beginning of data for current SPU msg */
316 /* IV or ctr value to use in this SPU msg */
317 u8 local_iv_ctr[MAX_IV_SIZE];
318 u32 stat_pad_len; /* num bytes to align status field */
319 u32 pad_len; /* total length of all padding */
320 bool update_key = false;
321 struct brcm_message *mssg; /* mailbox message */
323 /* number of entries in src and dst sg in mailbox message. */
324 u8 rx_frag_num = 2; /* response header and STATUS */
325 u8 tx_frag_num = 1; /* request header */
327 flow_log("%s\n", __func__);
329 cipher_parms.alg = ctx->cipher.alg;
330 cipher_parms.mode = ctx->cipher.mode;
331 cipher_parms.type = ctx->cipher_type;
332 cipher_parms.key_len = ctx->enckeylen;
333 cipher_parms.key_buf = ctx->enckey;
334 cipher_parms.iv_buf = local_iv_ctr;
335 cipher_parms.iv_len = rctx->iv_ctr_len;
337 mssg = &rctx->mb_mssg;
338 chunk_start = rctx->src_sent;
339 remaining = rctx->total_todo - chunk_start;
341 /* determine the chunk we are breaking off and update the indexes */
342 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
343 (remaining > ctx->max_payload))
344 chunksize = ctx->max_payload;
346 chunksize = remaining;
348 rctx->src_sent += chunksize;
349 rctx->total_sent = rctx->src_sent;
351 /* Count number of sg entries to be included in this request */
352 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
353 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
355 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
356 rctx->is_encrypt && chunk_start)
358 * Encrypting non-first first chunk. Copy last block of
359 * previous result to IV for this chunk.
361 sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
363 chunk_start - rctx->iv_ctr_len);
365 if (rctx->iv_ctr_len) {
366 /* get our local copy of the iv */
367 __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
370 /* generate the next IV if possible */
371 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
374 * CBC Decrypt: next IV is the last ciphertext block in
377 sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
379 rctx->src_sent - rctx->iv_ctr_len);
380 } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
382 * The SPU hardware increments the counter once for
383 * each AES block of 16 bytes. So update the counter
384 * for the next chunk, if there is one. Note that for
385 * this chunk, the counter has already been copied to
386 * local_iv_ctr. We can assume a block size of 16,
387 * because we only support CTR mode for AES, not for
388 * any other cipher alg.
390 add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
394 if (ctx->cipher.alg == CIPHER_ALG_RC4) {
398 * for non-first RC4 chunks, use SUPDT from previous
399 * response as key for this chunk.
401 cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
403 cipher_parms.type = CIPHER_TYPE_UPDT;
404 } else if (!rctx->is_encrypt) {
406 * First RC4 chunk. For decrypt, key in pre-built msg
407 * header may have been changed if encrypt required
408 * multiple chunks. So revert the key to the
412 cipher_parms.type = CIPHER_TYPE_INIT;
416 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
417 flow_log("max_payload infinite\n");
419 flow_log("max_payload %u\n", ctx->max_payload);
421 flow_log("sent:%u start:%u remains:%u size:%u\n",
422 rctx->src_sent, chunk_start, remaining, chunksize);
424 /* Copy SPU header template created at setkey time */
425 memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
426 sizeof(rctx->msg_buf.bcm_spu_req_hdr));
429 * Pass SUPDT field as key. Key field in finish() call is only used
430 * when update_key has been set above for RC4. Will be ignored in
433 spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
434 ctx->spu_req_hdr_len, !(rctx->is_encrypt),
435 &cipher_parms, update_key, chunksize);
437 atomic64_add(chunksize, &iproc_priv.bytes_out);
439 stat_pad_len = spu->spu_wordalign_padlen(chunksize);
442 pad_len = stat_pad_len;
445 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
446 0, ctx->auth.alg, ctx->auth.mode,
447 rctx->total_sent, stat_pad_len);
450 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
451 ctx->spu_req_hdr_len);
452 packet_log("payload:\n");
453 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
454 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
457 * Build mailbox message containing SPU request msg and rx buffers
458 * to catch response message
460 memset(mssg, 0, sizeof(*mssg));
461 mssg->type = BRCM_MESSAGE_SPU;
462 mssg->ctx = rctx; /* Will be returned in response */
464 /* Create rx scatterlist to catch result */
465 rx_frag_num += rctx->dst_nents;
467 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
468 spu->spu_xts_tweak_in_payload())
469 rx_frag_num++; /* extra sg to insert tweak */
471 err = spu_skcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
476 /* Create tx scatterlist containing SPU request message */
477 tx_frag_num += rctx->src_nents;
478 if (spu->spu_tx_status_len())
481 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
482 spu->spu_xts_tweak_in_payload())
483 tx_frag_num++; /* extra sg to insert tweak */
485 err = spu_skcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
490 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
491 if (unlikely(err < 0))
498 * handle_skcipher_resp() - Process a block cipher SPU response. Updates the
499 * total received count for the request and updates global stats.
500 * @rctx: Crypto request context
502 static void handle_skcipher_resp(struct iproc_reqctx_s *rctx)
504 struct spu_hw *spu = &iproc_priv.spu;
506 struct crypto_async_request *areq = rctx->parent;
507 struct skcipher_request *req = skcipher_request_cast(areq);
509 struct iproc_ctx_s *ctx = rctx->ctx;
512 /* See how much data was returned */
513 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
516 * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
517 * encrypted tweak ("i") value; we don't count those.
519 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
520 spu->spu_xts_tweak_in_payload() &&
521 (payload_len >= SPU_XTS_TWEAK_SIZE))
522 payload_len -= SPU_XTS_TWEAK_SIZE;
524 atomic64_add(payload_len, &iproc_priv.bytes_in);
526 flow_log("%s() offset: %u, bd_len: %u BD:\n",
527 __func__, rctx->total_received, payload_len);
529 dump_sg(req->dst, rctx->total_received, payload_len);
530 if (ctx->cipher.alg == CIPHER_ALG_RC4)
531 packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
534 rctx->total_received += payload_len;
535 if (rctx->total_received == rctx->total_todo) {
536 atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
538 &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
543 * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
544 * receive a SPU response message for an ahash request.
545 * @mssg: mailbox message containing the receive sg
546 * @rctx: crypto request context
547 * @rx_frag_num: number of scatterlist elements required to hold the
548 * SPU response message
549 * @digestsize: length of hash digest, in bytes
550 * @stat_pad_len: Number of bytes required to pad the STAT field to
553 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
554 * when the request completes, whether the request is handled successfully or
562 spu_ahash_rx_sg_create(struct brcm_message *mssg,
563 struct iproc_reqctx_s *rctx,
564 u8 rx_frag_num, unsigned int digestsize,
567 struct spu_hw *spu = &iproc_priv.spu;
568 struct scatterlist *sg; /* used to build sgs in mbox message */
569 struct iproc_ctx_s *ctx = rctx->ctx;
571 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
577 sg_init_table(sg, rx_frag_num);
578 /* Space for SPU message header */
579 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
581 /* Space for digest */
582 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
585 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
587 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
588 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
593 * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
594 * a SPU request message for an ahash request. Includes SPU message headers and
596 * @mssg: mailbox message containing the transmit sg
597 * @rctx: crypto request context
598 * @tx_frag_num: number of scatterlist elements required to construct the
599 * SPU request message
600 * @spu_hdr_len: length in bytes of SPU message header
601 * @hash_carry_len: Number of bytes of data carried over from previous req
602 * @new_data_len: Number of bytes of new request data
603 * @pad_len: Number of pad bytes
605 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
606 * when the request completes, whether the request is handled successfully or
614 spu_ahash_tx_sg_create(struct brcm_message *mssg,
615 struct iproc_reqctx_s *rctx,
618 unsigned int hash_carry_len,
619 unsigned int new_data_len, u32 pad_len)
621 struct spu_hw *spu = &iproc_priv.spu;
622 struct scatterlist *sg; /* used to build sgs in mbox message */
623 u32 datalen; /* Number of bytes of response data expected */
626 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
632 sg_init_table(sg, tx_frag_num);
634 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
635 BCM_HDR_LEN + spu_hdr_len);
638 sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
641 /* Copy in each src sg entry from request, up to chunksize */
642 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
643 rctx->src_nents, new_data_len);
644 if (datalen < new_data_len) {
645 pr_err("%s(): failed to copy src sg to mbox msg",
652 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
654 stat_len = spu->spu_tx_status_len();
656 memset(rctx->msg_buf.tx_stat, 0, stat_len);
657 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
664 * handle_ahash_req() - Process an asynchronous hash request from the crypto
666 * @rctx: Crypto request context
668 * Builds a SPU request message embedded in a mailbox message and submits the
669 * mailbox message on a selected mailbox channel. The SPU request message is
670 * constructed as a scatterlist, including entries from the crypto API's
671 * src scatterlist to avoid copying the data to be hashed. This function is
672 * called either on the thread from the crypto API, or, in the case that the
673 * crypto API request is too large to fit in a single SPU request message,
674 * on the thread that invokes the receive callback with a response message.
675 * Because some operations require the response from one chunk before the next
676 * chunk can be submitted, we always wait for the response for the previous
677 * chunk before submitting the next chunk. Because requests are submitted in
678 * lock step like this, there is no need to synchronize access to request data
682 * -EINPROGRESS: request has been submitted to SPU and response will be
683 * returned asynchronously
684 * -EAGAIN: non-final request included a small amount of data, which for
685 * efficiency we did not submit to the SPU, but instead stored
686 * to be submitted to the SPU with the next part of the request
687 * other: an error code
689 static int handle_ahash_req(struct iproc_reqctx_s *rctx)
691 struct spu_hw *spu = &iproc_priv.spu;
692 struct crypto_async_request *areq = rctx->parent;
693 struct ahash_request *req = ahash_request_cast(areq);
694 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
695 struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
696 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
697 struct iproc_ctx_s *ctx = rctx->ctx;
699 /* number of bytes still to be hashed in this req */
700 unsigned int nbytes_to_hash = 0;
702 unsigned int chunksize = 0; /* length of hash carry + new data */
704 * length of new data, not from hash carry, to be submitted in
707 unsigned int new_data_len;
709 unsigned int __maybe_unused chunk_start = 0;
710 u32 db_size; /* Length of data field, incl gcm and hash padding */
711 int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
712 u32 data_pad_len = 0; /* length of GCM/CCM padding */
713 u32 stat_pad_len = 0; /* length of padding to align STATUS word */
714 struct brcm_message *mssg; /* mailbox message */
715 struct spu_request_opts req_opts;
716 struct spu_cipher_parms cipher_parms;
717 struct spu_hash_parms hash_parms;
718 struct spu_aead_parms aead_parms;
719 unsigned int local_nbuf;
721 unsigned int digestsize;
725 * number of entries in src and dst sg. Always includes SPU msg header.
726 * rx always includes a buffer to catch digest and STATUS.
731 flow_log("total_todo %u, total_sent %u\n",
732 rctx->total_todo, rctx->total_sent);
734 memset(&req_opts, 0, sizeof(req_opts));
735 memset(&cipher_parms, 0, sizeof(cipher_parms));
736 memset(&hash_parms, 0, sizeof(hash_parms));
737 memset(&aead_parms, 0, sizeof(aead_parms));
739 req_opts.bd_suppress = true;
740 hash_parms.alg = ctx->auth.alg;
741 hash_parms.mode = ctx->auth.mode;
742 hash_parms.type = HASH_TYPE_NONE;
743 hash_parms.key_buf = (u8 *)ctx->authkey;
744 hash_parms.key_len = ctx->authkeylen;
747 * For hash algorithms below assignment looks bit odd but
748 * it's needed for AES-XCBC and AES-CMAC hash algorithms
749 * to differentiate between 128, 192, 256 bit key values.
750 * Based on the key values, hash algorithm is selected.
751 * For example for 128 bit key, hash algorithm is AES-128.
753 cipher_parms.type = ctx->cipher_type;
755 mssg = &rctx->mb_mssg;
756 chunk_start = rctx->src_sent;
759 * Compute the amount remaining to hash. This may include data
760 * carried over from previous requests.
762 nbytes_to_hash = rctx->total_todo - rctx->total_sent;
763 chunksize = nbytes_to_hash;
764 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
765 (chunksize > ctx->max_payload))
766 chunksize = ctx->max_payload;
769 * If this is not a final request and the request data is not a multiple
770 * of a full block, then simply park the extra data and prefix it to the
771 * data for the next request.
773 if (!rctx->is_final) {
774 u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
775 u16 new_len; /* len of data to add to hash carry */
777 rem = chunksize % blocksize; /* remainder */
779 /* chunksize not a multiple of blocksize */
781 if (chunksize == 0) {
782 /* Don't have a full block to submit to hw */
783 new_len = rem - rctx->hash_carry_len;
784 sg_copy_part_to_buf(req->src, dest, new_len,
786 rctx->hash_carry_len = rem;
787 flow_log("Exiting with hash carry len: %u\n",
788 rctx->hash_carry_len);
789 packet_dump(" buf: ",
791 rctx->hash_carry_len);
797 /* if we have hash carry, then prefix it to the data in this request */
798 local_nbuf = rctx->hash_carry_len;
799 rctx->hash_carry_len = 0;
802 new_data_len = chunksize - local_nbuf;
804 /* Count number of sg entries to be used in this request */
805 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
808 /* AES hashing keeps key size in type field, so need to copy it here */
809 if (hash_parms.alg == HASH_ALG_AES)
810 hash_parms.type = (enum hash_type)cipher_parms.type;
812 hash_parms.type = spu->spu_hash_type(rctx->total_sent);
814 digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
816 hash_parms.digestsize = digestsize;
818 /* update the indexes */
819 rctx->total_sent += chunksize;
820 /* if you sent a prebuf then that wasn't from this req->src */
821 rctx->src_sent += new_data_len;
823 if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
824 hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
830 * If a non-first chunk, then include the digest returned from the
831 * previous chunk so that hw can add to it (except for AES types).
833 if ((hash_parms.type == HASH_TYPE_UPDT) &&
834 (hash_parms.alg != HASH_ALG_AES)) {
835 hash_parms.key_buf = rctx->incr_hash;
836 hash_parms.key_len = digestsize;
839 atomic64_add(chunksize, &iproc_priv.bytes_out);
841 flow_log("%s() final: %u nbuf: %u ",
842 __func__, rctx->is_final, local_nbuf);
844 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
845 flow_log("max_payload infinite\n");
847 flow_log("max_payload %u\n", ctx->max_payload);
849 flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
851 /* Prepend SPU header with type 3 BCM header */
852 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
854 hash_parms.prebuf_len = local_nbuf;
855 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
857 &req_opts, &cipher_parms,
858 &hash_parms, &aead_parms,
861 if (spu_hdr_len == 0) {
862 pr_err("Failed to create SPU request header\n");
867 * Determine total length of padding required. Put all padding in one
870 data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
871 db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
872 0, 0, hash_parms.pad_len);
873 if (spu->spu_tx_status_len())
874 stat_pad_len = spu->spu_wordalign_padlen(db_size);
877 pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
880 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
881 hash_parms.pad_len, ctx->auth.alg,
882 ctx->auth.mode, rctx->total_sent,
886 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
888 packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
890 dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
891 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
894 * Build mailbox message containing SPU request msg and rx buffers
895 * to catch response message
897 memset(mssg, 0, sizeof(*mssg));
898 mssg->type = BRCM_MESSAGE_SPU;
899 mssg->ctx = rctx; /* Will be returned in response */
901 /* Create rx scatterlist to catch result */
902 err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
907 /* Create tx scatterlist containing SPU request message */
908 tx_frag_num += rctx->src_nents;
909 if (spu->spu_tx_status_len())
911 err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
912 local_nbuf, new_data_len, pad_len);
916 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
917 if (unlikely(err < 0))
924 * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
925 * for an HMAC request.
926 * @req: The HMAC request from the crypto API
927 * @ctx: The session context
929 * Return: 0 if synchronous hash operation successful
930 * -EINVAL if the hash algo is unrecognized
931 * any other value indicates an error
933 static int spu_hmac_outer_hash(struct ahash_request *req,
934 struct iproc_ctx_s *ctx)
936 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
937 unsigned int blocksize =
938 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
941 switch (ctx->auth.alg) {
943 rc = do_shash("md5", req->result, ctx->opad, blocksize,
944 req->result, ctx->digestsize, NULL, 0);
947 rc = do_shash("sha1", req->result, ctx->opad, blocksize,
948 req->result, ctx->digestsize, NULL, 0);
950 case HASH_ALG_SHA224:
951 rc = do_shash("sha224", req->result, ctx->opad, blocksize,
952 req->result, ctx->digestsize, NULL, 0);
954 case HASH_ALG_SHA256:
955 rc = do_shash("sha256", req->result, ctx->opad, blocksize,
956 req->result, ctx->digestsize, NULL, 0);
958 case HASH_ALG_SHA384:
959 rc = do_shash("sha384", req->result, ctx->opad, blocksize,
960 req->result, ctx->digestsize, NULL, 0);
962 case HASH_ALG_SHA512:
963 rc = do_shash("sha512", req->result, ctx->opad, blocksize,
964 req->result, ctx->digestsize, NULL, 0);
967 pr_err("%s() Error : unknown hmac type\n", __func__);
974 * ahash_req_done() - Process a hash result from the SPU hardware.
975 * @rctx: Crypto request context
977 * Return: 0 if successful
980 static int ahash_req_done(struct iproc_reqctx_s *rctx)
982 struct spu_hw *spu = &iproc_priv.spu;
983 struct crypto_async_request *areq = rctx->parent;
984 struct ahash_request *req = ahash_request_cast(areq);
985 struct iproc_ctx_s *ctx = rctx->ctx;
988 memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
990 if (spu->spu_type == SPU_TYPE_SPUM) {
991 /* byte swap the output from the UPDT function to network byte
994 if (ctx->auth.alg == HASH_ALG_MD5) {
995 __swab32s((u32 *)req->result);
996 __swab32s(((u32 *)req->result) + 1);
997 __swab32s(((u32 *)req->result) + 2);
998 __swab32s(((u32 *)req->result) + 3);
999 __swab32s(((u32 *)req->result) + 4);
1003 flow_dump(" digest ", req->result, ctx->digestsize);
1005 /* if this an HMAC then do the outer hash */
1006 if (rctx->is_sw_hmac) {
1007 err = spu_hmac_outer_hash(req, ctx);
1010 flow_dump(" hmac: ", req->result, ctx->digestsize);
1013 if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
1014 atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
1015 atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
1017 atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
1018 atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
1025 * handle_ahash_resp() - Process a SPU response message for a hash request.
1026 * Checks if the entire crypto API request has been processed, and if so,
1027 * invokes post processing on the result.
1028 * @rctx: Crypto request context
1030 static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
1032 struct iproc_ctx_s *ctx = rctx->ctx;
1034 struct crypto_async_request *areq = rctx->parent;
1035 struct ahash_request *req = ahash_request_cast(areq);
1036 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
1037 unsigned int blocksize =
1038 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
1041 * Save hash to use as input to next op if incremental. Might be copying
1042 * too much, but that's easier than figuring out actual digest size here
1044 memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
1046 flow_log("%s() blocksize:%u digestsize:%u\n",
1047 __func__, blocksize, ctx->digestsize);
1049 atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
1051 if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
1052 ahash_req_done(rctx);
1056 * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
1057 * a SPU response message for an AEAD request. Includes buffers to catch SPU
1058 * message headers and the response data.
1059 * @mssg: mailbox message containing the receive sg
1060 * @rctx: crypto request context
1061 * @rx_frag_num: number of scatterlist elements required to hold the
1062 * SPU response message
1063 * @assoc_len: Length of associated data included in the crypto request
1064 * @ret_iv_len: Length of IV returned in response
1065 * @resp_len: Number of bytes of response data expected to be written to
1066 * dst buffer from crypto API
1067 * @digestsize: Length of hash digest, in bytes
1068 * @stat_pad_len: Number of bytes required to pad the STAT field to
1071 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1072 * when the request completes, whether the request is handled successfully or
1073 * there is an error.
1079 static int spu_aead_rx_sg_create(struct brcm_message *mssg,
1080 struct aead_request *req,
1081 struct iproc_reqctx_s *rctx,
1083 unsigned int assoc_len,
1084 u32 ret_iv_len, unsigned int resp_len,
1085 unsigned int digestsize, u32 stat_pad_len)
1087 struct spu_hw *spu = &iproc_priv.spu;
1088 struct scatterlist *sg; /* used to build sgs in mbox message */
1089 struct iproc_ctx_s *ctx = rctx->ctx;
1090 u32 datalen; /* Number of bytes of response data expected */
1094 if (ctx->is_rfc4543) {
1095 /* RFC4543: only pad after data, not after AAD */
1096 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1097 assoc_len + resp_len);
1098 assoc_buf_len = assoc_len;
1100 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1102 assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
1103 assoc_len, ret_iv_len,
1107 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1108 /* ICV (after data) must be in the next 32-bit word for CCM */
1109 data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
1114 /* have to catch gcm pad in separate buffer */
1117 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
1123 sg_init_table(sg, rx_frag_num);
1125 /* Space for SPU message header */
1126 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
1128 if (assoc_buf_len) {
1130 * Don't write directly to req->dst, because SPU may pad the
1131 * assoc data in the response
1133 memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
1134 sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
1139 * Copy in each dst sg entry from request, up to chunksize.
1140 * dst sg catches just the data. digest caught in separate buf.
1142 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
1143 rctx->dst_nents, resp_len);
1144 if (datalen < (resp_len)) {
1145 pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
1146 __func__, resp_len, datalen);
1151 /* If GCM/CCM data is padded, catch padding in separate buffer */
1153 memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
1154 sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
1157 /* Always catch ICV in separate buffer */
1158 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
1160 flow_log("stat_pad_len %u\n", stat_pad_len);
1162 memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
1163 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
1166 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
1167 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
1173 * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
1174 * SPU request message for an AEAD request. Includes SPU message headers and the
1176 * @mssg: mailbox message containing the transmit sg
1177 * @rctx: crypto request context
1178 * @tx_frag_num: number of scatterlist elements required to construct the
1179 * SPU request message
1180 * @spu_hdr_len: length of SPU message header in bytes
1181 * @assoc: crypto API associated data scatterlist
1182 * @assoc_len: length of associated data
1183 * @assoc_nents: number of scatterlist entries containing assoc data
1184 * @aead_iv_len: length of AEAD IV, if included
1185 * @chunksize: Number of bytes of request data
1186 * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
1187 * @pad_len: Number of pad bytes
1188 * @incl_icv: If true, write separate ICV buffer after data and
1191 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1192 * when the request completes, whether the request is handled successfully or
1193 * there is an error.
1199 static int spu_aead_tx_sg_create(struct brcm_message *mssg,
1200 struct iproc_reqctx_s *rctx,
1203 struct scatterlist *assoc,
1204 unsigned int assoc_len,
1206 unsigned int aead_iv_len,
1207 unsigned int chunksize,
1208 u32 aad_pad_len, u32 pad_len, bool incl_icv)
1210 struct spu_hw *spu = &iproc_priv.spu;
1211 struct scatterlist *sg; /* used to build sgs in mbox message */
1212 struct scatterlist *assoc_sg = assoc;
1213 struct iproc_ctx_s *ctx = rctx->ctx;
1214 u32 datalen; /* Number of bytes of data to write */
1215 u32 written; /* Number of bytes of data written */
1216 u32 assoc_offset = 0;
1219 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
1225 sg_init_table(sg, tx_frag_num);
1227 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
1228 BCM_HDR_LEN + spu_hdr_len);
1231 /* Copy in each associated data sg entry from request */
1232 written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
1233 assoc_nents, assoc_len);
1234 if (written < assoc_len) {
1235 pr_err("%s(): failed to copy assoc sg to mbox msg",
1242 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
1245 memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
1246 sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
1249 datalen = chunksize;
1250 if ((chunksize > ctx->digestsize) && incl_icv)
1251 datalen -= ctx->digestsize;
1253 /* For aead, a single msg should consume the entire src sg */
1254 written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
1255 rctx->src_nents, datalen);
1256 if (written < datalen) {
1257 pr_err("%s(): failed to copy src sg to mbox msg",
1264 memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
1265 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
1269 sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
1271 stat_len = spu->spu_tx_status_len();
1273 memset(rctx->msg_buf.tx_stat, 0, stat_len);
1274 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
1280 * handle_aead_req() - Submit a SPU request message for the next chunk of the
1281 * current AEAD request.
1282 * @rctx: Crypto request context
1284 * Unlike other operation types, we assume the length of the request fits in
1285 * a single SPU request message. aead_enqueue() makes sure this is true.
1286 * Comments for other op types regarding threads applies here as well.
1288 * Unlike incremental hash ops, where the spu returns the entire hash for
1289 * truncated algs like sha-224, the SPU returns just the truncated hash in
1290 * response to aead requests. So digestsize is always ctx->digestsize here.
1292 * Return: -EINPROGRESS: crypto request has been accepted and result will be
1293 * returned asynchronously
1294 * Any other value indicates an error
1296 static int handle_aead_req(struct iproc_reqctx_s *rctx)
1298 struct spu_hw *spu = &iproc_priv.spu;
1299 struct crypto_async_request *areq = rctx->parent;
1300 struct aead_request *req = container_of(areq,
1301 struct aead_request, base);
1302 struct iproc_ctx_s *ctx = rctx->ctx;
1304 unsigned int chunksize;
1305 unsigned int resp_len;
1310 struct brcm_message *mssg; /* mailbox message */
1311 struct spu_request_opts req_opts;
1312 struct spu_cipher_parms cipher_parms;
1313 struct spu_hash_parms hash_parms;
1314 struct spu_aead_parms aead_parms;
1315 int assoc_nents = 0;
1316 bool incl_icv = false;
1317 unsigned int digestsize = ctx->digestsize;
1319 /* number of entries in src and dst sg. Always includes SPU msg header.
1321 u8 rx_frag_num = 2; /* and STATUS */
1324 /* doing the whole thing at once */
1325 chunksize = rctx->total_todo;
1327 flow_log("%s: chunksize %u\n", __func__, chunksize);
1329 memset(&req_opts, 0, sizeof(req_opts));
1330 memset(&hash_parms, 0, sizeof(hash_parms));
1331 memset(&aead_parms, 0, sizeof(aead_parms));
1333 req_opts.is_inbound = !(rctx->is_encrypt);
1334 req_opts.auth_first = ctx->auth_first;
1335 req_opts.is_aead = true;
1336 req_opts.is_esp = ctx->is_esp;
1338 cipher_parms.alg = ctx->cipher.alg;
1339 cipher_parms.mode = ctx->cipher.mode;
1340 cipher_parms.type = ctx->cipher_type;
1341 cipher_parms.key_buf = ctx->enckey;
1342 cipher_parms.key_len = ctx->enckeylen;
1343 cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
1344 cipher_parms.iv_len = rctx->iv_ctr_len;
1346 hash_parms.alg = ctx->auth.alg;
1347 hash_parms.mode = ctx->auth.mode;
1348 hash_parms.type = HASH_TYPE_NONE;
1349 hash_parms.key_buf = (u8 *)ctx->authkey;
1350 hash_parms.key_len = ctx->authkeylen;
1351 hash_parms.digestsize = digestsize;
1353 if ((ctx->auth.alg == HASH_ALG_SHA224) &&
1354 (ctx->authkeylen < SHA224_DIGEST_SIZE))
1355 hash_parms.key_len = SHA224_DIGEST_SIZE;
1357 aead_parms.assoc_size = req->assoclen;
1358 if (ctx->is_esp && !ctx->is_rfc4543) {
1360 * 8-byte IV is included assoc data in request. SPU2
1361 * expects AAD to include just SPI and seqno. So
1362 * subtract off the IV len.
1364 aead_parms.assoc_size -= GCM_RFC4106_IV_SIZE;
1366 if (rctx->is_encrypt) {
1367 aead_parms.return_iv = true;
1368 aead_parms.ret_iv_len = GCM_RFC4106_IV_SIZE;
1369 aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
1372 aead_parms.ret_iv_len = 0;
1376 * Count number of sg entries from the crypto API request that are to
1377 * be included in this mailbox message. For dst sg, don't count space
1378 * for digest. Digest gets caught in a separate buffer and copied back
1379 * to dst sg when processing response.
1381 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
1382 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
1383 if (aead_parms.assoc_size)
1384 assoc_nents = spu_sg_count(rctx->assoc, 0,
1385 aead_parms.assoc_size);
1387 mssg = &rctx->mb_mssg;
1389 rctx->total_sent = chunksize;
1390 rctx->src_sent = chunksize;
1391 if (spu->spu_assoc_resp_len(ctx->cipher.mode,
1392 aead_parms.assoc_size,
1393 aead_parms.ret_iv_len,
1397 aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
1400 if (ctx->auth.alg == HASH_ALG_AES)
1401 hash_parms.type = (enum hash_type)ctx->cipher_type;
1403 /* General case AAD padding (CCM and RFC4543 special cases below) */
1404 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1405 aead_parms.assoc_size);
1407 /* General case data padding (CCM decrypt special case below) */
1408 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1411 if (ctx->cipher.mode == CIPHER_MODE_CCM) {
1413 * for CCM, AAD len + 2 (rather than AAD len) needs to be
1416 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
1418 aead_parms.assoc_size + 2);
1421 * And when decrypting CCM, need to pad without including
1422 * size of ICV which is tacked on to end of chunk
1424 if (!rctx->is_encrypt)
1425 aead_parms.data_pad_len =
1426 spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1427 chunksize - digestsize);
1429 /* CCM also requires software to rewrite portions of IV: */
1430 spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
1431 chunksize, rctx->is_encrypt,
1435 if (ctx->is_rfc4543) {
1437 * RFC4543: data is included in AAD, so don't pad after AAD
1438 * and pad data based on both AAD + data size
1440 aead_parms.aad_pad_len = 0;
1441 if (!rctx->is_encrypt)
1442 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1444 aead_parms.assoc_size + chunksize -
1447 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1449 aead_parms.assoc_size + chunksize);
1451 req_opts.is_rfc4543 = true;
1454 if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
1457 /* Copy ICV from end of src scatterlist to digest buf */
1458 sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
1459 req->assoclen + rctx->total_sent -
1463 atomic64_add(chunksize, &iproc_priv.bytes_out);
1465 flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
1467 /* Prepend SPU header with type 3 BCM header */
1468 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1470 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
1471 BCM_HDR_LEN, &req_opts,
1472 &cipher_parms, &hash_parms,
1473 &aead_parms, chunksize);
1475 /* Determine total length of padding. Put all padding in one buffer. */
1476 db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
1477 chunksize, aead_parms.aad_pad_len,
1478 aead_parms.data_pad_len, 0);
1480 stat_pad_len = spu->spu_wordalign_padlen(db_size);
1484 pad_len = aead_parms.data_pad_len + stat_pad_len;
1487 spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
1488 aead_parms.data_pad_len, 0,
1489 ctx->auth.alg, ctx->auth.mode,
1490 rctx->total_sent, stat_pad_len);
1493 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
1495 dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
1496 packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
1497 packet_log("BD:\n");
1498 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
1499 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
1502 * Build mailbox message containing SPU request msg and rx buffers
1503 * to catch response message
1505 memset(mssg, 0, sizeof(*mssg));
1506 mssg->type = BRCM_MESSAGE_SPU;
1507 mssg->ctx = rctx; /* Will be returned in response */
1509 /* Create rx scatterlist to catch result */
1510 rx_frag_num += rctx->dst_nents;
1511 resp_len = chunksize;
1514 * Always catch ICV in separate buffer. Have to for GCM/CCM because of
1515 * padding. Have to for SHA-224 and other truncated SHAs because SPU
1516 * sends entire digest back.
1520 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
1521 (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
1523 * Input is ciphertxt plus ICV, but ICV not incl
1526 resp_len -= ctx->digestsize;
1528 /* no rx frags to catch output data */
1529 rx_frag_num -= rctx->dst_nents;
1532 err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
1533 aead_parms.assoc_size,
1534 aead_parms.ret_iv_len, resp_len, digestsize,
1539 /* Create tx scatterlist containing SPU request message */
1540 tx_frag_num += rctx->src_nents;
1541 tx_frag_num += assoc_nents;
1542 if (aead_parms.aad_pad_len)
1544 if (aead_parms.iv_len)
1546 if (spu->spu_tx_status_len())
1548 err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
1549 rctx->assoc, aead_parms.assoc_size,
1550 assoc_nents, aead_parms.iv_len, chunksize,
1551 aead_parms.aad_pad_len, pad_len, incl_icv);
1555 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
1556 if (unlikely(err < 0))
1559 return -EINPROGRESS;
1563 * handle_aead_resp() - Process a SPU response message for an AEAD request.
1564 * @rctx: Crypto request context
1566 static void handle_aead_resp(struct iproc_reqctx_s *rctx)
1568 struct spu_hw *spu = &iproc_priv.spu;
1569 struct crypto_async_request *areq = rctx->parent;
1570 struct aead_request *req = container_of(areq,
1571 struct aead_request, base);
1572 struct iproc_ctx_s *ctx = rctx->ctx;
1574 unsigned int icv_offset;
1577 /* See how much data was returned */
1578 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
1579 flow_log("payload_len %u\n", payload_len);
1581 /* only count payload */
1582 atomic64_add(payload_len, &iproc_priv.bytes_in);
1585 packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
1589 * Copy the ICV back to the destination
1590 * buffer. In decrypt case, SPU gives us back the digest, but crypto
1591 * API doesn't expect ICV in dst buffer.
1593 result_len = req->cryptlen;
1594 if (rctx->is_encrypt) {
1595 icv_offset = req->assoclen + rctx->total_sent;
1596 packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
1597 flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
1598 sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
1599 ctx->digestsize, icv_offset);
1600 result_len += ctx->digestsize;
1603 packet_log("response data: ");
1604 dump_sg(req->dst, req->assoclen, result_len);
1606 atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
1607 if (ctx->cipher.alg == CIPHER_ALG_AES) {
1608 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1609 atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
1610 else if (ctx->cipher.mode == CIPHER_MODE_GCM)
1611 atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
1613 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1615 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1620 * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
1621 * @rctx: request context
1623 * Mailbox scatterlists are allocated for each chunk. So free them after
1624 * processing each chunk.
1626 static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
1628 /* mailbox message used to tx request */
1629 struct brcm_message *mssg = &rctx->mb_mssg;
1631 kfree(mssg->spu.src);
1632 kfree(mssg->spu.dst);
1633 memset(mssg, 0, sizeof(struct brcm_message));
1637 * finish_req() - Used to invoke the complete callback from the requester when
1638 * a request has been handled asynchronously.
1639 * @rctx: Request context
1640 * @err: Indicates whether the request was successful or not
1642 * Ensures that cleanup has been done for request
1644 static void finish_req(struct iproc_reqctx_s *rctx, int err)
1646 struct crypto_async_request *areq = rctx->parent;
1648 flow_log("%s() err:%d\n\n", __func__, err);
1650 /* No harm done if already called */
1651 spu_chunk_cleanup(rctx);
1654 areq->complete(areq, err);
1658 * spu_rx_callback() - Callback from mailbox framework with a SPU response.
1659 * @cl: mailbox client structure for SPU driver
1660 * @msg: mailbox message containing SPU response
1662 static void spu_rx_callback(struct mbox_client *cl, void *msg)
1664 struct spu_hw *spu = &iproc_priv.spu;
1665 struct brcm_message *mssg = msg;
1666 struct iproc_reqctx_s *rctx;
1670 if (unlikely(!rctx)) {
1672 pr_err("%s(): no request context", __func__);
1677 /* process the SPU status */
1678 err = spu->spu_status_process(rctx->msg_buf.rx_stat);
1680 if (err == SPU_INVALID_ICV)
1681 atomic_inc(&iproc_priv.bad_icv);
1686 /* Process the SPU response message */
1687 switch (rctx->ctx->alg->type) {
1688 case CRYPTO_ALG_TYPE_SKCIPHER:
1689 handle_skcipher_resp(rctx);
1691 case CRYPTO_ALG_TYPE_AHASH:
1692 handle_ahash_resp(rctx);
1694 case CRYPTO_ALG_TYPE_AEAD:
1695 handle_aead_resp(rctx);
1703 * If this response does not complete the request, then send the next
1706 if (rctx->total_sent < rctx->total_todo) {
1707 /* Deallocate anything specific to previous chunk */
1708 spu_chunk_cleanup(rctx);
1710 switch (rctx->ctx->alg->type) {
1711 case CRYPTO_ALG_TYPE_SKCIPHER:
1712 err = handle_skcipher_req(rctx);
1714 case CRYPTO_ALG_TYPE_AHASH:
1715 err = handle_ahash_req(rctx);
1718 * we saved data in hash carry, but tell crypto
1719 * API we successfully completed request.
1723 case CRYPTO_ALG_TYPE_AEAD:
1724 err = handle_aead_req(rctx);
1730 if (err == -EINPROGRESS)
1731 /* Successfully submitted request for next chunk */
1736 finish_req(rctx, err);
1739 /* ==================== Kernel Cryptographic API ==================== */
1742 * skcipher_enqueue() - Handle skcipher encrypt or decrypt request.
1743 * @req: Crypto API request
1744 * @encrypt: true if encrypting; false if decrypting
1746 * Return: -EINPROGRESS if request accepted and result will be returned
1750 static int skcipher_enqueue(struct skcipher_request *req, bool encrypt)
1752 struct iproc_reqctx_s *rctx = skcipher_request_ctx(req);
1753 struct iproc_ctx_s *ctx =
1754 crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
1757 flow_log("%s() enc:%u\n", __func__, encrypt);
1759 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1760 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1761 rctx->parent = &req->base;
1762 rctx->is_encrypt = encrypt;
1763 rctx->bd_suppress = false;
1764 rctx->total_todo = req->cryptlen;
1766 rctx->total_sent = 0;
1767 rctx->total_received = 0;
1770 /* Initialize current position in src and dst scatterlists */
1771 rctx->src_sg = req->src;
1772 rctx->src_nents = 0;
1774 rctx->dst_sg = req->dst;
1775 rctx->dst_nents = 0;
1778 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
1779 ctx->cipher.mode == CIPHER_MODE_CTR ||
1780 ctx->cipher.mode == CIPHER_MODE_OFB ||
1781 ctx->cipher.mode == CIPHER_MODE_XTS ||
1782 ctx->cipher.mode == CIPHER_MODE_GCM ||
1783 ctx->cipher.mode == CIPHER_MODE_CCM) {
1785 crypto_skcipher_ivsize(crypto_skcipher_reqtfm(req));
1786 memcpy(rctx->msg_buf.iv_ctr, req->iv, rctx->iv_ctr_len);
1788 rctx->iv_ctr_len = 0;
1791 /* Choose a SPU to process this request */
1792 rctx->chan_idx = select_channel();
1793 err = handle_skcipher_req(rctx);
1794 if (err != -EINPROGRESS)
1795 /* synchronous result */
1796 spu_chunk_cleanup(rctx);
1801 static int des_setkey(struct crypto_skcipher *cipher, const u8 *key,
1802 unsigned int keylen)
1804 struct iproc_ctx_s *ctx = crypto_skcipher_ctx(cipher);
1807 err = verify_skcipher_des_key(cipher, key);
1811 ctx->cipher_type = CIPHER_TYPE_DES;
1815 static int threedes_setkey(struct crypto_skcipher *cipher, const u8 *key,
1816 unsigned int keylen)
1818 struct iproc_ctx_s *ctx = crypto_skcipher_ctx(cipher);
1821 err = verify_skcipher_des3_key(cipher, key);
1825 ctx->cipher_type = CIPHER_TYPE_3DES;
1829 static int aes_setkey(struct crypto_skcipher *cipher, const u8 *key,
1830 unsigned int keylen)
1832 struct iproc_ctx_s *ctx = crypto_skcipher_ctx(cipher);
1834 if (ctx->cipher.mode == CIPHER_MODE_XTS)
1835 /* XTS includes two keys of equal length */
1836 keylen = keylen / 2;
1839 case AES_KEYSIZE_128:
1840 ctx->cipher_type = CIPHER_TYPE_AES128;
1842 case AES_KEYSIZE_192:
1843 ctx->cipher_type = CIPHER_TYPE_AES192;
1845 case AES_KEYSIZE_256:
1846 ctx->cipher_type = CIPHER_TYPE_AES256;
1851 WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
1852 ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
1856 static int rc4_setkey(struct crypto_skcipher *cipher, const u8 *key,
1857 unsigned int keylen)
1859 struct iproc_ctx_s *ctx = crypto_skcipher_ctx(cipher);
1862 ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
1864 ctx->enckey[0] = 0x00; /* 0x00 */
1865 ctx->enckey[1] = 0x00; /* i */
1866 ctx->enckey[2] = 0x00; /* 0x00 */
1867 ctx->enckey[3] = 0x00; /* j */
1868 for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
1869 ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
1871 ctx->cipher_type = CIPHER_TYPE_INIT;
1876 static int skcipher_setkey(struct crypto_skcipher *cipher, const u8 *key,
1877 unsigned int keylen)
1879 struct spu_hw *spu = &iproc_priv.spu;
1880 struct iproc_ctx_s *ctx = crypto_skcipher_ctx(cipher);
1881 struct spu_cipher_parms cipher_parms;
1885 flow_log("skcipher_setkey() keylen: %d\n", keylen);
1886 flow_dump(" key: ", key, keylen);
1888 switch (ctx->cipher.alg) {
1889 case CIPHER_ALG_DES:
1890 err = des_setkey(cipher, key, keylen);
1892 case CIPHER_ALG_3DES:
1893 err = threedes_setkey(cipher, key, keylen);
1895 case CIPHER_ALG_AES:
1896 err = aes_setkey(cipher, key, keylen);
1898 case CIPHER_ALG_RC4:
1899 err = rc4_setkey(cipher, key, keylen);
1902 pr_err("%s() Error: unknown cipher alg\n", __func__);
1908 /* RC4 already populated ctx->enkey */
1909 if (ctx->cipher.alg != CIPHER_ALG_RC4) {
1910 memcpy(ctx->enckey, key, keylen);
1911 ctx->enckeylen = keylen;
1913 /* SPU needs XTS keys in the reverse order the crypto API presents */
1914 if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
1915 (ctx->cipher.mode == CIPHER_MODE_XTS)) {
1916 unsigned int xts_keylen = keylen / 2;
1918 memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
1919 memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
1922 if (spu->spu_type == SPU_TYPE_SPUM)
1923 alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
1924 else if (spu->spu_type == SPU_TYPE_SPU2)
1925 alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
1926 memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
1927 cipher_parms.iv_buf = NULL;
1928 cipher_parms.iv_len = crypto_skcipher_ivsize(cipher);
1929 flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
1931 cipher_parms.alg = ctx->cipher.alg;
1932 cipher_parms.mode = ctx->cipher.mode;
1933 cipher_parms.type = ctx->cipher_type;
1934 cipher_parms.key_buf = ctx->enckey;
1935 cipher_parms.key_len = ctx->enckeylen;
1937 /* Prepend SPU request message with BCM header */
1938 memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1939 ctx->spu_req_hdr_len =
1940 spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
1943 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
1947 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
1952 static int skcipher_encrypt(struct skcipher_request *req)
1954 flow_log("skcipher_encrypt() nbytes:%u\n", req->cryptlen);
1956 return skcipher_enqueue(req, true);
1959 static int skcipher_decrypt(struct skcipher_request *req)
1961 flow_log("skcipher_decrypt() nbytes:%u\n", req->cryptlen);
1962 return skcipher_enqueue(req, false);
1965 static int ahash_enqueue(struct ahash_request *req)
1967 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
1968 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
1969 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
1971 const char *alg_name;
1973 flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
1975 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1976 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1977 rctx->parent = &req->base;
1979 rctx->bd_suppress = true;
1980 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
1982 /* Initialize position in src scatterlist */
1983 rctx->src_sg = req->src;
1985 rctx->src_nents = 0;
1986 rctx->dst_sg = NULL;
1988 rctx->dst_nents = 0;
1990 /* SPU2 hardware does not compute hash of zero length data */
1991 if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
1992 (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
1993 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
1994 flow_log("Doing %sfinal %s zero-len hash request in software\n",
1995 rctx->is_final ? "" : "non-", alg_name);
1996 err = do_shash((unsigned char *)alg_name, req->result,
1997 NULL, 0, NULL, 0, ctx->authkey,
2000 flow_log("Hash request failed with error %d\n", err);
2003 /* Choose a SPU to process this request */
2004 rctx->chan_idx = select_channel();
2006 err = handle_ahash_req(rctx);
2007 if (err != -EINPROGRESS)
2008 /* synchronous result */
2009 spu_chunk_cleanup(rctx);
2013 * we saved data in hash carry, but tell crypto API
2014 * we successfully completed request.
2021 static int __ahash_init(struct ahash_request *req)
2023 struct spu_hw *spu = &iproc_priv.spu;
2024 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2025 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2026 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2028 flow_log("%s()\n", __func__);
2030 /* Initialize the context */
2031 rctx->hash_carry_len = 0;
2034 rctx->total_todo = 0;
2036 rctx->total_sent = 0;
2037 rctx->total_received = 0;
2039 ctx->digestsize = crypto_ahash_digestsize(tfm);
2040 /* If we add a hash whose digest is larger, catch it here. */
2041 WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
2043 rctx->is_sw_hmac = false;
2045 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
2052 * spu_no_incr_hash() - Determine whether incremental hashing is supported.
2053 * @ctx: Crypto session context
2055 * SPU-2 does not support incremental hashing (we'll have to revisit and
2056 * condition based on chip revision or device tree entry if future versions do
2057 * support incremental hash)
2059 * SPU-M also doesn't support incremental hashing of AES-XCBC
2061 * Return: true if incremental hashing is not supported
2064 static bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
2066 struct spu_hw *spu = &iproc_priv.spu;
2068 if (spu->spu_type == SPU_TYPE_SPU2)
2071 if ((ctx->auth.alg == HASH_ALG_AES) &&
2072 (ctx->auth.mode == HASH_MODE_XCBC))
2075 /* Otherwise, incremental hashing is supported */
2079 static int ahash_init(struct ahash_request *req)
2081 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2082 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2083 const char *alg_name;
2084 struct crypto_shash *hash;
2088 if (spu_no_incr_hash(ctx)) {
2090 * If we get an incremental hashing request and it's not
2091 * supported by the hardware, we need to handle it in software
2092 * by calling synchronous hash functions.
2094 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2095 hash = crypto_alloc_shash(alg_name, 0, 0);
2097 ret = PTR_ERR(hash);
2101 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2102 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2103 ctx->shash = kmalloc(sizeof(*ctx->shash) +
2104 crypto_shash_descsize(hash), gfp);
2109 ctx->shash->tfm = hash;
2111 /* Set the key using data we already have from setkey */
2112 if (ctx->authkeylen > 0) {
2113 ret = crypto_shash_setkey(hash, ctx->authkey,
2119 /* Initialize hash w/ this key and other params */
2120 ret = crypto_shash_init(ctx->shash);
2124 /* Otherwise call the internal function which uses SPU hw */
2125 ret = __ahash_init(req);
2133 crypto_free_shash(hash);
2138 static int __ahash_update(struct ahash_request *req)
2140 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2142 flow_log("ahash_update() nbytes:%u\n", req->nbytes);
2146 rctx->total_todo += req->nbytes;
2149 return ahash_enqueue(req);
2152 static int ahash_update(struct ahash_request *req)
2154 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2155 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2161 if (spu_no_incr_hash(ctx)) {
2163 * If we get an incremental hashing request and it's not
2164 * supported by the hardware, we need to handle it in software
2165 * by calling synchronous hash functions.
2168 nents = sg_nents(req->src);
2172 /* Copy data from req scatterlist to tmp buffer */
2173 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2174 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2175 tmpbuf = kmalloc(req->nbytes, gfp);
2179 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2185 /* Call synchronous update */
2186 ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
2189 /* Otherwise call the internal function which uses SPU hw */
2190 ret = __ahash_update(req);
2196 static int __ahash_final(struct ahash_request *req)
2198 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2200 flow_log("ahash_final() nbytes:%u\n", req->nbytes);
2204 return ahash_enqueue(req);
2207 static int ahash_final(struct ahash_request *req)
2209 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2210 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2213 if (spu_no_incr_hash(ctx)) {
2215 * If we get an incremental hashing request and it's not
2216 * supported by the hardware, we need to handle it in software
2217 * by calling synchronous hash functions.
2219 ret = crypto_shash_final(ctx->shash, req->result);
2221 /* Done with hash, can deallocate it now */
2222 crypto_free_shash(ctx->shash->tfm);
2226 /* Otherwise call the internal function which uses SPU hw */
2227 ret = __ahash_final(req);
2233 static int __ahash_finup(struct ahash_request *req)
2235 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2237 flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
2239 rctx->total_todo += req->nbytes;
2243 return ahash_enqueue(req);
2246 static int ahash_finup(struct ahash_request *req)
2248 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2249 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2255 if (spu_no_incr_hash(ctx)) {
2257 * If we get an incremental hashing request and it's not
2258 * supported by the hardware, we need to handle it in software
2259 * by calling synchronous hash functions.
2262 nents = sg_nents(req->src);
2265 goto ahash_finup_exit;
2268 /* Copy data from req scatterlist to tmp buffer */
2269 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2270 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2271 tmpbuf = kmalloc(req->nbytes, gfp);
2274 goto ahash_finup_exit;
2277 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2280 goto ahash_finup_free;
2283 /* Call synchronous update */
2284 ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
2287 /* Otherwise call the internal function which uses SPU hw */
2288 return __ahash_finup(req);
2294 /* Done with hash, can deallocate it now */
2295 crypto_free_shash(ctx->shash->tfm);
2300 static int ahash_digest(struct ahash_request *req)
2304 flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
2306 /* whole thing at once */
2307 err = __ahash_init(req);
2309 err = __ahash_finup(req);
2314 static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
2315 unsigned int keylen)
2317 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2319 flow_log("%s() ahash:%p key:%p keylen:%u\n",
2320 __func__, ahash, key, keylen);
2321 flow_dump(" key: ", key, keylen);
2323 if (ctx->auth.alg == HASH_ALG_AES) {
2325 case AES_KEYSIZE_128:
2326 ctx->cipher_type = CIPHER_TYPE_AES128;
2328 case AES_KEYSIZE_192:
2329 ctx->cipher_type = CIPHER_TYPE_AES192;
2331 case AES_KEYSIZE_256:
2332 ctx->cipher_type = CIPHER_TYPE_AES256;
2335 pr_err("%s() Error: Invalid key length\n", __func__);
2339 pr_err("%s() Error: unknown hash alg\n", __func__);
2342 memcpy(ctx->authkey, key, keylen);
2343 ctx->authkeylen = keylen;
2348 static int ahash_export(struct ahash_request *req, void *out)
2350 const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2351 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
2353 spu_exp->total_todo = rctx->total_todo;
2354 spu_exp->total_sent = rctx->total_sent;
2355 spu_exp->is_sw_hmac = rctx->is_sw_hmac;
2356 memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
2357 spu_exp->hash_carry_len = rctx->hash_carry_len;
2358 memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
2363 static int ahash_import(struct ahash_request *req, const void *in)
2365 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2366 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
2368 rctx->total_todo = spu_exp->total_todo;
2369 rctx->total_sent = spu_exp->total_sent;
2370 rctx->is_sw_hmac = spu_exp->is_sw_hmac;
2371 memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
2372 rctx->hash_carry_len = spu_exp->hash_carry_len;
2373 memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
2378 static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
2379 unsigned int keylen)
2381 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2382 unsigned int blocksize =
2383 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
2384 unsigned int digestsize = crypto_ahash_digestsize(ahash);
2388 flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
2389 __func__, ahash, key, keylen, blocksize, digestsize);
2390 flow_dump(" key: ", key, keylen);
2392 if (keylen > blocksize) {
2393 switch (ctx->auth.alg) {
2395 rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
2399 rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
2402 case HASH_ALG_SHA224:
2403 rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
2406 case HASH_ALG_SHA256:
2407 rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
2410 case HASH_ALG_SHA384:
2411 rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
2414 case HASH_ALG_SHA512:
2415 rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
2418 case HASH_ALG_SHA3_224:
2419 rc = do_shash("sha3-224", ctx->authkey, key, keylen,
2422 case HASH_ALG_SHA3_256:
2423 rc = do_shash("sha3-256", ctx->authkey, key, keylen,
2426 case HASH_ALG_SHA3_384:
2427 rc = do_shash("sha3-384", ctx->authkey, key, keylen,
2430 case HASH_ALG_SHA3_512:
2431 rc = do_shash("sha3-512", ctx->authkey, key, keylen,
2435 pr_err("%s() Error: unknown hash alg\n", __func__);
2439 pr_err("%s() Error %d computing shash for %s\n",
2440 __func__, rc, hash_alg_name[ctx->auth.alg]);
2443 ctx->authkeylen = digestsize;
2445 flow_log(" keylen > digestsize... hashed\n");
2446 flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
2448 memcpy(ctx->authkey, key, keylen);
2449 ctx->authkeylen = keylen;
2453 * Full HMAC operation in SPUM is not verified,
2454 * So keeping the generation of IPAD, OPAD and
2455 * outer hashing in software.
2457 if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
2458 memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
2459 memset(ctx->ipad + ctx->authkeylen, 0,
2460 blocksize - ctx->authkeylen);
2461 ctx->authkeylen = 0;
2462 memcpy(ctx->opad, ctx->ipad, blocksize);
2464 for (index = 0; index < blocksize; index++) {
2465 ctx->ipad[index] ^= HMAC_IPAD_VALUE;
2466 ctx->opad[index] ^= HMAC_OPAD_VALUE;
2469 flow_dump(" ipad: ", ctx->ipad, blocksize);
2470 flow_dump(" opad: ", ctx->opad, blocksize);
2472 ctx->digestsize = digestsize;
2473 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
2478 static int ahash_hmac_init(struct ahash_request *req)
2480 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2481 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2482 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2483 unsigned int blocksize =
2484 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2486 flow_log("ahash_hmac_init()\n");
2488 /* init the context as a hash */
2491 if (!spu_no_incr_hash(ctx)) {
2492 /* SPU-M can do incr hashing but needs sw for outer HMAC */
2493 rctx->is_sw_hmac = true;
2494 ctx->auth.mode = HASH_MODE_HASH;
2495 /* start with a prepended ipad */
2496 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2497 rctx->hash_carry_len = blocksize;
2498 rctx->total_todo += blocksize;
2504 static int ahash_hmac_update(struct ahash_request *req)
2506 flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
2511 return ahash_update(req);
2514 static int ahash_hmac_final(struct ahash_request *req)
2516 flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
2518 return ahash_final(req);
2521 static int ahash_hmac_finup(struct ahash_request *req)
2523 flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
2525 return ahash_finup(req);
2528 static int ahash_hmac_digest(struct ahash_request *req)
2530 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2531 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2532 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2533 unsigned int blocksize =
2534 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2536 flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
2538 /* Perform initialization and then call finup */
2541 if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
2543 * SPU2 supports full HMAC implementation in the
2544 * hardware, need not to generate IPAD, OPAD and
2545 * outer hash in software.
2546 * Only for hash key len > hash block size, SPU2
2547 * expects to perform hashing on the key, shorten
2548 * it to digest size and feed it as hash key.
2550 rctx->is_sw_hmac = false;
2551 ctx->auth.mode = HASH_MODE_HMAC;
2553 rctx->is_sw_hmac = true;
2554 ctx->auth.mode = HASH_MODE_HASH;
2555 /* start with a prepended ipad */
2556 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2557 rctx->hash_carry_len = blocksize;
2558 rctx->total_todo += blocksize;
2561 return __ahash_finup(req);
2566 static int aead_need_fallback(struct aead_request *req)
2568 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2569 struct spu_hw *spu = &iproc_priv.spu;
2570 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2571 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2575 * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
2576 * and AAD are both 0 bytes long. So use fallback in this case.
2578 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
2579 (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
2580 (req->assoclen == 0)) {
2581 if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
2582 (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
2583 flow_log("AES GCM/CCM needs fallback for 0 len req\n");
2588 /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
2589 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2590 (spu->spu_type == SPU_TYPE_SPUM) &&
2591 (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
2592 (ctx->digestsize != 16)) {
2593 flow_log("%s() AES CCM needs fallback for digest size %d\n",
2594 __func__, ctx->digestsize);
2599 * SPU-M on NSP has an issue where AES-CCM hash is not correct
2600 * when AAD size is 0
2602 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2603 (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
2604 (req->assoclen == 0)) {
2605 flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
2611 * RFC4106 and RFC4543 cannot handle the case where AAD is other than
2612 * 16 or 20 bytes long. So use fallback in this case.
2614 if (ctx->cipher.mode == CIPHER_MODE_GCM &&
2615 ctx->cipher.alg == CIPHER_ALG_AES &&
2616 rctx->iv_ctr_len == GCM_RFC4106_IV_SIZE &&
2617 req->assoclen != 16 && req->assoclen != 20) {
2618 flow_log("RFC4106/RFC4543 needs fallback for assoclen"
2619 " other than 16 or 20 bytes\n");
2623 payload_len = req->cryptlen;
2624 if (spu->spu_type == SPU_TYPE_SPUM)
2625 payload_len += req->assoclen;
2627 flow_log("%s() payload len: %u\n", __func__, payload_len);
2629 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2632 return payload_len > ctx->max_payload;
2635 static void aead_complete(struct crypto_async_request *areq, int err)
2637 struct aead_request *req =
2638 container_of(areq, struct aead_request, base);
2639 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2640 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2642 flow_log("%s() err:%d\n", __func__, err);
2644 areq->tfm = crypto_aead_tfm(aead);
2646 areq->complete = rctx->old_complete;
2647 areq->data = rctx->old_data;
2649 areq->complete(areq, err);
2652 static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
2654 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2655 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
2656 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2657 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
2661 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2663 if (ctx->fallback_cipher) {
2664 /* Store the cipher tfm and then use the fallback tfm */
2665 rctx->old_tfm = tfm;
2666 aead_request_set_tfm(req, ctx->fallback_cipher);
2668 * Save the callback and chain ourselves in, so we can restore
2671 rctx->old_complete = req->base.complete;
2672 rctx->old_data = req->base.data;
2673 req_flags = aead_request_flags(req);
2674 aead_request_set_callback(req, req_flags, aead_complete, req);
2675 err = is_encrypt ? crypto_aead_encrypt(req) :
2676 crypto_aead_decrypt(req);
2680 * fallback was synchronous (did not return
2681 * -EINPROGRESS). So restore request state here.
2683 aead_request_set_callback(req, req_flags,
2684 rctx->old_complete, req);
2685 req->base.data = rctx->old_data;
2686 aead_request_set_tfm(req, aead);
2687 flow_log("%s() fallback completed successfully\n\n",
2697 static int aead_enqueue(struct aead_request *req, bool is_encrypt)
2699 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2700 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2701 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2704 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2706 if (req->assoclen > MAX_ASSOC_SIZE) {
2708 ("%s() Error: associated data too long. (%u > %u bytes)\n",
2709 __func__, req->assoclen, MAX_ASSOC_SIZE);
2713 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2714 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2715 rctx->parent = &req->base;
2716 rctx->is_encrypt = is_encrypt;
2717 rctx->bd_suppress = false;
2718 rctx->total_todo = req->cryptlen;
2720 rctx->total_sent = 0;
2721 rctx->total_received = 0;
2722 rctx->is_sw_hmac = false;
2724 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2726 /* assoc data is at start of src sg */
2727 rctx->assoc = req->src;
2730 * Init current position in src scatterlist to be after assoc data.
2731 * src_skip set to buffer offset where data begins. (Assoc data could
2732 * end in the middle of a buffer.)
2734 if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
2735 &rctx->src_skip) < 0) {
2736 pr_err("%s() Error: Unable to find start of src data\n",
2741 rctx->src_nents = 0;
2742 rctx->dst_nents = 0;
2743 if (req->dst == req->src) {
2744 rctx->dst_sg = rctx->src_sg;
2745 rctx->dst_skip = rctx->src_skip;
2748 * Expect req->dst to have room for assoc data followed by
2749 * output data and ICV, if encrypt. So initialize dst_sg
2750 * to point beyond assoc len offset.
2752 if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
2753 &rctx->dst_skip) < 0) {
2754 pr_err("%s() Error: Unable to find start of dst data\n",
2760 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
2761 ctx->cipher.mode == CIPHER_MODE_CTR ||
2762 ctx->cipher.mode == CIPHER_MODE_OFB ||
2763 ctx->cipher.mode == CIPHER_MODE_XTS ||
2764 ctx->cipher.mode == CIPHER_MODE_GCM) {
2767 crypto_aead_ivsize(crypto_aead_reqtfm(req));
2768 } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
2769 rctx->iv_ctr_len = CCM_AES_IV_SIZE;
2771 rctx->iv_ctr_len = 0;
2774 rctx->hash_carry_len = 0;
2776 flow_log(" src sg: %p\n", req->src);
2777 flow_log(" rctx->src_sg: %p, src_skip %u\n",
2778 rctx->src_sg, rctx->src_skip);
2779 flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
2780 flow_log(" dst sg: %p\n", req->dst);
2781 flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
2782 rctx->dst_sg, rctx->dst_skip);
2783 flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
2784 flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
2785 flow_log(" authkeylen:%u\n", ctx->authkeylen);
2786 flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
2788 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2789 flow_log(" max_payload infinite");
2791 flow_log(" max_payload: %u\n", ctx->max_payload);
2793 if (unlikely(aead_need_fallback(req)))
2794 return aead_do_fallback(req, is_encrypt);
2797 * Do memory allocations for request after fallback check, because if we
2798 * do fallback, we won't call finish_req() to dealloc.
2800 if (rctx->iv_ctr_len) {
2802 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
2803 ctx->salt, ctx->salt_len);
2804 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
2806 rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
2809 rctx->chan_idx = select_channel();
2810 err = handle_aead_req(rctx);
2811 if (err != -EINPROGRESS)
2812 /* synchronous result */
2813 spu_chunk_cleanup(rctx);
2818 static int aead_authenc_setkey(struct crypto_aead *cipher,
2819 const u8 *key, unsigned int keylen)
2821 struct spu_hw *spu = &iproc_priv.spu;
2822 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2823 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2824 struct crypto_authenc_keys keys;
2827 flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
2829 flow_dump(" key: ", key, keylen);
2831 ret = crypto_authenc_extractkeys(&keys, key, keylen);
2835 if (keys.enckeylen > MAX_KEY_SIZE ||
2836 keys.authkeylen > MAX_KEY_SIZE)
2839 ctx->enckeylen = keys.enckeylen;
2840 ctx->authkeylen = keys.authkeylen;
2842 memcpy(ctx->enckey, keys.enckey, keys.enckeylen);
2843 /* May end up padding auth key. So make sure it's zeroed. */
2844 memset(ctx->authkey, 0, sizeof(ctx->authkey));
2845 memcpy(ctx->authkey, keys.authkey, keys.authkeylen);
2847 switch (ctx->alg->cipher_info.alg) {
2848 case CIPHER_ALG_DES:
2849 if (verify_aead_des_key(cipher, keys.enckey, keys.enckeylen))
2852 ctx->cipher_type = CIPHER_TYPE_DES;
2854 case CIPHER_ALG_3DES:
2855 if (verify_aead_des3_key(cipher, keys.enckey, keys.enckeylen))
2858 ctx->cipher_type = CIPHER_TYPE_3DES;
2860 case CIPHER_ALG_AES:
2861 switch (ctx->enckeylen) {
2862 case AES_KEYSIZE_128:
2863 ctx->cipher_type = CIPHER_TYPE_AES128;
2865 case AES_KEYSIZE_192:
2866 ctx->cipher_type = CIPHER_TYPE_AES192;
2868 case AES_KEYSIZE_256:
2869 ctx->cipher_type = CIPHER_TYPE_AES256;
2875 case CIPHER_ALG_RC4:
2876 ctx->cipher_type = CIPHER_TYPE_INIT;
2879 pr_err("%s() Error: Unknown cipher alg\n", __func__);
2883 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2885 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2886 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2888 /* setkey the fallback just in case we needto use it */
2889 if (ctx->fallback_cipher) {
2890 flow_log(" running fallback setkey()\n");
2892 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2893 ctx->fallback_cipher->base.crt_flags |=
2894 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2895 ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen);
2897 flow_log(" fallback setkey() returned:%d\n", ret);
2898 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2900 (ctx->fallback_cipher->base.crt_flags &
2901 CRYPTO_TFM_RES_MASK);
2905 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2909 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2915 ctx->authkeylen = 0;
2916 ctx->digestsize = 0;
2921 static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
2922 const u8 *key, unsigned int keylen)
2924 struct spu_hw *spu = &iproc_priv.spu;
2925 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2926 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2930 flow_log("%s() keylen:%u\n", __func__, keylen);
2931 flow_dump(" key: ", key, keylen);
2934 ctx->digestsize = keylen;
2936 ctx->enckeylen = keylen;
2937 ctx->authkeylen = 0;
2938 memcpy(ctx->enckey, key, ctx->enckeylen);
2940 switch (ctx->enckeylen) {
2941 case AES_KEYSIZE_128:
2942 ctx->cipher_type = CIPHER_TYPE_AES128;
2944 case AES_KEYSIZE_192:
2945 ctx->cipher_type = CIPHER_TYPE_AES192;
2947 case AES_KEYSIZE_256:
2948 ctx->cipher_type = CIPHER_TYPE_AES256;
2954 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2956 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2957 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2959 /* setkey the fallback just in case we need to use it */
2960 if (ctx->fallback_cipher) {
2961 flow_log(" running fallback setkey()\n");
2963 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2964 ctx->fallback_cipher->base.crt_flags |=
2965 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2966 ret = crypto_aead_setkey(ctx->fallback_cipher, key,
2967 keylen + ctx->salt_len);
2969 flow_log(" fallback setkey() returned:%d\n", ret);
2970 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2972 (ctx->fallback_cipher->base.crt_flags &
2973 CRYPTO_TFM_RES_MASK);
2977 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2981 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2983 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2990 ctx->authkeylen = 0;
2991 ctx->digestsize = 0;
2997 * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
2998 * @cipher: AEAD structure
2999 * @key: Key followed by 4 bytes of salt
3000 * @keylen: Length of key plus salt, in bytes
3002 * Extracts salt from key and stores it to be prepended to IV on each request.
3003 * Digest is always 16 bytes
3005 * Return: Value from generic gcm setkey.
3007 static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
3008 const u8 *key, unsigned int keylen)
3010 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3012 flow_log("%s\n", __func__);
3013 ctx->salt_len = GCM_ESP_SALT_SIZE;
3014 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3015 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3016 keylen -= GCM_ESP_SALT_SIZE;
3017 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3019 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3021 return aead_gcm_ccm_setkey(cipher, key, keylen);
3025 * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
3026 * cipher: AEAD structure
3027 * key: Key followed by 4 bytes of salt
3028 * keylen: Length of key plus salt, in bytes
3030 * Extracts salt from key and stores it to be prepended to IV on each request.
3031 * Digest is always 16 bytes
3033 * Return: Value from generic gcm setkey.
3035 static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
3036 const u8 *key, unsigned int keylen)
3038 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3040 flow_log("%s\n", __func__);
3041 ctx->salt_len = GCM_ESP_SALT_SIZE;
3042 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3043 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3044 keylen -= GCM_ESP_SALT_SIZE;
3045 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3047 ctx->is_rfc4543 = true;
3048 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3050 return aead_gcm_ccm_setkey(cipher, key, keylen);
3054 * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
3055 * @cipher: AEAD structure
3056 * @key: Key followed by 4 bytes of salt
3057 * @keylen: Length of key plus salt, in bytes
3059 * Extracts salt from key and stores it to be prepended to IV on each request.
3060 * Digest is always 16 bytes
3062 * Return: Value from generic ccm setkey.
3064 static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
3065 const u8 *key, unsigned int keylen)
3067 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3069 flow_log("%s\n", __func__);
3070 ctx->salt_len = CCM_ESP_SALT_SIZE;
3071 ctx->salt_offset = CCM_ESP_SALT_OFFSET;
3072 memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
3073 keylen -= CCM_ESP_SALT_SIZE;
3075 flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
3077 return aead_gcm_ccm_setkey(cipher, key, keylen);
3080 static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
3082 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3085 flow_log("%s() authkeylen:%u authsize:%u\n",
3086 __func__, ctx->authkeylen, authsize);
3088 ctx->digestsize = authsize;
3090 /* setkey the fallback just in case we needto use it */
3091 if (ctx->fallback_cipher) {
3092 flow_log(" running fallback setauth()\n");
3094 ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
3096 flow_log(" fallback setauth() returned:%d\n", ret);
3102 static int aead_encrypt(struct aead_request *req)
3104 flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
3106 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3107 flow_log(" assoc_len:%u\n", req->assoclen);
3109 return aead_enqueue(req, true);
3112 static int aead_decrypt(struct aead_request *req)
3114 flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
3115 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3116 flow_log(" assoc_len:%u\n", req->assoclen);
3118 return aead_enqueue(req, false);
3121 /* ==================== Supported Cipher Algorithms ==================== */
3123 static struct iproc_alg_s driver_algs[] = {
3125 .type = CRYPTO_ALG_TYPE_AEAD,
3128 .cra_name = "gcm(aes)",
3129 .cra_driver_name = "gcm-aes-iproc",
3130 .cra_blocksize = AES_BLOCK_SIZE,
3131 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3133 .setkey = aead_gcm_ccm_setkey,
3134 .ivsize = GCM_AES_IV_SIZE,
3135 .maxauthsize = AES_BLOCK_SIZE,
3138 .alg = CIPHER_ALG_AES,
3139 .mode = CIPHER_MODE_GCM,
3142 .alg = HASH_ALG_AES,
3143 .mode = HASH_MODE_GCM,
3148 .type = CRYPTO_ALG_TYPE_AEAD,
3151 .cra_name = "ccm(aes)",
3152 .cra_driver_name = "ccm-aes-iproc",
3153 .cra_blocksize = AES_BLOCK_SIZE,
3154 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3156 .setkey = aead_gcm_ccm_setkey,
3157 .ivsize = CCM_AES_IV_SIZE,
3158 .maxauthsize = AES_BLOCK_SIZE,
3161 .alg = CIPHER_ALG_AES,
3162 .mode = CIPHER_MODE_CCM,
3165 .alg = HASH_ALG_AES,
3166 .mode = HASH_MODE_CCM,
3171 .type = CRYPTO_ALG_TYPE_AEAD,
3174 .cra_name = "rfc4106(gcm(aes))",
3175 .cra_driver_name = "gcm-aes-esp-iproc",
3176 .cra_blocksize = AES_BLOCK_SIZE,
3177 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3179 .setkey = aead_gcm_esp_setkey,
3180 .ivsize = GCM_RFC4106_IV_SIZE,
3181 .maxauthsize = AES_BLOCK_SIZE,
3184 .alg = CIPHER_ALG_AES,
3185 .mode = CIPHER_MODE_GCM,
3188 .alg = HASH_ALG_AES,
3189 .mode = HASH_MODE_GCM,
3194 .type = CRYPTO_ALG_TYPE_AEAD,
3197 .cra_name = "rfc4309(ccm(aes))",
3198 .cra_driver_name = "ccm-aes-esp-iproc",
3199 .cra_blocksize = AES_BLOCK_SIZE,
3200 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3202 .setkey = aead_ccm_esp_setkey,
3203 .ivsize = CCM_AES_IV_SIZE,
3204 .maxauthsize = AES_BLOCK_SIZE,
3207 .alg = CIPHER_ALG_AES,
3208 .mode = CIPHER_MODE_CCM,
3211 .alg = HASH_ALG_AES,
3212 .mode = HASH_MODE_CCM,
3217 .type = CRYPTO_ALG_TYPE_AEAD,
3220 .cra_name = "rfc4543(gcm(aes))",
3221 .cra_driver_name = "gmac-aes-esp-iproc",
3222 .cra_blocksize = AES_BLOCK_SIZE,
3223 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3225 .setkey = rfc4543_gcm_esp_setkey,
3226 .ivsize = GCM_RFC4106_IV_SIZE,
3227 .maxauthsize = AES_BLOCK_SIZE,
3230 .alg = CIPHER_ALG_AES,
3231 .mode = CIPHER_MODE_GCM,
3234 .alg = HASH_ALG_AES,
3235 .mode = HASH_MODE_GCM,
3240 .type = CRYPTO_ALG_TYPE_AEAD,
3243 .cra_name = "authenc(hmac(md5),cbc(aes))",
3244 .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
3245 .cra_blocksize = AES_BLOCK_SIZE,
3246 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3248 .setkey = aead_authenc_setkey,
3249 .ivsize = AES_BLOCK_SIZE,
3250 .maxauthsize = MD5_DIGEST_SIZE,
3253 .alg = CIPHER_ALG_AES,
3254 .mode = CIPHER_MODE_CBC,
3257 .alg = HASH_ALG_MD5,
3258 .mode = HASH_MODE_HMAC,
3263 .type = CRYPTO_ALG_TYPE_AEAD,
3266 .cra_name = "authenc(hmac(sha1),cbc(aes))",
3267 .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
3268 .cra_blocksize = AES_BLOCK_SIZE,
3269 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3271 .setkey = aead_authenc_setkey,
3272 .ivsize = AES_BLOCK_SIZE,
3273 .maxauthsize = SHA1_DIGEST_SIZE,
3276 .alg = CIPHER_ALG_AES,
3277 .mode = CIPHER_MODE_CBC,
3280 .alg = HASH_ALG_SHA1,
3281 .mode = HASH_MODE_HMAC,
3286 .type = CRYPTO_ALG_TYPE_AEAD,
3289 .cra_name = "authenc(hmac(sha256),cbc(aes))",
3290 .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
3291 .cra_blocksize = AES_BLOCK_SIZE,
3292 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3294 .setkey = aead_authenc_setkey,
3295 .ivsize = AES_BLOCK_SIZE,
3296 .maxauthsize = SHA256_DIGEST_SIZE,
3299 .alg = CIPHER_ALG_AES,
3300 .mode = CIPHER_MODE_CBC,
3303 .alg = HASH_ALG_SHA256,
3304 .mode = HASH_MODE_HMAC,
3309 .type = CRYPTO_ALG_TYPE_AEAD,
3312 .cra_name = "authenc(hmac(md5),cbc(des))",
3313 .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
3314 .cra_blocksize = DES_BLOCK_SIZE,
3315 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3317 .setkey = aead_authenc_setkey,
3318 .ivsize = DES_BLOCK_SIZE,
3319 .maxauthsize = MD5_DIGEST_SIZE,
3322 .alg = CIPHER_ALG_DES,
3323 .mode = CIPHER_MODE_CBC,
3326 .alg = HASH_ALG_MD5,
3327 .mode = HASH_MODE_HMAC,
3332 .type = CRYPTO_ALG_TYPE_AEAD,
3335 .cra_name = "authenc(hmac(sha1),cbc(des))",
3336 .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
3337 .cra_blocksize = DES_BLOCK_SIZE,
3338 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3340 .setkey = aead_authenc_setkey,
3341 .ivsize = DES_BLOCK_SIZE,
3342 .maxauthsize = SHA1_DIGEST_SIZE,
3345 .alg = CIPHER_ALG_DES,
3346 .mode = CIPHER_MODE_CBC,
3349 .alg = HASH_ALG_SHA1,
3350 .mode = HASH_MODE_HMAC,
3355 .type = CRYPTO_ALG_TYPE_AEAD,
3358 .cra_name = "authenc(hmac(sha224),cbc(des))",
3359 .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
3360 .cra_blocksize = DES_BLOCK_SIZE,
3361 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3363 .setkey = aead_authenc_setkey,
3364 .ivsize = DES_BLOCK_SIZE,
3365 .maxauthsize = SHA224_DIGEST_SIZE,
3368 .alg = CIPHER_ALG_DES,
3369 .mode = CIPHER_MODE_CBC,
3372 .alg = HASH_ALG_SHA224,
3373 .mode = HASH_MODE_HMAC,
3378 .type = CRYPTO_ALG_TYPE_AEAD,
3381 .cra_name = "authenc(hmac(sha256),cbc(des))",
3382 .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
3383 .cra_blocksize = DES_BLOCK_SIZE,
3384 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3386 .setkey = aead_authenc_setkey,
3387 .ivsize = DES_BLOCK_SIZE,
3388 .maxauthsize = SHA256_DIGEST_SIZE,
3391 .alg = CIPHER_ALG_DES,
3392 .mode = CIPHER_MODE_CBC,
3395 .alg = HASH_ALG_SHA256,
3396 .mode = HASH_MODE_HMAC,
3401 .type = CRYPTO_ALG_TYPE_AEAD,
3404 .cra_name = "authenc(hmac(sha384),cbc(des))",
3405 .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
3406 .cra_blocksize = DES_BLOCK_SIZE,
3407 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3409 .setkey = aead_authenc_setkey,
3410 .ivsize = DES_BLOCK_SIZE,
3411 .maxauthsize = SHA384_DIGEST_SIZE,
3414 .alg = CIPHER_ALG_DES,
3415 .mode = CIPHER_MODE_CBC,
3418 .alg = HASH_ALG_SHA384,
3419 .mode = HASH_MODE_HMAC,
3424 .type = CRYPTO_ALG_TYPE_AEAD,
3427 .cra_name = "authenc(hmac(sha512),cbc(des))",
3428 .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
3429 .cra_blocksize = DES_BLOCK_SIZE,
3430 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3432 .setkey = aead_authenc_setkey,
3433 .ivsize = DES_BLOCK_SIZE,
3434 .maxauthsize = SHA512_DIGEST_SIZE,
3437 .alg = CIPHER_ALG_DES,
3438 .mode = CIPHER_MODE_CBC,
3441 .alg = HASH_ALG_SHA512,
3442 .mode = HASH_MODE_HMAC,
3447 .type = CRYPTO_ALG_TYPE_AEAD,
3450 .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
3451 .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
3452 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3453 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3455 .setkey = aead_authenc_setkey,
3456 .ivsize = DES3_EDE_BLOCK_SIZE,
3457 .maxauthsize = MD5_DIGEST_SIZE,
3460 .alg = CIPHER_ALG_3DES,
3461 .mode = CIPHER_MODE_CBC,
3464 .alg = HASH_ALG_MD5,
3465 .mode = HASH_MODE_HMAC,
3470 .type = CRYPTO_ALG_TYPE_AEAD,
3473 .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
3474 .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
3475 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3476 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3478 .setkey = aead_authenc_setkey,
3479 .ivsize = DES3_EDE_BLOCK_SIZE,
3480 .maxauthsize = SHA1_DIGEST_SIZE,
3483 .alg = CIPHER_ALG_3DES,
3484 .mode = CIPHER_MODE_CBC,
3487 .alg = HASH_ALG_SHA1,
3488 .mode = HASH_MODE_HMAC,
3493 .type = CRYPTO_ALG_TYPE_AEAD,
3496 .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
3497 .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
3498 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3499 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3501 .setkey = aead_authenc_setkey,
3502 .ivsize = DES3_EDE_BLOCK_SIZE,
3503 .maxauthsize = SHA224_DIGEST_SIZE,
3506 .alg = CIPHER_ALG_3DES,
3507 .mode = CIPHER_MODE_CBC,
3510 .alg = HASH_ALG_SHA224,
3511 .mode = HASH_MODE_HMAC,
3516 .type = CRYPTO_ALG_TYPE_AEAD,
3519 .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
3520 .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
3521 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3522 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3524 .setkey = aead_authenc_setkey,
3525 .ivsize = DES3_EDE_BLOCK_SIZE,
3526 .maxauthsize = SHA256_DIGEST_SIZE,
3529 .alg = CIPHER_ALG_3DES,
3530 .mode = CIPHER_MODE_CBC,
3533 .alg = HASH_ALG_SHA256,
3534 .mode = HASH_MODE_HMAC,
3539 .type = CRYPTO_ALG_TYPE_AEAD,
3542 .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
3543 .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
3544 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3545 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3547 .setkey = aead_authenc_setkey,
3548 .ivsize = DES3_EDE_BLOCK_SIZE,
3549 .maxauthsize = SHA384_DIGEST_SIZE,
3552 .alg = CIPHER_ALG_3DES,
3553 .mode = CIPHER_MODE_CBC,
3556 .alg = HASH_ALG_SHA384,
3557 .mode = HASH_MODE_HMAC,
3562 .type = CRYPTO_ALG_TYPE_AEAD,
3565 .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
3566 .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
3567 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3568 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3570 .setkey = aead_authenc_setkey,
3571 .ivsize = DES3_EDE_BLOCK_SIZE,
3572 .maxauthsize = SHA512_DIGEST_SIZE,
3575 .alg = CIPHER_ALG_3DES,
3576 .mode = CIPHER_MODE_CBC,
3579 .alg = HASH_ALG_SHA512,
3580 .mode = HASH_MODE_HMAC,
3585 /* SKCIPHER algorithms. */
3587 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3589 .base.cra_name = "ecb(arc4)",
3590 .base.cra_driver_name = "ecb-arc4-iproc",
3591 .base.cra_blocksize = ARC4_BLOCK_SIZE,
3592 .min_keysize = ARC4_MIN_KEY_SIZE,
3593 .max_keysize = ARC4_MAX_KEY_SIZE,
3597 .alg = CIPHER_ALG_RC4,
3598 .mode = CIPHER_MODE_NONE,
3601 .alg = HASH_ALG_NONE,
3602 .mode = HASH_MODE_NONE,
3606 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3608 .base.cra_name = "ofb(des)",
3609 .base.cra_driver_name = "ofb-des-iproc",
3610 .base.cra_blocksize = DES_BLOCK_SIZE,
3611 .min_keysize = DES_KEY_SIZE,
3612 .max_keysize = DES_KEY_SIZE,
3613 .ivsize = DES_BLOCK_SIZE,
3616 .alg = CIPHER_ALG_DES,
3617 .mode = CIPHER_MODE_OFB,
3620 .alg = HASH_ALG_NONE,
3621 .mode = HASH_MODE_NONE,
3625 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3627 .base.cra_name = "cbc(des)",
3628 .base.cra_driver_name = "cbc-des-iproc",
3629 .base.cra_blocksize = DES_BLOCK_SIZE,
3630 .min_keysize = DES_KEY_SIZE,
3631 .max_keysize = DES_KEY_SIZE,
3632 .ivsize = DES_BLOCK_SIZE,
3635 .alg = CIPHER_ALG_DES,
3636 .mode = CIPHER_MODE_CBC,
3639 .alg = HASH_ALG_NONE,
3640 .mode = HASH_MODE_NONE,
3644 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3646 .base.cra_name = "ecb(des)",
3647 .base.cra_driver_name = "ecb-des-iproc",
3648 .base.cra_blocksize = DES_BLOCK_SIZE,
3649 .min_keysize = DES_KEY_SIZE,
3650 .max_keysize = DES_KEY_SIZE,
3654 .alg = CIPHER_ALG_DES,
3655 .mode = CIPHER_MODE_ECB,
3658 .alg = HASH_ALG_NONE,
3659 .mode = HASH_MODE_NONE,
3663 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3665 .base.cra_name = "ofb(des3_ede)",
3666 .base.cra_driver_name = "ofb-des3-iproc",
3667 .base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
3668 .min_keysize = DES3_EDE_KEY_SIZE,
3669 .max_keysize = DES3_EDE_KEY_SIZE,
3670 .ivsize = DES3_EDE_BLOCK_SIZE,
3673 .alg = CIPHER_ALG_3DES,
3674 .mode = CIPHER_MODE_OFB,
3677 .alg = HASH_ALG_NONE,
3678 .mode = HASH_MODE_NONE,
3682 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3684 .base.cra_name = "cbc(des3_ede)",
3685 .base.cra_driver_name = "cbc-des3-iproc",
3686 .base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
3687 .min_keysize = DES3_EDE_KEY_SIZE,
3688 .max_keysize = DES3_EDE_KEY_SIZE,
3689 .ivsize = DES3_EDE_BLOCK_SIZE,
3692 .alg = CIPHER_ALG_3DES,
3693 .mode = CIPHER_MODE_CBC,
3696 .alg = HASH_ALG_NONE,
3697 .mode = HASH_MODE_NONE,
3701 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3703 .base.cra_name = "ecb(des3_ede)",
3704 .base.cra_driver_name = "ecb-des3-iproc",
3705 .base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
3706 .min_keysize = DES3_EDE_KEY_SIZE,
3707 .max_keysize = DES3_EDE_KEY_SIZE,
3711 .alg = CIPHER_ALG_3DES,
3712 .mode = CIPHER_MODE_ECB,
3715 .alg = HASH_ALG_NONE,
3716 .mode = HASH_MODE_NONE,
3720 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3722 .base.cra_name = "ofb(aes)",
3723 .base.cra_driver_name = "ofb-aes-iproc",
3724 .base.cra_blocksize = AES_BLOCK_SIZE,
3725 .min_keysize = AES_MIN_KEY_SIZE,
3726 .max_keysize = AES_MAX_KEY_SIZE,
3727 .ivsize = AES_BLOCK_SIZE,
3730 .alg = CIPHER_ALG_AES,
3731 .mode = CIPHER_MODE_OFB,
3734 .alg = HASH_ALG_NONE,
3735 .mode = HASH_MODE_NONE,
3739 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3741 .base.cra_name = "cbc(aes)",
3742 .base.cra_driver_name = "cbc-aes-iproc",
3743 .base.cra_blocksize = AES_BLOCK_SIZE,
3744 .min_keysize = AES_MIN_KEY_SIZE,
3745 .max_keysize = AES_MAX_KEY_SIZE,
3746 .ivsize = AES_BLOCK_SIZE,
3749 .alg = CIPHER_ALG_AES,
3750 .mode = CIPHER_MODE_CBC,
3753 .alg = HASH_ALG_NONE,
3754 .mode = HASH_MODE_NONE,
3758 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3760 .base.cra_name = "ecb(aes)",
3761 .base.cra_driver_name = "ecb-aes-iproc",
3762 .base.cra_blocksize = AES_BLOCK_SIZE,
3763 .min_keysize = AES_MIN_KEY_SIZE,
3764 .max_keysize = AES_MAX_KEY_SIZE,
3768 .alg = CIPHER_ALG_AES,
3769 .mode = CIPHER_MODE_ECB,
3772 .alg = HASH_ALG_NONE,
3773 .mode = HASH_MODE_NONE,
3777 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3779 .base.cra_name = "ctr(aes)",
3780 .base.cra_driver_name = "ctr-aes-iproc",
3781 .base.cra_blocksize = AES_BLOCK_SIZE,
3782 .min_keysize = AES_MIN_KEY_SIZE,
3783 .max_keysize = AES_MAX_KEY_SIZE,
3784 .ivsize = AES_BLOCK_SIZE,
3787 .alg = CIPHER_ALG_AES,
3788 .mode = CIPHER_MODE_CTR,
3791 .alg = HASH_ALG_NONE,
3792 .mode = HASH_MODE_NONE,
3796 .type = CRYPTO_ALG_TYPE_SKCIPHER,
3798 .base.cra_name = "xts(aes)",
3799 .base.cra_driver_name = "xts-aes-iproc",
3800 .base.cra_blocksize = AES_BLOCK_SIZE,
3801 .min_keysize = 2 * AES_MIN_KEY_SIZE,
3802 .max_keysize = 2 * AES_MAX_KEY_SIZE,
3803 .ivsize = AES_BLOCK_SIZE,
3806 .alg = CIPHER_ALG_AES,
3807 .mode = CIPHER_MODE_XTS,
3810 .alg = HASH_ALG_NONE,
3811 .mode = HASH_MODE_NONE,
3815 /* AHASH algorithms. */
3817 .type = CRYPTO_ALG_TYPE_AHASH,
3819 .halg.digestsize = MD5_DIGEST_SIZE,
3822 .cra_driver_name = "md5-iproc",
3823 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3824 .cra_flags = CRYPTO_ALG_ASYNC,
3828 .alg = CIPHER_ALG_NONE,
3829 .mode = CIPHER_MODE_NONE,
3832 .alg = HASH_ALG_MD5,
3833 .mode = HASH_MODE_HASH,
3837 .type = CRYPTO_ALG_TYPE_AHASH,
3839 .halg.digestsize = MD5_DIGEST_SIZE,
3841 .cra_name = "hmac(md5)",
3842 .cra_driver_name = "hmac-md5-iproc",
3843 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3847 .alg = CIPHER_ALG_NONE,
3848 .mode = CIPHER_MODE_NONE,
3851 .alg = HASH_ALG_MD5,
3852 .mode = HASH_MODE_HMAC,
3855 {.type = CRYPTO_ALG_TYPE_AHASH,
3857 .halg.digestsize = SHA1_DIGEST_SIZE,
3860 .cra_driver_name = "sha1-iproc",
3861 .cra_blocksize = SHA1_BLOCK_SIZE,
3865 .alg = CIPHER_ALG_NONE,
3866 .mode = CIPHER_MODE_NONE,
3869 .alg = HASH_ALG_SHA1,
3870 .mode = HASH_MODE_HASH,
3873 {.type = CRYPTO_ALG_TYPE_AHASH,
3875 .halg.digestsize = SHA1_DIGEST_SIZE,
3877 .cra_name = "hmac(sha1)",
3878 .cra_driver_name = "hmac-sha1-iproc",
3879 .cra_blocksize = SHA1_BLOCK_SIZE,
3883 .alg = CIPHER_ALG_NONE,
3884 .mode = CIPHER_MODE_NONE,
3887 .alg = HASH_ALG_SHA1,
3888 .mode = HASH_MODE_HMAC,
3891 {.type = CRYPTO_ALG_TYPE_AHASH,
3893 .halg.digestsize = SHA224_DIGEST_SIZE,
3895 .cra_name = "sha224",
3896 .cra_driver_name = "sha224-iproc",
3897 .cra_blocksize = SHA224_BLOCK_SIZE,
3901 .alg = CIPHER_ALG_NONE,
3902 .mode = CIPHER_MODE_NONE,
3905 .alg = HASH_ALG_SHA224,
3906 .mode = HASH_MODE_HASH,
3909 {.type = CRYPTO_ALG_TYPE_AHASH,
3911 .halg.digestsize = SHA224_DIGEST_SIZE,
3913 .cra_name = "hmac(sha224)",
3914 .cra_driver_name = "hmac-sha224-iproc",
3915 .cra_blocksize = SHA224_BLOCK_SIZE,
3919 .alg = CIPHER_ALG_NONE,
3920 .mode = CIPHER_MODE_NONE,
3923 .alg = HASH_ALG_SHA224,
3924 .mode = HASH_MODE_HMAC,
3927 {.type = CRYPTO_ALG_TYPE_AHASH,
3929 .halg.digestsize = SHA256_DIGEST_SIZE,
3931 .cra_name = "sha256",
3932 .cra_driver_name = "sha256-iproc",
3933 .cra_blocksize = SHA256_BLOCK_SIZE,
3937 .alg = CIPHER_ALG_NONE,
3938 .mode = CIPHER_MODE_NONE,
3941 .alg = HASH_ALG_SHA256,
3942 .mode = HASH_MODE_HASH,
3945 {.type = CRYPTO_ALG_TYPE_AHASH,
3947 .halg.digestsize = SHA256_DIGEST_SIZE,
3949 .cra_name = "hmac(sha256)",
3950 .cra_driver_name = "hmac-sha256-iproc",
3951 .cra_blocksize = SHA256_BLOCK_SIZE,
3955 .alg = CIPHER_ALG_NONE,
3956 .mode = CIPHER_MODE_NONE,
3959 .alg = HASH_ALG_SHA256,
3960 .mode = HASH_MODE_HMAC,
3964 .type = CRYPTO_ALG_TYPE_AHASH,
3966 .halg.digestsize = SHA384_DIGEST_SIZE,
3968 .cra_name = "sha384",
3969 .cra_driver_name = "sha384-iproc",
3970 .cra_blocksize = SHA384_BLOCK_SIZE,
3974 .alg = CIPHER_ALG_NONE,
3975 .mode = CIPHER_MODE_NONE,
3978 .alg = HASH_ALG_SHA384,
3979 .mode = HASH_MODE_HASH,
3983 .type = CRYPTO_ALG_TYPE_AHASH,
3985 .halg.digestsize = SHA384_DIGEST_SIZE,
3987 .cra_name = "hmac(sha384)",
3988 .cra_driver_name = "hmac-sha384-iproc",
3989 .cra_blocksize = SHA384_BLOCK_SIZE,
3993 .alg = CIPHER_ALG_NONE,
3994 .mode = CIPHER_MODE_NONE,
3997 .alg = HASH_ALG_SHA384,
3998 .mode = HASH_MODE_HMAC,
4002 .type = CRYPTO_ALG_TYPE_AHASH,
4004 .halg.digestsize = SHA512_DIGEST_SIZE,
4006 .cra_name = "sha512",
4007 .cra_driver_name = "sha512-iproc",
4008 .cra_blocksize = SHA512_BLOCK_SIZE,
4012 .alg = CIPHER_ALG_NONE,
4013 .mode = CIPHER_MODE_NONE,
4016 .alg = HASH_ALG_SHA512,
4017 .mode = HASH_MODE_HASH,
4021 .type = CRYPTO_ALG_TYPE_AHASH,
4023 .halg.digestsize = SHA512_DIGEST_SIZE,
4025 .cra_name = "hmac(sha512)",
4026 .cra_driver_name = "hmac-sha512-iproc",
4027 .cra_blocksize = SHA512_BLOCK_SIZE,
4031 .alg = CIPHER_ALG_NONE,
4032 .mode = CIPHER_MODE_NONE,
4035 .alg = HASH_ALG_SHA512,
4036 .mode = HASH_MODE_HMAC,
4040 .type = CRYPTO_ALG_TYPE_AHASH,
4042 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4044 .cra_name = "sha3-224",
4045 .cra_driver_name = "sha3-224-iproc",
4046 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4050 .alg = CIPHER_ALG_NONE,
4051 .mode = CIPHER_MODE_NONE,
4054 .alg = HASH_ALG_SHA3_224,
4055 .mode = HASH_MODE_HASH,
4059 .type = CRYPTO_ALG_TYPE_AHASH,
4061 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4063 .cra_name = "hmac(sha3-224)",
4064 .cra_driver_name = "hmac-sha3-224-iproc",
4065 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4069 .alg = CIPHER_ALG_NONE,
4070 .mode = CIPHER_MODE_NONE,
4073 .alg = HASH_ALG_SHA3_224,
4074 .mode = HASH_MODE_HMAC
4078 .type = CRYPTO_ALG_TYPE_AHASH,
4080 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4082 .cra_name = "sha3-256",
4083 .cra_driver_name = "sha3-256-iproc",
4084 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4088 .alg = CIPHER_ALG_NONE,
4089 .mode = CIPHER_MODE_NONE,
4092 .alg = HASH_ALG_SHA3_256,
4093 .mode = HASH_MODE_HASH,
4097 .type = CRYPTO_ALG_TYPE_AHASH,
4099 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4101 .cra_name = "hmac(sha3-256)",
4102 .cra_driver_name = "hmac-sha3-256-iproc",
4103 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4107 .alg = CIPHER_ALG_NONE,
4108 .mode = CIPHER_MODE_NONE,
4111 .alg = HASH_ALG_SHA3_256,
4112 .mode = HASH_MODE_HMAC,
4116 .type = CRYPTO_ALG_TYPE_AHASH,
4118 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4120 .cra_name = "sha3-384",
4121 .cra_driver_name = "sha3-384-iproc",
4122 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4126 .alg = CIPHER_ALG_NONE,
4127 .mode = CIPHER_MODE_NONE,
4130 .alg = HASH_ALG_SHA3_384,
4131 .mode = HASH_MODE_HASH,
4135 .type = CRYPTO_ALG_TYPE_AHASH,
4137 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4139 .cra_name = "hmac(sha3-384)",
4140 .cra_driver_name = "hmac-sha3-384-iproc",
4141 .cra_blocksize = SHA3_384_BLOCK_SIZE,
4145 .alg = CIPHER_ALG_NONE,
4146 .mode = CIPHER_MODE_NONE,
4149 .alg = HASH_ALG_SHA3_384,
4150 .mode = HASH_MODE_HMAC,
4154 .type = CRYPTO_ALG_TYPE_AHASH,
4156 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4158 .cra_name = "sha3-512",
4159 .cra_driver_name = "sha3-512-iproc",
4160 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4164 .alg = CIPHER_ALG_NONE,
4165 .mode = CIPHER_MODE_NONE,
4168 .alg = HASH_ALG_SHA3_512,
4169 .mode = HASH_MODE_HASH,
4173 .type = CRYPTO_ALG_TYPE_AHASH,
4175 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4177 .cra_name = "hmac(sha3-512)",
4178 .cra_driver_name = "hmac-sha3-512-iproc",
4179 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4183 .alg = CIPHER_ALG_NONE,
4184 .mode = CIPHER_MODE_NONE,
4187 .alg = HASH_ALG_SHA3_512,
4188 .mode = HASH_MODE_HMAC,
4192 .type = CRYPTO_ALG_TYPE_AHASH,
4194 .halg.digestsize = AES_BLOCK_SIZE,
4196 .cra_name = "xcbc(aes)",
4197 .cra_driver_name = "xcbc-aes-iproc",
4198 .cra_blocksize = AES_BLOCK_SIZE,
4202 .alg = CIPHER_ALG_NONE,
4203 .mode = CIPHER_MODE_NONE,
4206 .alg = HASH_ALG_AES,
4207 .mode = HASH_MODE_XCBC,
4211 .type = CRYPTO_ALG_TYPE_AHASH,
4213 .halg.digestsize = AES_BLOCK_SIZE,
4215 .cra_name = "cmac(aes)",
4216 .cra_driver_name = "cmac-aes-iproc",
4217 .cra_blocksize = AES_BLOCK_SIZE,
4221 .alg = CIPHER_ALG_NONE,
4222 .mode = CIPHER_MODE_NONE,
4225 .alg = HASH_ALG_AES,
4226 .mode = HASH_MODE_CMAC,
4231 static int generic_cra_init(struct crypto_tfm *tfm,
4232 struct iproc_alg_s *cipher_alg)
4234 struct spu_hw *spu = &iproc_priv.spu;
4235 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4236 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
4238 flow_log("%s()\n", __func__);
4240 ctx->alg = cipher_alg;
4241 ctx->cipher = cipher_alg->cipher_info;
4242 ctx->auth = cipher_alg->auth_info;
4243 ctx->auth_first = cipher_alg->auth_first;
4244 ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
4247 ctx->fallback_cipher = NULL;
4250 ctx->authkeylen = 0;
4252 atomic_inc(&iproc_priv.stream_count);
4253 atomic_inc(&iproc_priv.session_count);
4258 static int skcipher_init_tfm(struct crypto_skcipher *skcipher)
4260 struct crypto_tfm *tfm = crypto_skcipher_tfm(skcipher);
4261 struct skcipher_alg *alg = crypto_skcipher_alg(skcipher);
4262 struct iproc_alg_s *cipher_alg;
4264 flow_log("%s()\n", __func__);
4266 crypto_skcipher_set_reqsize(skcipher, sizeof(struct iproc_reqctx_s));
4268 cipher_alg = container_of(alg, struct iproc_alg_s, alg.skcipher);
4269 return generic_cra_init(tfm, cipher_alg);
4272 static int ahash_cra_init(struct crypto_tfm *tfm)
4275 struct crypto_alg *alg = tfm->__crt_alg;
4276 struct iproc_alg_s *cipher_alg;
4278 cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
4281 err = generic_cra_init(tfm, cipher_alg);
4282 flow_log("%s()\n", __func__);
4285 * export state size has to be < 512 bytes. So don't include msg bufs
4288 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
4289 sizeof(struct iproc_reqctx_s));
4294 static int aead_cra_init(struct crypto_aead *aead)
4296 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4297 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4298 struct crypto_alg *alg = tfm->__crt_alg;
4299 struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
4300 struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
4303 int err = generic_cra_init(tfm, cipher_alg);
4305 flow_log("%s()\n", __func__);
4307 crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
4308 ctx->is_esp = false;
4310 ctx->salt_offset = 0;
4312 /* random first IV */
4313 get_random_bytes(ctx->iv, MAX_IV_SIZE);
4314 flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
4317 if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
4318 flow_log("%s() creating fallback cipher\n", __func__);
4320 ctx->fallback_cipher =
4321 crypto_alloc_aead(alg->cra_name, 0,
4323 CRYPTO_ALG_NEED_FALLBACK);
4324 if (IS_ERR(ctx->fallback_cipher)) {
4325 pr_err("%s() Error: failed to allocate fallback for %s\n",
4326 __func__, alg->cra_name);
4327 return PTR_ERR(ctx->fallback_cipher);
4335 static void generic_cra_exit(struct crypto_tfm *tfm)
4337 atomic_dec(&iproc_priv.session_count);
4340 static void skcipher_exit_tfm(struct crypto_skcipher *tfm)
4342 generic_cra_exit(crypto_skcipher_tfm(tfm));
4345 static void aead_cra_exit(struct crypto_aead *aead)
4347 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4348 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4350 generic_cra_exit(tfm);
4352 if (ctx->fallback_cipher) {
4353 crypto_free_aead(ctx->fallback_cipher);
4354 ctx->fallback_cipher = NULL;
4359 * spu_functions_register() - Specify hardware-specific SPU functions based on
4360 * SPU type read from device tree.
4361 * @dev: device structure
4362 * @spu_type: SPU hardware generation
4363 * @spu_subtype: SPU hardware version
4365 static void spu_functions_register(struct device *dev,
4366 enum spu_spu_type spu_type,
4367 enum spu_spu_subtype spu_subtype)
4369 struct spu_hw *spu = &iproc_priv.spu;
4371 if (spu_type == SPU_TYPE_SPUM) {
4372 dev_dbg(dev, "Registering SPUM functions");
4373 spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
4374 spu->spu_payload_length = spum_payload_length;
4375 spu->spu_response_hdr_len = spum_response_hdr_len;
4376 spu->spu_hash_pad_len = spum_hash_pad_len;
4377 spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
4378 spu->spu_assoc_resp_len = spum_assoc_resp_len;
4379 spu->spu_aead_ivlen = spum_aead_ivlen;
4380 spu->spu_hash_type = spum_hash_type;
4381 spu->spu_digest_size = spum_digest_size;
4382 spu->spu_create_request = spum_create_request;
4383 spu->spu_cipher_req_init = spum_cipher_req_init;
4384 spu->spu_cipher_req_finish = spum_cipher_req_finish;
4385 spu->spu_request_pad = spum_request_pad;
4386 spu->spu_tx_status_len = spum_tx_status_len;
4387 spu->spu_rx_status_len = spum_rx_status_len;
4388 spu->spu_status_process = spum_status_process;
4389 spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
4390 spu->spu_ccm_update_iv = spum_ccm_update_iv;
4391 spu->spu_wordalign_padlen = spum_wordalign_padlen;
4392 if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
4393 spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
4395 spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
4397 dev_dbg(dev, "Registering SPU2 functions");
4398 spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
4399 spu->spu_ctx_max_payload = spu2_ctx_max_payload;
4400 spu->spu_payload_length = spu2_payload_length;
4401 spu->spu_response_hdr_len = spu2_response_hdr_len;
4402 spu->spu_hash_pad_len = spu2_hash_pad_len;
4403 spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
4404 spu->spu_assoc_resp_len = spu2_assoc_resp_len;
4405 spu->spu_aead_ivlen = spu2_aead_ivlen;
4406 spu->spu_hash_type = spu2_hash_type;
4407 spu->spu_digest_size = spu2_digest_size;
4408 spu->spu_create_request = spu2_create_request;
4409 spu->spu_cipher_req_init = spu2_cipher_req_init;
4410 spu->spu_cipher_req_finish = spu2_cipher_req_finish;
4411 spu->spu_request_pad = spu2_request_pad;
4412 spu->spu_tx_status_len = spu2_tx_status_len;
4413 spu->spu_rx_status_len = spu2_rx_status_len;
4414 spu->spu_status_process = spu2_status_process;
4415 spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
4416 spu->spu_ccm_update_iv = spu2_ccm_update_iv;
4417 spu->spu_wordalign_padlen = spu2_wordalign_padlen;
4422 * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
4423 * channel for the SPU being probed.
4424 * @dev: SPU driver device structure
4426 * Return: 0 if successful
4429 static int spu_mb_init(struct device *dev)
4431 struct mbox_client *mcl = &iproc_priv.mcl;
4434 iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
4435 sizeof(struct mbox_chan *), GFP_KERNEL);
4436 if (!iproc_priv.mbox)
4440 mcl->tx_block = false;
4442 mcl->knows_txdone = true;
4443 mcl->rx_callback = spu_rx_callback;
4444 mcl->tx_done = NULL;
4446 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4447 iproc_priv.mbox[i] = mbox_request_channel(mcl, i);
4448 if (IS_ERR(iproc_priv.mbox[i])) {
4449 err = (int)PTR_ERR(iproc_priv.mbox[i]);
4451 "Mbox channel %d request failed with err %d",
4453 iproc_priv.mbox[i] = NULL;
4460 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4461 if (iproc_priv.mbox[i])
4462 mbox_free_channel(iproc_priv.mbox[i]);
4468 static void spu_mb_release(struct platform_device *pdev)
4472 for (i = 0; i < iproc_priv.spu.num_chan; i++)
4473 mbox_free_channel(iproc_priv.mbox[i]);
4476 static void spu_counters_init(void)
4481 atomic_set(&iproc_priv.session_count, 0);
4482 atomic_set(&iproc_priv.stream_count, 0);
4483 atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
4484 atomic64_set(&iproc_priv.bytes_in, 0);
4485 atomic64_set(&iproc_priv.bytes_out, 0);
4486 for (i = 0; i < SPU_OP_NUM; i++) {
4487 atomic_set(&iproc_priv.op_counts[i], 0);
4488 atomic_set(&iproc_priv.setkey_cnt[i], 0);
4490 for (i = 0; i < CIPHER_ALG_LAST; i++)
4491 for (j = 0; j < CIPHER_MODE_LAST; j++)
4492 atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
4494 for (i = 0; i < HASH_ALG_LAST; i++) {
4495 atomic_set(&iproc_priv.hash_cnt[i], 0);
4496 atomic_set(&iproc_priv.hmac_cnt[i], 0);
4498 for (i = 0; i < AEAD_TYPE_LAST; i++)
4499 atomic_set(&iproc_priv.aead_cnt[i], 0);
4501 atomic_set(&iproc_priv.mb_no_spc, 0);
4502 atomic_set(&iproc_priv.mb_send_fail, 0);
4503 atomic_set(&iproc_priv.bad_icv, 0);
4506 static int spu_register_skcipher(struct iproc_alg_s *driver_alg)
4508 struct spu_hw *spu = &iproc_priv.spu;
4509 struct skcipher_alg *crypto = &driver_alg->alg.skcipher;
4512 /* SPU2 does not support RC4 */
4513 if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
4514 (spu->spu_type == SPU_TYPE_SPU2))
4517 crypto->base.cra_module = THIS_MODULE;
4518 crypto->base.cra_priority = cipher_pri;
4519 crypto->base.cra_alignmask = 0;
4520 crypto->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4521 crypto->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
4523 crypto->init = skcipher_init_tfm;
4524 crypto->exit = skcipher_exit_tfm;
4525 crypto->setkey = skcipher_setkey;
4526 crypto->encrypt = skcipher_encrypt;
4527 crypto->decrypt = skcipher_decrypt;
4529 err = crypto_register_skcipher(crypto);
4530 /* Mark alg as having been registered, if successful */
4532 driver_alg->registered = true;
4533 pr_debug(" registered skcipher %s\n", crypto->base.cra_driver_name);
4537 static int spu_register_ahash(struct iproc_alg_s *driver_alg)
4539 struct spu_hw *spu = &iproc_priv.spu;
4540 struct ahash_alg *hash = &driver_alg->alg.hash;
4543 /* AES-XCBC is the only AES hash type currently supported on SPU-M */
4544 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4545 (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
4546 (spu->spu_type == SPU_TYPE_SPUM))
4549 /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
4550 if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
4551 (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
4554 hash->halg.base.cra_module = THIS_MODULE;
4555 hash->halg.base.cra_priority = hash_pri;
4556 hash->halg.base.cra_alignmask = 0;
4557 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4558 hash->halg.base.cra_init = ahash_cra_init;
4559 hash->halg.base.cra_exit = generic_cra_exit;
4560 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
4561 hash->halg.statesize = sizeof(struct spu_hash_export_s);
4563 if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
4564 hash->init = ahash_init;
4565 hash->update = ahash_update;
4566 hash->final = ahash_final;
4567 hash->finup = ahash_finup;
4568 hash->digest = ahash_digest;
4569 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4570 ((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
4571 (driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
4572 hash->setkey = ahash_setkey;
4575 hash->setkey = ahash_hmac_setkey;
4576 hash->init = ahash_hmac_init;
4577 hash->update = ahash_hmac_update;
4578 hash->final = ahash_hmac_final;
4579 hash->finup = ahash_hmac_finup;
4580 hash->digest = ahash_hmac_digest;
4582 hash->export = ahash_export;
4583 hash->import = ahash_import;
4585 err = crypto_register_ahash(hash);
4586 /* Mark alg as having been registered, if successful */
4588 driver_alg->registered = true;
4589 pr_debug(" registered ahash %s\n",
4590 hash->halg.base.cra_driver_name);
4594 static int spu_register_aead(struct iproc_alg_s *driver_alg)
4596 struct aead_alg *aead = &driver_alg->alg.aead;
4599 aead->base.cra_module = THIS_MODULE;
4600 aead->base.cra_priority = aead_pri;
4601 aead->base.cra_alignmask = 0;
4602 aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4604 aead->base.cra_flags |= CRYPTO_ALG_ASYNC;
4605 /* setkey set in alg initialization */
4606 aead->setauthsize = aead_setauthsize;
4607 aead->encrypt = aead_encrypt;
4608 aead->decrypt = aead_decrypt;
4609 aead->init = aead_cra_init;
4610 aead->exit = aead_cra_exit;
4612 err = crypto_register_aead(aead);
4613 /* Mark alg as having been registered, if successful */
4615 driver_alg->registered = true;
4616 pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
4620 /* register crypto algorithms the device supports */
4621 static int spu_algs_register(struct device *dev)
4626 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4627 switch (driver_algs[i].type) {
4628 case CRYPTO_ALG_TYPE_SKCIPHER:
4629 err = spu_register_skcipher(&driver_algs[i]);
4631 case CRYPTO_ALG_TYPE_AHASH:
4632 err = spu_register_ahash(&driver_algs[i]);
4634 case CRYPTO_ALG_TYPE_AEAD:
4635 err = spu_register_aead(&driver_algs[i]);
4639 "iproc-crypto: unknown alg type: %d",
4640 driver_algs[i].type);
4645 dev_err(dev, "alg registration failed with error %d\n",
4654 for (j = 0; j < i; j++) {
4655 /* Skip any algorithm not registered */
4656 if (!driver_algs[j].registered)
4658 switch (driver_algs[j].type) {
4659 case CRYPTO_ALG_TYPE_SKCIPHER:
4660 crypto_unregister_skcipher(&driver_algs[j].alg.skcipher);
4661 driver_algs[j].registered = false;
4663 case CRYPTO_ALG_TYPE_AHASH:
4664 crypto_unregister_ahash(&driver_algs[j].alg.hash);
4665 driver_algs[j].registered = false;
4667 case CRYPTO_ALG_TYPE_AEAD:
4668 crypto_unregister_aead(&driver_algs[j].alg.aead);
4669 driver_algs[j].registered = false;
4676 /* ==================== Kernel Platform API ==================== */
4678 static struct spu_type_subtype spum_ns2_types = {
4679 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
4682 static struct spu_type_subtype spum_nsp_types = {
4683 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
4686 static struct spu_type_subtype spu2_types = {
4687 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
4690 static struct spu_type_subtype spu2_v2_types = {
4691 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
4694 static const struct of_device_id bcm_spu_dt_ids[] = {
4696 .compatible = "brcm,spum-crypto",
4697 .data = &spum_ns2_types,
4700 .compatible = "brcm,spum-nsp-crypto",
4701 .data = &spum_nsp_types,
4704 .compatible = "brcm,spu2-crypto",
4705 .data = &spu2_types,
4708 .compatible = "brcm,spu2-v2-crypto",
4709 .data = &spu2_v2_types,
4714 MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
4716 static int spu_dt_read(struct platform_device *pdev)
4718 struct device *dev = &pdev->dev;
4719 struct spu_hw *spu = &iproc_priv.spu;
4720 struct resource *spu_ctrl_regs;
4721 const struct spu_type_subtype *matched_spu_type;
4722 struct device_node *dn = pdev->dev.of_node;
4725 /* Count number of mailbox channels */
4726 spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
4728 matched_spu_type = of_device_get_match_data(dev);
4729 if (!matched_spu_type) {
4730 dev_err(&pdev->dev, "Failed to match device\n");
4734 spu->spu_type = matched_spu_type->type;
4735 spu->spu_subtype = matched_spu_type->subtype;
4738 for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs =
4739 platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) {
4741 spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
4742 if (IS_ERR(spu->reg_vbase[i])) {
4743 err = PTR_ERR(spu->reg_vbase[i]);
4744 dev_err(&pdev->dev, "Failed to map registers: %d\n",
4746 spu->reg_vbase[i] = NULL;
4751 dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
4756 static int bcm_spu_probe(struct platform_device *pdev)
4758 struct device *dev = &pdev->dev;
4759 struct spu_hw *spu = &iproc_priv.spu;
4762 iproc_priv.pdev = pdev;
4763 platform_set_drvdata(iproc_priv.pdev,
4766 err = spu_dt_read(pdev);
4770 err = spu_mb_init(&pdev->dev);
4774 if (spu->spu_type == SPU_TYPE_SPUM)
4775 iproc_priv.bcm_hdr_len = 8;
4776 else if (spu->spu_type == SPU_TYPE_SPU2)
4777 iproc_priv.bcm_hdr_len = 0;
4779 spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
4781 spu_counters_init();
4783 spu_setup_debugfs();
4785 err = spu_algs_register(dev);
4794 spu_mb_release(pdev);
4795 dev_err(dev, "%s failed with error %d.\n", __func__, err);
4800 static int bcm_spu_remove(struct platform_device *pdev)
4803 struct device *dev = &pdev->dev;
4806 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4808 * Not all algorithms were registered, depending on whether
4809 * hardware is SPU or SPU2. So here we make sure to skip
4810 * those algorithms that were not previously registered.
4812 if (!driver_algs[i].registered)
4815 switch (driver_algs[i].type) {
4816 case CRYPTO_ALG_TYPE_SKCIPHER:
4817 crypto_unregister_skcipher(&driver_algs[i].alg.skcipher);
4818 dev_dbg(dev, " unregistered cipher %s\n",
4819 driver_algs[i].alg.skcipher.base.cra_driver_name);
4820 driver_algs[i].registered = false;
4822 case CRYPTO_ALG_TYPE_AHASH:
4823 crypto_unregister_ahash(&driver_algs[i].alg.hash);
4824 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
4825 dev_dbg(dev, " unregistered hash %s\n", cdn);
4826 driver_algs[i].registered = false;
4828 case CRYPTO_ALG_TYPE_AEAD:
4829 crypto_unregister_aead(&driver_algs[i].alg.aead);
4830 dev_dbg(dev, " unregistered aead %s\n",
4831 driver_algs[i].alg.aead.base.cra_driver_name);
4832 driver_algs[i].registered = false;
4837 spu_mb_release(pdev);
4841 /* ===== Kernel Module API ===== */
4843 static struct platform_driver bcm_spu_pdriver = {
4845 .name = "brcm-spu-crypto",
4846 .of_match_table = of_match_ptr(bcm_spu_dt_ids),
4848 .probe = bcm_spu_probe,
4849 .remove = bcm_spu_remove,
4851 module_platform_driver(bcm_spu_pdriver);
4853 MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
4854 MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
4855 MODULE_LICENSE("GPL v2");