1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
10 If you say N, all options in this submenu will be skipped and disabled.
14 source "drivers/crypto/allwinner/Kconfig"
16 config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
28 config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
34 Use VIA PadLock for AES algorithm.
36 Available in VIA C3 and newer CPUs.
38 If unsure say M. The compiled module will be
41 config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
48 Use VIA PadLock for SHA1/SHA256 algorithms.
50 Available in VIA C7 and newer processors.
52 If unsure say M. The compiled module will be
55 config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
59 select CRYPTO_SKCIPHER
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
68 tristate "Support for s390 cryptographic adapters"
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like:
74 + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
79 bool "Enable debug features for s390 cryptographic adapters"
81 depends on DEBUG_KERNEL
84 Say 'Y' here to enable some additional debug features on the
85 s390 cryptographic adapters driver.
87 There will be some more sysfs attributes displayed for ap cards
88 and queues and some flags on crypto requests are interpreted as
89 debugging messages to force error injection.
91 Do not enable on production level kernel build.
95 config ZCRYPT_MULTIDEVNODES
96 bool "Support for multiple zcrypt device nodes"
101 With this option enabled the zcrypt device driver can
102 provide multiple devices nodes in /dev. Each device
103 node can get customized to limit access and narrow
104 down the use of the available crypto hardware.
107 tristate "Kernel API for protected key handling"
111 With this option enabled the pkey kernel module provides an API
112 for creation and handling of protected keys. Other parts of the
113 kernel or userspace applications may use these functions.
115 Select this option if you want to enable the kernel and userspace
116 API for proteced key handling.
118 Please note that creation of protected keys from secure keys
119 requires to have at least one CEX card in coprocessor mode
120 available at runtime.
122 config CRYPTO_PAES_S390
123 tristate "PAES cipher algorithms"
128 select CRYPTO_SKCIPHER
130 This is the s390 hardware accelerated implementation of the
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
137 tristate "Pseudo random number generator device driver"
141 Select this option if you want to use the s390 pseudo random number
142 generator. The PRNG is part of the cryptographic processor functions
143 and uses triple-DES to generate secure random numbers like the
144 ANSI X9.17 standard. User-space programs access the
145 pseudo-random-number device through the char device /dev/prandom.
147 It is available as of z9.
149 config CRYPTO_DEV_NIAGARA2
150 tristate "Niagara2 Stream Processing Unit driver"
151 select CRYPTO_LIB_DES
152 select CRYPTO_SKCIPHER
159 Each core of a Niagara2 processor contains a Stream
160 Processing Unit, which itself contains several cryptographic
161 sub-units. One set provides the Modular Arithmetic Unit,
162 used for SSL offload. The other set provides the Cipher
163 Group, which can perform encryption, decryption, hashing,
164 checksumming, and raw copies.
166 config CRYPTO_DEV_SL3516
167 tristate "Storlink SL3516 crypto offloader"
168 depends on ARCH_GEMINI || COMPILE_TEST
169 depends on HAS_IOMEM && PM
170 select CRYPTO_SKCIPHER
176 This option allows you to have support for SL3516 crypto offloader.
178 config CRYPTO_DEV_SL3516_DEBUG
179 bool "Enable SL3516 stats"
180 depends on CRYPTO_DEV_SL3516
183 Say y to enable SL3516 debug stats.
184 This will create /sys/kernel/debug/sl3516/stats for displaying
185 the number of requests per algorithm and other internal stats.
187 config CRYPTO_DEV_HIFN_795X
188 tristate "Driver HIFN 795x crypto accelerator chips"
189 select CRYPTO_LIB_DES
190 select CRYPTO_SKCIPHER
191 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
193 depends on !ARCH_DMA_ADDR_T_64BIT
195 This option allows you to have support for HIFN 795x crypto adapters.
197 config CRYPTO_DEV_HIFN_795X_RNG
198 bool "HIFN 795x random number generator"
199 depends on CRYPTO_DEV_HIFN_795X
201 Select this option if you want to enable the random number generator
202 on the HIFN 795x crypto adapters.
204 source "drivers/crypto/caam/Kconfig"
206 config CRYPTO_DEV_TALITOS
207 tristate "Talitos Freescale Security Engine (SEC)"
209 select CRYPTO_AUTHENC
210 select CRYPTO_SKCIPHER
212 select CRYPTO_LIB_DES
216 Say 'Y' here to use the Freescale Security Engine (SEC)
217 to offload cryptographic algorithm computation.
219 The Freescale SEC is present on PowerQUICC 'E' processors, such
220 as the MPC8349E and MPC8548E.
222 To compile this driver as a module, choose M here: the module
223 will be called talitos.
225 config CRYPTO_DEV_TALITOS1
226 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
227 depends on CRYPTO_DEV_TALITOS
228 depends on PPC_8xx || PPC_82xx
231 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
232 found on MPC82xx or the Freescale Security Engine (SEC Lite)
233 version 1.2 found on MPC8xx
235 config CRYPTO_DEV_TALITOS2
236 bool "SEC2+ (SEC version 2.0 or upper)"
237 depends on CRYPTO_DEV_TALITOS
238 default y if !PPC_8xx
240 Say 'Y' here to use the Freescale Security Engine (SEC)
241 version 2 and following as found on MPC83xx, MPC85xx, etc ...
243 config CRYPTO_DEV_IXP4XX
244 tristate "Driver for IXP4xx crypto hardware acceleration"
245 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
251 select CRYPTO_LIB_DES
253 select CRYPTO_AUTHENC
254 select CRYPTO_SKCIPHER
256 Driver for the IXP4xx NPE crypto engine.
258 config CRYPTO_DEV_PPC4XX
259 tristate "Driver AMCC PPC4xx crypto accelerator"
260 depends on PPC && 4xx
264 select CRYPTO_LIB_AES
268 select CRYPTO_SKCIPHER
270 This option allows you to have support for AMCC crypto acceleration.
272 config HW_RANDOM_PPC4XX
273 bool "PowerPC 4xx generic true random number generator support"
274 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
277 This option provides the kernel-side support for the TRNG hardware
278 found in the security function of some PowerPC 4xx SoCs.
280 config CRYPTO_DEV_OMAP
281 tristate "Support for OMAP crypto HW accelerators"
282 depends on ARCH_OMAP2PLUS
284 OMAP processors have various crypto HW accelerators. Select this if
285 you want to use the OMAP modules for any of the crypto algorithms.
289 config CRYPTO_DEV_OMAP_SHAM
290 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
291 depends on ARCH_OMAP2PLUS
299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
302 config CRYPTO_DEV_OMAP_AES
303 tristate "Support for OMAP AES hw engine"
304 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
306 select CRYPTO_SKCIPHER
313 OMAP processors have AES module accelerator. Select this if you
314 want to use the OMAP module for AES algorithms.
316 config CRYPTO_DEV_OMAP_DES
317 tristate "Support for OMAP DES/3DES hw engine"
318 depends on ARCH_OMAP2PLUS
319 select CRYPTO_LIB_DES
320 select CRYPTO_SKCIPHER
323 OMAP processors have DES/3DES module accelerator. Select this if you
324 want to use the OMAP module for DES and 3DES algorithms. Currently
325 the ECB and CBC modes of operation are supported by the driver. Also
326 accesses made on unaligned boundaries are supported.
328 endif # CRYPTO_DEV_OMAP
330 config CRYPTO_DEV_SAHARA
331 tristate "Support for SAHARA crypto accelerator"
332 depends on ARCH_MXC && OF
333 select CRYPTO_SKCIPHER
337 This option enables support for the SAHARA HW crypto accelerator
338 found in some Freescale i.MX chips.
340 config CRYPTO_DEV_EXYNOS_RNG
341 tristate "Exynos HW pseudo random number generator support"
342 depends on ARCH_EXYNOS || COMPILE_TEST
346 This driver provides kernel-side support through the
347 cryptographic API for the pseudo random number generator hardware
348 found on Exynos SoCs.
350 To compile this driver as a module, choose M here: the
351 module will be called exynos-rng.
355 config CRYPTO_DEV_S5P
356 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
357 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
360 select CRYPTO_SKCIPHER
362 This option allows you to have support for S5P crypto acceleration.
363 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
364 algorithms execution.
366 config CRYPTO_DEV_EXYNOS_HASH
367 bool "Support for Samsung Exynos HASH accelerator"
368 depends on CRYPTO_DEV_S5P
369 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
374 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
375 This will select software SHA1, MD5 and SHA256 as they are
376 needed for small and zero-size messages.
377 HASH algorithms will be disabled if EXYNOS_RNG
378 is enabled due to hw conflict.
381 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
384 This enables support for the NX hardware cryptographic accelerator
385 coprocessor that is in IBM PowerPC P7+ or later processors. This
386 does not actually enable any drivers, it only allows you to select
387 which acceleration type (encryption and/or compression) to enable.
390 source "drivers/crypto/nx/Kconfig"
393 config CRYPTO_DEV_ATMEL_AUTHENC
394 bool "Support for Atmel IPSEC/SSL hw accelerator"
395 depends on ARCH_AT91 || COMPILE_TEST
396 depends on CRYPTO_DEV_ATMEL_AES
398 Some Atmel processors can combine the AES and SHA hw accelerators
399 to enhance support of IPSEC/SSL.
400 Select this if you want to use the Atmel modules for
401 authenc(hmac(shaX),Y(cbc)) algorithms.
403 config CRYPTO_DEV_ATMEL_AES
404 tristate "Support for Atmel AES hw accelerator"
405 depends on ARCH_AT91 || COMPILE_TEST
408 select CRYPTO_SKCIPHER
409 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
410 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
412 Some Atmel processors have AES hw accelerator.
413 Select this if you want to use the Atmel module for
416 To compile this driver as a module, choose M here: the module
417 will be called atmel-aes.
419 config CRYPTO_DEV_ATMEL_TDES
420 tristate "Support for Atmel DES/TDES hw accelerator"
421 depends on ARCH_AT91 || COMPILE_TEST
422 select CRYPTO_LIB_DES
423 select CRYPTO_SKCIPHER
425 Some Atmel processors have DES/TDES hw accelerator.
426 Select this if you want to use the Atmel module for
429 To compile this driver as a module, choose M here: the module
430 will be called atmel-tdes.
432 config CRYPTO_DEV_ATMEL_SHA
433 tristate "Support for Atmel SHA hw accelerator"
434 depends on ARCH_AT91 || COMPILE_TEST
437 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
439 Select this if you want to use the Atmel module for
440 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
442 To compile this driver as a module, choose M here: the module
443 will be called atmel-sha.
445 config CRYPTO_DEV_ATMEL_I2C
449 config CRYPTO_DEV_ATMEL_ECC
450 tristate "Support for Microchip / Atmel ECC hw accelerator"
452 select CRYPTO_DEV_ATMEL_I2C
456 Microhip / Atmel ECC hw accelerator.
457 Select this if you want to use the Microchip / Atmel module for
460 To compile this driver as a module, choose M here: the module
461 will be called atmel-ecc.
463 config CRYPTO_DEV_ATMEL_SHA204A
464 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
466 select CRYPTO_DEV_ATMEL_I2C
470 Microhip / Atmel SHA accelerator and RNG.
471 Select this if you want to use the Microchip / Atmel SHA204A
472 module as a random number generator. (Other functions of the
473 chip are currently not exposed by this driver)
475 To compile this driver as a module, choose M here: the module
476 will be called atmel-sha204a.
478 config CRYPTO_DEV_CCP
479 bool "Support for AMD Secure Processor"
480 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
482 The AMD Secure Processor provides support for the Cryptographic Coprocessor
483 (CCP) and the Platform Security Processor (PSP) devices.
486 source "drivers/crypto/ccp/Kconfig"
489 config CRYPTO_DEV_MXS_DCP
490 tristate "Support for Freescale MXS DCP"
491 depends on (ARCH_MXS || ARCH_MXC)
496 select CRYPTO_SKCIPHER
499 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
500 co-processor on the die.
502 To compile this driver as a module, choose M here: the module
503 will be called mxs-dcp.
505 source "drivers/crypto/qat/Kconfig"
506 source "drivers/crypto/cavium/cpt/Kconfig"
507 source "drivers/crypto/cavium/nitrox/Kconfig"
508 source "drivers/crypto/marvell/Kconfig"
510 config CRYPTO_DEV_CAVIUM_ZIP
511 tristate "Cavium ZIP driver"
512 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
514 Select this option if you want to enable compression/decompression
515 acceleration on Cavium's ARM based SoCs
517 config CRYPTO_DEV_QCE
518 tristate "Qualcomm crypto engine accelerator"
519 depends on ARCH_QCOM || COMPILE_TEST
522 This driver supports Qualcomm crypto engine accelerator
523 hardware. To compile this driver as a module, choose M here. The
524 module will be called qcrypto.
526 config CRYPTO_DEV_QCE_SKCIPHER
528 depends on CRYPTO_DEV_QCE
530 select CRYPTO_LIB_DES
535 select CRYPTO_SKCIPHER
537 config CRYPTO_DEV_QCE_SHA
539 depends on CRYPTO_DEV_QCE
543 config CRYPTO_DEV_QCE_AEAD
545 depends on CRYPTO_DEV_QCE
546 select CRYPTO_AUTHENC
547 select CRYPTO_LIB_DES
550 prompt "Algorithms enabled for QCE acceleration"
551 default CRYPTO_DEV_QCE_ENABLE_ALL
552 depends on CRYPTO_DEV_QCE
554 This option allows to choose whether to build support for all algorithms
555 (default), hashes-only, or skciphers-only.
557 The QCE engine does not appear to scale as well as the CPU to handle
558 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
559 QCE handles only 2 requests in parallel.
561 Ipsec throughput seems to improve when disabling either family of
562 algorithms, sharing the load with the CPU. Enabling skciphers-only
563 appears to work best.
565 config CRYPTO_DEV_QCE_ENABLE_ALL
566 bool "All supported algorithms"
567 select CRYPTO_DEV_QCE_SKCIPHER
568 select CRYPTO_DEV_QCE_SHA
569 select CRYPTO_DEV_QCE_AEAD
571 Enable all supported algorithms:
572 - AES (CBC, CTR, ECB, XTS)
576 - SHA256, HMAC-SHA256
578 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
579 bool "Symmetric-key ciphers only"
580 select CRYPTO_DEV_QCE_SKCIPHER
582 Enable symmetric-key ciphers only:
583 - AES (CBC, CTR, ECB, XTS)
587 config CRYPTO_DEV_QCE_ENABLE_SHA
588 bool "Hash/HMAC only"
589 select CRYPTO_DEV_QCE_SHA
591 Enable hashes/HMAC algorithms only:
593 - SHA256, HMAC-SHA256
595 config CRYPTO_DEV_QCE_ENABLE_AEAD
596 bool "AEAD algorithms only"
597 select CRYPTO_DEV_QCE_AEAD
599 Enable AEAD algorithms only:
605 config CRYPTO_DEV_QCE_SW_MAX_LEN
606 int "Default maximum request size to use software for AES"
607 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
610 This sets the default maximum request size to perform AES requests
611 using software instead of the crypto engine. It can be changed by
612 setting the aes_sw_max_len parameter.
614 Small blocks are processed faster in software than hardware.
615 Considering the 256-bit ciphers, software is 2-3 times faster than
616 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
617 With 128-bit keys, the break-even point would be around 1024-bytes.
619 The default is set a little lower, to 512 bytes, to balance the
620 cost in CPU usage. The minimum recommended setting is 16-bytes
621 (1 AES block), since AES-GCM will fail if you set it lower.
622 Setting this to zero will send all requests to the hardware.
624 Note that 192-bit keys are not supported by the hardware and are
625 always processed by the software fallback, and all DES requests
626 are done by the hardware.
628 config CRYPTO_DEV_QCOM_RNG
629 tristate "Qualcomm Random Number Generator Driver"
630 depends on ARCH_QCOM || COMPILE_TEST
633 This driver provides support for the Random Number
634 Generator hardware found on Qualcomm SoCs.
636 To compile this driver as a module, choose M here. The
637 module will be called qcom-rng. If unsure, say N.
639 config CRYPTO_DEV_VMX
640 bool "Support for VMX cryptographic acceleration instructions"
641 depends on PPC64 && VSX
643 Support for VMX cryptographic acceleration instructions.
645 source "drivers/crypto/vmx/Kconfig"
647 config CRYPTO_DEV_IMGTEC_HASH
648 tristate "Imagination Technologies hardware hash accelerator"
649 depends on MIPS || COMPILE_TEST
655 This driver interfaces with the Imagination Technologies
656 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
659 config CRYPTO_DEV_ROCKCHIP
660 tristate "Rockchip's Cryptographic Engine driver"
661 depends on OF && ARCH_ROCKCHIP
668 select CRYPTO_LIB_DES
673 select CRYPTO_SKCIPHER
676 This driver interfaces with the hardware crypto accelerator.
677 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
679 config CRYPTO_DEV_ROCKCHIP_DEBUG
680 bool "Enable Rockchip crypto stats"
681 depends on CRYPTO_DEV_ROCKCHIP
684 Say y to enable Rockchip crypto debug stats.
685 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
686 the number of requests per algorithm and other internal stats.
689 config CRYPTO_DEV_ZYNQMP_AES
690 tristate "Support for Xilinx ZynqMP AES hw accelerator"
691 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
696 Xilinx ZynqMP has AES-GCM engine used for symmetric key
697 encryption and decryption. This driver interfaces with AES hw
698 accelerator. Select this if you want to use the ZynqMP module
701 config CRYPTO_DEV_ZYNQMP_SHA3
702 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
703 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
706 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
707 This driver interfaces with SHA3 hardware engine.
708 Select this if you want to use the ZynqMP module
709 for SHA3 hash computation.
711 source "drivers/crypto/chelsio/Kconfig"
713 source "drivers/crypto/virtio/Kconfig"
715 config CRYPTO_DEV_BCM_SPU
716 tristate "Broadcom symmetric crypto/hash acceleration support"
717 depends on ARCH_BCM_IPROC
720 select CRYPTO_AUTHENC
721 select CRYPTO_LIB_DES
727 This driver provides support for Broadcom crypto acceleration using the
728 Secure Processing Unit (SPU). The SPU driver registers skcipher,
729 ahash, and aead algorithms with the kernel cryptographic API.
731 source "drivers/crypto/stm32/Kconfig"
733 config CRYPTO_DEV_SAFEXCEL
734 tristate "Inside Secure's SafeXcel cryptographic engine driver"
735 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
736 select CRYPTO_LIB_AES
737 select CRYPTO_AUTHENC
738 select CRYPTO_SKCIPHER
739 select CRYPTO_LIB_DES
746 select CRYPTO_CHACHA20POLY1305
749 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
750 engines designed by Inside Secure. It currently accelerates DES, 3DES and
751 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
752 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
753 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
755 config CRYPTO_DEV_ARTPEC6
756 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
757 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
762 select CRYPTO_SKCIPHER
769 Enables the driver for the on-chip crypto accelerator
772 To compile this driver as a module, choose M here.
774 config CRYPTO_DEV_CCREE
775 tristate "Support for ARM TrustZone CryptoCell family of security processors"
776 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
779 select CRYPTO_SKCIPHER
780 select CRYPTO_LIB_DES
782 select CRYPTO_AUTHENC
793 select CRYPTO_SM4_GENERIC
794 select CRYPTO_SM3_GENERIC
796 Say 'Y' to enable a driver for the REE interface of the Arm
797 TrustZone CryptoCell family of processors. Currently the
798 CryptoCell 713, 703, 712, 710 and 630 are supported.
799 Choose this if you wish to use hardware acceleration of
800 cryptographic operations on the system REE.
803 source "drivers/crypto/hisilicon/Kconfig"
805 source "drivers/crypto/amlogic/Kconfig"
807 config CRYPTO_DEV_SA2UL
808 tristate "Support for TI security accelerator"
809 depends on ARCH_K3 || COMPILE_TEST
812 select CRYPTO_AUTHENC
819 K3 devices include a security accelerator engine that may be
820 used for crypto offload. Select this if you want to use hardware
821 acceleration for cryptographic algorithms on these devices.
823 source "drivers/crypto/keembay/Kconfig"
824 source "drivers/crypto/aspeed/Kconfig"