Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[linux-2.6-block.git] / drivers / cpufreq / qcom-cpufreq-hw.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4  */
5
6 #include <linux/bitfield.h>
7 #include <linux/cpufreq.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/of_address.h>
12 #include <linux/of_platform.h>
13 #include <linux/pm_opp.h>
14 #include <linux/slab.h>
15
16 #define LUT_MAX_ENTRIES                 40U
17 #define LUT_SRC                         GENMASK(31, 30)
18 #define LUT_L_VAL                       GENMASK(7, 0)
19 #define LUT_CORE_COUNT                  GENMASK(18, 16)
20 #define LUT_VOLT                        GENMASK(11, 0)
21 #define LUT_ROW_SIZE                    32
22 #define CLK_HW_DIV                      2
23
24 /* Register offsets */
25 #define REG_ENABLE                      0x0
26 #define REG_FREQ_LUT                    0x110
27 #define REG_VOLT_LUT                    0x114
28 #define REG_PERF_STATE                  0x920
29
30 static unsigned long cpu_hw_rate, xo_rate;
31 static struct platform_device *global_pdev;
32
33 static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
34                                         unsigned int index)
35 {
36         void __iomem *perf_state_reg = policy->driver_data;
37
38         writel_relaxed(index, perf_state_reg);
39
40         return 0;
41 }
42
43 static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)
44 {
45         void __iomem *perf_state_reg;
46         struct cpufreq_policy *policy;
47         unsigned int index;
48
49         policy = cpufreq_cpu_get_raw(cpu);
50         if (!policy)
51                 return 0;
52
53         perf_state_reg = policy->driver_data;
54
55         index = readl_relaxed(perf_state_reg);
56         index = min(index, LUT_MAX_ENTRIES - 1);
57
58         return policy->freq_table[index].frequency;
59 }
60
61 static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
62                                                 unsigned int target_freq)
63 {
64         void __iomem *perf_state_reg = policy->driver_data;
65         int index;
66
67         index = policy->cached_resolved_idx;
68         if (index < 0)
69                 return 0;
70
71         writel_relaxed(index, perf_state_reg);
72
73         return policy->freq_table[index].frequency;
74 }
75
76 static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
77                                     struct cpufreq_policy *policy,
78                                     void __iomem *base)
79 {
80         u32 data, src, lval, i, core_count, prev_cc = 0, prev_freq = 0, freq;
81         u32 volt;
82         unsigned int max_cores = cpumask_weight(policy->cpus);
83         struct cpufreq_frequency_table  *table;
84
85         table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL);
86         if (!table)
87                 return -ENOMEM;
88
89         for (i = 0; i < LUT_MAX_ENTRIES; i++) {
90                 data = readl_relaxed(base + REG_FREQ_LUT +
91                                       i * LUT_ROW_SIZE);
92                 src = FIELD_GET(LUT_SRC, data);
93                 lval = FIELD_GET(LUT_L_VAL, data);
94                 core_count = FIELD_GET(LUT_CORE_COUNT, data);
95
96                 data = readl_relaxed(base + REG_VOLT_LUT +
97                                       i * LUT_ROW_SIZE);
98                 volt = FIELD_GET(LUT_VOLT, data) * 1000;
99
100                 if (src)
101                         freq = xo_rate * lval / 1000;
102                 else
103                         freq = cpu_hw_rate / 1000;
104
105                 if (freq != prev_freq && core_count == max_cores) {
106                         table[i].frequency = freq;
107                         dev_pm_opp_add(cpu_dev, freq * 1000, volt);
108                         dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i,
109                                 freq, core_count);
110                 } else {
111                         table[i].frequency = CPUFREQ_ENTRY_INVALID;
112                 }
113
114                 /*
115                  * Two of the same frequencies with the same core counts means
116                  * end of table
117                  */
118                 if (i > 0 && prev_freq == freq && prev_cc == core_count) {
119                         struct cpufreq_frequency_table *prev = &table[i - 1];
120
121                         /*
122                          * Only treat the last frequency that might be a boost
123                          * as the boost frequency
124                          */
125                         if (prev_cc != max_cores) {
126                                 prev->frequency = prev_freq;
127                                 prev->flags = CPUFREQ_BOOST_FREQ;
128                                 dev_pm_opp_add(cpu_dev, prev_freq * 1000, volt);
129                         }
130
131                         break;
132                 }
133
134                 prev_cc = core_count;
135                 prev_freq = freq;
136         }
137
138         table[i].frequency = CPUFREQ_TABLE_END;
139         policy->freq_table = table;
140         dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
141
142         return 0;
143 }
144
145 static void qcom_get_related_cpus(int index, struct cpumask *m)
146 {
147         struct device_node *cpu_np;
148         struct of_phandle_args args;
149         int cpu, ret;
150
151         for_each_possible_cpu(cpu) {
152                 cpu_np = of_cpu_device_node_get(cpu);
153                 if (!cpu_np)
154                         continue;
155
156                 ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
157                                                  "#freq-domain-cells", 0,
158                                                  &args);
159                 of_node_put(cpu_np);
160                 if (ret < 0)
161                         continue;
162
163                 if (index == args.args[0])
164                         cpumask_set_cpu(cpu, m);
165         }
166 }
167
168 static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
169 {
170         struct device *dev = &global_pdev->dev;
171         struct of_phandle_args args;
172         struct device_node *cpu_np;
173         struct device *cpu_dev;
174         struct resource *res;
175         void __iomem *base;
176         int ret, index;
177
178         cpu_dev = get_cpu_device(policy->cpu);
179         if (!cpu_dev) {
180                 pr_err("%s: failed to get cpu%d device\n", __func__,
181                        policy->cpu);
182                 return -ENODEV;
183         }
184
185         cpu_np = of_cpu_device_node_get(policy->cpu);
186         if (!cpu_np)
187                 return -EINVAL;
188
189         ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
190                                          "#freq-domain-cells", 0, &args);
191         of_node_put(cpu_np);
192         if (ret)
193                 return ret;
194
195         index = args.args[0];
196
197         res = platform_get_resource(global_pdev, IORESOURCE_MEM, index);
198         if (!res)
199                 return -ENODEV;
200
201         base = devm_ioremap(dev, res->start, resource_size(res));
202         if (!base)
203                 return -ENOMEM;
204
205         /* HW should be in enabled state to proceed */
206         if (!(readl_relaxed(base + REG_ENABLE) & 0x1)) {
207                 dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
208                 ret = -ENODEV;
209                 goto error;
210         }
211
212         qcom_get_related_cpus(index, policy->cpus);
213         if (!cpumask_weight(policy->cpus)) {
214                 dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
215                 ret = -ENOENT;
216                 goto error;
217         }
218
219         policy->driver_data = base + REG_PERF_STATE;
220
221         ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy, base);
222         if (ret) {
223                 dev_err(dev, "Domain-%d failed to read LUT\n", index);
224                 goto error;
225         }
226
227         ret = dev_pm_opp_get_opp_count(cpu_dev);
228         if (ret <= 0) {
229                 dev_err(cpu_dev, "Failed to add OPPs\n");
230                 ret = -ENODEV;
231                 goto error;
232         }
233
234         dev_pm_opp_of_register_em(policy->cpus);
235
236         policy->fast_switch_possible = true;
237
238         return 0;
239 error:
240         devm_iounmap(dev, base);
241         return ret;
242 }
243
244 static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy)
245 {
246         struct device *cpu_dev = get_cpu_device(policy->cpu);
247         void __iomem *base = policy->driver_data - REG_PERF_STATE;
248
249         dev_pm_opp_remove_all_dynamic(cpu_dev);
250         kfree(policy->freq_table);
251         devm_iounmap(&global_pdev->dev, base);
252
253         return 0;
254 }
255
256 static struct freq_attr *qcom_cpufreq_hw_attr[] = {
257         &cpufreq_freq_attr_scaling_available_freqs,
258         &cpufreq_freq_attr_scaling_boost_freqs,
259         NULL
260 };
261
262 static struct cpufreq_driver cpufreq_qcom_hw_driver = {
263         .flags          = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
264                           CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
265                           CPUFREQ_IS_COOLING_DEV,
266         .verify         = cpufreq_generic_frequency_table_verify,
267         .target_index   = qcom_cpufreq_hw_target_index,
268         .get            = qcom_cpufreq_hw_get,
269         .init           = qcom_cpufreq_hw_cpu_init,
270         .exit           = qcom_cpufreq_hw_cpu_exit,
271         .fast_switch    = qcom_cpufreq_hw_fast_switch,
272         .name           = "qcom-cpufreq-hw",
273         .attr           = qcom_cpufreq_hw_attr,
274 };
275
276 static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
277 {
278         struct clk *clk;
279         int ret;
280
281         clk = clk_get(&pdev->dev, "xo");
282         if (IS_ERR(clk))
283                 return PTR_ERR(clk);
284
285         xo_rate = clk_get_rate(clk);
286         clk_put(clk);
287
288         clk = clk_get(&pdev->dev, "alternate");
289         if (IS_ERR(clk))
290                 return PTR_ERR(clk);
291
292         cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV;
293         clk_put(clk);
294
295         global_pdev = pdev;
296
297         ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
298         if (ret)
299                 dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
300         else
301                 dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n");
302
303         return ret;
304 }
305
306 static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev)
307 {
308         return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver);
309 }
310
311 static const struct of_device_id qcom_cpufreq_hw_match[] = {
312         { .compatible = "qcom,cpufreq-hw" },
313         {}
314 };
315 MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match);
316
317 static struct platform_driver qcom_cpufreq_hw_driver = {
318         .probe = qcom_cpufreq_hw_driver_probe,
319         .remove = qcom_cpufreq_hw_driver_remove,
320         .driver = {
321                 .name = "qcom-cpufreq-hw",
322                 .of_match_table = qcom_cpufreq_hw_match,
323         },
324 };
325
326 static int __init qcom_cpufreq_hw_init(void)
327 {
328         return platform_driver_register(&qcom_cpufreq_hw_driver);
329 }
330 device_initcall(qcom_cpufreq_hw_init);
331
332 static void __exit qcom_cpufreq_hw_exit(void)
333 {
334         platform_driver_unregister(&qcom_cpufreq_hw_driver);
335 }
336 module_exit(qcom_cpufreq_hw_exit);
337
338 MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver");
339 MODULE_LICENSE("GPL v2");