Merge remote-tracking branch 'asoc/topic/core' into asoc-next
[linux-2.6-block.git] / drivers / cpufreq / exynos-cpufreq.c
1 /*
2  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3  *              http://www.samsung.com
4  *
5  * EXYNOS - CPU frequency scaling support for EXYNOS series
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/err.h>
15 #include <linux/clk.h>
16 #include <linux/io.h>
17 #include <linux/slab.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/cpufreq.h>
20 #include <linux/platform_device.h>
21 #include <linux/of.h>
22 #include <linux/cpu_cooling.h>
23 #include <linux/cpu.h>
24
25 #include "exynos-cpufreq.h"
26
27 static struct exynos_dvfs_info *exynos_info;
28 static struct thermal_cooling_device *cdev;
29 static struct regulator *arm_regulator;
30 static unsigned int locking_frequency;
31
32 static int exynos_cpufreq_get_index(unsigned int freq)
33 {
34         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
35         struct cpufreq_frequency_table *pos;
36
37         cpufreq_for_each_entry(pos, freq_table)
38                 if (pos->frequency == freq)
39                         break;
40
41         if (pos->frequency == CPUFREQ_TABLE_END)
42                 return -EINVAL;
43
44         return pos - freq_table;
45 }
46
47 static int exynos_cpufreq_scale(unsigned int target_freq)
48 {
49         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
50         unsigned int *volt_table = exynos_info->volt_table;
51         struct cpufreq_policy *policy = cpufreq_cpu_get(0);
52         unsigned int arm_volt, safe_arm_volt = 0;
53         unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
54         struct device *dev = exynos_info->dev;
55         unsigned int old_freq;
56         int index, old_index;
57         int ret = 0;
58
59         old_freq = policy->cur;
60
61         /*
62          * The policy max have been changed so that we cannot get proper
63          * old_index with cpufreq_frequency_table_target(). Thus, ignore
64          * policy and get the index from the raw frequency table.
65          */
66         old_index = exynos_cpufreq_get_index(old_freq);
67         if (old_index < 0) {
68                 ret = old_index;
69                 goto out;
70         }
71
72         index = exynos_cpufreq_get_index(target_freq);
73         if (index < 0) {
74                 ret = index;
75                 goto out;
76         }
77
78         /*
79          * ARM clock source will be changed APLL to MPLL temporary
80          * To support this level, need to control regulator for
81          * required voltage level
82          */
83         if (exynos_info->need_apll_change != NULL) {
84                 if (exynos_info->need_apll_change(old_index, index) &&
85                    (freq_table[index].frequency < mpll_freq_khz) &&
86                    (freq_table[old_index].frequency < mpll_freq_khz))
87                         safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
88         }
89         arm_volt = volt_table[index];
90
91         /* When the new frequency is higher than current frequency */
92         if ((target_freq > old_freq) && !safe_arm_volt) {
93                 /* Firstly, voltage up to increase frequency */
94                 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
95                 if (ret) {
96                         dev_err(dev, "failed to set cpu voltage to %d\n",
97                                 arm_volt);
98                         return ret;
99                 }
100         }
101
102         if (safe_arm_volt) {
103                 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
104                                       safe_arm_volt);
105                 if (ret) {
106                         dev_err(dev, "failed to set cpu voltage to %d\n",
107                                 safe_arm_volt);
108                         return ret;
109                 }
110         }
111
112         exynos_info->set_freq(old_index, index);
113
114         /* When the new frequency is lower than current frequency */
115         if ((target_freq < old_freq) ||
116            ((target_freq > old_freq) && safe_arm_volt)) {
117                 /* down the voltage after frequency change */
118                 ret = regulator_set_voltage(arm_regulator, arm_volt,
119                                 arm_volt);
120                 if (ret) {
121                         dev_err(dev, "failed to set cpu voltage to %d\n",
122                                 arm_volt);
123                         goto out;
124                 }
125         }
126
127 out:
128         cpufreq_cpu_put(policy);
129
130         return ret;
131 }
132
133 static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
134 {
135         return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
136 }
137
138 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
139 {
140         policy->clk = exynos_info->cpu_clk;
141         policy->suspend_freq = locking_frequency;
142         return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
143 }
144
145 static struct cpufreq_driver exynos_driver = {
146         .flags          = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
147         .verify         = cpufreq_generic_frequency_table_verify,
148         .target_index   = exynos_target,
149         .get            = cpufreq_generic_get,
150         .init           = exynos_cpufreq_cpu_init,
151         .name           = "exynos_cpufreq",
152         .attr           = cpufreq_generic_attr,
153 #ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
154         .boost_supported = true,
155 #endif
156 #ifdef CONFIG_PM
157         .suspend        = cpufreq_generic_suspend,
158 #endif
159 };
160
161 static int exynos_cpufreq_probe(struct platform_device *pdev)
162 {
163         struct device_node *cpu0;
164         int ret = -EINVAL;
165
166         exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
167         if (!exynos_info)
168                 return -ENOMEM;
169
170         exynos_info->dev = &pdev->dev;
171
172         if (of_machine_is_compatible("samsung,exynos4212")) {
173                 exynos_info->type = EXYNOS_SOC_4212;
174                 ret = exynos4x12_cpufreq_init(exynos_info);
175         } else if (of_machine_is_compatible("samsung,exynos4412")) {
176                 exynos_info->type = EXYNOS_SOC_4412;
177                 ret = exynos4x12_cpufreq_init(exynos_info);
178         } else if (of_machine_is_compatible("samsung,exynos5250")) {
179                 exynos_info->type = EXYNOS_SOC_5250;
180                 ret = exynos5250_cpufreq_init(exynos_info);
181         } else {
182                 pr_err("%s: Unknown SoC type\n", __func__);
183                 ret = -ENODEV;
184         }
185
186         if (ret)
187                 goto err_vdd_arm;
188
189         if (exynos_info->set_freq == NULL) {
190                 dev_err(&pdev->dev, "No set_freq function (ERR)\n");
191                 ret = -EINVAL;
192                 goto err_vdd_arm;
193         }
194
195         arm_regulator = regulator_get(NULL, "vdd_arm");
196         if (IS_ERR(arm_regulator)) {
197                 dev_err(&pdev->dev, "failed to get resource vdd_arm\n");
198                 ret = -EINVAL;
199                 goto err_vdd_arm;
200         }
201
202         /* Done here as we want to capture boot frequency */
203         locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
204
205         ret = cpufreq_register_driver(&exynos_driver);
206         if (ret)
207                 goto err_cpufreq_reg;
208
209         cpu0 = of_get_cpu_node(0, NULL);
210         if (!cpu0) {
211                 pr_err("failed to find cpu0 node\n");
212                 return 0;
213         }
214
215         if (of_find_property(cpu0, "#cooling-cells", NULL)) {
216                 cdev = of_cpufreq_cooling_register(cpu0,
217                                                    cpu_present_mask);
218                 if (IS_ERR(cdev))
219                         pr_err("running cpufreq without cooling device: %ld\n",
220                                PTR_ERR(cdev));
221         }
222
223         return 0;
224
225 err_cpufreq_reg:
226         dev_err(&pdev->dev, "failed to register cpufreq driver\n");
227         regulator_put(arm_regulator);
228 err_vdd_arm:
229         kfree(exynos_info);
230         return ret;
231 }
232
233 static struct platform_driver exynos_cpufreq_platdrv = {
234         .driver = {
235                 .name   = "exynos-cpufreq",
236         },
237         .probe = exynos_cpufreq_probe,
238 };
239 module_platform_driver(exynos_cpufreq_platdrv);