2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 * The OPP code in function cpu0_set_target() is reused from
5 * drivers/cpufreq/omap-cpufreq.c
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 #include <linux/clk.h>
15 #include <linux/cpu.h>
16 #include <linux/cpufreq.h>
17 #include <linux/err.h>
18 #include <linux/module.h>
20 #include <linux/pm_opp.h>
21 #include <linux/platform_device.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
25 static unsigned int transition_latency;
26 static unsigned int voltage_tolerance; /* in percentage */
28 static struct device *cpu_dev;
29 static struct clk *cpu_clk;
30 static struct regulator *cpu_reg;
31 static struct cpufreq_frequency_table *freq_table;
33 static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
35 struct dev_pm_opp *opp;
36 unsigned long volt = 0, volt_old = 0, tol = 0;
37 unsigned int old_freq, new_freq;
38 long freq_Hz, freq_exact;
41 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
43 freq_Hz = freq_table[index].frequency * 1000;
46 new_freq = freq_Hz / 1000;
47 old_freq = clk_get_rate(cpu_clk) / 1000;
49 if (!IS_ERR(cpu_reg)) {
51 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
54 pr_err("failed to find OPP for %ld\n", freq_Hz);
57 volt = dev_pm_opp_get_voltage(opp);
59 tol = volt * voltage_tolerance / 100;
60 volt_old = regulator_get_voltage(cpu_reg);
63 pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
64 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
65 new_freq / 1000, volt ? volt / 1000 : -1);
67 /* scaling up? scale voltage before frequency */
68 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
69 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
71 pr_err("failed to scale voltage up: %d\n", ret);
76 ret = clk_set_rate(cpu_clk, freq_exact);
78 pr_err("failed to set clock rate: %d\n", ret);
80 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
84 /* scaling down? scale voltage after frequency */
85 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
86 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
88 pr_err("failed to scale voltage down: %d\n", ret);
89 clk_set_rate(cpu_clk, old_freq * 1000);
96 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
98 policy->clk = cpu_clk;
99 return cpufreq_generic_init(policy, freq_table, transition_latency);
102 static struct cpufreq_driver cpu0_cpufreq_driver = {
103 .flags = CPUFREQ_STICKY,
104 .verify = cpufreq_generic_frequency_table_verify,
105 .target_index = cpu0_set_target,
106 .get = cpufreq_generic_get,
107 .init = cpu0_cpufreq_init,
108 .exit = cpufreq_generic_exit,
109 .name = "generic_cpu0",
110 .attr = cpufreq_generic_attr,
113 static int cpu0_cpufreq_probe(struct platform_device *pdev)
115 struct device_node *np;
118 cpu_dev = get_cpu_device(0);
120 pr_err("failed to get cpu0 device\n");
124 np = of_node_get(cpu_dev->of_node);
126 pr_err("failed to find cpu0 node\n");
130 cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
131 if (IS_ERR(cpu_reg)) {
133 * If cpu0 regulator supply node is present, but regulator is
134 * not yet registered, we should try defering probe.
136 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
137 dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
141 pr_warn("failed to get cpu0 regulator: %ld\n",
145 cpu_clk = devm_clk_get(cpu_dev, NULL);
146 if (IS_ERR(cpu_clk)) {
147 ret = PTR_ERR(cpu_clk);
148 pr_err("failed to get cpu0 clock: %d\n", ret);
152 ret = of_init_opp_table(cpu_dev);
154 pr_err("failed to init OPP table: %d\n", ret);
158 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
160 pr_err("failed to init cpufreq table: %d\n", ret);
164 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
166 if (of_property_read_u32(np, "clock-latency", &transition_latency))
167 transition_latency = CPUFREQ_ETERNAL;
169 if (!IS_ERR(cpu_reg)) {
170 struct dev_pm_opp *opp;
171 unsigned long min_uV, max_uV;
175 * OPP is maintained in order of increasing frequency, and
176 * freq_table initialised from OPP is therefore sorted in the
179 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
182 opp = dev_pm_opp_find_freq_exact(cpu_dev,
183 freq_table[0].frequency * 1000, true);
184 min_uV = dev_pm_opp_get_voltage(opp);
185 opp = dev_pm_opp_find_freq_exact(cpu_dev,
186 freq_table[i-1].frequency * 1000, true);
187 max_uV = dev_pm_opp_get_voltage(opp);
189 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
191 transition_latency += ret * 1000;
194 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
196 pr_err("failed register driver: %d\n", ret);
204 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
210 static int cpu0_cpufreq_remove(struct platform_device *pdev)
212 cpufreq_unregister_driver(&cpu0_cpufreq_driver);
213 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
218 static struct platform_driver cpu0_cpufreq_platdrv = {
220 .name = "cpufreq-cpu0",
221 .owner = THIS_MODULE,
223 .probe = cpu0_cpufreq_probe,
224 .remove = cpu0_cpufreq_remove,
226 module_platform_driver(cpu0_cpufreq_platdrv);
228 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
229 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
230 MODULE_LICENSE("GPL");