drivers/cpufreq/cpufreq-cpu0.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * The OPP code in function cpu0_set_target() is reused from
   5  * drivers/cpufreq/omap-cpufreq.c
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  13
  14 #include <linux/clk.h>
  15 #include <linux/cpu.h>
  16 #include <linux/cpu_cooling.h>
  17 #include <linux/cpufreq.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/err.h>
  20 #include <linux/module.h>
  21 #include <linux/of.h>
  22 #include <linux/pm_opp.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <linux/slab.h>
  26 #include <linux/thermal.h>
  27
  28 static unsigned int transition_latency;
  29 static unsigned int voltage_tolerance; /* in percentage */
  30
  31 static struct device *cpu_dev;
  32 static struct clk *cpu_clk;
  33 static struct regulator *cpu_reg;
  34 static struct cpufreq_frequency_table *freq_table;
  35 static struct thermal_cooling_device *cdev;
  36
  37 static unsigned int cpu0_get_speed(unsigned int cpu)
  38 {
  39         return clk_get_rate(cpu_clk) / 1000;
  40 }
  41
  42 static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
  43 {
  44         struct dev_pm_opp *opp;
  45         unsigned long volt = 0, volt_old = 0, tol = 0;
  46         unsigned int old_freq, new_freq;
  47         long freq_Hz, freq_exact;
  48         int ret;
  49
  50         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  51         if (freq_Hz < 0)
  52                 freq_Hz = freq_table[index].frequency * 1000;
  53
  54         freq_exact = freq_Hz;
  55         new_freq = freq_Hz / 1000;
  56         old_freq = clk_get_rate(cpu_clk) / 1000;
  57
  58         if (!IS_ERR(cpu_reg)) {
  59                 rcu_read_lock();
  60                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  61                 if (IS_ERR(opp)) {
  62                         rcu_read_unlock();
  63                         pr_err("failed to find OPP for %ld\n", freq_Hz);
  64                         return PTR_ERR(opp);
  65                 }
  66                 volt = dev_pm_opp_get_voltage(opp);
  67                 rcu_read_unlock();
  68                 tol = volt * voltage_tolerance / 100;
  69                 volt_old = regulator_get_voltage(cpu_reg);
  70         }
  71
  72         pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
  73                  old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  74                  new_freq / 1000, volt ? volt / 1000 : -1);
  75
  76         /* scaling up?  scale voltage before frequency */
  77         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  78                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  79                 if (ret) {
  80                         pr_err("failed to scale voltage up: %d\n", ret);
  81                         return ret;
  82                 }
  83         }
  84
  85         ret = clk_set_rate(cpu_clk, freq_exact);
  86         if (ret) {
  87                 pr_err("failed to set clock rate: %d\n", ret);
  88                 if (!IS_ERR(cpu_reg))
  89                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  90                 return ret;
  91         }
  92
  93         /* scaling down?  scale voltage after frequency */
  94         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  95                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  96                 if (ret) {
  97                         pr_err("failed to scale voltage down: %d\n", ret);
  98                         clk_set_rate(cpu_clk, old_freq * 1000);
  99                 }
 100         }
 101
 102         return ret;
 103 }
 104
 105 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 106 {
 107         return cpufreq_generic_init(policy, freq_table, transition_latency);
 108 }
 109
 110 static struct cpufreq_driver cpu0_cpufreq_driver = {
 111         .flags = CPUFREQ_STICKY,
 112         .verify = cpufreq_generic_frequency_table_verify,
 113         .target_index = cpu0_set_target,
 114         .get = cpu0_get_speed,
 115         .init = cpu0_cpufreq_init,
 116         .exit = cpufreq_generic_exit,
 117         .name = "generic_cpu0",
 118         .attr = cpufreq_generic_attr,
 119 };
 120
 121 static int cpu0_cpufreq_probe(struct platform_device *pdev)
 122 {
 123         struct device_node *np;
 124         int ret;
 125
 126         cpu_dev = get_cpu_device(0);
 127         if (!cpu_dev) {
 128                 pr_err("failed to get cpu0 device\n");
 129                 return -ENODEV;
 130         }
 131
 132         np = of_node_get(cpu_dev->of_node);
 133         if (!np) {
 134                 pr_err("failed to find cpu0 node\n");
 135                 return -ENOENT;
 136         }
 137
 138         cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
 139         if (IS_ERR(cpu_reg)) {
 140                 /*
 141                  * If cpu0 regulator supply node is present, but regulator is
 142                  * not yet registered, we should try defering probe.
 143                  */
 144                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 145                         dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
 146                         ret = -EPROBE_DEFER;
 147                         goto out_put_node;
 148                 }
 149                 pr_warn("failed to get cpu0 regulator: %ld\n",
 150                         PTR_ERR(cpu_reg));
 151         }
 152
 153         cpu_clk = devm_clk_get(cpu_dev, NULL);
 154         if (IS_ERR(cpu_clk)) {
 155                 ret = PTR_ERR(cpu_clk);
 156                 pr_err("failed to get cpu0 clock: %d\n", ret);
 157                 goto out_put_node;
 158         }
 159
 160         ret = of_init_opp_table(cpu_dev);
 161         if (ret) {
 162                 pr_err("failed to init OPP table: %d\n", ret);
 163                 goto out_put_node;
 164         }
 165
 166         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 167         if (ret) {
 168                 pr_err("failed to init cpufreq table: %d\n", ret);
 169                 goto out_put_node;
 170         }
 171
 172         of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 173
 174         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 175                 transition_latency = CPUFREQ_ETERNAL;
 176
 177         if (!IS_ERR(cpu_reg)) {
 178                 struct dev_pm_opp *opp;
 179                 unsigned long min_uV, max_uV;
 180                 int i;
 181
 182                 /*
 183                  * OPP is maintained in order of increasing frequency, and
 184                  * freq_table initialised from OPP is therefore sorted in the
 185                  * same order.
 186                  */
 187                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 188                         ;
 189                 rcu_read_lock();
 190                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 191                                 freq_table[0].frequency * 1000, true);
 192                 min_uV = dev_pm_opp_get_voltage(opp);
 193                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 194                                 freq_table[i-1].frequency * 1000, true);
 195                 max_uV = dev_pm_opp_get_voltage(opp);
 196                 rcu_read_unlock();
 197                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 198                 if (ret > 0)
 199                         transition_latency += ret * 1000;
 200         }
 201
 202         ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 203         if (ret) {
 204                 pr_err("failed register driver: %d\n", ret);
 205                 goto out_free_table;
 206         }
 207
 208         /*
 209          * For now, just loading the cooling device;
 210          * thermal DT code takes care of matching them.
 211          */
 212         if (of_find_property(np, "#cooling-cells", NULL)) {
 213                 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
 214                 if (IS_ERR(cdev))
 215                         pr_err("running cpufreq without cooling device: %ld\n",
 216                                PTR_ERR(cdev));
 217         }
 218
 219         of_node_put(np);
 220         return 0;
 221
 222 out_free_table:
 223         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 224 out_put_node:
 225         of_node_put(np);
 226         return ret;
 227 }
 228
 229 static int cpu0_cpufreq_remove(struct platform_device *pdev)
 230 {
 231         cpufreq_cooling_unregister(cdev);
 232         cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 233         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 234
 235         return 0;
 236 }
 237
 238 static struct platform_driver cpu0_cpufreq_platdrv = {
 239         .driver = {
 240                 .name   = "cpufreq-cpu0",
 241                 .owner  = THIS_MODULE,
 242         },
 243         .probe          = cpu0_cpufreq_probe,
 244         .remove         = cpu0_cpufreq_remove,
 245 };
 246 module_platform_driver(cpu0_cpufreq_platdrv);
 247
 248 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 249 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 250 MODULE_LICENSE("GPL");