drivers/cpufreq/cpufreq-cpu0.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * Copyright (C) 2014 Linaro.
   5  * Viresh Kumar <viresh.kumar@linaro.org>
   6  *
   7  * The OPP code in function cpu0_set_target() is reused from
   8  * drivers/cpufreq/omap-cpufreq.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  16
  17 #include <linux/clk.h>
  18 #include <linux/cpu.h>
  19 #include <linux/cpu_cooling.h>
  20 #include <linux/cpufreq.h>
  21 #include <linux/cpumask.h>
  22 #include <linux/err.h>
  23 #include <linux/module.h>
  24 #include <linux/of.h>
  25 #include <linux/pm_opp.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/regulator/consumer.h>
  28 #include <linux/slab.h>
  29 #include <linux/thermal.h>
  30
  31 static unsigned int transition_latency;
  32 static unsigned int voltage_tolerance; /* in percentage */
  33
  34 static struct device *cpu_dev;
  35 static struct clk *cpu_clk;
  36 static struct regulator *cpu_reg;
  37 static struct cpufreq_frequency_table *freq_table;
  38 static struct thermal_cooling_device *cdev;
  39
  40 static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
  41 {
  42         struct dev_pm_opp *opp;
  43         unsigned long volt = 0, volt_old = 0, tol = 0;
  44         unsigned int old_freq, new_freq;
  45         long freq_Hz, freq_exact;
  46         int ret;
  47
  48         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  49         if (freq_Hz <= 0)
  50                 freq_Hz = freq_table[index].frequency * 1000;
  51
  52         freq_exact = freq_Hz;
  53         new_freq = freq_Hz / 1000;
  54         old_freq = clk_get_rate(cpu_clk) / 1000;
  55
  56         if (!IS_ERR(cpu_reg)) {
  57                 rcu_read_lock();
  58                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  59                 if (IS_ERR(opp)) {
  60                         rcu_read_unlock();
  61                         dev_err(cpu_dev, "failed to find OPP for %ld\n",
  62                                 freq_Hz);
  63                         return PTR_ERR(opp);
  64                 }
  65                 volt = dev_pm_opp_get_voltage(opp);
  66                 rcu_read_unlock();
  67                 tol = volt * voltage_tolerance / 100;
  68                 volt_old = regulator_get_voltage(cpu_reg);
  69         }
  70
  71         dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  72                 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  73                 new_freq / 1000, volt ? volt / 1000 : -1);
  74
  75         /* scaling up?  scale voltage before frequency */
  76         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  77                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  78                 if (ret) {
  79                         dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  80                                 ret);
  81                         return ret;
  82                 }
  83         }
  84
  85         ret = clk_set_rate(cpu_clk, freq_exact);
  86         if (ret) {
  87                 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  88                 if (!IS_ERR(cpu_reg))
  89                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  90                 return ret;
  91         }
  92
  93         /* scaling down?  scale voltage after frequency */
  94         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  95                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  96                 if (ret) {
  97                         dev_err(cpu_dev, "failed to scale voltage down: %d\n",
  98                                 ret);
  99                         clk_set_rate(cpu_clk, old_freq * 1000);
 100                 }
 101         }
 102
 103         return ret;
 104 }
 105
 106 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 107 {
 108         policy->clk = cpu_clk;
 109         return cpufreq_generic_init(policy, freq_table, transition_latency);
 110 }
 111
 112 static struct cpufreq_driver cpu0_cpufreq_driver = {
 113         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 114         .verify = cpufreq_generic_frequency_table_verify,
 115         .target_index = cpu0_set_target,
 116         .get = cpufreq_generic_get,
 117         .init = cpu0_cpufreq_init,
 118         .name = "generic_cpu0",
 119         .attr = cpufreq_generic_attr,
 120 };
 121
 122 static int cpu0_cpufreq_probe(struct platform_device *pdev)
 123 {
 124         struct device_node *np;
 125         int ret;
 126
 127         cpu_dev = get_cpu_device(0);
 128         if (!cpu_dev) {
 129                 pr_err("failed to get cpu0 device\n");
 130                 return -ENODEV;
 131         }
 132
 133         np = of_node_get(cpu_dev->of_node);
 134         if (!np) {
 135                 dev_err(cpu_dev, "failed to find cpu0 node\n");
 136                 return -ENOENT;
 137         }
 138
 139         cpu_reg = regulator_get_optional(cpu_dev, "cpu0");
 140         if (IS_ERR(cpu_reg)) {
 141                 /*
 142                  * If cpu0 regulator supply node is present, but regulator is
 143                  * not yet registered, we should try defering probe.
 144                  */
 145                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 146                         dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n");
 147                         ret = -EPROBE_DEFER;
 148                         goto out_put_node;
 149                 }
 150                 dev_warn(cpu_dev, "failed to get cpu0 regulator: %ld\n",
 151                          PTR_ERR(cpu_reg));
 152         }
 153
 154         cpu_clk = clk_get(cpu_dev, NULL);
 155         if (IS_ERR(cpu_clk)) {
 156                 ret = PTR_ERR(cpu_clk);
 157
 158                 /*
 159                  * If cpu's clk node is present, but clock is not yet
 160                  * registered, we should try defering probe.
 161                  */
 162                 if (ret == -EPROBE_DEFER)
 163                         dev_dbg(cpu_dev, "cpu0 clock not ready, retry\n");
 164                 else
 165                         dev_err(cpu_dev, "failed to get cpu0 clock: %d\n", ret);
 166
 167                 goto out_put_reg;
 168         }
 169
 170         /* OPPs might be populated at runtime, don't check for error here */
 171         of_init_opp_table(cpu_dev);
 172
 173         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 174         if (ret) {
 175                 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
 176                 goto out_put_clk;
 177         }
 178
 179         of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 180
 181         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 182                 transition_latency = CPUFREQ_ETERNAL;
 183
 184         if (!IS_ERR(cpu_reg)) {
 185                 struct dev_pm_opp *opp;
 186                 unsigned long min_uV, max_uV;
 187                 int i;
 188
 189                 /*
 190                  * OPP is maintained in order of increasing frequency, and
 191                  * freq_table initialised from OPP is therefore sorted in the
 192                  * same order.
 193                  */
 194                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 195                         ;
 196                 rcu_read_lock();
 197                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 198                                 freq_table[0].frequency * 1000, true);
 199                 min_uV = dev_pm_opp_get_voltage(opp);
 200                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 201                                 freq_table[i-1].frequency * 1000, true);
 202                 max_uV = dev_pm_opp_get_voltage(opp);
 203                 rcu_read_unlock();
 204                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 205                 if (ret > 0)
 206                         transition_latency += ret * 1000;
 207         }
 208
 209         ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 210         if (ret) {
 211                 dev_err(cpu_dev, "failed to register driver: %d\n", ret);
 212                 goto out_free_table;
 213         }
 214
 215         /*
 216          * For now, just loading the cooling device;
 217          * thermal DT code takes care of matching them.
 218          */
 219         if (of_find_property(np, "#cooling-cells", NULL)) {
 220                 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
 221                 if (IS_ERR(cdev))
 222                         dev_err(cpu_dev,
 223                                 "running cpufreq without cooling device: %ld\n",
 224                                 PTR_ERR(cdev));
 225         }
 226
 227         of_node_put(np);
 228         return 0;
 229
 230 out_free_table:
 231         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 232 out_put_clk:
 233         clk_put(cpu_clk);
 234 out_put_reg:
 235         if (!IS_ERR(cpu_reg))
 236                 regulator_put(cpu_reg);
 237 out_put_node:
 238         of_node_put(np);
 239         return ret;
 240 }
 241
 242 static int cpu0_cpufreq_remove(struct platform_device *pdev)
 243 {
 244         cpufreq_cooling_unregister(cdev);
 245         cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 246         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 247
 248         return 0;
 249 }
 250
 251 static struct platform_driver cpu0_cpufreq_platdrv = {
 252         .driver = {
 253                 .name   = "cpufreq-cpu0",
 254                 .owner  = THIS_MODULE,
 255         },
 256         .probe          = cpu0_cpufreq_probe,
 257         .remove         = cpu0_cpufreq_remove,
 258 };
 259 module_platform_driver(cpu0_cpufreq_platdrv);
 260
 261 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
 262 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 263 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 264 MODULE_LICENSE("GPL");