1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 #include <linux/bitops.h>
7 #include <linux/clk-provider.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/pm_clock.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/regmap.h>
15 #include <dt-bindings/clock/qcom,q6sstopcc-qcs404.h>
17 #include "clk-regmap.h"
18 #include "clk-branch.h"
22 static struct clk_branch lcc_ahbfabric_cbc_clk = {
24 .halt_check = BRANCH_HALT,
26 .enable_reg = 0x1b004,
27 .enable_mask = BIT(0),
28 .hw.init = &(struct clk_init_data){
29 .name = "lcc_ahbfabric_cbc_clk",
30 .ops = &clk_branch2_ops,
35 static struct clk_branch lcc_q6ss_ahbs_cbc_clk = {
37 .halt_check = BRANCH_VOTED,
39 .enable_reg = 0x22000,
40 .enable_mask = BIT(0),
41 .hw.init = &(struct clk_init_data){
42 .name = "lcc_q6ss_ahbs_cbc_clk",
43 .ops = &clk_branch2_ops,
48 static struct clk_branch lcc_q6ss_tcm_slave_cbc_clk = {
50 .halt_check = BRANCH_VOTED,
52 .enable_reg = 0x1c000,
53 .enable_mask = BIT(0),
54 .hw.init = &(struct clk_init_data){
55 .name = "lcc_q6ss_tcm_slave_cbc_clk",
56 .ops = &clk_branch2_ops,
61 static struct clk_branch lcc_q6ss_ahbm_cbc_clk = {
63 .halt_check = BRANCH_VOTED,
65 .enable_reg = 0x22004,
66 .enable_mask = BIT(0),
67 .hw.init = &(struct clk_init_data){
68 .name = "lcc_q6ss_ahbm_cbc_clk",
69 .ops = &clk_branch2_ops,
74 static struct clk_branch lcc_q6ss_axim_cbc_clk = {
76 .halt_check = BRANCH_VOTED,
78 .enable_reg = 0x1c004,
79 .enable_mask = BIT(0),
80 .hw.init = &(struct clk_init_data){
81 .name = "lcc_q6ss_axim_cbc_clk",
82 .ops = &clk_branch2_ops,
87 static struct clk_branch lcc_q6ss_bcr_sleep_clk = {
89 .halt_check = BRANCH_VOTED,
92 .enable_mask = BIT(0),
93 .hw.init = &(struct clk_init_data){
94 .name = "lcc_q6ss_bcr_sleep_clk",
95 .ops = &clk_branch2_ops,
101 static struct clk_branch tcsr_lcc_csr_cbcr_clk = {
103 .halt_check = BRANCH_VOTED,
105 .enable_reg = 0x8008,
106 .enable_mask = BIT(0),
107 .hw.init = &(struct clk_init_data){
108 .name = "tcsr_lcc_csr_cbcr_clk",
109 .ops = &clk_branch2_ops,
114 static struct regmap_config q6sstop_regmap_config = {
121 static struct clk_regmap *q6sstop_qcs404_clocks[] = {
122 [LCC_AHBFABRIC_CBC_CLK] = &lcc_ahbfabric_cbc_clk.clkr,
123 [LCC_Q6SS_AHBS_CBC_CLK] = &lcc_q6ss_ahbs_cbc_clk.clkr,
124 [LCC_Q6SS_TCM_SLAVE_CBC_CLK] = &lcc_q6ss_tcm_slave_cbc_clk.clkr,
125 [LCC_Q6SS_AHBM_CBC_CLK] = &lcc_q6ss_ahbm_cbc_clk.clkr,
126 [LCC_Q6SS_AXIM_CBC_CLK] = &lcc_q6ss_axim_cbc_clk.clkr,
127 [LCC_Q6SS_BCR_SLEEP_CLK] = &lcc_q6ss_bcr_sleep_clk.clkr,
130 static const struct qcom_reset_map q6sstop_qcs404_resets[] = {
131 [Q6SSTOP_BCR_RESET] = { 0x6000 },
134 static const struct qcom_cc_desc q6sstop_qcs404_desc = {
135 .config = &q6sstop_regmap_config,
136 .clks = q6sstop_qcs404_clocks,
137 .num_clks = ARRAY_SIZE(q6sstop_qcs404_clocks),
138 .resets = q6sstop_qcs404_resets,
139 .num_resets = ARRAY_SIZE(q6sstop_qcs404_resets),
142 static struct clk_regmap *tcsr_qcs404_clocks[] = {
143 [TCSR_Q6SS_LCC_CBCR_CLK] = &tcsr_lcc_csr_cbcr_clk.clkr,
146 static const struct qcom_cc_desc tcsr_qcs404_desc = {
147 .config = &q6sstop_regmap_config,
148 .clks = tcsr_qcs404_clocks,
149 .num_clks = ARRAY_SIZE(tcsr_qcs404_clocks),
152 static const struct of_device_id q6sstopcc_qcs404_match_table[] = {
153 { .compatible = "qcom,qcs404-q6sstopcc" },
156 MODULE_DEVICE_TABLE(of, q6sstopcc_qcs404_match_table);
158 static int q6sstopcc_qcs404_probe(struct platform_device *pdev)
160 const struct qcom_cc_desc *desc;
163 ret = devm_pm_runtime_enable(&pdev->dev);
167 ret = devm_pm_clk_create(&pdev->dev);
171 ret = pm_clk_add(&pdev->dev, NULL);
173 dev_err(&pdev->dev, "failed to acquire iface clock\n");
177 q6sstop_regmap_config.name = "q6sstop_tcsr";
178 desc = &tcsr_qcs404_desc;
180 ret = qcom_cc_probe_by_index(pdev, 1, desc);
184 q6sstop_regmap_config.name = "q6sstop_cc";
185 desc = &q6sstop_qcs404_desc;
187 ret = qcom_cc_probe_by_index(pdev, 0, desc);
194 static const struct dev_pm_ops q6sstopcc_pm_ops = {
195 SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
198 static struct platform_driver q6sstopcc_qcs404_driver = {
199 .probe = q6sstopcc_qcs404_probe,
201 .name = "qcs404-q6sstopcc",
202 .of_match_table = q6sstopcc_qcs404_match_table,
203 .pm = &q6sstopcc_pm_ops,
207 module_platform_driver(q6sstopcc_qcs404_driver);
209 MODULE_DESCRIPTION("QTI QCS404 Q6SSTOP Clock Controller Driver");
210 MODULE_LICENSE("GPL v2");