drivers/clk/qcom/lpasscc-sdm845.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #include <linux/platform_device.h>
   7 #include <linux/module.h>
   8 #include <linux/of_address.h>
   9 #include <linux/regmap.h>
  10
  11 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
  12
  13 #include "clk-regmap.h"
  14 #include "clk-branch.h"
  15 #include "common.h"
  16
  17 static struct clk_branch lpass_q6ss_ahbm_aon_clk = {
  18         .halt_reg = 0x12000,
  19         .halt_check = BRANCH_VOTED,
  20         .clkr = {
  21                 .enable_reg = 0x12000,
  22                 .enable_mask = BIT(0),
  23                 .hw.init = &(struct clk_init_data){
  24                         .name = "lpass_q6ss_ahbm_aon_clk",
  25                         .ops = &clk_branch2_ops,
  26                 },
  27         },
  28 };
  29
  30 static struct clk_branch lpass_q6ss_ahbs_aon_clk = {
  31         .halt_reg = 0x1f000,
  32         .halt_check = BRANCH_VOTED,
  33         .clkr = {
  34                 .enable_reg = 0x1f000,
  35                 .enable_mask = BIT(0),
  36                 .hw.init = &(struct clk_init_data){
  37                         .name = "lpass_q6ss_ahbs_aon_clk",
  38                         .ops = &clk_branch2_ops,
  39                 },
  40         },
  41 };
  42
  43 static struct clk_branch lpass_qdsp6ss_core_clk = {
  44         .halt_reg = 0x20,
  45         /* CLK_OFF would not toggle until LPASS is out of reset */
  46         .halt_check = BRANCH_HALT_SKIP,
  47         .clkr = {
  48                 .enable_reg = 0x20,
  49                 .enable_mask = BIT(0),
  50                 .hw.init = &(struct clk_init_data){
  51                         .name = "lpass_qdsp6ss_core_clk",
  52                         .ops = &clk_branch2_ops,
  53                 },
  54         },
  55 };
  56
  57 static struct clk_branch lpass_qdsp6ss_xo_clk = {
  58         .halt_reg = 0x38,
  59         /* CLK_OFF would not toggle until LPASS is out of reset */
  60         .halt_check = BRANCH_HALT_SKIP,
  61         .clkr = {
  62                 .enable_reg = 0x38,
  63                 .enable_mask = BIT(0),
  64                 .hw.init = &(struct clk_init_data){
  65                         .name = "lpass_qdsp6ss_xo_clk",
  66                         .ops = &clk_branch2_ops,
  67                 },
  68         },
  69 };
  70
  71 static struct clk_branch lpass_qdsp6ss_sleep_clk = {
  72         .halt_reg = 0x3c,
  73         /* CLK_OFF would not toggle until LPASS is out of reset */
  74         .halt_check = BRANCH_HALT_SKIP,
  75         .clkr = {
  76                 .enable_reg = 0x3c,
  77                 .enable_mask = BIT(0),
  78                 .hw.init = &(struct clk_init_data){
  79                         .name = "lpass_qdsp6ss_sleep_clk",
  80                         .ops = &clk_branch2_ops,
  81                 },
  82         },
  83 };
  84
  85 static struct regmap_config lpass_regmap_config = {
  86         .reg_bits       = 32,
  87         .reg_stride     = 4,
  88         .val_bits       = 32,
  89         .fast_io        = true,
  90 };
  91
  92 static struct clk_regmap *lpass_cc_sdm845_clocks[] = {
  93         [LPASS_Q6SS_AHBM_AON_CLK] = &lpass_q6ss_ahbm_aon_clk.clkr,
  94         [LPASS_Q6SS_AHBS_AON_CLK] = &lpass_q6ss_ahbs_aon_clk.clkr,
  95 };
  96
  97 static const struct qcom_cc_desc lpass_cc_sdm845_desc = {
  98         .config = &lpass_regmap_config,
  99         .clks = lpass_cc_sdm845_clocks,
 100         .num_clks = ARRAY_SIZE(lpass_cc_sdm845_clocks),
 101 };
 102
 103 static struct clk_regmap *lpass_qdsp6ss_sdm845_clocks[] = {
 104         [LPASS_QDSP6SS_XO_CLK] = &lpass_qdsp6ss_xo_clk.clkr,
 105         [LPASS_QDSP6SS_SLEEP_CLK] = &lpass_qdsp6ss_sleep_clk.clkr,
 106         [LPASS_QDSP6SS_CORE_CLK] = &lpass_qdsp6ss_core_clk.clkr,
 107 };
 108
 109 static const struct qcom_cc_desc lpass_qdsp6ss_sdm845_desc = {
 110         .config = &lpass_regmap_config,
 111         .clks = lpass_qdsp6ss_sdm845_clocks,
 112         .num_clks = ARRAY_SIZE(lpass_qdsp6ss_sdm845_clocks),
 113 };
 114
 115 static int lpass_clocks_sdm845_probe(struct platform_device *pdev, int index,
 116                                      const struct qcom_cc_desc *desc)
 117 {
 118         struct regmap *regmap;
 119         struct resource *res;
 120         void __iomem *base;
 121
 122         res = platform_get_resource(pdev, IORESOURCE_MEM, index);
 123         base = devm_ioremap_resource(&pdev->dev, res);
 124         if (IS_ERR(base))
 125                 return PTR_ERR(base);
 126
 127         regmap = devm_regmap_init_mmio(&pdev->dev, base, desc->config);
 128         if (IS_ERR(regmap))
 129                 return PTR_ERR(regmap);
 130
 131         return qcom_cc_really_probe(pdev, desc, regmap);
 132 }
 133
 134 static int lpass_cc_sdm845_probe(struct platform_device *pdev)
 135 {
 136         const struct qcom_cc_desc *desc;
 137         int ret;
 138
 139         lpass_regmap_config.name = "cc";
 140         desc = &lpass_cc_sdm845_desc;
 141
 142         ret = lpass_clocks_sdm845_probe(pdev, 0, desc);
 143         if (ret)
 144                 return ret;
 145
 146         lpass_regmap_config.name = "qdsp6ss";
 147         desc = &lpass_qdsp6ss_sdm845_desc;
 148
 149         return lpass_clocks_sdm845_probe(pdev, 1, desc);
 150 }
 151
 152 static const struct of_device_id lpass_cc_sdm845_match_table[] = {
 153         { .compatible = "qcom,sdm845-lpasscc" },
 154         { }
 155 };
 156 MODULE_DEVICE_TABLE(of, lpass_cc_sdm845_match_table);
 157
 158 static struct platform_driver lpass_cc_sdm845_driver = {
 159         .probe          = lpass_cc_sdm845_probe,
 160         .driver         = {
 161                 .name   = "sdm845-lpasscc",
 162                 .of_match_table = lpass_cc_sdm845_match_table,
 163         },
 164 };
 165
 166 static int __init lpass_cc_sdm845_init(void)
 167 {
 168         return platform_driver_register(&lpass_cc_sdm845_driver);
 169 }
 170 subsys_initcall(lpass_cc_sdm845_init);
 171
 172 static void __exit lpass_cc_sdm845_exit(void)
 173 {
 174         platform_driver_unregister(&lpass_cc_sdm845_driver);
 175 }
 176 module_exit(lpass_cc_sdm845_exit);
 177
 178 MODULE_DESCRIPTION("QTI LPASS_CC SDM845 Driver");
 179 MODULE_LICENSE("GPL v2");