drivers/clk/imx/clk.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/clk.h>
   3 #include <linux/clk-provider.h>
   4 #include <linux/err.h>
   5 #include <linux/of.h>
   6 #include <linux/slab.h>
   7 #include <linux/spinlock.h>
   8 #include "clk.h"
   9
  10 DEFINE_SPINLOCK(imx_ccm_lock);
  11
  12 void __init imx_check_clocks(struct clk *clks[], unsigned int count)
  13 {
  14         unsigned i;
  15
  16         for (i = 0; i < count; i++)
  17                 if (IS_ERR(clks[i]))
  18                         pr_err("i.MX clk %u: register failed with %ld\n",
  19                                i, PTR_ERR(clks[i]));
  20 }
  21
  22 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count)
  23 {
  24         unsigned int i;
  25
  26         for (i = 0; i < count; i++)
  27                 if (IS_ERR(clks[i]))
  28                         pr_err("i.MX clk %u: register failed with %ld\n",
  29                                i, PTR_ERR(clks[i]));
  30 }
  31
  32 static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
  33 {
  34         struct of_phandle_args phandle;
  35         struct clk *clk = ERR_PTR(-ENODEV);
  36         char *path;
  37
  38         path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
  39         if (!path)
  40                 return ERR_PTR(-ENOMEM);
  41
  42         phandle.np = of_find_node_by_path(path);
  43         kfree(path);
  44
  45         if (phandle.np) {
  46                 clk = of_clk_get_from_provider(&phandle);
  47                 of_node_put(phandle.np);
  48         }
  49         return clk;
  50 }
  51
  52 struct clk * __init imx_obtain_fixed_clock(
  53                         const char *name, unsigned long rate)
  54 {
  55         struct clk *clk;
  56
  57         clk = imx_obtain_fixed_clock_from_dt(name);
  58         if (IS_ERR(clk))
  59                 clk = imx_clk_fixed(name, rate);
  60         return clk;
  61 }
  62
  63 struct clk_hw * __init imx_obtain_fixed_clk_hw(struct device_node *np,
  64                                                const char *name)
  65 {
  66         struct clk *clk;
  67
  68         clk = of_clk_get_by_name(np, name);
  69         if (IS_ERR(clk))
  70                 return ERR_PTR(-ENOENT);
  71
  72         return __clk_get_hw(clk);
  73 }
  74
  75 /*
  76  * This fixups the register CCM_CSCMR1 write value.
  77  * The write/read/divider values of the aclk_podf field
  78  * of that register have the relationship described by
  79  * the following table:
  80  *
  81  * write value       read value        divider
  82  * 3b'000            3b'110            7
  83  * 3b'001            3b'111            8
  84  * 3b'010            3b'100            5
  85  * 3b'011            3b'101            6
  86  * 3b'100            3b'010            3
  87  * 3b'101            3b'011            4
  88  * 3b'110            3b'000            1
  89  * 3b'111            3b'001            2(default)
  90  *
  91  * That's why we do the xor operation below.
  92  */
  93 #define CSCMR1_FIXUP    0x00600000
  94
  95 void imx_cscmr1_fixup(u32 *val)
  96 {
  97         *val ^= CSCMR1_FIXUP;
  98         return;
  99 }
 100
 101 static int imx_keep_uart_clocks __initdata;
 102 static struct clk ** const *imx_uart_clocks __initdata;
 103
 104 static int __init imx_keep_uart_clocks_param(char *str)
 105 {
 106         imx_keep_uart_clocks = 1;
 107
 108         return 0;
 109 }
 110 __setup_param("earlycon", imx_keep_uart_earlycon,
 111               imx_keep_uart_clocks_param, 0);
 112 __setup_param("earlyprintk", imx_keep_uart_earlyprintk,
 113               imx_keep_uart_clocks_param, 0);
 114
 115 void __init imx_register_uart_clocks(struct clk ** const clks[])
 116 {
 117         if (imx_keep_uart_clocks) {
 118                 int i;
 119
 120                 imx_uart_clocks = clks;
 121                 for (i = 0; imx_uart_clocks[i]; i++)
 122                         clk_prepare_enable(*imx_uart_clocks[i]);
 123         }
 124 }
 125
 126 static int __init imx_clk_disable_uart(void)
 127 {
 128         if (imx_keep_uart_clocks && imx_uart_clocks) {
 129                 int i;
 130
 131                 for (i = 0; imx_uart_clocks[i]; i++)
 132                         clk_disable_unprepare(*imx_uart_clocks[i]);
 133         }
 134
 135         return 0;
 136 }
 137 late_initcall_sync(imx_clk_disable_uart);