1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Intel Corporation
5 * Adjustable fractional divider clock implementation.
6 * Uses rational best approximation algorithm.
8 * Output is calculated as
10 * rate = (m / n) * parent_rate (1)
12 * This is useful when we have a prescaler block which asks for
13 * m (numerator) and n (denominator) values to be provided to satisfy
14 * the (1) as much as possible.
16 * Since m and n have the limitation by a range, e.g.
18 * n >= 1, n < N_width, where N_width = 2^nwidth (2)
20 * for some cases the output may be saturated. Hence, from (1) and (2),
21 * assuming the worst case when m = 1, the inequality
23 * floor(log2(parent_rate / rate)) <= nwidth (3)
25 * may be derived. Thus, in cases when
27 * (parent_rate / rate) >> N_width (4)
29 * we might scale up the rate by 2^scale (see the description of
30 * CLK_FRAC_DIVIDER_POWER_OF_TWO_PS for additional information), where
32 * scale = floor(log2(parent_rate / rate)) - nwidth (5)
34 * and assume that the IP, that needs m and n, has also its own
35 * prescaler, which is capable to divide by 2^scale. In this way
36 * we get the denominator to satisfy the desired range (2) and
37 * at the same time a much better result of m and n than simple
41 #include <linux/debugfs.h>
42 #include <linux/device.h>
44 #include <linux/math.h>
45 #include <linux/module.h>
46 #include <linux/rational.h>
47 #include <linux/slab.h>
49 #include <linux/clk-provider.h>
51 #include "clk-fractional-divider.h"
53 static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
55 if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
56 return ioread32be(fd->reg);
58 return readl(fd->reg);
61 static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
63 if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
64 iowrite32be(val, fd->reg);
69 static void clk_fd_get_div(struct clk_hw *hw, struct u32_fract *fract)
71 struct clk_fractional_divider *fd = to_clk_fd(hw);
72 unsigned long flags = 0;
77 spin_lock_irqsave(fd->lock, flags);
81 val = clk_fd_readl(fd);
84 spin_unlock_irqrestore(fd->lock, flags);
88 m = (val & fd->mmask) >> fd->mshift;
89 n = (val & fd->nmask) >> fd->nshift;
91 if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
97 fract->denominator = n;
100 static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
102 struct u32_fract fract;
105 clk_fd_get_div(hw, &fract);
107 if (!fract.numerator || !fract.denominator)
110 ret = (u64)parent_rate * fract.numerator;
111 do_div(ret, fract.denominator);
116 void clk_fractional_divider_general_approximation(struct clk_hw *hw,
118 unsigned long *parent_rate,
119 unsigned long *m, unsigned long *n)
121 struct clk_fractional_divider *fd = to_clk_fd(hw);
124 * Get rate closer to *parent_rate to guarantee there is no overflow
125 * for m and n. In the result it will be the nearest rate left shifted
126 * by (scale - fd->nwidth) bits.
128 * For the detailed explanation see the top comment in this file.
130 if (fd->flags & CLK_FRAC_DIVIDER_POWER_OF_TWO_PS) {
131 unsigned long scale = fls_long(*parent_rate / rate - 1);
133 if (scale > fd->nwidth)
134 rate <<= scale - fd->nwidth;
137 rational_best_approximation(rate, *parent_rate,
138 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
142 static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
143 unsigned long *parent_rate)
145 struct clk_fractional_divider *fd = to_clk_fd(hw);
149 if (!rate || (!clk_hw_can_set_rate_parent(hw) && rate >= *parent_rate))
152 if (fd->approximation)
153 fd->approximation(hw, rate, parent_rate, &m, &n);
155 clk_fractional_divider_general_approximation(hw, rate, parent_rate, &m, &n);
157 ret = (u64)*parent_rate * m;
163 static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
164 unsigned long parent_rate)
166 struct clk_fractional_divider *fd = to_clk_fd(hw);
167 unsigned long flags = 0;
171 rational_best_approximation(rate, parent_rate,
172 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
175 if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
181 spin_lock_irqsave(fd->lock, flags);
185 val = clk_fd_readl(fd);
186 val &= ~(fd->mmask | fd->nmask);
187 val |= (m << fd->mshift) | (n << fd->nshift);
188 clk_fd_writel(fd, val);
191 spin_unlock_irqrestore(fd->lock, flags);
198 #ifdef CONFIG_DEBUG_FS
199 static int clk_fd_numerator_get(void *hw, u64 *val)
201 struct u32_fract fract;
203 clk_fd_get_div(hw, &fract);
205 *val = fract.numerator;
209 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_numerator_fops, clk_fd_numerator_get, NULL, "%llu\n");
211 static int clk_fd_denominator_get(void *hw, u64 *val)
213 struct u32_fract fract;
215 clk_fd_get_div(hw, &fract);
217 *val = fract.denominator;
221 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_denominator_fops, clk_fd_denominator_get, NULL, "%llu\n");
223 static void clk_fd_debug_init(struct clk_hw *hw, struct dentry *dentry)
225 debugfs_create_file("numerator", 0444, dentry, hw, &clk_fd_numerator_fops);
226 debugfs_create_file("denominator", 0444, dentry, hw, &clk_fd_denominator_fops);
230 const struct clk_ops clk_fractional_divider_ops = {
231 .recalc_rate = clk_fd_recalc_rate,
232 .round_rate = clk_fd_round_rate,
233 .set_rate = clk_fd_set_rate,
234 #ifdef CONFIG_DEBUG_FS
235 .debug_init = clk_fd_debug_init,
238 EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
240 struct clk_hw *clk_hw_register_fractional_divider(struct device *dev,
241 const char *name, const char *parent_name, unsigned long flags,
242 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
243 u8 clk_divider_flags, spinlock_t *lock)
245 struct clk_fractional_divider *fd;
246 struct clk_init_data init;
250 fd = kzalloc(sizeof(*fd), GFP_KERNEL);
252 return ERR_PTR(-ENOMEM);
255 init.ops = &clk_fractional_divider_ops;
257 init.parent_names = parent_name ? &parent_name : NULL;
258 init.num_parents = parent_name ? 1 : 0;
263 fd->mmask = GENMASK(mwidth - 1, 0) << mshift;
266 fd->nmask = GENMASK(nwidth - 1, 0) << nshift;
267 fd->flags = clk_divider_flags;
272 ret = clk_hw_register(dev, hw);
280 EXPORT_SYMBOL_GPL(clk_hw_register_fractional_divider);
282 struct clk *clk_register_fractional_divider(struct device *dev,
283 const char *name, const char *parent_name, unsigned long flags,
284 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
285 u8 clk_divider_flags, spinlock_t *lock)
289 hw = clk_hw_register_fractional_divider(dev, name, parent_name, flags,
290 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags,
296 EXPORT_SYMBOL_GPL(clk_register_fractional_divider);
298 void clk_hw_unregister_fractional_divider(struct clk_hw *hw)
300 struct clk_fractional_divider *fd;
304 clk_hw_unregister(hw);