1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
9 config HAVE_CLK_PREPARE
12 config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
16 Select this option when the clock API in <linux/clk.h> is implemented
17 by platform/architecture code. This method is deprecated. Modern
18 code should select COMMON_CLK instead and not define a custom
22 bool "Common Clock Framework"
23 depends on !HAVE_LEGACY_CLK
24 select HAVE_CLK_PREPARE
29 The common clock framework is a single definition of struct
30 clk, useful across many platforms, as well as an
31 implementation of the clock API in include/linux/clk.h.
32 Architectures utilizing the common struct clk should select
37 config COMMON_CLK_WM831X
38 tristate "Clock driver for WM831x/2x PMICs"
41 Supports the clocking subsystem of the WM831x/2x series of
42 PMICs from Wolfson Microelectronics.
44 source "drivers/clk/versatile/Kconfig"
47 bool "PLL Driver for HSDK platform"
48 depends on ARC_SOC_HSDK || COMPILE_TEST
51 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
55 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
59 Say yes here to build support for Texas Instruments' LMK04832 Ultra
60 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
62 config COMMON_CLK_APPLE_NCO
63 tristate "Clock driver for Apple SoC NCOs"
64 depends on ARCH_APPLE || COMPILE_TEST
67 This driver supports NCO (Numerically Controlled Oscillator) blocks
68 found on Apple SoCs such as t8103 (M1). The blocks are typically
69 generators of audio clocks.
71 config COMMON_CLK_MAX77686
72 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
73 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
75 This driver supports Maxim 77620/77686/77802 crystal oscillator
78 config COMMON_CLK_MAX9485
79 tristate "Maxim 9485 Programmable Clock Generator"
82 This driver supports Maxim 9485 Programmable Audio Clock Generator
84 config COMMON_CLK_RK808
85 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
88 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
89 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
90 Clkout1 is always on, Clkout2 can off by control register.
92 config COMMON_CLK_HI655X
93 tristate "Clock driver for Hi655x" if EXPERT
94 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
96 default MFD_HI655X_PMIC
98 This driver supports the hi655x PMIC clock. This
99 multi-function device has one fixed-rate oscillator, clocked
102 config COMMON_CLK_SCMI
103 tristate "Clock driver controlled via SCMI interface"
104 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
106 This driver provides support for clocks that are controlled
107 by firmware that implements the SCMI interface.
109 This driver uses SCMI Message Protocol to interact with the
110 firmware providing all the clock controls.
112 config COMMON_CLK_SCPI
113 tristate "Clock driver controlled via SCPI interface"
114 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
116 This driver provides support for clocks that are controlled
117 by firmware that implements the SCPI interface.
119 This driver uses SCPI Message Protocol to interact with the
120 firmware providing all the clock controls.
122 config COMMON_CLK_SI5341
123 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
127 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
128 generators. Not all features of these chips are currently supported
129 by the driver, in particular it only supports XTAL input. The chip can
130 be pre-programmed to support other configurations and features not yet
131 implemented in the driver.
133 config COMMON_CLK_SI5351
134 tristate "Clock driver for SiLabs 5351A/B/C"
138 This driver supports Silicon Labs 5351A/B/C programmable clock
141 config COMMON_CLK_SI514
142 tristate "Clock driver for SiLabs 514 devices"
147 This driver supports the Silicon Labs 514 programmable clock
150 config COMMON_CLK_SI544
151 tristate "Clock driver for SiLabs 544 devices"
155 This driver supports the Silicon Labs 544 programmable clock
158 config COMMON_CLK_SI570
159 tristate "Clock driver for SiLabs 570 and compatible devices"
164 This driver supports Silicon Labs 570/571/598/599 programmable
167 config COMMON_CLK_BM1880
168 bool "Clock driver for Bitmain BM1880 SoC"
169 depends on ARCH_BITMAIN || COMPILE_TEST
172 This driver supports the clocks on Bitmain BM1880 SoC.
174 config COMMON_CLK_CDCE706
175 tristate "Clock driver for TI CDCE706 clock synthesizer"
179 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
181 config COMMON_CLK_TPS68470
182 tristate "Clock Driver for TI TPS68470 PMIC"
184 depends on INTEL_SKL_INT3472 || COMPILE_TEST
187 This driver supports the clocks provided by the TPS68470 PMIC.
189 config COMMON_CLK_CDCE925
190 tristate "Clock driver for TI CDCE913/925/937/949 devices"
195 This driver supports the TI CDCE913/925/937/949 programmable clock
196 synthesizer. Each chip has different number of PLLs and outputs.
197 For example, the CDCE925 contains two PLLs with spread-spectrum
198 clocking support and five output dividers. The driver only supports
199 the following setup, and uses a fixed setting for the output muxes.
200 Y1 is derived from the input clock
201 Y2 and Y3 derive from PLL1
202 Y4 and Y5 derive from PLL2
203 Given a target output frequency, the driver will set the PLL and
204 divider to best approximate the desired output.
206 config COMMON_CLK_CS2000_CP
207 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
211 If you say yes here you get support for the CS2000 clock multiplier.
213 config COMMON_CLK_FSL_FLEXSPI
214 tristate "Clock driver for FlexSPI on Layerscape SoCs"
215 depends on ARCH_LAYERSCAPE || COMPILE_TEST
216 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
218 On Layerscape SoCs there is a special clock for the FlexSPI
221 config COMMON_CLK_FSL_SAI
222 bool "Clock driver for BCLK of Freescale SAI cores"
223 depends on ARCH_LAYERSCAPE || COMPILE_TEST
225 This driver supports the Freescale SAI (Synchronous Audio Interface)
226 to be used as a generic clock output. Some SoCs have restrictions
227 regarding the possible pin multiplexer settings. Eg. on some SoCs
228 two SAI interfaces can only be enabled together. If just one is
229 needed, the BCLK pin of the second one can be used as general
230 purpose clock output. Ideally, it can be used to drive an audio
231 codec (sometimes known as MCLK).
233 config COMMON_CLK_GEMINI
234 bool "Clock driver for Cortina Systems Gemini SoC"
235 depends on ARCH_GEMINI || COMPILE_TEST
237 select RESET_CONTROLLER
239 This driver supports the SoC clocks on the Cortina Systems Gemini
240 platform, also known as SL3516 or CS3516.
242 config COMMON_CLK_LAN966X
243 bool "Generic Clock Controller driver for LAN966X SoC"
246 depends on SOC_LAN966 || COMPILE_TEST
248 This driver provides support for Generic Clock Controller(GCK) on
249 LAN966X SoC. GCK generates and supplies clock to various peripherals
252 config COMMON_CLK_ASPEED
253 bool "Clock driver for Aspeed BMC SoCs"
254 depends on ARCH_ASPEED || COMPILE_TEST
257 select RESET_CONTROLLER
259 This driver supports the SoC clocks on the Aspeed BMC platforms.
261 The G4 and G5 series, including the ast2400 and ast2500, are supported
264 config COMMON_CLK_S2MPS11
265 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
266 depends on MFD_SEC_CORE || COMPILE_TEST
268 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
269 clock. These multi-function devices have two (S2MPS14) or three
270 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
273 tristate "External McPDM functional clock from twl6040"
274 depends on TWL6040_CORE
276 Enable the external functional clock support on OMAP4+ platforms for
277 McPDM. McPDM module is using the external bit clock on the McPDM bus
280 config COMMON_CLK_AXI_CLKGEN
281 tristate "AXI clkgen driver"
282 depends on HAS_IOMEM || COMPILE_TEST
285 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
286 FPGAs. It is commonly used in Analog Devices' reference designs.
289 bool "Clock driver for Freescale QorIQ platforms"
291 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
293 This adds the clock driver support for Freescale QorIQ platforms
294 using common clock framework.
296 config CLK_LS1028A_PLLDIG
297 tristate "Clock driver for LS1028A Display output"
298 depends on ARCH_LAYERSCAPE || COMPILE_TEST
299 default ARCH_LAYERSCAPE
301 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
302 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
303 features of the PLL are currently supported by the driver. By default,
304 configured bypass mode with this PLL.
306 config COMMON_CLK_XGENE
307 bool "Clock driver for APM XGene SoC"
309 depends on ARM64 || COMPILE_TEST
311 Support for the APM X-Gene SoC reference, PLL, and device clocks.
313 config COMMON_CLK_LOCHNAGAR
314 tristate "Cirrus Logic Lochnagar clock driver"
315 depends on MFD_LOCHNAGAR
317 This driver supports the clocking features of the Cirrus Logic
318 Lochnagar audio development board.
320 config COMMON_CLK_NXP
321 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
322 select REGMAP_MMIO if ARCH_LPC32XX
323 select MFD_SYSCON if ARCH_LPC18XX
325 Support for clock providers on NXP platforms.
327 config COMMON_CLK_PALMAS
328 tristate "Clock driver for TI Palmas devices"
329 depends on MFD_PALMAS
331 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
332 using common clock framework.
334 config COMMON_CLK_PWM
335 tristate "Clock driver for PWMs used as clock outputs"
338 Adapter driver so that any PWM output can be (mis)used as clock signal
341 config COMMON_CLK_PXA
342 def_bool COMMON_CLK && ARCH_PXA
344 Support for the Marvell PXA SoC.
346 config COMMON_CLK_OXNAS
347 bool "Clock driver for the OXNAS SoC Family"
348 depends on ARCH_OXNAS || COMPILE_TEST
351 Support for the OXNAS SoC Family clocks.
353 config COMMON_CLK_RS9_PCIE
354 tristate "Clock driver for Renesas 9-series PCIe clock generators"
359 This driver supports the Renesas 9-series PCIe clock generator
360 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
362 config COMMON_CLK_VC5
363 tristate "Clock driver for IDT VersaClock 5,6 devices"
368 This driver supports the IDT VersaClock 5 and VersaClock 6
369 programmable clock generators.
371 config COMMON_CLK_STM32MP157
372 def_bool COMMON_CLK && MACH_STM32MP157
374 Support for stm32mp157 SoC family clocks
376 config COMMON_CLK_STM32F
377 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
379 Support for stm32f4 and stm32f7 SoC families clocks
381 config COMMON_CLK_STM32H7
382 def_bool COMMON_CLK && MACH_STM32H743
384 Support for stm32h7 SoC family clocks
386 config COMMON_CLK_MMP2
387 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
389 Support for Marvell MMP2 and MMP3 SoC clocks
391 config COMMON_CLK_MMP2_AUDIO
392 tristate "Clock driver for MMP2 Audio subsystem"
393 depends on COMMON_CLK_MMP2 || COMPILE_TEST
395 This driver supports clocks for Audio subsystem on MMP2 SoC.
397 config COMMON_CLK_BD718XX
398 tristate "Clock driver for 32K clk gates on ROHM PMICs"
399 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
401 This driver supports ROHM BD71837, BD71847, BD71850, BD71815
402 and BD71828 PMICs clock gates.
404 config COMMON_CLK_FIXED_MMIO
405 bool "Clock driver for Memory Mapped Fixed values"
406 depends on COMMON_CLK && OF
408 Support for Memory Mapped IO Fixed clocks
410 config COMMON_CLK_K210
411 bool "Clock driver for the Canaan Kendryte K210 SoC"
412 depends on OF && RISCV && SOC_CANAAN
415 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
417 source "drivers/clk/actions/Kconfig"
418 source "drivers/clk/analogbits/Kconfig"
419 source "drivers/clk/baikal-t1/Kconfig"
420 source "drivers/clk/bcm/Kconfig"
421 source "drivers/clk/hisilicon/Kconfig"
422 source "drivers/clk/imgtec/Kconfig"
423 source "drivers/clk/imx/Kconfig"
424 source "drivers/clk/ingenic/Kconfig"
425 source "drivers/clk/keystone/Kconfig"
426 source "drivers/clk/mediatek/Kconfig"
427 source "drivers/clk/meson/Kconfig"
428 source "drivers/clk/mstar/Kconfig"
429 source "drivers/clk/microchip/Kconfig"
430 source "drivers/clk/mvebu/Kconfig"
431 source "drivers/clk/pistachio/Kconfig"
432 source "drivers/clk/qcom/Kconfig"
433 source "drivers/clk/ralink/Kconfig"
434 source "drivers/clk/renesas/Kconfig"
435 source "drivers/clk/rockchip/Kconfig"
436 source "drivers/clk/samsung/Kconfig"
437 source "drivers/clk/sifive/Kconfig"
438 source "drivers/clk/socfpga/Kconfig"
439 source "drivers/clk/sprd/Kconfig"
440 source "drivers/clk/starfive/Kconfig"
441 source "drivers/clk/sunxi/Kconfig"
442 source "drivers/clk/sunxi-ng/Kconfig"
443 source "drivers/clk/tegra/Kconfig"
444 source "drivers/clk/ti/Kconfig"
445 source "drivers/clk/uniphier/Kconfig"
446 source "drivers/clk/visconti/Kconfig"
447 source "drivers/clk/x86/Kconfig"
448 source "drivers/clk/xilinx/Kconfig"
449 source "drivers/clk/zynqmp/Kconfig"
452 config CLK_KUNIT_TEST
453 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
455 default KUNIT_ALL_TESTS
457 Kunit tests for the common clock framework.
459 config CLK_GATE_KUNIT_TEST
460 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
462 default KUNIT_ALL_TESTS
464 Kunit test for the basic clk gate type.