2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
32 #include "tpm_tis_core.h"
34 /* This is a polling delay to check for status and burstcount.
35 * As per ddwg input, expectation is that status check and burstcount
36 * check should return within few usecs.
38 #define TPM_POLL_SLEEP 1 /* msec */
40 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
42 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
43 bool check_cancel, bool *canceled)
45 u8 status = chip->ops->status(chip);
48 if ((status & mask) == mask)
50 if (check_cancel && chip->ops->req_canceled(chip, status)) {
57 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
58 unsigned long timeout, wait_queue_head_t *queue,
64 bool canceled = false;
66 /* check current status */
67 status = chip->ops->status(chip);
68 if ((status & mask) == mask)
71 stop = jiffies + timeout;
73 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
75 timeout = stop - jiffies;
76 if ((long)timeout <= 0)
78 rc = wait_event_interruptible_timeout(*queue,
79 wait_for_tpm_stat_cond(chip, mask, check_cancel,
87 if (rc == -ERESTARTSYS && freezing(current)) {
88 clear_thread_flag(TIF_SIGPENDING);
93 tpm_msleep(TPM_POLL_SLEEP);
94 status = chip->ops->status(chip);
95 if ((status & mask) == mask)
97 } while (time_before(jiffies, stop));
102 /* Before we attempt to access the TPM we must see that the valid bit is set.
103 * The specification says that this bit is 0 at reset and remains 0 until the
104 * 'TPM has gone through its self test and initialization and has established
105 * correct values in the other bits.'
107 static int wait_startup(struct tpm_chip *chip, int l)
109 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
110 unsigned long stop = jiffies + chip->timeout_a;
116 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
120 if (access & TPM_ACCESS_VALID)
122 tpm_msleep(TPM_TIMEOUT);
123 } while (time_before(jiffies, stop));
127 static bool check_locality(struct tpm_chip *chip, int l)
129 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
133 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
137 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
138 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
146 static void release_locality(struct tpm_chip *chip, int l)
148 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
150 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
153 static int request_locality(struct tpm_chip *chip, int l)
155 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
156 unsigned long stop, timeout;
159 if (check_locality(chip, l))
162 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
166 stop = jiffies + chip->timeout_a;
168 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
170 timeout = stop - jiffies;
171 if ((long)timeout <= 0)
173 rc = wait_event_interruptible_timeout(priv->int_queue,
179 if (rc == -ERESTARTSYS && freezing(current)) {
180 clear_thread_flag(TIF_SIGPENDING);
184 /* wait for burstcount */
186 if (check_locality(chip, l))
188 tpm_msleep(TPM_TIMEOUT);
189 } while (time_before(jiffies, stop));
194 static u8 tpm_tis_status(struct tpm_chip *chip)
196 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
200 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
207 static void tpm_tis_ready(struct tpm_chip *chip)
209 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
211 /* this causes the current command to be aborted */
212 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
215 static int get_burstcount(struct tpm_chip *chip)
217 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
222 /* wait for burstcount */
223 if (chip->flags & TPM_CHIP_FLAG_TPM2)
224 stop = jiffies + chip->timeout_a;
226 stop = jiffies + chip->timeout_d;
228 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
232 burstcnt = (value >> 8) & 0xFFFF;
235 tpm_msleep(TPM_POLL_SLEEP);
236 } while (time_before(jiffies, stop));
240 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
242 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
243 int size = 0, burstcnt, rc;
245 while (size < count) {
246 rc = wait_for_tpm_stat(chip,
247 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
249 &priv->read_queue, true);
252 burstcnt = get_burstcount(chip);
254 dev_err(&chip->dev, "Unable to read burstcount\n");
257 burstcnt = min_t(int, burstcnt, count - size);
259 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
260 burstcnt, buf + size);
269 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
271 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
276 if (count < TPM_HEADER_SIZE) {
281 size = recv_data(chip, buf, TPM_HEADER_SIZE);
282 /* read first 10 bytes, including tag, paramsize, and result */
283 if (size < TPM_HEADER_SIZE) {
284 dev_err(&chip->dev, "Unable to read header\n");
288 expected = be32_to_cpu(*(__be32 *) (buf + 2));
289 if (expected > count || expected < TPM_HEADER_SIZE) {
294 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
295 expected - TPM_HEADER_SIZE);
296 if (size < expected) {
297 dev_err(&chip->dev, "Unable to read remainder of result\n");
302 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
303 &priv->int_queue, false) < 0) {
307 status = tpm_tis_status(chip);
308 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
309 dev_err(&chip->dev, "Error left over data\n");
320 * If interrupts are used (signaled by an irq set in the vendor structure)
321 * tpm.c can skip polling for the data to be available as the interrupt is
324 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
326 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
327 int rc, status, burstcnt;
329 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
331 status = tpm_tis_status(chip);
332 if ((status & TPM_STS_COMMAND_READY) == 0) {
334 if (wait_for_tpm_stat
335 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
336 &priv->int_queue, false) < 0) {
342 while (count < len - 1) {
343 burstcnt = get_burstcount(chip);
345 dev_err(&chip->dev, "Unable to read burstcount\n");
349 burstcnt = min_t(int, burstcnt, len - count - 1);
350 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
351 burstcnt, buf + count);
357 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
358 &priv->int_queue, false) < 0) {
362 status = tpm_tis_status(chip);
363 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
369 /* write last byte */
370 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
374 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
375 &priv->int_queue, false) < 0) {
379 status = tpm_tis_status(chip);
380 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
392 static void disable_interrupts(struct tpm_chip *chip)
394 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
398 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
402 intmask &= ~TPM_GLOBAL_INT_ENABLE;
403 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
405 devm_free_irq(chip->dev.parent, priv->irq, chip);
407 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
411 * If interrupts are used (signaled by an irq set in the vendor structure)
412 * tpm.c can skip polling for the data to be available as the interrupt is
415 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
417 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
422 rc = tpm_tis_send_data(chip, buf, len);
427 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
431 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
432 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
434 if (chip->flags & TPM_CHIP_FLAG_TPM2)
435 dur = tpm2_calc_ordinal_duration(chip, ordinal);
437 dur = tpm_calc_ordinal_duration(chip, ordinal);
439 if (wait_for_tpm_stat
440 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
441 &priv->read_queue, false) < 0) {
452 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
455 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
457 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
458 return tpm_tis_send_main(chip, buf, len);
460 /* Verify receipt of the expected IRQ */
463 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
464 rc = tpm_tis_send_main(chip, buf, len);
466 chip->flags |= TPM_CHIP_FLAG_IRQ;
467 if (!priv->irq_tested)
469 if (!priv->irq_tested)
470 disable_interrupts(chip);
471 priv->irq_tested = true;
475 struct tis_vendor_timeout_override {
477 unsigned long timeout_us[4];
480 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
482 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
483 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
486 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
487 unsigned long *timeout_cap)
489 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
493 if (chip->ops->clk_enable != NULL)
494 chip->ops->clk_enable(chip, true);
496 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
500 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
501 if (vendor_timeout_overrides[i].did_vid != did_vid)
503 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
504 sizeof(vendor_timeout_overrides[i].timeout_us));
511 if (chip->ops->clk_enable != NULL)
512 chip->ops->clk_enable(chip, false);
518 * Early probing for iTPM with STS_DATA_EXPECT flaw.
519 * Try sending command without itpm flag set and if that
520 * fails, repeat with itpm flag set.
522 static int probe_itpm(struct tpm_chip *chip)
524 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
526 static const u8 cmd_getticks[] = {
527 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
528 0x00, 0x00, 0x00, 0xf1
530 size_t len = sizeof(cmd_getticks);
533 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
536 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
540 /* probe only iTPMS */
541 if (vendor != TPM_VID_INTEL)
544 if (request_locality(chip, 0) != 0)
547 rc = tpm_tis_send_data(chip, cmd_getticks, len);
553 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
555 rc = tpm_tis_send_data(chip, cmd_getticks, len);
557 dev_info(&chip->dev, "Detected an iTPM.\n");
559 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
565 release_locality(chip, priv->locality);
570 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
572 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
574 switch (priv->manufacturer_id) {
575 case TPM_VID_WINBOND:
576 return ((status == TPM_STS_VALID) ||
577 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
579 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
581 return (status == TPM_STS_COMMAND_READY);
585 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
587 struct tpm_chip *chip = dev_id;
588 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
592 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
599 priv->irq_tested = true;
600 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
601 wake_up_interruptible(&priv->read_queue);
602 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
603 for (i = 0; i < 5; i++)
604 if (check_locality(chip, i))
607 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
608 TPM_INTF_CMD_READY_INT))
609 wake_up_interruptible(&priv->int_queue);
611 /* Clear interrupts handled with TPM_EOI */
612 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
616 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
620 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
622 const char *desc = "attempting to generate an interrupt";
626 if (chip->flags & TPM_CHIP_FLAG_TPM2)
627 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
629 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
633 /* Register the IRQ and issue a command that will cause an interrupt. If an
634 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
635 * everything and leave in polling mode. Returns 0 on success.
637 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
640 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
645 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
646 dev_name(&chip->dev), chip) != 0) {
647 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
653 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
658 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
662 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
666 /* Clear all existing */
667 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
672 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
673 intmask | TPM_GLOBAL_INT_ENABLE);
677 priv->irq_tested = false;
679 /* Generate an interrupt by having the core call through to
682 rc = tpm_tis_gen_interrupt(chip);
686 /* tpm_tis_send will either confirm the interrupt is working or it
687 * will call disable_irq which undoes all of the above.
689 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
690 rc = tpm_tis_write8(priv, original_int_vec,
691 TPM_INT_VECTOR(priv->locality));
701 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
702 * do not have ACPI/etc. We typically expect the interrupt to be declared if
705 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
707 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
711 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
716 if (!original_int_vec) {
717 if (IS_ENABLED(CONFIG_X86))
718 for (i = 3; i <= 15; i++)
719 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
722 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
727 void tpm_tis_remove(struct tpm_chip *chip)
729 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
730 u32 reg = TPM_INT_ENABLE(priv->locality);
734 tpm_tis_clkrun_enable(chip, true);
736 rc = tpm_tis_read32(priv, reg, &interrupt);
740 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
742 tpm_tis_clkrun_enable(chip, false);
744 if (priv->ilb_base_addr)
745 iounmap(priv->ilb_base_addr);
747 EXPORT_SYMBOL_GPL(tpm_tis_remove);
750 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
751 * of a single TPM command
752 * @chip: TPM chip to use
753 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
754 * 0 - Enable CLKRUN protocol
755 * Call this function directly in tpm_tis_remove() in error or driver removal
756 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
758 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
760 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
763 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
764 !data->ilb_base_addr)
768 data->clkrun_enabled++;
769 if (data->clkrun_enabled > 1)
771 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
773 /* Disable LPC CLKRUN# */
774 clkrun_val &= ~LPC_CLKRUN_EN;
775 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
778 * Write any random value on port 0x80 which is on LPC, to make
779 * sure LPC clock is running before sending any TPM command.
783 data->clkrun_enabled--;
784 if (data->clkrun_enabled)
787 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
789 /* Enable LPC CLKRUN# */
790 clkrun_val |= LPC_CLKRUN_EN;
791 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
794 * Write any random value on port 0x80 which is on LPC, to make
795 * sure LPC clock is running before sending any TPM command.
801 static const struct tpm_class_ops tpm_tis = {
802 .flags = TPM_OPS_AUTO_STARTUP,
803 .status = tpm_tis_status,
804 .recv = tpm_tis_recv,
805 .send = tpm_tis_send,
806 .cancel = tpm_tis_ready,
807 .update_timeouts = tpm_tis_update_timeouts,
808 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
809 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
810 .req_canceled = tpm_tis_req_canceled,
811 .request_locality = request_locality,
812 .relinquish_locality = release_locality,
813 .clk_enable = tpm_tis_clkrun_enable,
816 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
817 const struct tpm_tis_phy_ops *phy_ops,
818 acpi_handle acpi_dev_handle)
826 struct tpm_chip *chip;
828 chip = tpmm_chip_alloc(dev, &tpm_tis);
830 return PTR_ERR(chip);
833 chip->acpi_dev_handle = acpi_dev_handle;
836 /* Maximum timeouts */
837 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
838 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
839 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
840 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
841 priv->phy_ops = phy_ops;
842 dev_set_drvdata(&chip->dev, priv);
845 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
847 if (!priv->ilb_base_addr)
850 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
851 /* Check if CLKRUN# is already not enabled in the LPC bus */
852 if (!(clkrun_val & LPC_CLKRUN_EN)) {
853 iounmap(priv->ilb_base_addr);
854 priv->ilb_base_addr = NULL;
858 if (chip->ops->clk_enable != NULL)
859 chip->ops->clk_enable(chip, true);
861 if (wait_startup(chip, 0) != 0) {
866 /* Take control of the TPM's interrupt hardware and shut it off */
867 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
871 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
872 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
873 intmask &= ~TPM_GLOBAL_INT_ENABLE;
874 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
876 rc = tpm2_probe(chip);
880 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
884 priv->manufacturer_id = vendor;
886 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
890 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
891 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
894 probe = probe_itpm(chip);
900 /* Figure out the capabilities */
901 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
905 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
907 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
908 dev_dbg(dev, "\tBurst Count Static\n");
909 if (intfcaps & TPM_INTF_CMD_READY_INT)
910 dev_dbg(dev, "\tCommand Ready Int Support\n");
911 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
912 dev_dbg(dev, "\tInterrupt Edge Falling\n");
913 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
914 dev_dbg(dev, "\tInterrupt Edge Rising\n");
915 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
916 dev_dbg(dev, "\tInterrupt Level Low\n");
917 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
918 dev_dbg(dev, "\tInterrupt Level High\n");
919 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
920 dev_dbg(dev, "\tLocality Change Int Support\n");
921 if (intfcaps & TPM_INTF_STS_VALID_INT)
922 dev_dbg(dev, "\tSts Valid Int Support\n");
923 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
924 dev_dbg(dev, "\tData Avail Int Support\n");
926 /* INTERRUPT Setup */
927 init_waitqueue_head(&priv->read_queue);
928 init_waitqueue_head(&priv->int_queue);
930 /* Before doing irq testing issue a command to the TPM in polling mode
931 * to make sure it works. May as well use that command to set the
932 * proper timeouts for the driver.
934 if (tpm_get_timeouts(chip)) {
935 dev_err(dev, "Could not get TPM timeouts and durations\n");
941 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
943 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
944 dev_err(&chip->dev, FW_BUG
945 "TPM interrupt not working, polling instead\n");
947 tpm_tis_probe_irq(chip, intmask);
951 rc = tpm_chip_register(chip);
955 if (chip->ops->clk_enable != NULL)
956 chip->ops->clk_enable(chip, false);
960 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL))
961 chip->ops->clk_enable(chip, false);
963 tpm_tis_remove(chip);
967 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
969 #ifdef CONFIG_PM_SLEEP
970 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
972 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
976 if (chip->ops->clk_enable != NULL)
977 chip->ops->clk_enable(chip, true);
979 /* reenable interrupts that device may have lost or
980 * BIOS/firmware may have disabled
982 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
986 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
990 intmask |= TPM_INTF_CMD_READY_INT
991 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
992 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
994 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
997 if (chip->ops->clk_enable != NULL)
998 chip->ops->clk_enable(chip, false);
1003 int tpm_tis_resume(struct device *dev)
1005 struct tpm_chip *chip = dev_get_drvdata(dev);
1008 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1009 tpm_tis_reenable_interrupts(chip);
1011 ret = tpm_pm_resume(dev);
1015 /* TPM 1.2 requires self-test on resume. This function actually returns
1016 * an error code but for unknown reason it isn't handled.
1018 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1019 tpm_do_selftest(chip);
1023 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1026 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1027 MODULE_DESCRIPTION("TPM Driver");
1028 MODULE_VERSION("2.0");
1029 MODULE_LICENSE("GPL");