drivers/char/hw_random/omap-rng.c

   1 /*
   2  * omap-rng.c - RNG driver for TI OMAP CPU family
   3  *
   4  * Author: Deepak Saxena <dsaxena@plexity.net>
   5  *
   6  * Copyright 2005 (c) MontaVista Software, Inc.
   7  *
   8  * Mostly based on original driver:
   9  *
  10  * Copyright (C) 2005 Nokia Corporation
  11  * Author: Juha Yrjölä <juha.yrjola@nokia.com>
  12  *
  13  * This file is licensed under  the terms of the GNU General Public
  14  * License version 2. This program is licensed "as is" without any
  15  * warranty of any kind, whether express or implied.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/random.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/hw_random.h>
  24 #include <linux/delay.h>
  25 #include <linux/slab.h>
  26 #include <linux/pm_runtime.h>
  27 #include <linux/of.h>
  28 #include <linux/of_device.h>
  29 #include <linux/of_address.h>
  30
  31 #include <asm/io.h>
  32
  33 #define RNG_OUT_REG             0x00            /* Output register */
  34 #define RNG_STAT_REG            0x04            /* Status register
  35                                                         [0] = STAT_BUSY */
  36 #define RNG_ALARM_REG           0x24            /* Alarm register
  37                                                         [7:0] = ALARM_COUNTER */
  38 #define RNG_CONFIG_REG          0x28            /* Configuration register
  39                                                         [11:6] = RESET_COUNT
  40                                                         [5:3]  = RING2_DELAY
  41                                                         [2:0]  = RING1_DELAY */
  42 #define RNG_REV_REG             0x3c            /* Revision register
  43                                                         [7:0] = REV_NB */
  44 #define RNG_MASK_REG            0x40            /* Mask and reset register
  45                                                         [2] = IT_EN
  46                                                         [1] = SOFTRESET
  47                                                         [0] = AUTOIDLE */
  48 #define RNG_SYSSTATUS           0x44            /* System status
  49                                                         [0] = RESETDONE */
  50
  51 /**
  52  * struct omap_rng_private_data - RNG IP block-specific data
  53  * @base: virtual address of the beginning of the RNG IP block registers
  54  * @mem_res: struct resource * for the IP block registers physical memory
  55  */
  56 struct omap_rng_private_data {
  57         void __iomem *base;
  58         struct resource *mem_res;
  59 };
  60
  61 static inline u32 omap_rng_read_reg(struct omap_rng_private_data *priv, int reg)
  62 {
  63         return __raw_readl(priv->base + reg);
  64 }
  65
  66 static inline void omap_rng_write_reg(struct omap_rng_private_data *priv,
  67                                       int reg, u32 val)
  68 {
  69         __raw_writel(val, priv->base + reg);
  70 }
  71
  72 static int omap_rng_data_present(struct hwrng *rng, int wait)
  73 {
  74         struct omap_rng_private_data *priv;
  75         int data, i;
  76
  77         priv = (struct omap_rng_private_data *)rng->priv;
  78
  79         for (i = 0; i < 20; i++) {
  80                 data = omap_rng_read_reg(priv, RNG_STAT_REG) ? 0 : 1;
  81                 if (data || !wait)
  82                         break;
  83                 /* RNG produces data fast enough (2+ MBit/sec, even
  84                  * during "rngtest" loads, that these delays don't
  85                  * seem to trigger.  We *could* use the RNG IRQ, but
  86                  * that'd be higher overhead ... so why bother?
  87                  */
  88                 udelay(10);
  89         }
  90         return data;
  91 }
  92
  93 static int omap_rng_data_read(struct hwrng *rng, u32 *data)
  94 {
  95         struct omap_rng_private_data *priv;
  96
  97         priv = (struct omap_rng_private_data *)rng->priv;
  98
  99         *data = omap_rng_read_reg(priv, RNG_OUT_REG);
 100
 101         return sizeof(u32);
 102 }
 103
 104 static struct hwrng omap_rng_ops = {
 105         .name           = "omap",
 106         .data_present   = omap_rng_data_present,
 107         .data_read      = omap_rng_data_read,
 108 };
 109
 110 #if defined(CONFIG_OF)
 111 static const struct of_device_id omap_rng_of_match[] = {
 112                 { .compatible = "ti,omap2-rng" },
 113                 {},
 114 };
 115 MODULE_DEVICE_TABLE(of, omap_rng_of_match);
 116 #endif
 117
 118 static int omap_rng_probe(struct platform_device *pdev)
 119 {
 120         struct omap_rng_private_data *priv;
 121         int ret;
 122
 123         priv = devm_kzalloc(&pdev->dev, sizeof(struct omap_rng_private_data),
 124                             GFP_KERNEL);
 125         if (!priv) {
 126                 dev_err(&pdev->dev, "could not allocate memory\n");
 127                 return -ENOMEM;
 128         };
 129
 130         omap_rng_ops.priv = (unsigned long)priv;
 131         platform_set_drvdata(pdev, priv);
 132
 133         priv->mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 134         priv->base = devm_ioremap_resource(&pdev->dev, priv->mem_res);
 135         if (IS_ERR(priv->base)) {
 136                 ret = PTR_ERR(priv->base);
 137                 goto err_ioremap;
 138         }
 139
 140         pm_runtime_enable(&pdev->dev);
 141         pm_runtime_get_sync(&pdev->dev);
 142
 143         ret = hwrng_register(&omap_rng_ops);
 144         if (ret)
 145                 goto err_register;
 146
 147         dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
 148                  omap_rng_read_reg(priv, RNG_REV_REG));
 149
 150         omap_rng_write_reg(priv, RNG_MASK_REG, 0x1);
 151
 152         return 0;
 153
 154 err_register:
 155         priv->base = NULL;
 156         pm_runtime_disable(&pdev->dev);
 157 err_ioremap:
 158         return ret;
 159 }
 160
 161 static int __exit omap_rng_remove(struct platform_device *pdev)
 162 {
 163         struct omap_rng_private_data *priv = platform_get_drvdata(pdev);
 164
 165         hwrng_unregister(&omap_rng_ops);
 166
 167         omap_rng_write_reg(priv, RNG_MASK_REG, 0x0);
 168
 169         pm_runtime_put_sync(&pdev->dev);
 170         pm_runtime_disable(&pdev->dev);
 171
 172         return 0;
 173 }
 174
 175 #ifdef CONFIG_PM_SLEEP
 176
 177 static int omap_rng_suspend(struct device *dev)
 178 {
 179         struct omap_rng_private_data *priv = dev_get_drvdata(dev);
 180
 181         omap_rng_write_reg(priv, RNG_MASK_REG, 0x0);
 182         pm_runtime_put_sync(dev);
 183
 184         return 0;
 185 }
 186
 187 static int omap_rng_resume(struct device *dev)
 188 {
 189         struct omap_rng_private_data *priv = dev_get_drvdata(dev);
 190
 191         pm_runtime_get_sync(dev);
 192         omap_rng_write_reg(priv, RNG_MASK_REG, 0x1);
 193
 194         return 0;
 195 }
 196
 197 static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
 198 #define OMAP_RNG_PM     (&omap_rng_pm)
 199
 200 #else
 201
 202 #define OMAP_RNG_PM     NULL
 203
 204 #endif
 205
 206 static struct platform_driver omap_rng_driver = {
 207         .driver = {
 208                 .name           = "omap_rng",
 209                 .owner          = THIS_MODULE,
 210                 .pm             = OMAP_RNG_PM,
 211                 .of_match_table = of_match_ptr(omap_rng_of_match),
 212         },
 213         .probe          = omap_rng_probe,
 214         .remove         = __exit_p(omap_rng_remove),
 215 };
 216
 217 module_platform_driver(omap_rng_driver);
 218 MODULE_ALIAS("platform:omap_rng");
 219 MODULE_AUTHOR("Deepak Saxena (and others)");
 220 MODULE_LICENSE("GPL");