1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RNG driver for Freescale RNGC
5 * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
6 * Copyright (C) 2017 Martin Kaiser <martin@kaiser.cx>
9 #include <linux/module.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/clk.h>
14 #include <linux/err.h>
15 #include <linux/platform_device.h>
16 #include <linux/interrupt.h>
17 #include <linux/hw_random.h>
18 #include <linux/completion.h>
21 #define RNGC_COMMAND 0x0004
22 #define RNGC_CONTROL 0x0008
23 #define RNGC_STATUS 0x000C
24 #define RNGC_ERROR 0x0010
25 #define RNGC_FIFO 0x0014
27 #define RNGC_CMD_CLR_ERR 0x00000020
28 #define RNGC_CMD_CLR_INT 0x00000010
29 #define RNGC_CMD_SEED 0x00000002
30 #define RNGC_CMD_SELF_TEST 0x00000001
32 #define RNGC_CTRL_MASK_ERROR 0x00000040
33 #define RNGC_CTRL_MASK_DONE 0x00000020
35 #define RNGC_STATUS_ERROR 0x00010000
36 #define RNGC_STATUS_FIFO_LEVEL_MASK 0x00000f00
37 #define RNGC_STATUS_FIFO_LEVEL_SHIFT 8
38 #define RNGC_STATUS_SEED_DONE 0x00000020
39 #define RNGC_STATUS_ST_DONE 0x00000010
41 #define RNGC_ERROR_STATUS_STAT_ERR 0x00000008
43 #define RNGC_TIMEOUT 3000 /* 3 sec */
46 static bool self_test = true;
47 module_param(self_test, bool, 0);
54 struct completion rng_op_done;
56 * err_reg is written only by the irq handler and read only
57 * when interrupts are masked, we need no spinlock
63 static inline void imx_rngc_irq_mask_clear(struct imx_rngc *rngc)
68 ctrl = readl(rngc->base + RNGC_CONTROL);
69 ctrl |= RNGC_CTRL_MASK_DONE | RNGC_CTRL_MASK_ERROR;
70 writel(ctrl, rngc->base + RNGC_CONTROL);
73 * CLR_INT clears the interrupt only if there's no error
74 * CLR_ERR clear the interrupt and the error register if there
77 cmd = readl(rngc->base + RNGC_COMMAND);
78 cmd |= RNGC_CMD_CLR_INT | RNGC_CMD_CLR_ERR;
79 writel(cmd, rngc->base + RNGC_COMMAND);
82 static inline void imx_rngc_irq_unmask(struct imx_rngc *rngc)
86 ctrl = readl(rngc->base + RNGC_CONTROL);
87 ctrl &= ~(RNGC_CTRL_MASK_DONE | RNGC_CTRL_MASK_ERROR);
88 writel(ctrl, rngc->base + RNGC_CONTROL);
91 static int imx_rngc_self_test(struct imx_rngc *rngc)
96 imx_rngc_irq_unmask(rngc);
99 cmd = readl(rngc->base + RNGC_COMMAND);
100 writel(cmd | RNGC_CMD_SELF_TEST, rngc->base + RNGC_COMMAND);
102 ret = wait_for_completion_timeout(&rngc->rng_op_done, RNGC_TIMEOUT);
104 imx_rngc_irq_mask_clear(rngc);
108 if (rngc->err_reg != 0)
114 static int imx_rngc_read(struct hwrng *rng, void *data, size_t max, bool wait)
116 struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng);
121 while (max >= sizeof(u32)) {
122 status = readl(rngc->base + RNGC_STATUS);
124 /* is there some error while reading this random number? */
125 if (status & RNGC_STATUS_ERROR)
128 /* how many random numbers are in FIFO? [0-16] */
129 level = (status & RNGC_STATUS_FIFO_LEVEL_MASK) >>
130 RNGC_STATUS_FIFO_LEVEL_SHIFT;
133 /* retrieve a random number from FIFO */
134 *(u32 *)data = readl(rngc->base + RNGC_FIFO);
136 retval += sizeof(u32);
142 return retval ? retval : -EIO;
145 static irqreturn_t imx_rngc_irq(int irq, void *priv)
147 struct imx_rngc *rngc = (struct imx_rngc *)priv;
151 * clearing the interrupt will also clear the error register
152 * read error and status before clearing
154 status = readl(rngc->base + RNGC_STATUS);
155 rngc->err_reg = readl(rngc->base + RNGC_ERROR);
157 imx_rngc_irq_mask_clear(rngc);
159 if (status & (RNGC_STATUS_SEED_DONE | RNGC_STATUS_ST_DONE))
160 complete(&rngc->rng_op_done);
165 static int imx_rngc_init(struct hwrng *rng)
167 struct imx_rngc *rngc = container_of(rng, struct imx_rngc, rng);
172 cmd = readl(rngc->base + RNGC_COMMAND);
173 writel(cmd | RNGC_CMD_CLR_ERR, rngc->base + RNGC_COMMAND);
175 /* create seed, repeat while there is some statistical error */
177 imx_rngc_irq_unmask(rngc);
180 cmd = readl(rngc->base + RNGC_COMMAND);
181 writel(cmd | RNGC_CMD_SEED, rngc->base + RNGC_COMMAND);
183 ret = wait_for_completion_timeout(&rngc->rng_op_done,
187 imx_rngc_irq_mask_clear(rngc);
191 } while (rngc->err_reg == RNGC_ERROR_STATUS_STAT_ERR);
193 return rngc->err_reg ? -EIO : 0;
196 static int imx_rngc_probe(struct platform_device *pdev)
198 struct imx_rngc *rngc;
199 struct resource *res;
203 rngc = devm_kzalloc(&pdev->dev, sizeof(*rngc), GFP_KERNEL);
207 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
208 rngc->base = devm_ioremap_resource(&pdev->dev, res);
209 if (IS_ERR(rngc->base))
210 return PTR_ERR(rngc->base);
212 rngc->clk = devm_clk_get(&pdev->dev, NULL);
213 if (IS_ERR(rngc->clk)) {
214 dev_err(&pdev->dev, "Can not get rng_clk\n");
215 return PTR_ERR(rngc->clk);
218 irq = platform_get_irq(pdev, 0);
220 dev_err(&pdev->dev, "Couldn't get irq %d\n", irq);
224 ret = clk_prepare_enable(rngc->clk);
228 ret = devm_request_irq(&pdev->dev,
229 irq, imx_rngc_irq, 0, pdev->name, (void *)rngc);
231 dev_err(rngc->dev, "Can't get interrupt working.\n");
235 init_completion(&rngc->rng_op_done);
237 rngc->rng.name = pdev->name;
238 rngc->rng.init = imx_rngc_init;
239 rngc->rng.read = imx_rngc_read;
241 rngc->dev = &pdev->dev;
242 platform_set_drvdata(pdev, rngc);
244 imx_rngc_irq_mask_clear(rngc);
247 ret = imx_rngc_self_test(rngc);
249 dev_err(rngc->dev, "FSL RNGC self test failed.\n");
254 ret = hwrng_register(&rngc->rng);
256 dev_err(&pdev->dev, "FSL RNGC registering failed (%d)\n", ret);
260 dev_info(&pdev->dev, "Freescale RNGC registered.\n");
264 clk_disable_unprepare(rngc->clk);
269 static int __exit imx_rngc_remove(struct platform_device *pdev)
271 struct imx_rngc *rngc = platform_get_drvdata(pdev);
273 hwrng_unregister(&rngc->rng);
275 clk_disable_unprepare(rngc->clk);
280 static int __maybe_unused imx_rngc_suspend(struct device *dev)
282 struct imx_rngc *rngc = dev_get_drvdata(dev);
284 clk_disable_unprepare(rngc->clk);
289 static int __maybe_unused imx_rngc_resume(struct device *dev)
291 struct imx_rngc *rngc = dev_get_drvdata(dev);
293 clk_prepare_enable(rngc->clk);
298 static SIMPLE_DEV_PM_OPS(imx_rngc_pm_ops, imx_rngc_suspend, imx_rngc_resume);
300 static const struct of_device_id imx_rngc_dt_ids[] = {
301 { .compatible = "fsl,imx25-rngb", .data = NULL, },
304 MODULE_DEVICE_TABLE(of, imx_rngc_dt_ids);
306 static struct platform_driver imx_rngc_driver = {
309 .pm = &imx_rngc_pm_ops,
310 .of_match_table = imx_rngc_dt_ids,
312 .remove = __exit_p(imx_rngc_remove),
315 module_platform_driver_probe(imx_rngc_driver, imx_rngc_probe);
317 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
318 MODULE_DESCRIPTION("H/W RNGC driver for i.MX");
319 MODULE_LICENSE("GPL");