2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/compat.h>
33 #include <linux/clocksource.h>
34 #include <linux/uaccess.h>
35 #include <linux/slab.h>
38 #include <asm/current.h>
39 #include <asm/system.h>
41 #include <asm/div64.h>
43 #include <linux/acpi.h>
44 #include <acpi/acpi_bus.h>
45 #include <linux/hpet.h>
48 * The High Precision Event Timer driver.
49 * This driver is closely modelled after the rtc.c driver.
50 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
52 #define HPET_USER_FREQ (64)
53 #define HPET_DRIFT (500)
55 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
58 /* WARNING -- don't get confused. These macros are never used
59 * to write the (single) counter, and rarely to read it.
60 * They're badly named; to fix, someday.
62 #if BITS_PER_LONG == 64
63 #define write_counter(V, MC) writeq(V, MC)
64 #define read_counter(MC) readq(MC)
66 #define write_counter(V, MC) writel(V, MC)
67 #define read_counter(MC) readl(MC)
70 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
71 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
73 /* This clocksource driver currently only works on ia64 */
75 static void __iomem *hpet_mctr;
77 static cycle_t read_hpet(struct clocksource *cs)
79 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
82 static struct clocksource clocksource_hpet = {
86 .mask = CLOCKSOURCE_MASK(64),
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
89 static struct clocksource *hpet_clocksource;
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
95 #define HPET_DEV_NAME (7)
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
123 static struct hpets *hpets;
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
132 static inline unsigned long long readq(void __iomem *addr)
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
139 static inline void writeq(unsigned long long v, void __iomem *addr)
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
146 static irqreturn_t hpet_interrupt(int irq, void *data)
148 struct hpet_dev *devp;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
158 spin_lock(&hpet_lock);
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
166 unsigned long m, t, mc, base, k;
167 struct hpet __iomem *hpet = devp->hd_hpet;
168 struct hpets *hpetp = devp->hd_hpets;
170 t = devp->hd_ireqfreq;
171 m = read_counter(&devp->hd_timer->hpet_compare);
172 mc = read_counter(&hpet->hpet_mc);
173 /* The time for the next interrupt would logically be t + m,
174 * however, if we are very unlucky and the interrupt is delayed
175 * for longer than t then we will completely miss the next
176 * interrupt if we set t + m and an application will hang.
177 * Therefore we need to make a more complex computation assuming
178 * that there exists a k for which the following is true:
179 * k * t + base < mc + delta
180 * (k + 1) * t + base > mc + delta
181 * where t is the interval in hpet ticks for the given freq,
182 * base is the theoretical start value 0 < base < t,
183 * mc is the main counter value at the time of the interrupt,
184 * delta is the time it takes to write the a value to the
186 * k may then be computed as (mc - base + delta) / t .
189 k = (mc - base + hpetp->hp_delta) / t;
190 write_counter(t * (k + 1) + base,
191 &devp->hd_timer->hpet_compare);
194 if (devp->hd_flags & HPET_SHARED_IRQ)
195 writel(isr, &devp->hd_hpet->hpet_isr);
196 spin_unlock(&hpet_lock);
198 wake_up_interruptible(&devp->hd_waitqueue);
200 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
205 static void hpet_timer_set_irq(struct hpet_dev *devp)
209 struct hpet_timer __iomem *timer;
211 spin_lock_irq(&hpet_lock);
212 if (devp->hd_hdwirq) {
213 spin_unlock_irq(&hpet_lock);
217 timer = devp->hd_timer;
219 /* we prefer level triggered mode */
220 v = readl(&timer->hpet_config);
221 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
222 v |= Tn_INT_TYPE_CNF_MASK;
223 writel(v, &timer->hpet_config);
225 spin_unlock_irq(&hpet_lock);
227 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
228 Tn_INT_ROUTE_CAP_SHIFT;
231 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
232 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
234 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
239 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
240 if (irq >= nr_irqs) {
245 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
250 /* FIXME: Setup interrupt source table */
253 if (irq < HPET_MAX_IRQ) {
254 spin_lock_irq(&hpet_lock);
255 v = readl(&timer->hpet_config);
256 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
257 writel(v, &timer->hpet_config);
258 devp->hd_hdwirq = gsi;
259 spin_unlock_irq(&hpet_lock);
264 static int hpet_open(struct inode *inode, struct file *file)
266 struct hpet_dev *devp;
270 if (file->f_mode & FMODE_WRITE)
273 mutex_lock(&hpet_mutex);
274 spin_lock_irq(&hpet_lock);
276 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
277 for (i = 0; i < hpetp->hp_ntimer; i++)
278 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
281 devp = &hpetp->hp_dev[i];
286 spin_unlock_irq(&hpet_lock);
287 mutex_unlock(&hpet_mutex);
291 file->private_data = devp;
292 devp->hd_irqdata = 0;
293 devp->hd_flags |= HPET_OPEN;
294 spin_unlock_irq(&hpet_lock);
295 mutex_unlock(&hpet_mutex);
297 hpet_timer_set_irq(devp);
303 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
305 DECLARE_WAITQUEUE(wait, current);
308 struct hpet_dev *devp;
310 devp = file->private_data;
311 if (!devp->hd_ireqfreq)
314 if (count < sizeof(unsigned long))
317 add_wait_queue(&devp->hd_waitqueue, &wait);
320 set_current_state(TASK_INTERRUPTIBLE);
322 spin_lock_irq(&hpet_lock);
323 data = devp->hd_irqdata;
324 devp->hd_irqdata = 0;
325 spin_unlock_irq(&hpet_lock);
329 else if (file->f_flags & O_NONBLOCK) {
332 } else if (signal_pending(current)) {
333 retval = -ERESTARTSYS;
339 retval = put_user(data, (unsigned long __user *)buf);
341 retval = sizeof(unsigned long);
343 __set_current_state(TASK_RUNNING);
344 remove_wait_queue(&devp->hd_waitqueue, &wait);
349 static unsigned int hpet_poll(struct file *file, poll_table * wait)
352 struct hpet_dev *devp;
354 devp = file->private_data;
356 if (!devp->hd_ireqfreq)
359 poll_wait(file, &devp->hd_waitqueue, wait);
361 spin_lock_irq(&hpet_lock);
362 v = devp->hd_irqdata;
363 spin_unlock_irq(&hpet_lock);
366 return POLLIN | POLLRDNORM;
371 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
373 #ifdef CONFIG_HPET_MMAP
374 struct hpet_dev *devp;
377 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
380 devp = file->private_data;
381 addr = devp->hd_hpets->hp_hpet_phys;
383 if (addr & (PAGE_SIZE - 1))
386 vma->vm_flags |= VM_IO;
387 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
389 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
390 PAGE_SIZE, vma->vm_page_prot)) {
391 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
402 static int hpet_fasync(int fd, struct file *file, int on)
404 struct hpet_dev *devp;
406 devp = file->private_data;
408 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
414 static int hpet_release(struct inode *inode, struct file *file)
416 struct hpet_dev *devp;
417 struct hpet_timer __iomem *timer;
420 devp = file->private_data;
421 timer = devp->hd_timer;
423 spin_lock_irq(&hpet_lock);
425 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
426 &timer->hpet_config);
431 devp->hd_ireqfreq = 0;
433 if (devp->hd_flags & HPET_PERIODIC
434 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
437 v = readq(&timer->hpet_config);
438 v ^= Tn_TYPE_CNF_MASK;
439 writeq(v, &timer->hpet_config);
442 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
443 spin_unlock_irq(&hpet_lock);
448 file->private_data = NULL;
452 static int hpet_ioctl_ieon(struct hpet_dev *devp)
454 struct hpet_timer __iomem *timer;
455 struct hpet __iomem *hpet;
458 unsigned long g, v, t, m;
459 unsigned long flags, isr;
461 timer = devp->hd_timer;
462 hpet = devp->hd_hpet;
463 hpetp = devp->hd_hpets;
465 if (!devp->hd_ireqfreq)
468 spin_lock_irq(&hpet_lock);
470 if (devp->hd_flags & HPET_IE) {
471 spin_unlock_irq(&hpet_lock);
475 devp->hd_flags |= HPET_IE;
477 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
478 devp->hd_flags |= HPET_SHARED_IRQ;
479 spin_unlock_irq(&hpet_lock);
481 irq = devp->hd_hdwirq;
484 unsigned long irq_flags;
486 if (devp->hd_flags & HPET_SHARED_IRQ) {
488 * To prevent the interrupt handler from seeing an
489 * unwanted interrupt status bit, program the timer
490 * so that it will not fire in the near future ...
492 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
493 &timer->hpet_config);
494 write_counter(read_counter(&hpet->hpet_mc),
495 &timer->hpet_compare);
496 /* ... and clear any left-over status. */
497 isr = 1 << (devp - devp->hd_hpets->hp_dev);
498 writel(isr, &hpet->hpet_isr);
501 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
502 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
503 ? IRQF_SHARED : IRQF_DISABLED;
504 if (request_irq(irq, hpet_interrupt, irq_flags,
505 devp->hd_name, (void *)devp)) {
506 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
512 spin_lock_irq(&hpet_lock);
513 devp->hd_flags ^= HPET_IE;
514 spin_unlock_irq(&hpet_lock);
519 t = devp->hd_ireqfreq;
520 v = readq(&timer->hpet_config);
522 /* 64-bit comparators are not yet supported through the ioctls,
523 * so force this into 32-bit mode if it supports both modes
525 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
527 if (devp->hd_flags & HPET_PERIODIC) {
528 g |= Tn_TYPE_CNF_MASK;
529 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
530 writeq(v, &timer->hpet_config);
531 local_irq_save(flags);
534 * NOTE: First we modify the hidden accumulator
535 * register supported by periodic-capable comparators.
536 * We never want to modify the (single) counter; that
537 * would affect all the comparators. The value written
538 * is the counter value when the first interrupt is due.
540 m = read_counter(&hpet->hpet_mc);
541 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
543 * Then we modify the comparator, indicating the period
544 * for subsequent interrupt.
546 write_counter(t, &timer->hpet_compare);
548 local_irq_save(flags);
549 m = read_counter(&hpet->hpet_mc);
550 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
553 if (devp->hd_flags & HPET_SHARED_IRQ) {
554 isr = 1 << (devp - devp->hd_hpets->hp_dev);
555 writel(isr, &hpet->hpet_isr);
557 writeq(g, &timer->hpet_config);
558 local_irq_restore(flags);
563 /* converts Hz to number of timer ticks */
564 static inline unsigned long hpet_time_div(struct hpets *hpets,
567 unsigned long long m;
569 m = hpets->hp_tick_freq + (dis >> 1);
571 return (unsigned long)m;
575 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
576 struct hpet_info *info)
578 struct hpet_timer __iomem *timer;
579 struct hpet __iomem *hpet;
590 timer = devp->hd_timer;
591 hpet = devp->hd_hpet;
592 hpetp = devp->hd_hpets;
595 return hpet_ioctl_ieon(devp);
604 if ((devp->hd_flags & HPET_IE) == 0)
606 v = readq(&timer->hpet_config);
607 v &= ~Tn_INT_ENB_CNF_MASK;
608 writeq(v, &timer->hpet_config);
610 free_irq(devp->hd_irq, devp);
613 devp->hd_flags ^= HPET_IE;
617 memset(info, 0, sizeof(*info));
618 if (devp->hd_ireqfreq)
620 hpet_time_div(hpetp, devp->hd_ireqfreq);
622 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
623 info->hi_hpet = hpetp->hp_which;
624 info->hi_timer = devp - hpetp->hp_dev;
628 v = readq(&timer->hpet_config);
629 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
633 devp->hd_flags |= HPET_PERIODIC;
636 v = readq(&timer->hpet_config);
637 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
641 if (devp->hd_flags & HPET_PERIODIC &&
642 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
643 v = readq(&timer->hpet_config);
644 v ^= Tn_TYPE_CNF_MASK;
645 writeq(v, &timer->hpet_config);
647 devp->hd_flags &= ~HPET_PERIODIC;
650 if ((arg > hpet_max_freq) &&
651 !capable(CAP_SYS_RESOURCE)) {
661 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
668 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
670 struct hpet_info info;
673 mutex_lock(&hpet_mutex);
674 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
675 mutex_unlock(&hpet_mutex);
677 if ((cmd == HPET_INFO) && !err &&
678 (copy_to_user((void __user *)arg, &info, sizeof(info))))
685 struct compat_hpet_info {
686 compat_ulong_t hi_ireqfreq; /* Hz */
687 compat_ulong_t hi_flags; /* information */
688 unsigned short hi_hpet;
689 unsigned short hi_timer;
693 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
695 struct hpet_info info;
698 mutex_lock(&hpet_mutex);
699 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
700 mutex_unlock(&hpet_mutex);
702 if ((cmd == HPET_INFO) && !err) {
703 struct compat_hpet_info __user *u = compat_ptr(arg);
704 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
705 put_user(info.hi_flags, &u->hi_flags) ||
706 put_user(info.hi_hpet, &u->hi_hpet) ||
707 put_user(info.hi_timer, &u->hi_timer))
715 static const struct file_operations hpet_fops = {
716 .owner = THIS_MODULE,
720 .unlocked_ioctl = hpet_ioctl,
722 .compat_ioctl = hpet_compat_ioctl,
725 .release = hpet_release,
726 .fasync = hpet_fasync,
730 static int hpet_is_known(struct hpet_data *hdp)
734 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
735 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
741 static ctl_table hpet_table[] = {
743 .procname = "max-user-freq",
744 .data = &hpet_max_freq,
745 .maxlen = sizeof(int),
747 .proc_handler = proc_dointvec,
752 static ctl_table hpet_root[] = {
762 static ctl_table dev_root[] = {
772 static struct ctl_table_header *sysctl_header;
775 * Adjustment for when arming the timer with
776 * initial conditions. That is, main counter
777 * ticks expired before interrupts are enabled.
779 #define TICK_CALIBRATE (1000UL)
781 static unsigned long __hpet_calibrate(struct hpets *hpetp)
783 struct hpet_timer __iomem *timer = NULL;
784 unsigned long t, m, count, i, flags, start;
785 struct hpet_dev *devp;
787 struct hpet __iomem *hpet;
789 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
790 if ((devp->hd_flags & HPET_OPEN) == 0) {
791 timer = devp->hd_timer;
798 hpet = hpetp->hp_hpet;
799 t = read_counter(&timer->hpet_compare);
802 count = hpet_time_div(hpetp, TICK_CALIBRATE);
804 local_irq_save(flags);
806 start = read_counter(&hpet->hpet_mc);
809 m = read_counter(&hpet->hpet_mc);
810 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
811 } while (i++, (m - start) < count);
813 local_irq_restore(flags);
815 return (m - start) / i;
818 static unsigned long hpet_calibrate(struct hpets *hpetp)
820 unsigned long ret = -1;
824 * Try to calibrate until return value becomes stable small value.
825 * If SMI interruption occurs in calibration loop, the return value
826 * will be big. This avoids its impact.
829 tmp = __hpet_calibrate(hpetp);
838 int hpet_alloc(struct hpet_data *hdp)
841 struct hpet_dev *devp;
845 struct hpet __iomem *hpet;
846 static struct hpets *last;
847 unsigned long period;
848 unsigned long long temp;
852 * hpet_alloc can be called by platform dependent code.
853 * If platform dependent code has allocated the hpet that
854 * ACPI has also reported, then we catch it here.
856 if (hpet_is_known(hdp)) {
857 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
862 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
863 sizeof(struct hpet_dev));
865 hpetp = kzalloc(siz, GFP_KERNEL);
870 hpetp->hp_which = hpet_nhpet++;
871 hpetp->hp_hpet = hdp->hd_address;
872 hpetp->hp_hpet_phys = hdp->hd_phys_address;
874 hpetp->hp_ntimer = hdp->hd_nirqs;
876 for (i = 0; i < hdp->hd_nirqs; i++)
877 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
879 hpet = hpetp->hp_hpet;
881 cap = readq(&hpet->hpet_cap);
883 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
885 if (hpetp->hp_ntimer != ntimer) {
886 printk(KERN_WARNING "hpet: number irqs doesn't agree"
887 " with number of timers\n");
893 last->hp_next = hpetp;
899 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
900 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
901 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
902 temp += period >> 1; /* round */
903 do_div(temp, period);
904 hpetp->hp_tick_freq = temp; /* ticks per second */
906 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
907 hpetp->hp_which, hdp->hd_phys_address,
908 hpetp->hp_ntimer > 1 ? "s" : "");
909 for (i = 0; i < hpetp->hp_ntimer; i++)
910 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
913 temp = hpetp->hp_tick_freq;
914 remainder = do_div(temp, 1000000);
916 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
917 hpetp->hp_which, hpetp->hp_ntimer,
918 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
919 (unsigned) temp, remainder);
921 mcfg = readq(&hpet->hpet_config);
922 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
923 write_counter(0L, &hpet->hpet_mc);
924 mcfg |= HPET_ENABLE_CNF_MASK;
925 writeq(mcfg, &hpet->hpet_config);
928 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
929 struct hpet_timer __iomem *timer;
931 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
933 devp->hd_hpets = hpetp;
934 devp->hd_hpet = hpet;
935 devp->hd_timer = timer;
938 * If the timer was reserved by platform code,
939 * then make timer unavailable for opens.
941 if (hdp->hd_state & (1 << i)) {
942 devp->hd_flags = HPET_OPEN;
946 init_waitqueue_head(&devp->hd_waitqueue);
949 hpetp->hp_delta = hpet_calibrate(hpetp);
951 /* This clocksource driver currently only works on ia64 */
953 if (!hpet_clocksource) {
954 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
955 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
956 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
957 hpetp->hp_clocksource = &clocksource_hpet;
958 hpet_clocksource = &clocksource_hpet;
965 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
967 struct hpet_data *hdp;
969 struct acpi_resource_address64 addr;
973 status = acpi_resource_to_address64(res, &addr);
975 if (ACPI_SUCCESS(status)) {
976 hdp->hd_phys_address = addr.minimum;
977 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
979 if (hpet_is_known(hdp)) {
980 iounmap(hdp->hd_address);
981 return AE_ALREADY_EXISTS;
983 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
984 struct acpi_resource_fixed_memory32 *fixmem32;
986 fixmem32 = &res->data.fixed_memory32;
990 hdp->hd_phys_address = fixmem32->address;
991 hdp->hd_address = ioremap(fixmem32->address,
994 if (hpet_is_known(hdp)) {
995 iounmap(hdp->hd_address);
996 return AE_ALREADY_EXISTS;
998 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
999 struct acpi_resource_extended_irq *irqp;
1002 irqp = &res->data.extended_irq;
1004 for (i = 0; i < irqp->interrupt_count; i++) {
1005 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
1006 irqp->triggering, irqp->polarity);
1010 hdp->hd_irq[hdp->hd_nirqs] = irq;
1018 static int hpet_acpi_add(struct acpi_device *device)
1021 struct hpet_data data;
1023 memset(&data, 0, sizeof(data));
1026 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
1027 hpet_resources, &data);
1029 if (ACPI_FAILURE(result))
1032 if (!data.hd_address || !data.hd_nirqs) {
1033 if (data.hd_address)
1034 iounmap(data.hd_address);
1035 printk("%s: no address or irqs in _CRS\n", __func__);
1039 return hpet_alloc(&data);
1042 static int hpet_acpi_remove(struct acpi_device *device, int type)
1044 /* XXX need to unregister clocksource, dealloc mem, etc */
1048 static const struct acpi_device_id hpet_device_ids[] = {
1052 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1054 static struct acpi_driver hpet_acpi_driver = {
1056 .ids = hpet_device_ids,
1058 .add = hpet_acpi_add,
1059 .remove = hpet_acpi_remove,
1063 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1065 static int __init hpet_init(void)
1069 result = misc_register(&hpet_misc);
1073 sysctl_header = register_sysctl_table(dev_root);
1075 result = acpi_bus_register_driver(&hpet_acpi_driver);
1078 unregister_sysctl_table(sysctl_header);
1079 misc_deregister(&hpet_misc);
1086 static void __exit hpet_exit(void)
1088 acpi_bus_unregister_driver(&hpet_acpi_driver);
1091 unregister_sysctl_table(sysctl_header);
1092 misc_deregister(&hpet_misc);
1097 module_init(hpet_init);
1098 module_exit(hpet_exit);
1099 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1100 MODULE_LICENSE("GPL");