1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2021 MediaTek Inc. */
4 #define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin"
5 #define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin"
6 #define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin"
8 #define HCI_WMT_MAX_EVENT_SIZE 64
10 #define BTMTK_WMT_REG_READ 0x2
13 BTMTK_WMT_PATCH_DWNLD = 0x1,
15 BTMTK_WMT_WAKEUP = 0x3,
17 BTMTK_WMT_FUNC_CTRL = 0x6,
19 BTMTK_WMT_REGISTER = 0x8,
20 BTMTK_WMT_SEMAPHORE = 0x17,
25 BTMTK_WMT_PATCH_UNDONE,
26 BTMTK_WMT_PATCH_PROGRESS,
30 BTMTK_WMT_ON_PROGRESS,
33 struct btmtk_wmt_hdr {
40 struct btmtk_hci_wmt_cmd {
41 struct btmtk_wmt_hdr hdr;
45 struct btmtk_hci_wmt_evt {
46 struct hci_event_hdr hhdr;
47 struct btmtk_wmt_hdr whdr;
50 struct btmtk_hci_wmt_evt_funcc {
51 struct btmtk_hci_wmt_evt hwhdr;
55 struct btmtk_hci_wmt_evt_reg {
56 struct btmtk_hci_wmt_evt hwhdr;
63 struct btmtk_tci_sleep {
71 struct btmtk_hci_wmt_params {
79 typedef int (*wmt_cmd_sync_func_t)(struct hci_dev *,
80 struct btmtk_hci_wmt_params *);
82 #if IS_ENABLED(CONFIG_BT_MTK)
84 int btmtk_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
86 int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname,
87 wmt_cmd_sync_func_t wmt_cmd_sync);
89 int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
90 wmt_cmd_sync_func_t wmt_cmd_sync);
93 static inline int btmtk_set_bdaddr(struct hci_dev *hdev,
94 const bdaddr_t *bdaddr)
99 static int btmtk_setup_firmware_79xx(struct hci_dev *hdev, const char *fwname,
100 wmt_cmd_sync_func_t wmt_cmd_sync)
105 static int btmtk_setup_firmware(struct hci_dev *hdev, const char *fwname,
106 wmt_cmd_sync_func_t wmt_cmd_sync)