2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
75 static bool use_cmb_sqes = true;
76 module_param(use_cmb_sqes, bool, 0644);
77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
79 static DEFINE_SPINLOCK(dev_list_lock);
80 static LIST_HEAD(dev_list);
81 static struct task_struct *nvme_thread;
82 static struct workqueue_struct *nvme_workq;
83 static wait_queue_head_t nvme_kthread_wait;
85 static struct class *nvme_class;
87 static void nvme_reset_failed_dev(struct work_struct *ws);
88 static int nvme_reset(struct nvme_dev *dev);
89 static int nvme_process_cq(struct nvme_queue *nvmeq);
91 struct async_cmd_info {
92 struct kthread_work work;
93 struct kthread_worker *worker;
101 * An NVM Express queue. Each device has at least two (one for admin
102 * commands and one for I/O commands).
105 struct device *q_dmadev;
106 struct nvme_dev *dev;
107 char irqname[24]; /* nvme4294967295-65535\0 */
109 struct nvme_command *sq_cmds;
110 struct nvme_command __iomem *sq_cmds_io;
111 volatile struct nvme_completion *cqes;
112 struct blk_mq_tags **tags;
113 dma_addr_t sq_dma_addr;
114 dma_addr_t cq_dma_addr;
124 struct async_cmd_info cmdinfo;
128 * Check we didin't inadvertently grow the command struct
130 static inline void _nvme_check_size(void)
132 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
141 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
142 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
147 struct nvme_completion *);
149 struct nvme_cmd_info {
150 nvme_completion_fn fn;
153 struct nvme_queue *nvmeq;
154 struct nvme_iod iod[0];
158 * Max size of iod being embedded in the request payload
160 #define NVME_INT_PAGES 2
161 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
162 #define NVME_INT_MASK 0x01
165 * Will slightly overestimate the number of pages needed. This is OK
166 * as it only leads to a small amount of wasted memory for the lifetime of
169 static int nvme_npages(unsigned size, struct nvme_dev *dev)
171 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
172 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
175 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
177 unsigned int ret = sizeof(struct nvme_cmd_info);
179 ret += sizeof(struct nvme_iod);
180 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
181 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
186 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
187 unsigned int hctx_idx)
189 struct nvme_dev *dev = data;
190 struct nvme_queue *nvmeq = dev->queues[0];
192 WARN_ON(hctx_idx != 0);
193 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
194 WARN_ON(nvmeq->tags);
196 hctx->driver_data = nvmeq;
197 nvmeq->tags = &dev->admin_tagset.tags[0];
201 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
203 struct nvme_queue *nvmeq = hctx->driver_data;
208 static int nvme_admin_init_request(void *data, struct request *req,
209 unsigned int hctx_idx, unsigned int rq_idx,
210 unsigned int numa_node)
212 struct nvme_dev *dev = data;
213 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
214 struct nvme_queue *nvmeq = dev->queues[0];
221 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
222 unsigned int hctx_idx)
224 struct nvme_dev *dev = data;
225 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
228 nvmeq->tags = &dev->tagset.tags[hctx_idx];
230 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
231 hctx->driver_data = nvmeq;
235 static int nvme_init_request(void *data, struct request *req,
236 unsigned int hctx_idx, unsigned int rq_idx,
237 unsigned int numa_node)
239 struct nvme_dev *dev = data;
240 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
241 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
249 nvme_completion_fn handler)
254 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
257 static void *iod_get_private(struct nvme_iod *iod)
259 return (void *) (iod->private & ~0x1UL);
263 * If bit 0 is set, the iod is embedded in the request payload.
265 static bool iod_should_kfree(struct nvme_iod *iod)
267 return (iod->private & NVME_INT_MASK) == 0;
270 /* Special values must be less than 0x1000 */
271 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
272 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
273 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
274 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
277 struct nvme_completion *cqe)
279 if (ctx == CMD_CTX_CANCELLED)
281 if (ctx == CMD_CTX_COMPLETED) {
282 dev_warn(nvmeq->q_dmadev,
283 "completed id %d twice on queue %d\n",
284 cqe->command_id, le16_to_cpup(&cqe->sq_id));
287 if (ctx == CMD_CTX_INVALID) {
288 dev_warn(nvmeq->q_dmadev,
289 "invalid id %d completed on queue %d\n",
290 cqe->command_id, le16_to_cpup(&cqe->sq_id));
293 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
303 cmd->fn = special_completion;
304 cmd->ctx = CMD_CTX_CANCELLED;
308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
309 struct nvme_completion *cqe)
311 u32 result = le32_to_cpup(&cqe->result);
312 u16 status = le16_to_cpup(&cqe->status) >> 1;
314 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
315 ++nvmeq->dev->event_limit;
316 if (status != NVME_SC_SUCCESS)
319 switch (result & 0xff07) {
320 case NVME_AER_NOTICE_NS_CHANGED:
321 dev_info(nvmeq->q_dmadev, "rescanning\n");
322 schedule_work(&nvmeq->dev->scan_work);
324 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
328 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
329 struct nvme_completion *cqe)
331 struct request *req = ctx;
333 u16 status = le16_to_cpup(&cqe->status) >> 1;
334 u32 result = le32_to_cpup(&cqe->result);
336 blk_mq_free_request(req);
338 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
339 ++nvmeq->dev->abort_limit;
342 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
343 struct nvme_completion *cqe)
345 struct async_cmd_info *cmdinfo = ctx;
346 cmdinfo->result = le32_to_cpup(&cqe->result);
347 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
348 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
349 blk_mq_free_request(cmdinfo->req);
352 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
355 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
357 return blk_mq_rq_to_pdu(req);
361 * Called with local interrupts disabled and the q_lock held. May not sleep.
363 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
364 nvme_completion_fn *fn)
366 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
368 if (tag >= nvmeq->q_depth) {
369 *fn = special_completion;
370 return CMD_CTX_INVALID;
375 cmd->fn = special_completion;
376 cmd->ctx = CMD_CTX_COMPLETED;
381 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
382 * @nvmeq: The queue to use
383 * @cmd: The command to send
385 * Safe to use from interrupt context
387 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
388 struct nvme_command *cmd)
390 u16 tail = nvmeq->sq_tail;
392 if (nvmeq->sq_cmds_io)
393 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
395 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
397 if (++tail == nvmeq->q_depth)
399 writel(tail, nvmeq->q_db);
400 nvmeq->sq_tail = tail;
403 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
406 spin_lock_irqsave(&nvmeq->q_lock, flags);
407 __nvme_submit_cmd(nvmeq, cmd);
408 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
411 static __le64 **iod_list(struct nvme_iod *iod)
413 return ((void *)iod) + iod->offset;
416 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
417 unsigned nseg, unsigned long private)
419 iod->private = private;
420 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
422 iod->length = nbytes;
426 static struct nvme_iod *
427 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
428 unsigned long priv, gfp_t gfp)
430 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
431 sizeof(__le64 *) * nvme_npages(bytes, dev) +
432 sizeof(struct scatterlist) * nseg, gfp);
435 iod_init(iod, bytes, nseg, priv);
440 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
443 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
444 sizeof(struct nvme_dsm_range);
445 struct nvme_iod *iod;
447 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
448 size <= NVME_INT_BYTES(dev)) {
449 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
452 iod_init(iod, size, rq->nr_phys_segments,
453 (unsigned long) rq | NVME_INT_MASK);
457 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
458 (unsigned long) rq, gfp);
461 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
463 const int last_prp = dev->page_size / 8 - 1;
465 __le64 **list = iod_list(iod);
466 dma_addr_t prp_dma = iod->first_dma;
468 if (iod->npages == 0)
469 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
470 for (i = 0; i < iod->npages; i++) {
471 __le64 *prp_list = list[i];
472 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
473 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
474 prp_dma = next_prp_dma;
477 if (iod_should_kfree(iod))
481 static int nvme_error_status(u16 status)
483 switch (status & 0x7ff) {
484 case NVME_SC_SUCCESS:
486 case NVME_SC_CAP_EXCEEDED:
493 #ifdef CONFIG_BLK_DEV_INTEGRITY
494 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
496 if (be32_to_cpu(pi->ref_tag) == v)
497 pi->ref_tag = cpu_to_be32(p);
500 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
502 if (be32_to_cpu(pi->ref_tag) == p)
503 pi->ref_tag = cpu_to_be32(v);
507 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
509 * The virtual start sector is the one that was originally submitted by the
510 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
511 * start sector may be different. Remap protection information to match the
512 * physical LBA on writes, and back to the original seed on reads.
514 * Type 0 and 3 do not have a ref tag, so no remapping required.
516 static void nvme_dif_remap(struct request *req,
517 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
519 struct nvme_ns *ns = req->rq_disk->private_data;
520 struct bio_integrity_payload *bip;
521 struct t10_pi_tuple *pi;
523 u32 i, nlb, ts, phys, virt;
525 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
528 bip = bio_integrity(req->bio);
532 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
535 virt = bip_get_seed(bip);
536 phys = nvme_block_nr(ns, blk_rq_pos(req));
537 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
538 ts = ns->disk->integrity->tuple_size;
540 for (i = 0; i < nlb; i++, virt++, phys++) {
541 pi = (struct t10_pi_tuple *)p;
542 dif_swap(phys, virt, pi);
548 static int nvme_noop_verify(struct blk_integrity_iter *iter)
553 static int nvme_noop_generate(struct blk_integrity_iter *iter)
558 struct blk_integrity nvme_meta_noop = {
559 .name = "NVME_META_NOOP",
560 .generate_fn = nvme_noop_generate,
561 .verify_fn = nvme_noop_verify,
564 static void nvme_init_integrity(struct nvme_ns *ns)
566 struct blk_integrity integrity;
568 switch (ns->pi_type) {
569 case NVME_NS_DPS_PI_TYPE3:
570 integrity = t10_pi_type3_crc;
572 case NVME_NS_DPS_PI_TYPE1:
573 case NVME_NS_DPS_PI_TYPE2:
574 integrity = t10_pi_type1_crc;
577 integrity = nvme_meta_noop;
580 integrity.tuple_size = ns->ms;
581 blk_integrity_register(ns->disk, &integrity);
582 blk_queue_max_integrity_segments(ns->queue, 1);
584 #else /* CONFIG_BLK_DEV_INTEGRITY */
585 static void nvme_dif_remap(struct request *req,
586 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
589 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
592 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
595 static void nvme_init_integrity(struct nvme_ns *ns)
600 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
601 struct nvme_completion *cqe)
603 struct nvme_iod *iod = ctx;
604 struct request *req = iod_get_private(iod);
605 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
607 u16 status = le16_to_cpup(&cqe->status) >> 1;
609 if (unlikely(status)) {
610 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
611 && (jiffies - req->start_time) < req->timeout) {
614 blk_mq_requeue_request(req);
615 spin_lock_irqsave(req->q->queue_lock, flags);
616 if (!blk_queue_stopped(req->q))
617 blk_mq_kick_requeue_list(req->q);
618 spin_unlock_irqrestore(req->q->queue_lock, flags);
621 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
622 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
623 req->errors = -EINTR;
625 req->errors = status;
627 req->errors = nvme_error_status(status);
631 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
632 u32 result = le32_to_cpup(&cqe->result);
633 req->special = (void *)(uintptr_t)result;
637 dev_warn(nvmeq->dev->dev,
638 "completing aborted command with status:%04x\n",
642 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
643 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
644 if (blk_integrity_rq(req)) {
645 if (!rq_data_dir(req))
646 nvme_dif_remap(req, nvme_dif_complete);
647 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
648 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
651 nvme_free_iod(nvmeq->dev, iod);
653 blk_mq_complete_request(req);
656 /* length is in bytes. gfp flags indicates whether we may sleep. */
657 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
658 int total_len, gfp_t gfp)
660 struct dma_pool *pool;
661 int length = total_len;
662 struct scatterlist *sg = iod->sg;
663 int dma_len = sg_dma_len(sg);
664 u64 dma_addr = sg_dma_address(sg);
665 u32 page_size = dev->page_size;
666 int offset = dma_addr & (page_size - 1);
668 __le64 **list = iod_list(iod);
672 length -= (page_size - offset);
676 dma_len -= (page_size - offset);
678 dma_addr += (page_size - offset);
681 dma_addr = sg_dma_address(sg);
682 dma_len = sg_dma_len(sg);
685 if (length <= page_size) {
686 iod->first_dma = dma_addr;
690 nprps = DIV_ROUND_UP(length, page_size);
691 if (nprps <= (256 / 8)) {
692 pool = dev->prp_small_pool;
695 pool = dev->prp_page_pool;
699 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
701 iod->first_dma = dma_addr;
703 return (total_len - length) + page_size;
706 iod->first_dma = prp_dma;
709 if (i == page_size >> 3) {
710 __le64 *old_prp_list = prp_list;
711 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
713 return total_len - length;
714 list[iod->npages++] = prp_list;
715 prp_list[0] = old_prp_list[i - 1];
716 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
719 prp_list[i++] = cpu_to_le64(dma_addr);
720 dma_len -= page_size;
721 dma_addr += page_size;
729 dma_addr = sg_dma_address(sg);
730 dma_len = sg_dma_len(sg);
736 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
737 struct nvme_iod *iod)
739 struct nvme_command cmnd;
741 memcpy(&cmnd, req->cmd, sizeof(cmnd));
742 cmnd.rw.command_id = req->tag;
743 if (req->nr_phys_segments) {
744 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
745 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
748 __nvme_submit_cmd(nvmeq, &cmnd);
752 * We reuse the small pool to allocate the 16-byte range here as it is not
753 * worth having a special pool for these or additional cases to handle freeing
756 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
757 struct request *req, struct nvme_iod *iod)
759 struct nvme_dsm_range *range =
760 (struct nvme_dsm_range *)iod_list(iod)[0];
761 struct nvme_command cmnd;
763 range->cattr = cpu_to_le32(0);
764 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
765 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
767 memset(&cmnd, 0, sizeof(cmnd));
768 cmnd.dsm.opcode = nvme_cmd_dsm;
769 cmnd.dsm.command_id = req->tag;
770 cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
771 cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
773 cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
775 __nvme_submit_cmd(nvmeq, &cmnd);
778 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
781 struct nvme_command cmnd;
783 memset(&cmnd, 0, sizeof(cmnd));
784 cmnd.common.opcode = nvme_cmd_flush;
785 cmnd.common.command_id = cmdid;
786 cmnd.common.nsid = cpu_to_le32(ns->ns_id);
788 __nvme_submit_cmd(nvmeq, &cmnd);
791 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
794 struct request *req = iod_get_private(iod);
795 struct nvme_command cmnd;
799 if (req->cmd_flags & REQ_FUA)
800 control |= NVME_RW_FUA;
801 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
802 control |= NVME_RW_LR;
804 if (req->cmd_flags & REQ_RAHEAD)
805 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
807 memset(&cmnd, 0, sizeof(cmnd));
808 cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
809 cmnd.rw.command_id = req->tag;
810 cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
811 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
812 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
813 cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
814 cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
816 if (blk_integrity_rq(req)) {
817 cmnd.rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
818 switch (ns->pi_type) {
819 case NVME_NS_DPS_PI_TYPE3:
820 control |= NVME_RW_PRINFO_PRCHK_GUARD;
822 case NVME_NS_DPS_PI_TYPE1:
823 case NVME_NS_DPS_PI_TYPE2:
824 control |= NVME_RW_PRINFO_PRCHK_GUARD |
825 NVME_RW_PRINFO_PRCHK_REF;
826 cmnd.rw.reftag = cpu_to_le32(
827 nvme_block_nr(ns, blk_rq_pos(req)));
831 control |= NVME_RW_PRINFO_PRACT;
833 cmnd.rw.control = cpu_to_le16(control);
834 cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
836 __nvme_submit_cmd(nvmeq, &cmnd);
842 * NOTE: ns is NULL when called on the admin queue.
844 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
845 const struct blk_mq_queue_data *bd)
847 struct nvme_ns *ns = hctx->queue->queuedata;
848 struct nvme_queue *nvmeq = hctx->driver_data;
849 struct nvme_dev *dev = nvmeq->dev;
850 struct request *req = bd->rq;
851 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
852 struct nvme_iod *iod;
853 enum dma_data_direction dma_dir;
856 * If formated with metadata, require the block layer provide a buffer
857 * unless this namespace is formated such that the metadata can be
858 * stripped/generated by the controller with PRACT=1.
860 if (ns && ns->ms && !blk_integrity_rq(req)) {
861 if (!(ns->pi_type && ns->ms == 8) &&
862 req->cmd_type != REQ_TYPE_DRV_PRIV) {
863 req->errors = -EFAULT;
864 blk_mq_complete_request(req);
865 return BLK_MQ_RQ_QUEUE_OK;
869 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
871 return BLK_MQ_RQ_QUEUE_BUSY;
873 if (req->cmd_flags & REQ_DISCARD) {
876 * We reuse the small pool to allocate the 16-byte range here
877 * as it is not worth having a special pool for these or
878 * additional cases to handle freeing the iod.
880 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
884 iod_list(iod)[0] = (__le64 *)range;
886 } else if (req->nr_phys_segments) {
887 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
889 sg_init_table(iod->sg, req->nr_phys_segments);
890 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
894 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
897 if (blk_rq_bytes(req) !=
898 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
899 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
902 if (blk_integrity_rq(req)) {
903 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
906 sg_init_table(iod->meta_sg, 1);
907 if (blk_rq_map_integrity_sg(
908 req->q, req->bio, iod->meta_sg) != 1)
911 if (rq_data_dir(req))
912 nvme_dif_remap(req, nvme_dif_prep);
914 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
919 nvme_set_info(cmd, iod, req_completion);
920 spin_lock_irq(&nvmeq->q_lock);
921 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
922 nvme_submit_priv(nvmeq, req, iod);
923 else if (req->cmd_flags & REQ_DISCARD)
924 nvme_submit_discard(nvmeq, ns, req, iod);
925 else if (req->cmd_flags & REQ_FLUSH)
926 nvme_submit_flush(nvmeq, ns, req->tag);
928 nvme_submit_iod(nvmeq, iod, ns);
930 nvme_process_cq(nvmeq);
931 spin_unlock_irq(&nvmeq->q_lock);
932 return BLK_MQ_RQ_QUEUE_OK;
935 nvme_free_iod(dev, iod);
936 return BLK_MQ_RQ_QUEUE_ERROR;
938 nvme_free_iod(dev, iod);
939 return BLK_MQ_RQ_QUEUE_BUSY;
942 static int nvme_process_cq(struct nvme_queue *nvmeq)
946 head = nvmeq->cq_head;
947 phase = nvmeq->cq_phase;
951 nvme_completion_fn fn;
952 struct nvme_completion cqe = nvmeq->cqes[head];
953 if ((le16_to_cpu(cqe.status) & 1) != phase)
955 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
956 if (++head == nvmeq->q_depth) {
960 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
961 fn(nvmeq, ctx, &cqe);
964 /* If the controller ignores the cq head doorbell and continuously
965 * writes to the queue, it is theoretically possible to wrap around
966 * the queue twice and mistakenly return IRQ_NONE. Linux only
967 * requires that 0.1% of your interrupts are handled, so this isn't
970 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
973 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
974 nvmeq->cq_head = head;
975 nvmeq->cq_phase = phase;
981 static irqreturn_t nvme_irq(int irq, void *data)
984 struct nvme_queue *nvmeq = data;
985 spin_lock(&nvmeq->q_lock);
986 nvme_process_cq(nvmeq);
987 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
989 spin_unlock(&nvmeq->q_lock);
993 static irqreturn_t nvme_irq_check(int irq, void *data)
995 struct nvme_queue *nvmeq = data;
996 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
997 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
999 return IRQ_WAKE_THREAD;
1003 * Returns 0 on success. If the result is negative, it's a Linux error code;
1004 * if the result is positive, it's an NVM Express status code
1006 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1007 void *buffer, void __user *ubuffer, unsigned bufflen,
1008 u32 *result, unsigned timeout)
1010 bool write = cmd->common.opcode & 1;
1011 struct bio *bio = NULL;
1012 struct request *req;
1015 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1017 return PTR_ERR(req);
1019 req->cmd_type = REQ_TYPE_DRV_PRIV;
1020 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1021 req->__data_len = 0;
1022 req->__sector = (sector_t) -1;
1023 req->bio = req->biotail = NULL;
1025 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1027 req->cmd = (unsigned char *)cmd;
1028 req->cmd_len = sizeof(struct nvme_command);
1029 req->special = (void *)0;
1031 if (buffer && bufflen) {
1032 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1035 } else if (ubuffer && bufflen) {
1036 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1042 blk_execute_rq(req->q, NULL, req, 0);
1044 blk_rq_unmap_user(bio);
1046 *result = (u32)(uintptr_t)req->special;
1049 blk_mq_free_request(req);
1053 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1054 void *buffer, unsigned bufflen)
1056 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1059 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1061 struct nvme_queue *nvmeq = dev->queues[0];
1062 struct nvme_command c;
1063 struct nvme_cmd_info *cmd_info;
1064 struct request *req;
1066 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1068 return PTR_ERR(req);
1070 req->cmd_flags |= REQ_NO_TIMEOUT;
1071 cmd_info = blk_mq_rq_to_pdu(req);
1072 nvme_set_info(cmd_info, NULL, async_req_completion);
1074 memset(&c, 0, sizeof(c));
1075 c.common.opcode = nvme_admin_async_event;
1076 c.common.command_id = req->tag;
1078 blk_mq_free_request(req);
1079 __nvme_submit_cmd(nvmeq, &c);
1083 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1084 struct nvme_command *cmd,
1085 struct async_cmd_info *cmdinfo, unsigned timeout)
1087 struct nvme_queue *nvmeq = dev->queues[0];
1088 struct request *req;
1089 struct nvme_cmd_info *cmd_rq;
1091 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1093 return PTR_ERR(req);
1095 req->timeout = timeout;
1096 cmd_rq = blk_mq_rq_to_pdu(req);
1098 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1099 cmdinfo->status = -EINTR;
1101 cmd->common.command_id = req->tag;
1103 nvme_submit_cmd(nvmeq, cmd);
1107 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1109 struct nvme_command c;
1111 memset(&c, 0, sizeof(c));
1112 c.delete_queue.opcode = opcode;
1113 c.delete_queue.qid = cpu_to_le16(id);
1115 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1118 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1119 struct nvme_queue *nvmeq)
1121 struct nvme_command c;
1122 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1125 * Note: we (ab)use the fact the the prp fields survive if no data
1126 * is attached to the request.
1128 memset(&c, 0, sizeof(c));
1129 c.create_cq.opcode = nvme_admin_create_cq;
1130 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1131 c.create_cq.cqid = cpu_to_le16(qid);
1132 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1133 c.create_cq.cq_flags = cpu_to_le16(flags);
1134 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1136 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1139 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1140 struct nvme_queue *nvmeq)
1142 struct nvme_command c;
1143 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1146 * Note: we (ab)use the fact the the prp fields survive if no data
1147 * is attached to the request.
1149 memset(&c, 0, sizeof(c));
1150 c.create_sq.opcode = nvme_admin_create_sq;
1151 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1152 c.create_sq.sqid = cpu_to_le16(qid);
1153 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1154 c.create_sq.sq_flags = cpu_to_le16(flags);
1155 c.create_sq.cqid = cpu_to_le16(qid);
1157 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1160 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1162 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1165 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1167 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1170 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1172 struct nvme_command c = { };
1175 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1176 c.identify.opcode = nvme_admin_identify;
1177 c.identify.cns = cpu_to_le32(1);
1179 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1183 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1184 sizeof(struct nvme_id_ctrl));
1190 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1191 struct nvme_id_ns **id)
1193 struct nvme_command c = { };
1196 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1197 c.identify.opcode = nvme_admin_identify,
1198 c.identify.nsid = cpu_to_le32(nsid),
1200 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1204 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1205 sizeof(struct nvme_id_ns));
1211 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1212 dma_addr_t dma_addr, u32 *result)
1214 struct nvme_command c;
1216 memset(&c, 0, sizeof(c));
1217 c.features.opcode = nvme_admin_get_features;
1218 c.features.nsid = cpu_to_le32(nsid);
1219 c.features.prp1 = cpu_to_le64(dma_addr);
1220 c.features.fid = cpu_to_le32(fid);
1222 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1226 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1227 dma_addr_t dma_addr, u32 *result)
1229 struct nvme_command c;
1231 memset(&c, 0, sizeof(c));
1232 c.features.opcode = nvme_admin_set_features;
1233 c.features.prp1 = cpu_to_le64(dma_addr);
1234 c.features.fid = cpu_to_le32(fid);
1235 c.features.dword11 = cpu_to_le32(dword11);
1237 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1241 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1243 struct nvme_command c = { };
1246 c.common.opcode = nvme_admin_get_log_page,
1247 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1248 c.common.cdw10[0] = cpu_to_le32(
1249 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1252 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1256 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1257 sizeof(struct nvme_smart_log));
1264 * nvme_abort_req - Attempt aborting a request
1266 * Schedule controller reset if the command was already aborted once before and
1267 * still hasn't been returned to the driver, or if this is the admin queue.
1269 static void nvme_abort_req(struct request *req)
1271 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1272 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1273 struct nvme_dev *dev = nvmeq->dev;
1274 struct request *abort_req;
1275 struct nvme_cmd_info *abort_cmd;
1276 struct nvme_command cmd;
1278 if (!nvmeq->qid || cmd_rq->aborted) {
1279 unsigned long flags;
1281 spin_lock_irqsave(&dev_list_lock, flags);
1282 if (work_busy(&dev->reset_work))
1284 list_del_init(&dev->node);
1285 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1286 req->tag, nvmeq->qid);
1287 dev->reset_workfn = nvme_reset_failed_dev;
1288 queue_work(nvme_workq, &dev->reset_work);
1290 spin_unlock_irqrestore(&dev_list_lock, flags);
1294 if (!dev->abort_limit)
1297 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1299 if (IS_ERR(abort_req))
1302 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1303 nvme_set_info(abort_cmd, abort_req, abort_completion);
1305 memset(&cmd, 0, sizeof(cmd));
1306 cmd.abort.opcode = nvme_admin_abort_cmd;
1307 cmd.abort.cid = req->tag;
1308 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1309 cmd.abort.command_id = abort_req->tag;
1312 cmd_rq->aborted = 1;
1314 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1316 nvme_submit_cmd(dev->queues[0], &cmd);
1319 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1321 struct nvme_queue *nvmeq = data;
1323 nvme_completion_fn fn;
1324 struct nvme_cmd_info *cmd;
1325 struct nvme_completion cqe;
1327 if (!blk_mq_request_started(req))
1330 cmd = blk_mq_rq_to_pdu(req);
1332 if (cmd->ctx == CMD_CTX_CANCELLED)
1335 if (blk_queue_dying(req->q))
1336 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1338 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1341 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1342 req->tag, nvmeq->qid);
1343 ctx = cancel_cmd_info(cmd, &fn);
1344 fn(nvmeq, ctx, &cqe);
1347 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1349 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1350 struct nvme_queue *nvmeq = cmd->nvmeq;
1352 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1354 spin_lock_irq(&nvmeq->q_lock);
1355 nvme_abort_req(req);
1356 spin_unlock_irq(&nvmeq->q_lock);
1359 * The aborted req will be completed on receiving the abort req.
1360 * We enable the timer again. If hit twice, it'll cause a device reset,
1361 * as the device then is in a faulty state.
1363 return BLK_EH_RESET_TIMER;
1366 static void nvme_free_queue(struct nvme_queue *nvmeq)
1368 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1369 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1371 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1372 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1376 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1380 for (i = dev->queue_count - 1; i >= lowest; i--) {
1381 struct nvme_queue *nvmeq = dev->queues[i];
1383 dev->queues[i] = NULL;
1384 nvme_free_queue(nvmeq);
1389 * nvme_suspend_queue - put queue into suspended state
1390 * @nvmeq - queue to suspend
1392 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1396 spin_lock_irq(&nvmeq->q_lock);
1397 if (nvmeq->cq_vector == -1) {
1398 spin_unlock_irq(&nvmeq->q_lock);
1401 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1402 nvmeq->dev->online_queues--;
1403 nvmeq->cq_vector = -1;
1404 spin_unlock_irq(&nvmeq->q_lock);
1406 if (!nvmeq->qid && nvmeq->dev->admin_q)
1407 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1409 irq_set_affinity_hint(vector, NULL);
1410 free_irq(vector, nvmeq);
1415 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1417 spin_lock_irq(&nvmeq->q_lock);
1418 if (nvmeq->tags && *nvmeq->tags)
1419 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1420 spin_unlock_irq(&nvmeq->q_lock);
1423 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1425 struct nvme_queue *nvmeq = dev->queues[qid];
1429 if (nvme_suspend_queue(nvmeq))
1432 /* Don't tell the adapter to delete the admin queue.
1433 * Don't tell a removed adapter to delete IO queues. */
1434 if (qid && readl(&dev->bar->csts) != -1) {
1435 adapter_delete_sq(dev, qid);
1436 adapter_delete_cq(dev, qid);
1439 spin_lock_irq(&nvmeq->q_lock);
1440 nvme_process_cq(nvmeq);
1441 spin_unlock_irq(&nvmeq->q_lock);
1444 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1447 int q_depth = dev->q_depth;
1448 unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1450 if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1451 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1452 mem_per_q = round_down(mem_per_q, dev->page_size);
1453 q_depth = div_u64(mem_per_q, entry_size);
1456 * Ensure the reduced q_depth is above some threshold where it
1457 * would be better to map queues in system memory with the
1467 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1470 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1471 unsigned offset = (qid - 1) *
1472 roundup(SQ_SIZE(depth), dev->page_size);
1473 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1474 nvmeq->sq_cmds_io = dev->cmb + offset;
1476 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1477 &nvmeq->sq_dma_addr, GFP_KERNEL);
1478 if (!nvmeq->sq_cmds)
1485 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1488 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1492 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1493 &nvmeq->cq_dma_addr, GFP_KERNEL);
1497 if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1500 nvmeq->q_dmadev = dev->dev;
1502 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1503 dev->instance, qid);
1504 spin_lock_init(&nvmeq->q_lock);
1506 nvmeq->cq_phase = 1;
1507 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1508 nvmeq->q_depth = depth;
1510 nvmeq->cq_vector = -1;
1511 dev->queues[qid] = nvmeq;
1513 /* make sure queue descriptor is set before queue count, for kthread */
1520 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1521 nvmeq->cq_dma_addr);
1527 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1530 if (use_threaded_interrupts)
1531 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1532 nvme_irq_check, nvme_irq, IRQF_SHARED,
1534 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1535 IRQF_SHARED, name, nvmeq);
1538 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1540 struct nvme_dev *dev = nvmeq->dev;
1542 spin_lock_irq(&nvmeq->q_lock);
1545 nvmeq->cq_phase = 1;
1546 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1547 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1548 dev->online_queues++;
1549 spin_unlock_irq(&nvmeq->q_lock);
1552 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1554 struct nvme_dev *dev = nvmeq->dev;
1557 nvmeq->cq_vector = qid - 1;
1558 result = adapter_alloc_cq(dev, qid, nvmeq);
1562 result = adapter_alloc_sq(dev, qid, nvmeq);
1566 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1570 nvme_init_queue(nvmeq, qid);
1574 adapter_delete_sq(dev, qid);
1576 adapter_delete_cq(dev, qid);
1580 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1582 unsigned long timeout;
1583 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1585 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1587 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1589 if (fatal_signal_pending(current))
1591 if (time_after(jiffies, timeout)) {
1593 "Device not ready; aborting %s\n", enabled ?
1594 "initialisation" : "reset");
1603 * If the device has been passed off to us in an enabled state, just clear
1604 * the enabled bit. The spec says we should set the 'shutdown notification
1605 * bits', but doing so may cause the device to complete commands to the
1606 * admin queue ... and we don't know what memory that might be pointing at!
1608 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1610 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1611 dev->ctrl_config &= ~NVME_CC_ENABLE;
1612 writel(dev->ctrl_config, &dev->bar->cc);
1614 return nvme_wait_ready(dev, cap, false);
1617 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1619 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1620 dev->ctrl_config |= NVME_CC_ENABLE;
1621 writel(dev->ctrl_config, &dev->bar->cc);
1623 return nvme_wait_ready(dev, cap, true);
1626 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1628 unsigned long timeout;
1630 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1631 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1633 writel(dev->ctrl_config, &dev->bar->cc);
1635 timeout = SHUTDOWN_TIMEOUT + jiffies;
1636 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1637 NVME_CSTS_SHST_CMPLT) {
1639 if (fatal_signal_pending(current))
1641 if (time_after(jiffies, timeout)) {
1643 "Device shutdown incomplete; abort shutdown\n");
1651 static struct blk_mq_ops nvme_mq_admin_ops = {
1652 .queue_rq = nvme_queue_rq,
1653 .map_queue = blk_mq_map_queue,
1654 .init_hctx = nvme_admin_init_hctx,
1655 .exit_hctx = nvme_admin_exit_hctx,
1656 .init_request = nvme_admin_init_request,
1657 .timeout = nvme_timeout,
1660 static struct blk_mq_ops nvme_mq_ops = {
1661 .queue_rq = nvme_queue_rq,
1662 .map_queue = blk_mq_map_queue,
1663 .init_hctx = nvme_init_hctx,
1664 .init_request = nvme_init_request,
1665 .timeout = nvme_timeout,
1668 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1670 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1671 blk_cleanup_queue(dev->admin_q);
1672 blk_mq_free_tag_set(&dev->admin_tagset);
1676 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1678 if (!dev->admin_q) {
1679 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1680 dev->admin_tagset.nr_hw_queues = 1;
1681 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1682 dev->admin_tagset.reserved_tags = 1;
1683 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1684 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1685 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1686 dev->admin_tagset.driver_data = dev;
1688 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1691 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1692 if (IS_ERR(dev->admin_q)) {
1693 blk_mq_free_tag_set(&dev->admin_tagset);
1696 if (!blk_get_queue(dev->admin_q)) {
1697 nvme_dev_remove_admin(dev);
1698 dev->admin_q = NULL;
1702 blk_mq_unfreeze_queue(dev->admin_q);
1707 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1711 u64 cap = readq(&dev->bar->cap);
1712 struct nvme_queue *nvmeq;
1713 unsigned page_shift = PAGE_SHIFT;
1714 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1715 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1717 if (page_shift < dev_page_min) {
1719 "Minimum device page size (%u) too large for "
1720 "host (%u)\n", 1 << dev_page_min,
1724 if (page_shift > dev_page_max) {
1726 "Device maximum page size (%u) smaller than "
1727 "host (%u); enabling work-around\n",
1728 1 << dev_page_max, 1 << page_shift);
1729 page_shift = dev_page_max;
1732 dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1733 NVME_CAP_NSSRC(cap) : 0;
1735 if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1736 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1738 result = nvme_disable_ctrl(dev, cap);
1742 nvmeq = dev->queues[0];
1744 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1749 aqa = nvmeq->q_depth - 1;
1752 dev->page_size = 1 << page_shift;
1754 dev->ctrl_config = NVME_CC_CSS_NVM;
1755 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1756 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1757 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1759 writel(aqa, &dev->bar->aqa);
1760 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1761 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1763 result = nvme_enable_ctrl(dev, cap);
1767 nvmeq->cq_vector = 0;
1768 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1770 nvmeq->cq_vector = -1;
1777 nvme_free_queues(dev, 0);
1781 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1783 struct nvme_dev *dev = ns->dev;
1784 struct nvme_user_io io;
1785 struct nvme_command c;
1786 unsigned length, meta_len;
1788 dma_addr_t meta_dma = 0;
1790 void __user *metadata;
1792 if (copy_from_user(&io, uio, sizeof(io)))
1795 switch (io.opcode) {
1796 case nvme_cmd_write:
1798 case nvme_cmd_compare:
1804 length = (io.nblocks + 1) << ns->lba_shift;
1805 meta_len = (io.nblocks + 1) * ns->ms;
1806 metadata = (void __user *)(unsigned long)io.metadata;
1807 write = io.opcode & 1;
1814 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1817 meta = dma_alloc_coherent(dev->dev, meta_len,
1818 &meta_dma, GFP_KERNEL);
1825 if (copy_from_user(meta, metadata, meta_len)) {
1832 memset(&c, 0, sizeof(c));
1833 c.rw.opcode = io.opcode;
1834 c.rw.flags = io.flags;
1835 c.rw.nsid = cpu_to_le32(ns->ns_id);
1836 c.rw.slba = cpu_to_le64(io.slba);
1837 c.rw.length = cpu_to_le16(io.nblocks);
1838 c.rw.control = cpu_to_le16(io.control);
1839 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1840 c.rw.reftag = cpu_to_le32(io.reftag);
1841 c.rw.apptag = cpu_to_le16(io.apptag);
1842 c.rw.appmask = cpu_to_le16(io.appmask);
1843 c.rw.metadata = cpu_to_le64(meta_dma);
1845 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1846 (void __user *)io.addr, length, NULL, 0);
1849 if (status == NVME_SC_SUCCESS && !write) {
1850 if (copy_to_user(metadata, meta, meta_len))
1853 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1858 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1859 struct nvme_passthru_cmd __user *ucmd)
1861 struct nvme_passthru_cmd cmd;
1862 struct nvme_command c;
1863 unsigned timeout = 0;
1866 if (!capable(CAP_SYS_ADMIN))
1868 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1871 memset(&c, 0, sizeof(c));
1872 c.common.opcode = cmd.opcode;
1873 c.common.flags = cmd.flags;
1874 c.common.nsid = cpu_to_le32(cmd.nsid);
1875 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1876 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1877 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1878 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1879 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1880 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1881 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1882 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1885 timeout = msecs_to_jiffies(cmd.timeout_ms);
1887 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1888 NULL, (void __user *)cmd.addr, cmd.data_len,
1889 &cmd.result, timeout);
1891 if (put_user(cmd.result, &ucmd->result))
1898 static int nvme_subsys_reset(struct nvme_dev *dev)
1900 if (!dev->subsystem)
1903 writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1907 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1910 struct nvme_ns *ns = bdev->bd_disk->private_data;
1914 force_successful_syscall_return();
1916 case NVME_IOCTL_ADMIN_CMD:
1917 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1918 case NVME_IOCTL_IO_CMD:
1919 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1920 case NVME_IOCTL_SUBMIT_IO:
1921 return nvme_submit_io(ns, (void __user *)arg);
1922 case SG_GET_VERSION_NUM:
1923 return nvme_sg_get_version_num((void __user *)arg);
1925 return nvme_sg_io(ns, (void __user *)arg);
1931 #ifdef CONFIG_COMPAT
1932 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1933 unsigned int cmd, unsigned long arg)
1937 return -ENOIOCTLCMD;
1939 return nvme_ioctl(bdev, mode, cmd, arg);
1942 #define nvme_compat_ioctl NULL
1945 static int nvme_open(struct block_device *bdev, fmode_t mode)
1950 spin_lock(&dev_list_lock);
1951 ns = bdev->bd_disk->private_data;
1954 else if (!kref_get_unless_zero(&ns->dev->kref))
1956 spin_unlock(&dev_list_lock);
1961 static void nvme_free_dev(struct kref *kref);
1963 static void nvme_release(struct gendisk *disk, fmode_t mode)
1965 struct nvme_ns *ns = disk->private_data;
1966 struct nvme_dev *dev = ns->dev;
1968 kref_put(&dev->kref, nvme_free_dev);
1971 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1973 /* some standard values */
1974 geo->heads = 1 << 6;
1975 geo->sectors = 1 << 5;
1976 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1980 static void nvme_config_discard(struct nvme_ns *ns)
1982 u32 logical_block_size = queue_logical_block_size(ns->queue);
1983 ns->queue->limits.discard_zeroes_data = 0;
1984 ns->queue->limits.discard_alignment = logical_block_size;
1985 ns->queue->limits.discard_granularity = logical_block_size;
1986 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1987 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1990 static int nvme_revalidate_disk(struct gendisk *disk)
1992 struct nvme_ns *ns = disk->private_data;
1993 struct nvme_dev *dev = ns->dev;
1994 struct nvme_id_ns *id;
1999 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2000 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2001 dev->instance, ns->ns_id);
2004 if (id->ncap == 0) {
2010 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2011 ns->lba_shift = id->lbaf[lbaf].ds;
2012 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2013 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2016 * If identify namespace failed, use default 512 byte block size so
2017 * block layer can use before failing read/write for 0 capacity.
2019 if (ns->lba_shift == 0)
2021 bs = 1 << ns->lba_shift;
2023 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2024 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2025 id->dps & NVME_NS_DPS_PI_MASK : 0;
2027 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2029 bs != queue_logical_block_size(disk->queue) ||
2030 (ns->ms && ns->ext)))
2031 blk_integrity_unregister(disk);
2033 ns->pi_type = pi_type;
2034 blk_queue_logical_block_size(ns->queue, bs);
2036 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2038 nvme_init_integrity(ns);
2040 if (ns->ms && !blk_get_integrity(disk))
2041 set_capacity(disk, 0);
2043 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2045 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2046 nvme_config_discard(ns);
2052 static const struct block_device_operations nvme_fops = {
2053 .owner = THIS_MODULE,
2054 .ioctl = nvme_ioctl,
2055 .compat_ioctl = nvme_compat_ioctl,
2057 .release = nvme_release,
2058 .getgeo = nvme_getgeo,
2059 .revalidate_disk= nvme_revalidate_disk,
2062 static int nvme_kthread(void *data)
2064 struct nvme_dev *dev, *next;
2066 while (!kthread_should_stop()) {
2067 set_current_state(TASK_INTERRUPTIBLE);
2068 spin_lock(&dev_list_lock);
2069 list_for_each_entry_safe(dev, next, &dev_list, node) {
2071 u32 csts = readl(&dev->bar->csts);
2073 if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2074 csts & NVME_CSTS_CFS) {
2075 if (work_busy(&dev->reset_work))
2077 list_del_init(&dev->node);
2079 "Failed status: %x, reset controller\n",
2080 readl(&dev->bar->csts));
2081 dev->reset_workfn = nvme_reset_failed_dev;
2082 queue_work(nvme_workq, &dev->reset_work);
2085 for (i = 0; i < dev->queue_count; i++) {
2086 struct nvme_queue *nvmeq = dev->queues[i];
2089 spin_lock_irq(&nvmeq->q_lock);
2090 nvme_process_cq(nvmeq);
2092 while ((i == 0) && (dev->event_limit > 0)) {
2093 if (nvme_submit_async_admin_req(dev))
2097 spin_unlock_irq(&nvmeq->q_lock);
2100 spin_unlock(&dev_list_lock);
2101 schedule_timeout(round_jiffies_relative(HZ));
2106 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2109 struct gendisk *disk;
2110 int node = dev_to_node(dev->dev);
2112 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2116 ns->queue = blk_mq_init_queue(&dev->tagset);
2117 if (IS_ERR(ns->queue))
2119 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2120 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2121 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2123 ns->queue->queuedata = ns;
2125 disk = alloc_disk_node(0, node);
2127 goto out_free_queue;
2131 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2132 list_add_tail(&ns->list, &dev->namespaces);
2134 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2135 if (dev->max_hw_sectors) {
2136 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2137 blk_queue_max_segments(ns->queue,
2138 ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2140 if (dev->stripe_size)
2141 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2142 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2143 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2145 disk->major = nvme_major;
2146 disk->first_minor = 0;
2147 disk->fops = &nvme_fops;
2148 disk->private_data = ns;
2149 disk->queue = ns->queue;
2150 disk->driverfs_dev = dev->device;
2151 disk->flags = GENHD_FL_EXT_DEVT;
2152 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2155 * Initialize capacity to 0 until we establish the namespace format and
2156 * setup integrity extentions if necessary. The revalidate_disk after
2157 * add_disk allows the driver to register with integrity if the format
2160 set_capacity(disk, 0);
2161 if (nvme_revalidate_disk(ns->disk))
2166 struct block_device *bd = bdget_disk(ns->disk, 0);
2169 if (blkdev_get(bd, FMODE_READ, NULL)) {
2173 blkdev_reread_part(bd);
2174 blkdev_put(bd, FMODE_READ);
2179 list_del(&ns->list);
2181 blk_cleanup_queue(ns->queue);
2186 static void nvme_create_io_queues(struct nvme_dev *dev)
2190 for (i = dev->queue_count; i <= dev->max_qid; i++)
2191 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2194 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2195 if (nvme_create_queue(dev->queues[i], i))
2199 static int set_queue_count(struct nvme_dev *dev, int count)
2203 u32 q_count = (count - 1) | ((count - 1) << 16);
2205 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2210 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2213 return min(result & 0xffff, result >> 16) + 1;
2216 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2218 u64 szu, size, offset;
2220 resource_size_t bar_size;
2221 struct pci_dev *pdev = to_pci_dev(dev->dev);
2223 dma_addr_t dma_addr;
2228 dev->cmbsz = readl(&dev->bar->cmbsz);
2229 if (!(NVME_CMB_SZ(dev->cmbsz)))
2232 cmbloc = readl(&dev->bar->cmbloc);
2234 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2235 size = szu * NVME_CMB_SZ(dev->cmbsz);
2236 offset = szu * NVME_CMB_OFST(cmbloc);
2237 bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2239 if (offset > bar_size)
2243 * Controllers may support a CMB size larger than their BAR,
2244 * for example, due to being behind a bridge. Reduce the CMB to
2245 * the reported size of the BAR
2247 if (size > bar_size - offset)
2248 size = bar_size - offset;
2250 dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2251 cmb = ioremap_wc(dma_addr, size);
2255 dev->cmb_dma_addr = dma_addr;
2256 dev->cmb_size = size;
2260 static inline void nvme_release_cmb(struct nvme_dev *dev)
2268 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2270 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2273 static int nvme_setup_io_queues(struct nvme_dev *dev)
2275 struct nvme_queue *adminq = dev->queues[0];
2276 struct pci_dev *pdev = to_pci_dev(dev->dev);
2277 int result, i, vecs, nr_io_queues, size;
2279 nr_io_queues = num_possible_cpus();
2280 result = set_queue_count(dev, nr_io_queues);
2283 if (result < nr_io_queues)
2284 nr_io_queues = result;
2286 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2287 result = nvme_cmb_qdepth(dev, nr_io_queues,
2288 sizeof(struct nvme_command));
2290 dev->q_depth = result;
2292 nvme_release_cmb(dev);
2295 size = db_bar_size(dev, nr_io_queues);
2299 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2302 if (!--nr_io_queues)
2304 size = db_bar_size(dev, nr_io_queues);
2306 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2307 adminq->q_db = dev->dbs;
2310 /* Deregister the admin queue's interrupt */
2311 free_irq(dev->entry[0].vector, adminq);
2314 * If we enable msix early due to not intx, disable it again before
2315 * setting up the full range we need.
2318 pci_disable_msix(pdev);
2320 for (i = 0; i < nr_io_queues; i++)
2321 dev->entry[i].entry = i;
2322 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2324 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2328 for (i = 0; i < vecs; i++)
2329 dev->entry[i].vector = i + pdev->irq;
2334 * Should investigate if there's a performance win from allocating
2335 * more queues than interrupt vectors; it might allow the submission
2336 * path to scale better, even if the receive path is limited by the
2337 * number of interrupts.
2339 nr_io_queues = vecs;
2340 dev->max_qid = nr_io_queues;
2342 result = queue_request_irq(dev, adminq, adminq->irqname);
2344 adminq->cq_vector = -1;
2348 /* Free previously allocated queues that are no longer usable */
2349 nvme_free_queues(dev, nr_io_queues + 1);
2350 nvme_create_io_queues(dev);
2355 nvme_free_queues(dev, 1);
2359 static void nvme_free_namespace(struct nvme_ns *ns)
2361 list_del(&ns->list);
2363 spin_lock(&dev_list_lock);
2364 ns->disk->private_data = NULL;
2365 spin_unlock(&dev_list_lock);
2371 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2373 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2374 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2376 return nsa->ns_id - nsb->ns_id;
2379 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2383 list_for_each_entry(ns, &dev->namespaces, list) {
2384 if (ns->ns_id == nsid)
2386 if (ns->ns_id > nsid)
2392 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2394 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2395 dev->online_queues < 2);
2398 static void nvme_ns_remove(struct nvme_ns *ns)
2400 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2403 blk_set_queue_dying(ns->queue);
2404 if (ns->disk->flags & GENHD_FL_UP) {
2405 if (blk_get_integrity(ns->disk))
2406 blk_integrity_unregister(ns->disk);
2407 del_gendisk(ns->disk);
2409 if (kill || !blk_queue_dying(ns->queue)) {
2410 blk_mq_abort_requeue_list(ns->queue);
2411 blk_cleanup_queue(ns->queue);
2415 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2417 struct nvme_ns *ns, *next;
2420 for (i = 1; i <= nn; i++) {
2421 ns = nvme_find_ns(dev, i);
2423 if (revalidate_disk(ns->disk)) {
2425 nvme_free_namespace(ns);
2428 nvme_alloc_ns(dev, i);
2430 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2431 if (ns->ns_id > nn) {
2433 nvme_free_namespace(ns);
2436 list_sort(NULL, &dev->namespaces, ns_cmp);
2439 static void nvme_dev_scan(struct work_struct *work)
2441 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2442 struct nvme_id_ctrl *ctrl;
2444 if (!dev->tagset.tags)
2446 if (nvme_identify_ctrl(dev, &ctrl))
2448 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2453 * Return: error value if an error occurred setting up the queues or calling
2454 * Identify Device. 0 if these succeeded, even if adding some of the
2455 * namespaces failed. At the moment, these failures are silent. TBD which
2456 * failures should be reported.
2458 static int nvme_dev_add(struct nvme_dev *dev)
2460 struct pci_dev *pdev = to_pci_dev(dev->dev);
2462 struct nvme_id_ctrl *ctrl;
2463 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2465 res = nvme_identify_ctrl(dev, &ctrl);
2467 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2471 dev->oncs = le16_to_cpup(&ctrl->oncs);
2472 dev->abort_limit = ctrl->acl + 1;
2473 dev->vwc = ctrl->vwc;
2474 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2475 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2476 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2478 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2479 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2480 (pdev->device == 0x0953) && ctrl->vs[3]) {
2481 unsigned int max_hw_sectors;
2483 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2484 max_hw_sectors = dev->stripe_size >> (shift - 9);
2485 if (dev->max_hw_sectors) {
2486 dev->max_hw_sectors = min(max_hw_sectors,
2487 dev->max_hw_sectors);
2489 dev->max_hw_sectors = max_hw_sectors;
2493 if (!dev->tagset.tags) {
2494 dev->tagset.ops = &nvme_mq_ops;
2495 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2496 dev->tagset.timeout = NVME_IO_TIMEOUT;
2497 dev->tagset.numa_node = dev_to_node(dev->dev);
2498 dev->tagset.queue_depth =
2499 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2500 dev->tagset.cmd_size = nvme_cmd_size(dev);
2501 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2502 dev->tagset.driver_data = dev;
2504 if (blk_mq_alloc_tag_set(&dev->tagset))
2507 schedule_work(&dev->scan_work);
2511 static int nvme_dev_map(struct nvme_dev *dev)
2514 int bars, result = -ENOMEM;
2515 struct pci_dev *pdev = to_pci_dev(dev->dev);
2517 if (pci_enable_device_mem(pdev))
2520 dev->entry[0].vector = pdev->irq;
2521 pci_set_master(pdev);
2522 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2526 if (pci_request_selected_regions(pdev, bars, "nvme"))
2529 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2530 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2533 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2537 if (readl(&dev->bar->csts) == -1) {
2543 * Some devices don't advertse INTx interrupts, pre-enable a single
2544 * MSIX vec for setup. We'll adjust this later.
2547 result = pci_enable_msix(pdev, dev->entry, 1);
2552 cap = readq(&dev->bar->cap);
2553 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2554 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2555 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2556 if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2557 dev->cmb = nvme_map_cmb(dev);
2565 pci_release_regions(pdev);
2567 pci_disable_device(pdev);
2571 static void nvme_dev_unmap(struct nvme_dev *dev)
2573 struct pci_dev *pdev = to_pci_dev(dev->dev);
2575 if (pdev->msi_enabled)
2576 pci_disable_msi(pdev);
2577 else if (pdev->msix_enabled)
2578 pci_disable_msix(pdev);
2583 pci_release_regions(pdev);
2586 if (pci_is_enabled(pdev))
2587 pci_disable_device(pdev);
2590 struct nvme_delq_ctx {
2591 struct task_struct *waiter;
2592 struct kthread_worker *worker;
2596 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2598 dq->waiter = current;
2602 set_current_state(TASK_KILLABLE);
2603 if (!atomic_read(&dq->refcount))
2605 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2606 fatal_signal_pending(current)) {
2608 * Disable the controller first since we can't trust it
2609 * at this point, but leave the admin queue enabled
2610 * until all queue deletion requests are flushed.
2611 * FIXME: This may take a while if there are more h/w
2612 * queues than admin tags.
2614 set_current_state(TASK_RUNNING);
2615 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2616 nvme_clear_queue(dev->queues[0]);
2617 flush_kthread_worker(dq->worker);
2618 nvme_disable_queue(dev, 0);
2622 set_current_state(TASK_RUNNING);
2625 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2627 atomic_dec(&dq->refcount);
2629 wake_up_process(dq->waiter);
2632 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2634 atomic_inc(&dq->refcount);
2638 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2640 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2644 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2645 kthread_work_func_t fn)
2647 struct nvme_command c;
2649 memset(&c, 0, sizeof(c));
2650 c.delete_queue.opcode = opcode;
2651 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2653 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2654 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2658 static void nvme_del_cq_work_handler(struct kthread_work *work)
2660 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2662 nvme_del_queue_end(nvmeq);
2665 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2667 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2668 nvme_del_cq_work_handler);
2671 static void nvme_del_sq_work_handler(struct kthread_work *work)
2673 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2675 int status = nvmeq->cmdinfo.status;
2678 status = nvme_delete_cq(nvmeq);
2680 nvme_del_queue_end(nvmeq);
2683 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2685 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2686 nvme_del_sq_work_handler);
2689 static void nvme_del_queue_start(struct kthread_work *work)
2691 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2693 if (nvme_delete_sq(nvmeq))
2694 nvme_del_queue_end(nvmeq);
2697 static void nvme_disable_io_queues(struct nvme_dev *dev)
2700 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2701 struct nvme_delq_ctx dq;
2702 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2703 &worker, "nvme%d", dev->instance);
2705 if (IS_ERR(kworker_task)) {
2707 "Failed to create queue del task\n");
2708 for (i = dev->queue_count - 1; i > 0; i--)
2709 nvme_disable_queue(dev, i);
2714 atomic_set(&dq.refcount, 0);
2715 dq.worker = &worker;
2716 for (i = dev->queue_count - 1; i > 0; i--) {
2717 struct nvme_queue *nvmeq = dev->queues[i];
2719 if (nvme_suspend_queue(nvmeq))
2721 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2722 nvmeq->cmdinfo.worker = dq.worker;
2723 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2724 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2726 nvme_wait_dq(&dq, dev);
2727 kthread_stop(kworker_task);
2731 * Remove the node from the device list and check
2732 * for whether or not we need to stop the nvme_thread.
2734 static void nvme_dev_list_remove(struct nvme_dev *dev)
2736 struct task_struct *tmp = NULL;
2738 spin_lock(&dev_list_lock);
2739 list_del_init(&dev->node);
2740 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2744 spin_unlock(&dev_list_lock);
2750 static void nvme_freeze_queues(struct nvme_dev *dev)
2754 list_for_each_entry(ns, &dev->namespaces, list) {
2755 blk_mq_freeze_queue_start(ns->queue);
2757 spin_lock_irq(ns->queue->queue_lock);
2758 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2759 spin_unlock_irq(ns->queue->queue_lock);
2761 blk_mq_cancel_requeue_work(ns->queue);
2762 blk_mq_stop_hw_queues(ns->queue);
2766 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2770 list_for_each_entry(ns, &dev->namespaces, list) {
2771 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2772 blk_mq_unfreeze_queue(ns->queue);
2773 blk_mq_start_stopped_hw_queues(ns->queue, true);
2774 blk_mq_kick_requeue_list(ns->queue);
2778 static void nvme_dev_shutdown(struct nvme_dev *dev)
2783 nvme_dev_list_remove(dev);
2786 nvme_freeze_queues(dev);
2787 csts = readl(&dev->bar->csts);
2789 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2790 for (i = dev->queue_count - 1; i >= 0; i--) {
2791 struct nvme_queue *nvmeq = dev->queues[i];
2792 nvme_suspend_queue(nvmeq);
2795 nvme_disable_io_queues(dev);
2796 nvme_shutdown_ctrl(dev);
2797 nvme_disable_queue(dev, 0);
2799 nvme_dev_unmap(dev);
2801 for (i = dev->queue_count - 1; i >= 0; i--)
2802 nvme_clear_queue(dev->queues[i]);
2805 static void nvme_dev_remove(struct nvme_dev *dev)
2809 list_for_each_entry(ns, &dev->namespaces, list)
2813 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2815 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2816 PAGE_SIZE, PAGE_SIZE, 0);
2817 if (!dev->prp_page_pool)
2820 /* Optimisation for I/Os between 4k and 128k */
2821 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2823 if (!dev->prp_small_pool) {
2824 dma_pool_destroy(dev->prp_page_pool);
2830 static void nvme_release_prp_pools(struct nvme_dev *dev)
2832 dma_pool_destroy(dev->prp_page_pool);
2833 dma_pool_destroy(dev->prp_small_pool);
2836 static DEFINE_IDA(nvme_instance_ida);
2838 static int nvme_set_instance(struct nvme_dev *dev)
2840 int instance, error;
2843 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2846 spin_lock(&dev_list_lock);
2847 error = ida_get_new(&nvme_instance_ida, &instance);
2848 spin_unlock(&dev_list_lock);
2849 } while (error == -EAGAIN);
2854 dev->instance = instance;
2858 static void nvme_release_instance(struct nvme_dev *dev)
2860 spin_lock(&dev_list_lock);
2861 ida_remove(&nvme_instance_ida, dev->instance);
2862 spin_unlock(&dev_list_lock);
2865 static void nvme_free_namespaces(struct nvme_dev *dev)
2867 struct nvme_ns *ns, *next;
2869 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2870 nvme_free_namespace(ns);
2873 static void nvme_free_dev(struct kref *kref)
2875 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2877 put_device(dev->dev);
2878 put_device(dev->device);
2879 nvme_free_namespaces(dev);
2880 nvme_release_instance(dev);
2881 if (dev->tagset.tags)
2882 blk_mq_free_tag_set(&dev->tagset);
2884 blk_put_queue(dev->admin_q);
2890 static int nvme_dev_open(struct inode *inode, struct file *f)
2892 struct nvme_dev *dev;
2893 int instance = iminor(inode);
2896 spin_lock(&dev_list_lock);
2897 list_for_each_entry(dev, &dev_list, node) {
2898 if (dev->instance == instance) {
2899 if (!dev->admin_q) {
2903 if (!kref_get_unless_zero(&dev->kref))
2905 f->private_data = dev;
2910 spin_unlock(&dev_list_lock);
2915 static int nvme_dev_release(struct inode *inode, struct file *f)
2917 struct nvme_dev *dev = f->private_data;
2918 kref_put(&dev->kref, nvme_free_dev);
2922 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2924 struct nvme_dev *dev = f->private_data;
2928 case NVME_IOCTL_ADMIN_CMD:
2929 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2930 case NVME_IOCTL_IO_CMD:
2931 if (list_empty(&dev->namespaces))
2933 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2934 return nvme_user_cmd(dev, ns, (void __user *)arg);
2935 case NVME_IOCTL_RESET:
2936 dev_warn(dev->dev, "resetting controller\n");
2937 return nvme_reset(dev);
2938 case NVME_IOCTL_SUBSYS_RESET:
2939 return nvme_subsys_reset(dev);
2945 static const struct file_operations nvme_dev_fops = {
2946 .owner = THIS_MODULE,
2947 .open = nvme_dev_open,
2948 .release = nvme_dev_release,
2949 .unlocked_ioctl = nvme_dev_ioctl,
2950 .compat_ioctl = nvme_dev_ioctl,
2953 static void nvme_set_irq_hints(struct nvme_dev *dev)
2955 struct nvme_queue *nvmeq;
2958 for (i = 0; i < dev->online_queues; i++) {
2959 nvmeq = dev->queues[i];
2961 if (!nvmeq->tags || !(*nvmeq->tags))
2964 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2965 blk_mq_tags_cpumask(*nvmeq->tags));
2969 static int nvme_dev_start(struct nvme_dev *dev)
2972 bool start_thread = false;
2974 result = nvme_dev_map(dev);
2978 result = nvme_configure_admin_queue(dev);
2982 spin_lock(&dev_list_lock);
2983 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2984 start_thread = true;
2987 list_add(&dev->node, &dev_list);
2988 spin_unlock(&dev_list_lock);
2991 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2992 wake_up_all(&nvme_kthread_wait);
2994 wait_event_killable(nvme_kthread_wait, nvme_thread);
2996 if (IS_ERR_OR_NULL(nvme_thread)) {
2997 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3001 nvme_init_queue(dev->queues[0], 0);
3002 result = nvme_alloc_admin_tags(dev);
3006 result = nvme_setup_io_queues(dev);
3010 nvme_set_irq_hints(dev);
3012 dev->event_limit = 1;
3016 nvme_dev_remove_admin(dev);
3017 blk_put_queue(dev->admin_q);
3018 dev->admin_q = NULL;
3019 dev->queues[0]->tags = NULL;
3021 nvme_disable_queue(dev, 0);
3022 nvme_dev_list_remove(dev);
3024 nvme_dev_unmap(dev);
3028 static int nvme_remove_dead_ctrl(void *arg)
3030 struct nvme_dev *dev = (struct nvme_dev *)arg;
3031 struct pci_dev *pdev = to_pci_dev(dev->dev);
3033 if (pci_get_drvdata(pdev))
3034 pci_stop_and_remove_bus_device_locked(pdev);
3035 kref_put(&dev->kref, nvme_free_dev);
3039 static void nvme_remove_disks(struct work_struct *ws)
3041 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3043 nvme_free_queues(dev, 1);
3044 nvme_dev_remove(dev);
3047 static int nvme_dev_resume(struct nvme_dev *dev)
3051 ret = nvme_dev_start(dev);
3054 if (dev->online_queues < 2) {
3055 spin_lock(&dev_list_lock);
3056 dev->reset_workfn = nvme_remove_disks;
3057 queue_work(nvme_workq, &dev->reset_work);
3058 spin_unlock(&dev_list_lock);
3060 nvme_unfreeze_queues(dev);
3062 nvme_set_irq_hints(dev);
3067 static void nvme_dead_ctrl(struct nvme_dev *dev)
3069 dev_warn(dev->dev, "Device failed to resume\n");
3070 kref_get(&dev->kref);
3071 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3074 "Failed to start controller remove task\n");
3075 kref_put(&dev->kref, nvme_free_dev);
3079 static void nvme_dev_reset(struct nvme_dev *dev)
3081 bool in_probe = work_busy(&dev->probe_work);
3083 nvme_dev_shutdown(dev);
3085 /* Synchronize with device probe so that work will see failure status
3086 * and exit gracefully without trying to schedule another reset */
3087 flush_work(&dev->probe_work);
3089 /* Fail this device if reset occured during probe to avoid
3090 * infinite initialization loops. */
3092 nvme_dead_ctrl(dev);
3095 /* Schedule device resume asynchronously so the reset work is available
3096 * to cleanup errors that may occur during reinitialization */
3097 schedule_work(&dev->probe_work);
3100 static void nvme_reset_failed_dev(struct work_struct *ws)
3102 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3103 nvme_dev_reset(dev);
3106 static void nvme_reset_workfn(struct work_struct *work)
3108 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
3109 dev->reset_workfn(work);
3112 static int nvme_reset(struct nvme_dev *dev)
3116 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3119 spin_lock(&dev_list_lock);
3120 if (!work_pending(&dev->reset_work)) {
3121 dev->reset_workfn = nvme_reset_failed_dev;
3122 queue_work(nvme_workq, &dev->reset_work);
3125 spin_unlock(&dev_list_lock);
3128 flush_work(&dev->reset_work);
3129 flush_work(&dev->probe_work);
3136 static ssize_t nvme_sysfs_reset(struct device *dev,
3137 struct device_attribute *attr, const char *buf,
3140 struct nvme_dev *ndev = dev_get_drvdata(dev);
3143 ret = nvme_reset(ndev);
3149 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3151 static void nvme_async_probe(struct work_struct *work);
3152 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3154 int node, result = -ENOMEM;
3155 struct nvme_dev *dev;
3157 node = dev_to_node(&pdev->dev);
3158 if (node == NUMA_NO_NODE)
3159 set_dev_node(&pdev->dev, 0);
3161 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3164 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3168 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3173 INIT_LIST_HEAD(&dev->namespaces);
3174 dev->reset_workfn = nvme_reset_failed_dev;
3175 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3176 dev->dev = get_device(&pdev->dev);
3177 pci_set_drvdata(pdev, dev);
3178 result = nvme_set_instance(dev);
3182 result = nvme_setup_prp_pools(dev);
3186 kref_init(&dev->kref);
3187 dev->device = device_create(nvme_class, &pdev->dev,
3188 MKDEV(nvme_char_major, dev->instance),
3189 dev, "nvme%d", dev->instance);
3190 if (IS_ERR(dev->device)) {
3191 result = PTR_ERR(dev->device);
3194 get_device(dev->device);
3195 dev_set_drvdata(dev->device, dev);
3197 result = device_create_file(dev->device, &dev_attr_reset_controller);
3201 INIT_LIST_HEAD(&dev->node);
3202 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3203 INIT_WORK(&dev->probe_work, nvme_async_probe);
3204 schedule_work(&dev->probe_work);
3208 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3209 put_device(dev->device);
3211 nvme_release_prp_pools(dev);
3213 nvme_release_instance(dev);
3215 put_device(dev->dev);
3223 static void nvme_async_probe(struct work_struct *work)
3225 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3227 if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3228 nvme_dead_ctrl(dev);
3231 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3233 struct nvme_dev *dev = pci_get_drvdata(pdev);
3236 nvme_dev_shutdown(dev);
3238 nvme_dev_resume(dev);
3241 static void nvme_shutdown(struct pci_dev *pdev)
3243 struct nvme_dev *dev = pci_get_drvdata(pdev);
3244 nvme_dev_shutdown(dev);
3247 static void nvme_remove(struct pci_dev *pdev)
3249 struct nvme_dev *dev = pci_get_drvdata(pdev);
3251 spin_lock(&dev_list_lock);
3252 list_del_init(&dev->node);
3253 spin_unlock(&dev_list_lock);
3255 pci_set_drvdata(pdev, NULL);
3256 flush_work(&dev->probe_work);
3257 flush_work(&dev->reset_work);
3258 flush_work(&dev->scan_work);
3259 device_remove_file(dev->device, &dev_attr_reset_controller);
3260 nvme_dev_remove(dev);
3261 nvme_dev_shutdown(dev);
3262 nvme_dev_remove_admin(dev);
3263 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3264 nvme_free_queues(dev, 0);
3265 nvme_release_cmb(dev);
3266 nvme_release_prp_pools(dev);
3267 kref_put(&dev->kref, nvme_free_dev);
3270 /* These functions are yet to be implemented */
3271 #define nvme_error_detected NULL
3272 #define nvme_dump_registers NULL
3273 #define nvme_link_reset NULL
3274 #define nvme_slot_reset NULL
3275 #define nvme_error_resume NULL
3277 #ifdef CONFIG_PM_SLEEP
3278 static int nvme_suspend(struct device *dev)
3280 struct pci_dev *pdev = to_pci_dev(dev);
3281 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3283 nvme_dev_shutdown(ndev);
3287 static int nvme_resume(struct device *dev)
3289 struct pci_dev *pdev = to_pci_dev(dev);
3290 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3292 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3293 ndev->reset_workfn = nvme_reset_failed_dev;
3294 queue_work(nvme_workq, &ndev->reset_work);
3300 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3302 static const struct pci_error_handlers nvme_err_handler = {
3303 .error_detected = nvme_error_detected,
3304 .mmio_enabled = nvme_dump_registers,
3305 .link_reset = nvme_link_reset,
3306 .slot_reset = nvme_slot_reset,
3307 .resume = nvme_error_resume,
3308 .reset_notify = nvme_reset_notify,
3311 /* Move to pci_ids.h later */
3312 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3314 static const struct pci_device_id nvme_id_table[] = {
3315 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3318 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3320 static struct pci_driver nvme_driver = {
3322 .id_table = nvme_id_table,
3323 .probe = nvme_probe,
3324 .remove = nvme_remove,
3325 .shutdown = nvme_shutdown,
3327 .pm = &nvme_dev_pm_ops,
3329 .err_handler = &nvme_err_handler,
3332 static int __init nvme_init(void)
3336 init_waitqueue_head(&nvme_kthread_wait);
3338 nvme_workq = create_singlethread_workqueue("nvme");
3342 result = register_blkdev(nvme_major, "nvme");
3345 else if (result > 0)
3346 nvme_major = result;
3348 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3351 goto unregister_blkdev;
3352 else if (result > 0)
3353 nvme_char_major = result;
3355 nvme_class = class_create(THIS_MODULE, "nvme");
3356 if (IS_ERR(nvme_class)) {
3357 result = PTR_ERR(nvme_class);
3358 goto unregister_chrdev;
3361 result = pci_register_driver(&nvme_driver);
3367 class_destroy(nvme_class);
3369 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3371 unregister_blkdev(nvme_major, "nvme");
3373 destroy_workqueue(nvme_workq);
3377 static void __exit nvme_exit(void)
3379 pci_unregister_driver(&nvme_driver);
3380 unregister_blkdev(nvme_major, "nvme");
3381 destroy_workqueue(nvme_workq);
3382 class_destroy(nvme_class);
3383 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3384 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3388 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3389 MODULE_LICENSE("GPL");
3390 MODULE_VERSION("1.0");
3391 module_init(nvme_init);
3392 module_exit(nvme_exit);