2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
75 static DEFINE_SPINLOCK(dev_list_lock);
76 static LIST_HEAD(dev_list);
77 static struct task_struct *nvme_thread;
78 static struct workqueue_struct *nvme_workq;
79 static wait_queue_head_t nvme_kthread_wait;
81 static struct class *nvme_class;
83 static void nvme_reset_failed_dev(struct work_struct *ws);
84 static int nvme_reset(struct nvme_dev *dev);
85 static int nvme_process_cq(struct nvme_queue *nvmeq);
87 struct async_cmd_info {
88 struct kthread_work work;
89 struct kthread_worker *worker;
97 * An NVM Express queue. Each device has at least two (one for admin
98 * commands and one for I/O commands).
101 struct device *q_dmadev;
102 struct nvme_dev *dev;
103 char irqname[24]; /* nvme4294967295-65535\0 */
105 struct nvme_command *sq_cmds;
106 volatile struct nvme_completion *cqes;
107 struct blk_mq_tags **tags;
108 dma_addr_t sq_dma_addr;
109 dma_addr_t cq_dma_addr;
119 struct async_cmd_info cmdinfo;
123 * Check we didin't inadvertently grow the command struct
125 static inline void _nvme_check_size(void)
127 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
136 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
137 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
141 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
142 struct nvme_completion *);
144 struct nvme_cmd_info {
145 nvme_completion_fn fn;
148 struct nvme_queue *nvmeq;
149 struct nvme_iod iod[0];
153 * Max size of iod being embedded in the request payload
155 #define NVME_INT_PAGES 2
156 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
157 #define NVME_INT_MASK 0x01
160 * Will slightly overestimate the number of pages needed. This is OK
161 * as it only leads to a small amount of wasted memory for the lifetime of
164 static int nvme_npages(unsigned size, struct nvme_dev *dev)
166 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
167 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
170 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
172 unsigned int ret = sizeof(struct nvme_cmd_info);
174 ret += sizeof(struct nvme_iod);
175 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
176 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
181 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
182 unsigned int hctx_idx)
184 struct nvme_dev *dev = data;
185 struct nvme_queue *nvmeq = dev->queues[0];
187 WARN_ON(hctx_idx != 0);
188 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
189 WARN_ON(nvmeq->tags);
191 hctx->driver_data = nvmeq;
192 nvmeq->tags = &dev->admin_tagset.tags[0];
196 static int nvme_admin_init_request(void *data, struct request *req,
197 unsigned int hctx_idx, unsigned int rq_idx,
198 unsigned int numa_node)
200 struct nvme_dev *dev = data;
201 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
202 struct nvme_queue *nvmeq = dev->queues[0];
209 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
210 unsigned int hctx_idx)
212 struct nvme_dev *dev = data;
213 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
216 nvmeq->tags = &dev->tagset.tags[hctx_idx];
218 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
219 hctx->driver_data = nvmeq;
223 static int nvme_init_request(void *data, struct request *req,
224 unsigned int hctx_idx, unsigned int rq_idx,
225 unsigned int numa_node)
227 struct nvme_dev *dev = data;
228 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
229 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
236 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
237 nvme_completion_fn handler)
242 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
245 static void *iod_get_private(struct nvme_iod *iod)
247 return (void *) (iod->private & ~0x1UL);
251 * If bit 0 is set, the iod is embedded in the request payload.
253 static bool iod_should_kfree(struct nvme_iod *iod)
255 return (iod->private & NVME_INT_MASK) == 0;
258 /* Special values must be less than 0x1000 */
259 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
260 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
261 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
262 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
264 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
265 struct nvme_completion *cqe)
267 if (ctx == CMD_CTX_CANCELLED)
269 if (ctx == CMD_CTX_COMPLETED) {
270 dev_warn(nvmeq->q_dmadev,
271 "completed id %d twice on queue %d\n",
272 cqe->command_id, le16_to_cpup(&cqe->sq_id));
275 if (ctx == CMD_CTX_INVALID) {
276 dev_warn(nvmeq->q_dmadev,
277 "invalid id %d completed on queue %d\n",
278 cqe->command_id, le16_to_cpup(&cqe->sq_id));
281 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
284 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
291 cmd->fn = special_completion;
292 cmd->ctx = CMD_CTX_CANCELLED;
296 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
297 struct nvme_completion *cqe)
299 u32 result = le32_to_cpup(&cqe->result);
300 u16 status = le16_to_cpup(&cqe->status) >> 1;
302 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
303 ++nvmeq->dev->event_limit;
304 if (status != NVME_SC_SUCCESS)
307 switch (result & 0xff07) {
308 case NVME_AER_NOTICE_NS_CHANGED:
309 dev_info(nvmeq->q_dmadev, "rescanning\n");
310 schedule_work(&nvmeq->dev->scan_work);
312 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
316 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
317 struct nvme_completion *cqe)
319 struct request *req = ctx;
321 u16 status = le16_to_cpup(&cqe->status) >> 1;
322 u32 result = le32_to_cpup(&cqe->result);
324 blk_mq_free_request(req);
326 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
327 ++nvmeq->dev->abort_limit;
330 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
331 struct nvme_completion *cqe)
333 struct async_cmd_info *cmdinfo = ctx;
334 cmdinfo->result = le32_to_cpup(&cqe->result);
335 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
336 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
337 blk_mq_free_request(cmdinfo->req);
340 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
343 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
345 return blk_mq_rq_to_pdu(req);
349 * Called with local interrupts disabled and the q_lock held. May not sleep.
351 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
352 nvme_completion_fn *fn)
354 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
356 if (tag >= nvmeq->q_depth) {
357 *fn = special_completion;
358 return CMD_CTX_INVALID;
363 cmd->fn = special_completion;
364 cmd->ctx = CMD_CTX_COMPLETED;
369 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
370 * @nvmeq: The queue to use
371 * @cmd: The command to send
373 * Safe to use from interrupt context
375 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
377 u16 tail = nvmeq->sq_tail;
379 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
380 if (++tail == nvmeq->q_depth)
382 writel(tail, nvmeq->q_db);
383 nvmeq->sq_tail = tail;
388 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
392 spin_lock_irqsave(&nvmeq->q_lock, flags);
393 ret = __nvme_submit_cmd(nvmeq, cmd);
394 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
398 static __le64 **iod_list(struct nvme_iod *iod)
400 return ((void *)iod) + iod->offset;
403 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
404 unsigned nseg, unsigned long private)
406 iod->private = private;
407 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
409 iod->length = nbytes;
413 static struct nvme_iod *
414 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
415 unsigned long priv, gfp_t gfp)
417 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
418 sizeof(__le64 *) * nvme_npages(bytes, dev) +
419 sizeof(struct scatterlist) * nseg, gfp);
422 iod_init(iod, bytes, nseg, priv);
427 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
430 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
431 sizeof(struct nvme_dsm_range);
432 struct nvme_iod *iod;
434 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
435 size <= NVME_INT_BYTES(dev)) {
436 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
439 iod_init(iod, size, rq->nr_phys_segments,
440 (unsigned long) rq | NVME_INT_MASK);
444 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
445 (unsigned long) rq, gfp);
448 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
450 const int last_prp = dev->page_size / 8 - 1;
452 __le64 **list = iod_list(iod);
453 dma_addr_t prp_dma = iod->first_dma;
455 if (iod->npages == 0)
456 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
457 for (i = 0; i < iod->npages; i++) {
458 __le64 *prp_list = list[i];
459 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
460 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
461 prp_dma = next_prp_dma;
464 if (iod_should_kfree(iod))
468 static int nvme_error_status(u16 status)
470 switch (status & 0x7ff) {
471 case NVME_SC_SUCCESS:
473 case NVME_SC_CAP_EXCEEDED:
480 #ifdef CONFIG_BLK_DEV_INTEGRITY
481 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
483 if (be32_to_cpu(pi->ref_tag) == v)
484 pi->ref_tag = cpu_to_be32(p);
487 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
489 if (be32_to_cpu(pi->ref_tag) == p)
490 pi->ref_tag = cpu_to_be32(v);
494 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
496 * The virtual start sector is the one that was originally submitted by the
497 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
498 * start sector may be different. Remap protection information to match the
499 * physical LBA on writes, and back to the original seed on reads.
501 * Type 0 and 3 do not have a ref tag, so no remapping required.
503 static void nvme_dif_remap(struct request *req,
504 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
506 struct nvme_ns *ns = req->rq_disk->private_data;
507 struct bio_integrity_payload *bip;
508 struct t10_pi_tuple *pi;
510 u32 i, nlb, ts, phys, virt;
512 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
515 bip = bio_integrity(req->bio);
519 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
522 virt = bip_get_seed(bip);
523 phys = nvme_block_nr(ns, blk_rq_pos(req));
524 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
525 ts = ns->disk->integrity->tuple_size;
527 for (i = 0; i < nlb; i++, virt++, phys++) {
528 pi = (struct t10_pi_tuple *)p;
529 dif_swap(phys, virt, pi);
535 static int nvme_noop_verify(struct blk_integrity_iter *iter)
540 static int nvme_noop_generate(struct blk_integrity_iter *iter)
545 struct blk_integrity nvme_meta_noop = {
546 .name = "NVME_META_NOOP",
547 .generate_fn = nvme_noop_generate,
548 .verify_fn = nvme_noop_verify,
551 static void nvme_init_integrity(struct nvme_ns *ns)
553 struct blk_integrity integrity;
555 switch (ns->pi_type) {
556 case NVME_NS_DPS_PI_TYPE3:
557 integrity = t10_pi_type3_crc;
559 case NVME_NS_DPS_PI_TYPE1:
560 case NVME_NS_DPS_PI_TYPE2:
561 integrity = t10_pi_type1_crc;
564 integrity = nvme_meta_noop;
567 integrity.tuple_size = ns->ms;
568 blk_integrity_register(ns->disk, &integrity);
569 blk_queue_max_integrity_segments(ns->queue, 1);
571 #else /* CONFIG_BLK_DEV_INTEGRITY */
572 static void nvme_dif_remap(struct request *req,
573 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 static void nvme_init_integrity(struct nvme_ns *ns)
587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
588 struct nvme_completion *cqe)
590 struct nvme_iod *iod = ctx;
591 struct request *req = iod_get_private(iod);
592 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
594 u16 status = le16_to_cpup(&cqe->status) >> 1;
596 if (unlikely(status)) {
597 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
598 && (jiffies - req->start_time) < req->timeout) {
601 blk_mq_requeue_request(req);
602 spin_lock_irqsave(req->q->queue_lock, flags);
603 if (!blk_queue_stopped(req->q))
604 blk_mq_kick_requeue_list(req->q);
605 spin_unlock_irqrestore(req->q->queue_lock, flags);
608 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
609 req->errors = status;
611 req->errors = nvme_error_status(status);
615 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
616 u32 result = le32_to_cpup(&cqe->result);
617 req->special = (void *)(uintptr_t)result;
621 dev_warn(nvmeq->dev->dev,
622 "completing aborted command with status:%04x\n",
626 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
627 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
628 if (blk_integrity_rq(req)) {
629 if (!rq_data_dir(req))
630 nvme_dif_remap(req, nvme_dif_complete);
631 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
632 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
635 nvme_free_iod(nvmeq->dev, iod);
637 blk_mq_complete_request(req);
640 /* length is in bytes. gfp flags indicates whether we may sleep. */
641 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
642 int total_len, gfp_t gfp)
644 struct dma_pool *pool;
645 int length = total_len;
646 struct scatterlist *sg = iod->sg;
647 int dma_len = sg_dma_len(sg);
648 u64 dma_addr = sg_dma_address(sg);
649 u32 page_size = dev->page_size;
650 int offset = dma_addr & (page_size - 1);
652 __le64 **list = iod_list(iod);
656 length -= (page_size - offset);
660 dma_len -= (page_size - offset);
662 dma_addr += (page_size - offset);
665 dma_addr = sg_dma_address(sg);
666 dma_len = sg_dma_len(sg);
669 if (length <= page_size) {
670 iod->first_dma = dma_addr;
674 nprps = DIV_ROUND_UP(length, page_size);
675 if (nprps <= (256 / 8)) {
676 pool = dev->prp_small_pool;
679 pool = dev->prp_page_pool;
683 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
685 iod->first_dma = dma_addr;
687 return (total_len - length) + page_size;
690 iod->first_dma = prp_dma;
693 if (i == page_size >> 3) {
694 __le64 *old_prp_list = prp_list;
695 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
697 return total_len - length;
698 list[iod->npages++] = prp_list;
699 prp_list[0] = old_prp_list[i - 1];
700 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
703 prp_list[i++] = cpu_to_le64(dma_addr);
704 dma_len -= page_size;
705 dma_addr += page_size;
713 dma_addr = sg_dma_address(sg);
714 dma_len = sg_dma_len(sg);
720 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
721 struct nvme_iod *iod)
723 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
725 memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
726 cmnd->rw.command_id = req->tag;
727 if (req->nr_phys_segments) {
728 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
729 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
732 if (++nvmeq->sq_tail == nvmeq->q_depth)
734 writel(nvmeq->sq_tail, nvmeq->q_db);
738 * We reuse the small pool to allocate the 16-byte range here as it is not
739 * worth having a special pool for these or additional cases to handle freeing
742 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
743 struct request *req, struct nvme_iod *iod)
745 struct nvme_dsm_range *range =
746 (struct nvme_dsm_range *)iod_list(iod)[0];
747 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
749 range->cattr = cpu_to_le32(0);
750 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
751 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
753 memset(cmnd, 0, sizeof(*cmnd));
754 cmnd->dsm.opcode = nvme_cmd_dsm;
755 cmnd->dsm.command_id = req->tag;
756 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
757 cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
759 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
761 if (++nvmeq->sq_tail == nvmeq->q_depth)
763 writel(nvmeq->sq_tail, nvmeq->q_db);
766 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
769 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
771 memset(cmnd, 0, sizeof(*cmnd));
772 cmnd->common.opcode = nvme_cmd_flush;
773 cmnd->common.command_id = cmdid;
774 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
776 if (++nvmeq->sq_tail == nvmeq->q_depth)
778 writel(nvmeq->sq_tail, nvmeq->q_db);
781 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
784 struct request *req = iod_get_private(iod);
785 struct nvme_command *cmnd;
789 if (req->cmd_flags & REQ_FUA)
790 control |= NVME_RW_FUA;
791 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
792 control |= NVME_RW_LR;
794 if (req->cmd_flags & REQ_RAHEAD)
795 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
797 cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
798 memset(cmnd, 0, sizeof(*cmnd));
800 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
801 cmnd->rw.command_id = req->tag;
802 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
803 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
804 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
805 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
806 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
808 if (blk_integrity_rq(req)) {
809 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
810 switch (ns->pi_type) {
811 case NVME_NS_DPS_PI_TYPE3:
812 control |= NVME_RW_PRINFO_PRCHK_GUARD;
814 case NVME_NS_DPS_PI_TYPE1:
815 case NVME_NS_DPS_PI_TYPE2:
816 control |= NVME_RW_PRINFO_PRCHK_GUARD |
817 NVME_RW_PRINFO_PRCHK_REF;
818 cmnd->rw.reftag = cpu_to_le32(
819 nvme_block_nr(ns, blk_rq_pos(req)));
823 control |= NVME_RW_PRINFO_PRACT;
825 cmnd->rw.control = cpu_to_le16(control);
826 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
828 if (++nvmeq->sq_tail == nvmeq->q_depth)
830 writel(nvmeq->sq_tail, nvmeq->q_db);
836 * NOTE: ns is NULL when called on the admin queue.
838 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
839 const struct blk_mq_queue_data *bd)
841 struct nvme_ns *ns = hctx->queue->queuedata;
842 struct nvme_queue *nvmeq = hctx->driver_data;
843 struct nvme_dev *dev = nvmeq->dev;
844 struct request *req = bd->rq;
845 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
846 struct nvme_iod *iod;
847 enum dma_data_direction dma_dir;
850 * If formated with metadata, require the block layer provide a buffer
851 * unless this namespace is formated such that the metadata can be
852 * stripped/generated by the controller with PRACT=1.
854 if (ns && ns->ms && !blk_integrity_rq(req)) {
855 if (!(ns->pi_type && ns->ms == 8)) {
856 req->errors = -EFAULT;
857 blk_mq_complete_request(req);
858 return BLK_MQ_RQ_QUEUE_OK;
862 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
864 return BLK_MQ_RQ_QUEUE_BUSY;
866 if (req->cmd_flags & REQ_DISCARD) {
869 * We reuse the small pool to allocate the 16-byte range here
870 * as it is not worth having a special pool for these or
871 * additional cases to handle freeing the iod.
873 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
877 iod_list(iod)[0] = (__le64 *)range;
879 } else if (req->nr_phys_segments) {
880 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
882 sg_init_table(iod->sg, req->nr_phys_segments);
883 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
887 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
890 if (blk_rq_bytes(req) !=
891 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
892 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
895 if (blk_integrity_rq(req)) {
896 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
899 sg_init_table(iod->meta_sg, 1);
900 if (blk_rq_map_integrity_sg(
901 req->q, req->bio, iod->meta_sg) != 1)
904 if (rq_data_dir(req))
905 nvme_dif_remap(req, nvme_dif_prep);
907 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
912 nvme_set_info(cmd, iod, req_completion);
913 spin_lock_irq(&nvmeq->q_lock);
914 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
915 nvme_submit_priv(nvmeq, req, iod);
916 else if (req->cmd_flags & REQ_DISCARD)
917 nvme_submit_discard(nvmeq, ns, req, iod);
918 else if (req->cmd_flags & REQ_FLUSH)
919 nvme_submit_flush(nvmeq, ns, req->tag);
921 nvme_submit_iod(nvmeq, iod, ns);
923 nvme_process_cq(nvmeq);
924 spin_unlock_irq(&nvmeq->q_lock);
925 return BLK_MQ_RQ_QUEUE_OK;
928 nvme_free_iod(dev, iod);
929 return BLK_MQ_RQ_QUEUE_ERROR;
931 nvme_free_iod(dev, iod);
932 return BLK_MQ_RQ_QUEUE_BUSY;
935 static int nvme_process_cq(struct nvme_queue *nvmeq)
939 head = nvmeq->cq_head;
940 phase = nvmeq->cq_phase;
944 nvme_completion_fn fn;
945 struct nvme_completion cqe = nvmeq->cqes[head];
946 if ((le16_to_cpu(cqe.status) & 1) != phase)
948 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
949 if (++head == nvmeq->q_depth) {
953 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
954 fn(nvmeq, ctx, &cqe);
957 /* If the controller ignores the cq head doorbell and continuously
958 * writes to the queue, it is theoretically possible to wrap around
959 * the queue twice and mistakenly return IRQ_NONE. Linux only
960 * requires that 0.1% of your interrupts are handled, so this isn't
963 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
966 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
967 nvmeq->cq_head = head;
968 nvmeq->cq_phase = phase;
974 static irqreturn_t nvme_irq(int irq, void *data)
977 struct nvme_queue *nvmeq = data;
978 spin_lock(&nvmeq->q_lock);
979 nvme_process_cq(nvmeq);
980 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
982 spin_unlock(&nvmeq->q_lock);
986 static irqreturn_t nvme_irq_check(int irq, void *data)
988 struct nvme_queue *nvmeq = data;
989 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
990 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
992 return IRQ_WAKE_THREAD;
996 * Returns 0 on success. If the result is negative, it's a Linux error code;
997 * if the result is positive, it's an NVM Express status code
999 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1000 void *buffer, void __user *ubuffer, unsigned bufflen,
1001 u32 *result, unsigned timeout)
1003 bool write = cmd->common.opcode & 1;
1004 struct bio *bio = NULL;
1005 struct request *req;
1008 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1010 return PTR_ERR(req);
1012 req->cmd_type = REQ_TYPE_DRV_PRIV;
1013 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1014 req->__data_len = 0;
1015 req->__sector = (sector_t) -1;
1016 req->bio = req->biotail = NULL;
1018 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1020 req->cmd = (unsigned char *)cmd;
1021 req->cmd_len = sizeof(struct nvme_command);
1022 req->special = (void *)0;
1024 if (buffer && bufflen) {
1025 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1028 } else if (ubuffer && bufflen) {
1029 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1035 blk_execute_rq(req->q, NULL, req, 0);
1037 blk_rq_unmap_user(bio);
1039 *result = (u32)(uintptr_t)req->special;
1042 blk_mq_free_request(req);
1046 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1047 void *buffer, unsigned bufflen)
1049 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1052 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1054 struct nvme_queue *nvmeq = dev->queues[0];
1055 struct nvme_command c;
1056 struct nvme_cmd_info *cmd_info;
1057 struct request *req;
1059 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1061 return PTR_ERR(req);
1063 req->cmd_flags |= REQ_NO_TIMEOUT;
1064 cmd_info = blk_mq_rq_to_pdu(req);
1065 nvme_set_info(cmd_info, NULL, async_req_completion);
1067 memset(&c, 0, sizeof(c));
1068 c.common.opcode = nvme_admin_async_event;
1069 c.common.command_id = req->tag;
1071 blk_mq_free_request(req);
1072 return __nvme_submit_cmd(nvmeq, &c);
1075 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1076 struct nvme_command *cmd,
1077 struct async_cmd_info *cmdinfo, unsigned timeout)
1079 struct nvme_queue *nvmeq = dev->queues[0];
1080 struct request *req;
1081 struct nvme_cmd_info *cmd_rq;
1083 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1085 return PTR_ERR(req);
1087 req->timeout = timeout;
1088 cmd_rq = blk_mq_rq_to_pdu(req);
1090 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1091 cmdinfo->status = -EINTR;
1093 cmd->common.command_id = req->tag;
1095 return nvme_submit_cmd(nvmeq, cmd);
1098 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1100 struct nvme_command c;
1102 memset(&c, 0, sizeof(c));
1103 c.delete_queue.opcode = opcode;
1104 c.delete_queue.qid = cpu_to_le16(id);
1106 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1109 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1110 struct nvme_queue *nvmeq)
1112 struct nvme_command c;
1113 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1116 * Note: we (ab)use the fact the the prp fields survive if no data
1117 * is attached to the request.
1119 memset(&c, 0, sizeof(c));
1120 c.create_cq.opcode = nvme_admin_create_cq;
1121 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1122 c.create_cq.cqid = cpu_to_le16(qid);
1123 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1124 c.create_cq.cq_flags = cpu_to_le16(flags);
1125 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1127 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1130 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1131 struct nvme_queue *nvmeq)
1133 struct nvme_command c;
1134 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1137 * Note: we (ab)use the fact the the prp fields survive if no data
1138 * is attached to the request.
1140 memset(&c, 0, sizeof(c));
1141 c.create_sq.opcode = nvme_admin_create_sq;
1142 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1143 c.create_sq.sqid = cpu_to_le16(qid);
1144 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1145 c.create_sq.sq_flags = cpu_to_le16(flags);
1146 c.create_sq.cqid = cpu_to_le16(qid);
1148 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1151 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1153 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1156 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1158 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1161 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1163 struct nvme_command c = {
1164 .identify.opcode = nvme_admin_identify,
1165 .identify.cns = cpu_to_le32(1),
1169 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1173 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1174 sizeof(struct nvme_id_ctrl));
1180 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1181 struct nvme_id_ns **id)
1183 struct nvme_command c = {
1184 .identify.opcode = nvme_admin_identify,
1185 .identify.nsid = cpu_to_le32(nsid),
1189 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1193 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1194 sizeof(struct nvme_id_ns));
1200 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1201 dma_addr_t dma_addr, u32 *result)
1203 struct nvme_command c;
1205 memset(&c, 0, sizeof(c));
1206 c.features.opcode = nvme_admin_get_features;
1207 c.features.nsid = cpu_to_le32(nsid);
1208 c.features.prp1 = cpu_to_le64(dma_addr);
1209 c.features.fid = cpu_to_le32(fid);
1211 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1215 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1216 dma_addr_t dma_addr, u32 *result)
1218 struct nvme_command c;
1220 memset(&c, 0, sizeof(c));
1221 c.features.opcode = nvme_admin_set_features;
1222 c.features.prp1 = cpu_to_le64(dma_addr);
1223 c.features.fid = cpu_to_le32(fid);
1224 c.features.dword11 = cpu_to_le32(dword11);
1226 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1230 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1232 struct nvme_command c = {
1233 .common.opcode = nvme_admin_get_log_page,
1234 .common.nsid = cpu_to_le32(0xFFFFFFFF),
1235 .common.cdw10[0] = cpu_to_le32(
1236 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1241 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1245 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1246 sizeof(struct nvme_smart_log));
1253 * nvme_abort_req - Attempt aborting a request
1255 * Schedule controller reset if the command was already aborted once before and
1256 * still hasn't been returned to the driver, or if this is the admin queue.
1258 static void nvme_abort_req(struct request *req)
1260 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1261 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1262 struct nvme_dev *dev = nvmeq->dev;
1263 struct request *abort_req;
1264 struct nvme_cmd_info *abort_cmd;
1265 struct nvme_command cmd;
1267 if (!nvmeq->qid || cmd_rq->aborted) {
1268 unsigned long flags;
1270 spin_lock_irqsave(&dev_list_lock, flags);
1271 if (work_busy(&dev->reset_work))
1273 list_del_init(&dev->node);
1274 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1275 req->tag, nvmeq->qid);
1276 dev->reset_workfn = nvme_reset_failed_dev;
1277 queue_work(nvme_workq, &dev->reset_work);
1279 spin_unlock_irqrestore(&dev_list_lock, flags);
1283 if (!dev->abort_limit)
1286 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1288 if (IS_ERR(abort_req))
1291 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1292 nvme_set_info(abort_cmd, abort_req, abort_completion);
1294 memset(&cmd, 0, sizeof(cmd));
1295 cmd.abort.opcode = nvme_admin_abort_cmd;
1296 cmd.abort.cid = req->tag;
1297 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1298 cmd.abort.command_id = abort_req->tag;
1301 cmd_rq->aborted = 1;
1303 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1305 if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1306 dev_warn(nvmeq->q_dmadev,
1307 "Could not abort I/O %d QID %d",
1308 req->tag, nvmeq->qid);
1309 blk_mq_free_request(abort_req);
1313 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1315 struct nvme_queue *nvmeq = data;
1317 nvme_completion_fn fn;
1318 struct nvme_cmd_info *cmd;
1319 struct nvme_completion cqe;
1321 if (!blk_mq_request_started(req))
1324 cmd = blk_mq_rq_to_pdu(req);
1326 if (cmd->ctx == CMD_CTX_CANCELLED)
1329 if (blk_queue_dying(req->q))
1330 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1332 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1335 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1336 req->tag, nvmeq->qid);
1337 ctx = cancel_cmd_info(cmd, &fn);
1338 fn(nvmeq, ctx, &cqe);
1341 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1343 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1344 struct nvme_queue *nvmeq = cmd->nvmeq;
1346 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1348 spin_lock_irq(&nvmeq->q_lock);
1349 nvme_abort_req(req);
1350 spin_unlock_irq(&nvmeq->q_lock);
1353 * The aborted req will be completed on receiving the abort req.
1354 * We enable the timer again. If hit twice, it'll cause a device reset,
1355 * as the device then is in a faulty state.
1357 return BLK_EH_RESET_TIMER;
1360 static void nvme_free_queue(struct nvme_queue *nvmeq)
1362 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1363 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1364 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1365 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1369 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1373 for (i = dev->queue_count - 1; i >= lowest; i--) {
1374 struct nvme_queue *nvmeq = dev->queues[i];
1376 dev->queues[i] = NULL;
1377 nvme_free_queue(nvmeq);
1382 * nvme_suspend_queue - put queue into suspended state
1383 * @nvmeq - queue to suspend
1385 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1389 spin_lock_irq(&nvmeq->q_lock);
1390 if (nvmeq->cq_vector == -1) {
1391 spin_unlock_irq(&nvmeq->q_lock);
1394 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1395 nvmeq->dev->online_queues--;
1396 nvmeq->cq_vector = -1;
1397 spin_unlock_irq(&nvmeq->q_lock);
1399 if (!nvmeq->qid && nvmeq->dev->admin_q)
1400 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1402 irq_set_affinity_hint(vector, NULL);
1403 free_irq(vector, nvmeq);
1408 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1410 spin_lock_irq(&nvmeq->q_lock);
1411 if (nvmeq->tags && *nvmeq->tags)
1412 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1413 spin_unlock_irq(&nvmeq->q_lock);
1416 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1418 struct nvme_queue *nvmeq = dev->queues[qid];
1422 if (nvme_suspend_queue(nvmeq))
1425 /* Don't tell the adapter to delete the admin queue.
1426 * Don't tell a removed adapter to delete IO queues. */
1427 if (qid && readl(&dev->bar->csts) != -1) {
1428 adapter_delete_sq(dev, qid);
1429 adapter_delete_cq(dev, qid);
1432 spin_lock_irq(&nvmeq->q_lock);
1433 nvme_process_cq(nvmeq);
1434 spin_unlock_irq(&nvmeq->q_lock);
1437 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1440 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1444 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1445 &nvmeq->cq_dma_addr, GFP_KERNEL);
1449 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1450 &nvmeq->sq_dma_addr, GFP_KERNEL);
1451 if (!nvmeq->sq_cmds)
1454 nvmeq->q_dmadev = dev->dev;
1456 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1457 dev->instance, qid);
1458 spin_lock_init(&nvmeq->q_lock);
1460 nvmeq->cq_phase = 1;
1461 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1462 nvmeq->q_depth = depth;
1464 dev->queues[qid] = nvmeq;
1466 /* make sure queue descriptor is set before queue count, for kthread */
1473 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1474 nvmeq->cq_dma_addr);
1480 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1483 if (use_threaded_interrupts)
1484 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1485 nvme_irq_check, nvme_irq, IRQF_SHARED,
1487 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1488 IRQF_SHARED, name, nvmeq);
1491 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1493 struct nvme_dev *dev = nvmeq->dev;
1495 spin_lock_irq(&nvmeq->q_lock);
1498 nvmeq->cq_phase = 1;
1499 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1500 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1501 dev->online_queues++;
1502 spin_unlock_irq(&nvmeq->q_lock);
1505 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1507 struct nvme_dev *dev = nvmeq->dev;
1510 nvmeq->cq_vector = qid - 1;
1511 result = adapter_alloc_cq(dev, qid, nvmeq);
1515 result = adapter_alloc_sq(dev, qid, nvmeq);
1519 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1523 nvme_init_queue(nvmeq, qid);
1527 adapter_delete_sq(dev, qid);
1529 adapter_delete_cq(dev, qid);
1533 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1535 unsigned long timeout;
1536 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1538 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1540 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1542 if (fatal_signal_pending(current))
1544 if (time_after(jiffies, timeout)) {
1546 "Device not ready; aborting %s\n", enabled ?
1547 "initialisation" : "reset");
1556 * If the device has been passed off to us in an enabled state, just clear
1557 * the enabled bit. The spec says we should set the 'shutdown notification
1558 * bits', but doing so may cause the device to complete commands to the
1559 * admin queue ... and we don't know what memory that might be pointing at!
1561 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1563 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1564 dev->ctrl_config &= ~NVME_CC_ENABLE;
1565 writel(dev->ctrl_config, &dev->bar->cc);
1567 return nvme_wait_ready(dev, cap, false);
1570 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1572 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1573 dev->ctrl_config |= NVME_CC_ENABLE;
1574 writel(dev->ctrl_config, &dev->bar->cc);
1576 return nvme_wait_ready(dev, cap, true);
1579 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1581 unsigned long timeout;
1583 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1584 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1586 writel(dev->ctrl_config, &dev->bar->cc);
1588 timeout = SHUTDOWN_TIMEOUT + jiffies;
1589 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1590 NVME_CSTS_SHST_CMPLT) {
1592 if (fatal_signal_pending(current))
1594 if (time_after(jiffies, timeout)) {
1596 "Device shutdown incomplete; abort shutdown\n");
1604 static struct blk_mq_ops nvme_mq_admin_ops = {
1605 .queue_rq = nvme_queue_rq,
1606 .map_queue = blk_mq_map_queue,
1607 .init_hctx = nvme_admin_init_hctx,
1608 .init_request = nvme_admin_init_request,
1609 .timeout = nvme_timeout,
1612 static struct blk_mq_ops nvme_mq_ops = {
1613 .queue_rq = nvme_queue_rq,
1614 .map_queue = blk_mq_map_queue,
1615 .init_hctx = nvme_init_hctx,
1616 .init_request = nvme_init_request,
1617 .timeout = nvme_timeout,
1620 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1622 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1623 blk_cleanup_queue(dev->admin_q);
1624 blk_mq_free_tag_set(&dev->admin_tagset);
1628 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1630 if (!dev->admin_q) {
1631 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1632 dev->admin_tagset.nr_hw_queues = 1;
1633 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1634 dev->admin_tagset.reserved_tags = 1;
1635 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1636 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1637 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1638 dev->admin_tagset.driver_data = dev;
1640 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1643 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1644 if (IS_ERR(dev->admin_q)) {
1645 blk_mq_free_tag_set(&dev->admin_tagset);
1648 if (!blk_get_queue(dev->admin_q)) {
1649 nvme_dev_remove_admin(dev);
1653 blk_mq_unfreeze_queue(dev->admin_q);
1658 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1662 u64 cap = readq(&dev->bar->cap);
1663 struct nvme_queue *nvmeq;
1664 unsigned page_shift = PAGE_SHIFT;
1665 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1666 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1668 if (page_shift < dev_page_min) {
1670 "Minimum device page size (%u) too large for "
1671 "host (%u)\n", 1 << dev_page_min,
1675 if (page_shift > dev_page_max) {
1677 "Device maximum page size (%u) smaller than "
1678 "host (%u); enabling work-around\n",
1679 1 << dev_page_max, 1 << page_shift);
1680 page_shift = dev_page_max;
1683 result = nvme_disable_ctrl(dev, cap);
1687 nvmeq = dev->queues[0];
1689 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1694 aqa = nvmeq->q_depth - 1;
1697 dev->page_size = 1 << page_shift;
1699 dev->ctrl_config = NVME_CC_CSS_NVM;
1700 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1701 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1702 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1704 writel(aqa, &dev->bar->aqa);
1705 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1706 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1708 result = nvme_enable_ctrl(dev, cap);
1712 nvmeq->cq_vector = 0;
1713 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1720 nvme_free_queues(dev, 0);
1724 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1726 struct nvme_dev *dev = ns->dev;
1727 struct nvme_user_io io;
1728 struct nvme_command c;
1729 unsigned length, meta_len;
1731 dma_addr_t meta_dma = 0;
1734 if (copy_from_user(&io, uio, sizeof(io)))
1737 switch (io.opcode) {
1738 case nvme_cmd_write:
1740 case nvme_cmd_compare:
1746 length = (io.nblocks + 1) << ns->lba_shift;
1747 meta_len = (io.nblocks + 1) * ns->ms;
1748 write = io.opcode & 1;
1751 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1759 meta = dma_alloc_coherent(dev->dev, meta_len,
1760 &meta_dma, GFP_KERNEL);
1766 if (copy_from_user(meta, (void __user *)io.metadata,
1774 memset(&c, 0, sizeof(c));
1775 c.rw.opcode = io.opcode;
1776 c.rw.flags = io.flags;
1777 c.rw.nsid = cpu_to_le32(ns->ns_id);
1778 c.rw.slba = cpu_to_le64(io.slba);
1779 c.rw.length = cpu_to_le16(io.nblocks);
1780 c.rw.control = cpu_to_le16(io.control);
1781 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1782 c.rw.reftag = cpu_to_le32(io.reftag);
1783 c.rw.apptag = cpu_to_le16(io.apptag);
1784 c.rw.appmask = cpu_to_le16(io.appmask);
1785 c.rw.metadata = cpu_to_le64(meta_dma);
1787 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1788 (void __user *)io.addr, length, NULL, 0);
1791 if (status == NVME_SC_SUCCESS && !write) {
1792 if (copy_to_user((void __user *)io.metadata, meta,
1796 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1801 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1802 struct nvme_passthru_cmd __user *ucmd)
1804 struct nvme_passthru_cmd cmd;
1805 struct nvme_command c;
1806 unsigned timeout = 0;
1809 if (!capable(CAP_SYS_ADMIN))
1811 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1814 memset(&c, 0, sizeof(c));
1815 c.common.opcode = cmd.opcode;
1816 c.common.flags = cmd.flags;
1817 c.common.nsid = cpu_to_le32(cmd.nsid);
1818 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1819 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1820 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1821 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1822 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1823 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1824 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1825 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1828 timeout = msecs_to_jiffies(cmd.timeout_ms);
1830 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1831 NULL, (void __user *)cmd.addr, cmd.data_len,
1832 &cmd.result, timeout);
1834 if (put_user(cmd.result, &ucmd->result))
1841 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1844 struct nvme_ns *ns = bdev->bd_disk->private_data;
1848 force_successful_syscall_return();
1850 case NVME_IOCTL_ADMIN_CMD:
1851 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1852 case NVME_IOCTL_IO_CMD:
1853 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1854 case NVME_IOCTL_SUBMIT_IO:
1855 return nvme_submit_io(ns, (void __user *)arg);
1856 case SG_GET_VERSION_NUM:
1857 return nvme_sg_get_version_num((void __user *)arg);
1859 return nvme_sg_io(ns, (void __user *)arg);
1865 #ifdef CONFIG_COMPAT
1866 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1867 unsigned int cmd, unsigned long arg)
1871 return -ENOIOCTLCMD;
1873 return nvme_ioctl(bdev, mode, cmd, arg);
1876 #define nvme_compat_ioctl NULL
1879 static int nvme_open(struct block_device *bdev, fmode_t mode)
1884 spin_lock(&dev_list_lock);
1885 ns = bdev->bd_disk->private_data;
1888 else if (!kref_get_unless_zero(&ns->dev->kref))
1890 spin_unlock(&dev_list_lock);
1895 static void nvme_free_dev(struct kref *kref);
1897 static void nvme_release(struct gendisk *disk, fmode_t mode)
1899 struct nvme_ns *ns = disk->private_data;
1900 struct nvme_dev *dev = ns->dev;
1902 kref_put(&dev->kref, nvme_free_dev);
1905 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1907 /* some standard values */
1908 geo->heads = 1 << 6;
1909 geo->sectors = 1 << 5;
1910 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1914 static void nvme_config_discard(struct nvme_ns *ns)
1916 u32 logical_block_size = queue_logical_block_size(ns->queue);
1917 ns->queue->limits.discard_zeroes_data = 0;
1918 ns->queue->limits.discard_alignment = logical_block_size;
1919 ns->queue->limits.discard_granularity = logical_block_size;
1920 ns->queue->limits.max_discard_sectors = 0xffffffff;
1921 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1924 static int nvme_revalidate_disk(struct gendisk *disk)
1926 struct nvme_ns *ns = disk->private_data;
1927 struct nvme_dev *dev = ns->dev;
1928 struct nvme_id_ns *id;
1933 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1934 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
1935 dev->instance, ns->ns_id);
1938 if (id->ncap == 0) {
1944 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1945 ns->lba_shift = id->lbaf[lbaf].ds;
1946 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1947 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1950 * If identify namespace failed, use default 512 byte block size so
1951 * block layer can use before failing read/write for 0 capacity.
1953 if (ns->lba_shift == 0)
1955 bs = 1 << ns->lba_shift;
1957 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1958 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1959 id->dps & NVME_NS_DPS_PI_MASK : 0;
1961 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1963 bs != queue_logical_block_size(disk->queue) ||
1964 (ns->ms && ns->ext)))
1965 blk_integrity_unregister(disk);
1967 ns->pi_type = pi_type;
1968 blk_queue_logical_block_size(ns->queue, bs);
1970 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
1972 nvme_init_integrity(ns);
1974 if (ns->ms && !blk_get_integrity(disk))
1975 set_capacity(disk, 0);
1977 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1979 if (dev->oncs & NVME_CTRL_ONCS_DSM)
1980 nvme_config_discard(ns);
1986 static const struct block_device_operations nvme_fops = {
1987 .owner = THIS_MODULE,
1988 .ioctl = nvme_ioctl,
1989 .compat_ioctl = nvme_compat_ioctl,
1991 .release = nvme_release,
1992 .getgeo = nvme_getgeo,
1993 .revalidate_disk= nvme_revalidate_disk,
1996 static int nvme_kthread(void *data)
1998 struct nvme_dev *dev, *next;
2000 while (!kthread_should_stop()) {
2001 set_current_state(TASK_INTERRUPTIBLE);
2002 spin_lock(&dev_list_lock);
2003 list_for_each_entry_safe(dev, next, &dev_list, node) {
2005 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2006 if (work_busy(&dev->reset_work))
2008 list_del_init(&dev->node);
2010 "Failed status: %x, reset controller\n",
2011 readl(&dev->bar->csts));
2012 dev->reset_workfn = nvme_reset_failed_dev;
2013 queue_work(nvme_workq, &dev->reset_work);
2016 for (i = 0; i < dev->queue_count; i++) {
2017 struct nvme_queue *nvmeq = dev->queues[i];
2020 spin_lock_irq(&nvmeq->q_lock);
2021 nvme_process_cq(nvmeq);
2023 while ((i == 0) && (dev->event_limit > 0)) {
2024 if (nvme_submit_async_admin_req(dev))
2028 spin_unlock_irq(&nvmeq->q_lock);
2031 spin_unlock(&dev_list_lock);
2032 schedule_timeout(round_jiffies_relative(HZ));
2037 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2040 struct gendisk *disk;
2041 int node = dev_to_node(dev->dev);
2043 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2047 ns->queue = blk_mq_init_queue(&dev->tagset);
2048 if (IS_ERR(ns->queue))
2050 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2051 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2052 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2054 ns->queue->queuedata = ns;
2056 disk = alloc_disk_node(0, node);
2058 goto out_free_queue;
2062 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2063 list_add_tail(&ns->list, &dev->namespaces);
2065 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2066 if (dev->max_hw_sectors)
2067 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2068 if (dev->stripe_size)
2069 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2070 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2071 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2073 disk->major = nvme_major;
2074 disk->first_minor = 0;
2075 disk->fops = &nvme_fops;
2076 disk->private_data = ns;
2077 disk->queue = ns->queue;
2078 disk->driverfs_dev = dev->device;
2079 disk->flags = GENHD_FL_EXT_DEVT;
2080 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2083 * Initialize capacity to 0 until we establish the namespace format and
2084 * setup integrity extentions if necessary. The revalidate_disk after
2085 * add_disk allows the driver to register with integrity if the format
2088 set_capacity(disk, 0);
2089 if (nvme_revalidate_disk(ns->disk))
2094 revalidate_disk(ns->disk);
2098 list_del(&ns->list);
2100 blk_cleanup_queue(ns->queue);
2105 static void nvme_create_io_queues(struct nvme_dev *dev)
2109 for (i = dev->queue_count; i <= dev->max_qid; i++)
2110 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2113 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2114 if (nvme_create_queue(dev->queues[i], i))
2118 static int set_queue_count(struct nvme_dev *dev, int count)
2122 u32 q_count = (count - 1) | ((count - 1) << 16);
2124 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2129 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2132 return min(result & 0xffff, result >> 16) + 1;
2135 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2137 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2140 static int nvme_setup_io_queues(struct nvme_dev *dev)
2142 struct nvme_queue *adminq = dev->queues[0];
2143 struct pci_dev *pdev = to_pci_dev(dev->dev);
2144 int result, i, vecs, nr_io_queues, size;
2146 nr_io_queues = num_possible_cpus();
2147 result = set_queue_count(dev, nr_io_queues);
2150 if (result < nr_io_queues)
2151 nr_io_queues = result;
2153 size = db_bar_size(dev, nr_io_queues);
2157 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2160 if (!--nr_io_queues)
2162 size = db_bar_size(dev, nr_io_queues);
2164 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2165 adminq->q_db = dev->dbs;
2168 /* Deregister the admin queue's interrupt */
2169 free_irq(dev->entry[0].vector, adminq);
2172 * If we enable msix early due to not intx, disable it again before
2173 * setting up the full range we need.
2176 pci_disable_msix(pdev);
2178 for (i = 0; i < nr_io_queues; i++)
2179 dev->entry[i].entry = i;
2180 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2182 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2186 for (i = 0; i < vecs; i++)
2187 dev->entry[i].vector = i + pdev->irq;
2192 * Should investigate if there's a performance win from allocating
2193 * more queues than interrupt vectors; it might allow the submission
2194 * path to scale better, even if the receive path is limited by the
2195 * number of interrupts.
2197 nr_io_queues = vecs;
2198 dev->max_qid = nr_io_queues;
2200 result = queue_request_irq(dev, adminq, adminq->irqname);
2204 /* Free previously allocated queues that are no longer usable */
2205 nvme_free_queues(dev, nr_io_queues + 1);
2206 nvme_create_io_queues(dev);
2211 nvme_free_queues(dev, 1);
2215 static void nvme_free_namespace(struct nvme_ns *ns)
2217 list_del(&ns->list);
2219 spin_lock(&dev_list_lock);
2220 ns->disk->private_data = NULL;
2221 spin_unlock(&dev_list_lock);
2227 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2229 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2230 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2232 return nsa->ns_id - nsb->ns_id;
2235 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2239 list_for_each_entry(ns, &dev->namespaces, list) {
2240 if (ns->ns_id == nsid)
2242 if (ns->ns_id > nsid)
2248 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2250 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2251 dev->online_queues < 2);
2254 static void nvme_ns_remove(struct nvme_ns *ns)
2256 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2259 blk_set_queue_dying(ns->queue);
2260 if (ns->disk->flags & GENHD_FL_UP) {
2261 if (blk_get_integrity(ns->disk))
2262 blk_integrity_unregister(ns->disk);
2263 del_gendisk(ns->disk);
2265 if (kill || !blk_queue_dying(ns->queue)) {
2266 blk_mq_abort_requeue_list(ns->queue);
2267 blk_cleanup_queue(ns->queue);
2271 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2273 struct nvme_ns *ns, *next;
2276 for (i = 1; i <= nn; i++) {
2277 ns = nvme_find_ns(dev, i);
2279 if (revalidate_disk(ns->disk)) {
2281 nvme_free_namespace(ns);
2284 nvme_alloc_ns(dev, i);
2286 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2287 if (ns->ns_id > nn) {
2289 nvme_free_namespace(ns);
2292 list_sort(NULL, &dev->namespaces, ns_cmp);
2295 static void nvme_dev_scan(struct work_struct *work)
2297 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2298 struct nvme_id_ctrl *ctrl;
2300 if (!dev->tagset.tags)
2302 if (nvme_identify_ctrl(dev, &ctrl))
2304 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2309 * Return: error value if an error occurred setting up the queues or calling
2310 * Identify Device. 0 if these succeeded, even if adding some of the
2311 * namespaces failed. At the moment, these failures are silent. TBD which
2312 * failures should be reported.
2314 static int nvme_dev_add(struct nvme_dev *dev)
2316 struct pci_dev *pdev = to_pci_dev(dev->dev);
2319 struct nvme_id_ctrl *ctrl;
2320 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2322 res = nvme_identify_ctrl(dev, &ctrl);
2324 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2328 nn = le32_to_cpup(&ctrl->nn);
2329 dev->oncs = le16_to_cpup(&ctrl->oncs);
2330 dev->abort_limit = ctrl->acl + 1;
2331 dev->vwc = ctrl->vwc;
2332 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2333 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2334 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2336 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2337 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2338 (pdev->device == 0x0953) && ctrl->vs[3]) {
2339 unsigned int max_hw_sectors;
2341 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2342 max_hw_sectors = dev->stripe_size >> (shift - 9);
2343 if (dev->max_hw_sectors) {
2344 dev->max_hw_sectors = min(max_hw_sectors,
2345 dev->max_hw_sectors);
2347 dev->max_hw_sectors = max_hw_sectors;
2351 dev->tagset.ops = &nvme_mq_ops;
2352 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2353 dev->tagset.timeout = NVME_IO_TIMEOUT;
2354 dev->tagset.numa_node = dev_to_node(dev->dev);
2355 dev->tagset.queue_depth =
2356 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2357 dev->tagset.cmd_size = nvme_cmd_size(dev);
2358 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2359 dev->tagset.driver_data = dev;
2361 if (blk_mq_alloc_tag_set(&dev->tagset))
2364 schedule_work(&dev->scan_work);
2368 static int nvme_dev_map(struct nvme_dev *dev)
2371 int bars, result = -ENOMEM;
2372 struct pci_dev *pdev = to_pci_dev(dev->dev);
2374 if (pci_enable_device_mem(pdev))
2377 dev->entry[0].vector = pdev->irq;
2378 pci_set_master(pdev);
2379 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2383 if (pci_request_selected_regions(pdev, bars, "nvme"))
2386 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2387 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2390 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2394 if (readl(&dev->bar->csts) == -1) {
2400 * Some devices don't advertse INTx interrupts, pre-enable a single
2401 * MSIX vec for setup. We'll adjust this later.
2404 result = pci_enable_msix(pdev, dev->entry, 1);
2409 cap = readq(&dev->bar->cap);
2410 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2411 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2412 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2420 pci_release_regions(pdev);
2422 pci_disable_device(pdev);
2426 static void nvme_dev_unmap(struct nvme_dev *dev)
2428 struct pci_dev *pdev = to_pci_dev(dev->dev);
2430 if (pdev->msi_enabled)
2431 pci_disable_msi(pdev);
2432 else if (pdev->msix_enabled)
2433 pci_disable_msix(pdev);
2438 pci_release_regions(pdev);
2441 if (pci_is_enabled(pdev))
2442 pci_disable_device(pdev);
2445 struct nvme_delq_ctx {
2446 struct task_struct *waiter;
2447 struct kthread_worker *worker;
2451 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2453 dq->waiter = current;
2457 set_current_state(TASK_KILLABLE);
2458 if (!atomic_read(&dq->refcount))
2460 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2461 fatal_signal_pending(current)) {
2463 * Disable the controller first since we can't trust it
2464 * at this point, but leave the admin queue enabled
2465 * until all queue deletion requests are flushed.
2466 * FIXME: This may take a while if there are more h/w
2467 * queues than admin tags.
2469 set_current_state(TASK_RUNNING);
2470 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2471 nvme_clear_queue(dev->queues[0]);
2472 flush_kthread_worker(dq->worker);
2473 nvme_disable_queue(dev, 0);
2477 set_current_state(TASK_RUNNING);
2480 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2482 atomic_dec(&dq->refcount);
2484 wake_up_process(dq->waiter);
2487 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2489 atomic_inc(&dq->refcount);
2493 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2495 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2499 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2500 kthread_work_func_t fn)
2502 struct nvme_command c;
2504 memset(&c, 0, sizeof(c));
2505 c.delete_queue.opcode = opcode;
2506 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2508 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2509 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2513 static void nvme_del_cq_work_handler(struct kthread_work *work)
2515 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2517 nvme_del_queue_end(nvmeq);
2520 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2522 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2523 nvme_del_cq_work_handler);
2526 static void nvme_del_sq_work_handler(struct kthread_work *work)
2528 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2530 int status = nvmeq->cmdinfo.status;
2533 status = nvme_delete_cq(nvmeq);
2535 nvme_del_queue_end(nvmeq);
2538 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2540 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2541 nvme_del_sq_work_handler);
2544 static void nvme_del_queue_start(struct kthread_work *work)
2546 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2548 if (nvme_delete_sq(nvmeq))
2549 nvme_del_queue_end(nvmeq);
2552 static void nvme_disable_io_queues(struct nvme_dev *dev)
2555 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2556 struct nvme_delq_ctx dq;
2557 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2558 &worker, "nvme%d", dev->instance);
2560 if (IS_ERR(kworker_task)) {
2562 "Failed to create queue del task\n");
2563 for (i = dev->queue_count - 1; i > 0; i--)
2564 nvme_disable_queue(dev, i);
2569 atomic_set(&dq.refcount, 0);
2570 dq.worker = &worker;
2571 for (i = dev->queue_count - 1; i > 0; i--) {
2572 struct nvme_queue *nvmeq = dev->queues[i];
2574 if (nvme_suspend_queue(nvmeq))
2576 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2577 nvmeq->cmdinfo.worker = dq.worker;
2578 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2579 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2581 nvme_wait_dq(&dq, dev);
2582 kthread_stop(kworker_task);
2586 * Remove the node from the device list and check
2587 * for whether or not we need to stop the nvme_thread.
2589 static void nvme_dev_list_remove(struct nvme_dev *dev)
2591 struct task_struct *tmp = NULL;
2593 spin_lock(&dev_list_lock);
2594 list_del_init(&dev->node);
2595 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2599 spin_unlock(&dev_list_lock);
2605 static void nvme_freeze_queues(struct nvme_dev *dev)
2609 list_for_each_entry(ns, &dev->namespaces, list) {
2610 blk_mq_freeze_queue_start(ns->queue);
2612 spin_lock_irq(ns->queue->queue_lock);
2613 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2614 spin_unlock_irq(ns->queue->queue_lock);
2616 blk_mq_cancel_requeue_work(ns->queue);
2617 blk_mq_stop_hw_queues(ns->queue);
2621 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2625 list_for_each_entry(ns, &dev->namespaces, list) {
2626 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2627 blk_mq_unfreeze_queue(ns->queue);
2628 blk_mq_start_stopped_hw_queues(ns->queue, true);
2629 blk_mq_kick_requeue_list(ns->queue);
2633 static void nvme_dev_shutdown(struct nvme_dev *dev)
2638 nvme_dev_list_remove(dev);
2641 nvme_freeze_queues(dev);
2642 csts = readl(&dev->bar->csts);
2644 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2645 for (i = dev->queue_count - 1; i >= 0; i--) {
2646 struct nvme_queue *nvmeq = dev->queues[i];
2647 nvme_suspend_queue(nvmeq);
2650 nvme_disable_io_queues(dev);
2651 nvme_shutdown_ctrl(dev);
2652 nvme_disable_queue(dev, 0);
2654 nvme_dev_unmap(dev);
2656 for (i = dev->queue_count - 1; i >= 0; i--)
2657 nvme_clear_queue(dev->queues[i]);
2660 static void nvme_dev_remove(struct nvme_dev *dev)
2664 list_for_each_entry(ns, &dev->namespaces, list)
2668 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2670 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2671 PAGE_SIZE, PAGE_SIZE, 0);
2672 if (!dev->prp_page_pool)
2675 /* Optimisation for I/Os between 4k and 128k */
2676 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2678 if (!dev->prp_small_pool) {
2679 dma_pool_destroy(dev->prp_page_pool);
2685 static void nvme_release_prp_pools(struct nvme_dev *dev)
2687 dma_pool_destroy(dev->prp_page_pool);
2688 dma_pool_destroy(dev->prp_small_pool);
2691 static DEFINE_IDA(nvme_instance_ida);
2693 static int nvme_set_instance(struct nvme_dev *dev)
2695 int instance, error;
2698 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2701 spin_lock(&dev_list_lock);
2702 error = ida_get_new(&nvme_instance_ida, &instance);
2703 spin_unlock(&dev_list_lock);
2704 } while (error == -EAGAIN);
2709 dev->instance = instance;
2713 static void nvme_release_instance(struct nvme_dev *dev)
2715 spin_lock(&dev_list_lock);
2716 ida_remove(&nvme_instance_ida, dev->instance);
2717 spin_unlock(&dev_list_lock);
2720 static void nvme_free_namespaces(struct nvme_dev *dev)
2722 struct nvme_ns *ns, *next;
2724 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2725 nvme_free_namespace(ns);
2728 static void nvme_free_dev(struct kref *kref)
2730 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2732 put_device(dev->dev);
2733 put_device(dev->device);
2734 nvme_free_namespaces(dev);
2735 nvme_release_instance(dev);
2736 blk_mq_free_tag_set(&dev->tagset);
2737 blk_put_queue(dev->admin_q);
2743 static int nvme_dev_open(struct inode *inode, struct file *f)
2745 struct nvme_dev *dev;
2746 int instance = iminor(inode);
2749 spin_lock(&dev_list_lock);
2750 list_for_each_entry(dev, &dev_list, node) {
2751 if (dev->instance == instance) {
2752 if (!dev->admin_q) {
2756 if (!kref_get_unless_zero(&dev->kref))
2758 f->private_data = dev;
2763 spin_unlock(&dev_list_lock);
2768 static int nvme_dev_release(struct inode *inode, struct file *f)
2770 struct nvme_dev *dev = f->private_data;
2771 kref_put(&dev->kref, nvme_free_dev);
2775 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2777 struct nvme_dev *dev = f->private_data;
2781 case NVME_IOCTL_ADMIN_CMD:
2782 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2783 case NVME_IOCTL_IO_CMD:
2784 if (list_empty(&dev->namespaces))
2786 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2787 return nvme_user_cmd(dev, ns, (void __user *)arg);
2788 case NVME_IOCTL_RESET:
2789 dev_warn(dev->dev, "resetting controller\n");
2790 return nvme_reset(dev);
2796 static const struct file_operations nvme_dev_fops = {
2797 .owner = THIS_MODULE,
2798 .open = nvme_dev_open,
2799 .release = nvme_dev_release,
2800 .unlocked_ioctl = nvme_dev_ioctl,
2801 .compat_ioctl = nvme_dev_ioctl,
2804 static void nvme_set_irq_hints(struct nvme_dev *dev)
2806 struct nvme_queue *nvmeq;
2809 for (i = 0; i < dev->online_queues; i++) {
2810 nvmeq = dev->queues[i];
2812 if (!nvmeq->tags || !(*nvmeq->tags))
2815 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2816 blk_mq_tags_cpumask(*nvmeq->tags));
2820 static int nvme_dev_start(struct nvme_dev *dev)
2823 bool start_thread = false;
2825 result = nvme_dev_map(dev);
2829 result = nvme_configure_admin_queue(dev);
2833 spin_lock(&dev_list_lock);
2834 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2835 start_thread = true;
2838 list_add(&dev->node, &dev_list);
2839 spin_unlock(&dev_list_lock);
2842 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2843 wake_up_all(&nvme_kthread_wait);
2845 wait_event_killable(nvme_kthread_wait, nvme_thread);
2847 if (IS_ERR_OR_NULL(nvme_thread)) {
2848 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2852 nvme_init_queue(dev->queues[0], 0);
2853 result = nvme_alloc_admin_tags(dev);
2857 result = nvme_setup_io_queues(dev);
2861 nvme_set_irq_hints(dev);
2863 dev->event_limit = 1;
2867 nvme_dev_remove_admin(dev);
2869 nvme_disable_queue(dev, 0);
2870 nvme_dev_list_remove(dev);
2872 nvme_dev_unmap(dev);
2876 static int nvme_remove_dead_ctrl(void *arg)
2878 struct nvme_dev *dev = (struct nvme_dev *)arg;
2879 struct pci_dev *pdev = to_pci_dev(dev->dev);
2881 if (pci_get_drvdata(pdev))
2882 pci_stop_and_remove_bus_device_locked(pdev);
2883 kref_put(&dev->kref, nvme_free_dev);
2887 static void nvme_remove_disks(struct work_struct *ws)
2889 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2891 nvme_free_queues(dev, 1);
2892 nvme_dev_remove(dev);
2895 static int nvme_dev_resume(struct nvme_dev *dev)
2899 ret = nvme_dev_start(dev);
2902 if (dev->online_queues < 2) {
2903 spin_lock(&dev_list_lock);
2904 dev->reset_workfn = nvme_remove_disks;
2905 queue_work(nvme_workq, &dev->reset_work);
2906 spin_unlock(&dev_list_lock);
2908 nvme_unfreeze_queues(dev);
2909 schedule_work(&dev->scan_work);
2910 nvme_set_irq_hints(dev);
2915 static void nvme_dev_reset(struct nvme_dev *dev)
2917 nvme_dev_shutdown(dev);
2918 if (nvme_dev_resume(dev)) {
2919 dev_warn(dev->dev, "Device failed to resume\n");
2920 kref_get(&dev->kref);
2921 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2924 "Failed to start controller remove task\n");
2925 kref_put(&dev->kref, nvme_free_dev);
2930 static void nvme_reset_failed_dev(struct work_struct *ws)
2932 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2933 nvme_dev_reset(dev);
2936 static void nvme_reset_workfn(struct work_struct *work)
2938 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2939 dev->reset_workfn(work);
2942 static int nvme_reset(struct nvme_dev *dev)
2946 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
2949 spin_lock(&dev_list_lock);
2950 if (!work_pending(&dev->reset_work)) {
2951 dev->reset_workfn = nvme_reset_failed_dev;
2952 queue_work(nvme_workq, &dev->reset_work);
2955 spin_unlock(&dev_list_lock);
2958 flush_work(&dev->reset_work);
2965 static ssize_t nvme_sysfs_reset(struct device *dev,
2966 struct device_attribute *attr, const char *buf,
2969 struct nvme_dev *ndev = dev_get_drvdata(dev);
2972 ret = nvme_reset(ndev);
2978 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
2980 static void nvme_async_probe(struct work_struct *work);
2981 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2983 int node, result = -ENOMEM;
2984 struct nvme_dev *dev;
2986 node = dev_to_node(&pdev->dev);
2987 if (node == NUMA_NO_NODE)
2988 set_dev_node(&pdev->dev, 0);
2990 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2993 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2997 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3002 INIT_LIST_HEAD(&dev->namespaces);
3003 dev->reset_workfn = nvme_reset_failed_dev;
3004 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3005 dev->dev = get_device(&pdev->dev);
3006 pci_set_drvdata(pdev, dev);
3007 result = nvme_set_instance(dev);
3011 result = nvme_setup_prp_pools(dev);
3015 kref_init(&dev->kref);
3016 dev->device = device_create(nvme_class, &pdev->dev,
3017 MKDEV(nvme_char_major, dev->instance),
3018 dev, "nvme%d", dev->instance);
3019 if (IS_ERR(dev->device)) {
3020 result = PTR_ERR(dev->device);
3023 get_device(dev->device);
3024 dev_set_drvdata(dev->device, dev);
3026 result = device_create_file(dev->device, &dev_attr_reset_controller);
3030 INIT_LIST_HEAD(&dev->node);
3031 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3032 INIT_WORK(&dev->probe_work, nvme_async_probe);
3033 schedule_work(&dev->probe_work);
3037 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3038 put_device(dev->device);
3040 nvme_release_prp_pools(dev);
3042 nvme_release_instance(dev);
3044 put_device(dev->dev);
3052 static void nvme_async_probe(struct work_struct *work)
3054 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3057 result = nvme_dev_start(dev);
3061 if (dev->online_queues > 1)
3062 result = nvme_dev_add(dev);
3066 nvme_set_irq_hints(dev);
3069 spin_lock(&dev_list_lock);
3070 if (!work_busy(&dev->reset_work)) {
3071 dev->reset_workfn = nvme_reset_failed_dev;
3072 queue_work(nvme_workq, &dev->reset_work);
3074 spin_unlock(&dev_list_lock);
3077 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3079 struct nvme_dev *dev = pci_get_drvdata(pdev);
3082 nvme_dev_shutdown(dev);
3084 nvme_dev_resume(dev);
3087 static void nvme_shutdown(struct pci_dev *pdev)
3089 struct nvme_dev *dev = pci_get_drvdata(pdev);
3090 nvme_dev_shutdown(dev);
3093 static void nvme_remove(struct pci_dev *pdev)
3095 struct nvme_dev *dev = pci_get_drvdata(pdev);
3097 spin_lock(&dev_list_lock);
3098 list_del_init(&dev->node);
3099 spin_unlock(&dev_list_lock);
3101 pci_set_drvdata(pdev, NULL);
3102 flush_work(&dev->probe_work);
3103 flush_work(&dev->reset_work);
3104 flush_work(&dev->scan_work);
3105 device_remove_file(dev->device, &dev_attr_reset_controller);
3106 nvme_dev_shutdown(dev);
3107 nvme_dev_remove(dev);
3108 nvme_dev_remove_admin(dev);
3109 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3110 nvme_free_queues(dev, 0);
3111 nvme_release_prp_pools(dev);
3112 kref_put(&dev->kref, nvme_free_dev);
3115 /* These functions are yet to be implemented */
3116 #define nvme_error_detected NULL
3117 #define nvme_dump_registers NULL
3118 #define nvme_link_reset NULL
3119 #define nvme_slot_reset NULL
3120 #define nvme_error_resume NULL
3122 #ifdef CONFIG_PM_SLEEP
3123 static int nvme_suspend(struct device *dev)
3125 struct pci_dev *pdev = to_pci_dev(dev);
3126 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3128 nvme_dev_shutdown(ndev);
3132 static int nvme_resume(struct device *dev)
3134 struct pci_dev *pdev = to_pci_dev(dev);
3135 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3137 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3138 ndev->reset_workfn = nvme_reset_failed_dev;
3139 queue_work(nvme_workq, &ndev->reset_work);
3145 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3147 static const struct pci_error_handlers nvme_err_handler = {
3148 .error_detected = nvme_error_detected,
3149 .mmio_enabled = nvme_dump_registers,
3150 .link_reset = nvme_link_reset,
3151 .slot_reset = nvme_slot_reset,
3152 .resume = nvme_error_resume,
3153 .reset_notify = nvme_reset_notify,
3156 /* Move to pci_ids.h later */
3157 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3159 static const struct pci_device_id nvme_id_table[] = {
3160 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3163 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3165 static struct pci_driver nvme_driver = {
3167 .id_table = nvme_id_table,
3168 .probe = nvme_probe,
3169 .remove = nvme_remove,
3170 .shutdown = nvme_shutdown,
3172 .pm = &nvme_dev_pm_ops,
3174 .err_handler = &nvme_err_handler,
3177 static int __init nvme_init(void)
3181 init_waitqueue_head(&nvme_kthread_wait);
3183 nvme_workq = create_singlethread_workqueue("nvme");
3187 result = register_blkdev(nvme_major, "nvme");
3190 else if (result > 0)
3191 nvme_major = result;
3193 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3196 goto unregister_blkdev;
3197 else if (result > 0)
3198 nvme_char_major = result;
3200 nvme_class = class_create(THIS_MODULE, "nvme");
3201 if (IS_ERR(nvme_class)) {
3202 result = PTR_ERR(nvme_class);
3203 goto unregister_chrdev;
3206 result = pci_register_driver(&nvme_driver);
3212 class_destroy(nvme_class);
3214 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3216 unregister_blkdev(nvme_major, "nvme");
3218 destroy_workqueue(nvme_workq);
3222 static void __exit nvme_exit(void)
3224 pci_unregister_driver(&nvme_driver);
3225 unregister_blkdev(nvme_major, "nvme");
3226 destroy_workqueue(nvme_workq);
3227 class_destroy(nvme_class);
3228 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3229 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3233 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3234 MODULE_LICENSE("GPL");
3235 MODULE_VERSION("1.0");
3236 module_init(nvme_init);
3237 module_exit(nvme_exit);