drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/t10-pi.h>
  41 #include <linux/types.h>
  42 #include <scsi/sg.h>
  43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  44
  45 #define NVME_MINORS             (1U << MINORBITS)
  46 #define NVME_Q_DEPTH            1024
  47 #define NVME_AQ_DEPTH           256
  48 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  49 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  50 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  51 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  52
  53 static unsigned char admin_timeout = 60;
  54 module_param(admin_timeout, byte, 0644);
  55 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  56
  57 unsigned char nvme_io_timeout = 30;
  58 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  59 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  60
  61 static unsigned char shutdown_timeout = 5;
  62 module_param(shutdown_timeout, byte, 0644);
  63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  64
  65 static int nvme_major;
  66 module_param(nvme_major, int, 0);
  67
  68 static int nvme_char_major;
  69 module_param(nvme_char_major, int, 0);
  70
  71 static int use_threaded_interrupts;
  72 module_param(use_threaded_interrupts, int, 0);
  73
  74 static DEFINE_SPINLOCK(dev_list_lock);
  75 static LIST_HEAD(dev_list);
  76 static struct task_struct *nvme_thread;
  77 static struct workqueue_struct *nvme_workq;
  78 static wait_queue_head_t nvme_kthread_wait;
  79
  80 static struct class *nvme_class;
  81
  82 static void nvme_reset_failed_dev(struct work_struct *ws);
  83 static int nvme_process_cq(struct nvme_queue *nvmeq);
  84
  85 struct async_cmd_info {
  86         struct kthread_work work;
  87         struct kthread_worker *worker;
  88         struct request *req;
  89         u32 result;
  90         int status;
  91         void *ctx;
  92 };
  93
  94 /*
  95  * An NVM Express queue.  Each device has at least two (one for admin
  96  * commands and one for I/O commands).
  97  */
  98 struct nvme_queue {
  99         struct device *q_dmadev;
 100         struct nvme_dev *dev;
 101         char irqname[24];       /* nvme4294967295-65535\0 */
 102         spinlock_t q_lock;
 103         struct nvme_command *sq_cmds;
 104         volatile struct nvme_completion *cqes;
 105         dma_addr_t sq_dma_addr;
 106         dma_addr_t cq_dma_addr;
 107         u32 __iomem *q_db;
 108         u16 q_depth;
 109         s16 cq_vector;
 110         u16 sq_head;
 111         u16 sq_tail;
 112         u16 cq_head;
 113         u16 qid;
 114         u8 cq_phase;
 115         u8 cqe_seen;
 116         struct async_cmd_info cmdinfo;
 117         struct blk_mq_hw_ctx *hctx;
 118 };
 119
 120 /*
 121  * Check we didin't inadvertently grow the command struct
 122  */
 123 static inline void _nvme_check_size(void)
 124 {
 125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 137 }
 138
 139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 140                                                 struct nvme_completion *);
 141
 142 struct nvme_cmd_info {
 143         nvme_completion_fn fn;
 144         void *ctx;
 145         int aborted;
 146         struct nvme_queue *nvmeq;
 147         struct nvme_iod iod[0];
 148 };
 149
 150 /*
 151  * Max size of iod being embedded in the request payload
 152  */
 153 #define NVME_INT_PAGES          2
 154 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 155 #define NVME_INT_MASK           0x01
 156
 157 /*
 158  * Will slightly overestimate the number of pages needed.  This is OK
 159  * as it only leads to a small amount of wasted memory for the lifetime of
 160  * the I/O.
 161  */
 162 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 163 {
 164         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 165         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 166 }
 167
 168 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 169 {
 170         unsigned int ret = sizeof(struct nvme_cmd_info);
 171
 172         ret += sizeof(struct nvme_iod);
 173         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 174         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 175
 176         return ret;
 177 }
 178
 179 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 180                                 unsigned int hctx_idx)
 181 {
 182         struct nvme_dev *dev = data;
 183         struct nvme_queue *nvmeq = dev->queues[0];
 184
 185         WARN_ON(nvmeq->hctx);
 186         nvmeq->hctx = hctx;
 187         hctx->driver_data = nvmeq;
 188         return 0;
 189 }
 190
 191 static int nvme_admin_init_request(void *data, struct request *req,
 192                                 unsigned int hctx_idx, unsigned int rq_idx,
 193                                 unsigned int numa_node)
 194 {
 195         struct nvme_dev *dev = data;
 196         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 197         struct nvme_queue *nvmeq = dev->queues[0];
 198
 199         BUG_ON(!nvmeq);
 200         cmd->nvmeq = nvmeq;
 201         return 0;
 202 }
 203
 204 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 205 {
 206         struct nvme_queue *nvmeq = hctx->driver_data;
 207
 208         nvmeq->hctx = NULL;
 209 }
 210
 211 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 212                           unsigned int hctx_idx)
 213 {
 214         struct nvme_dev *dev = data;
 215         struct nvme_queue *nvmeq = dev->queues[
 216                                         (hctx_idx % dev->queue_count) + 1];
 217
 218         if (!nvmeq->hctx)
 219                 nvmeq->hctx = hctx;
 220
 221         /* nvmeq queues are shared between namespaces. We assume here that
 222          * blk-mq map the tags so they match up with the nvme queue tags. */
 223         WARN_ON(nvmeq->hctx->tags != hctx->tags);
 224
 225         hctx->driver_data = nvmeq;
 226         return 0;
 227 }
 228
 229 static int nvme_init_request(void *data, struct request *req,
 230                                 unsigned int hctx_idx, unsigned int rq_idx,
 231                                 unsigned int numa_node)
 232 {
 233         struct nvme_dev *dev = data;
 234         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 235         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 236
 237         BUG_ON(!nvmeq);
 238         cmd->nvmeq = nvmeq;
 239         return 0;
 240 }
 241
 242 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 243                                 nvme_completion_fn handler)
 244 {
 245         cmd->fn = handler;
 246         cmd->ctx = ctx;
 247         cmd->aborted = 0;
 248         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 249 }
 250
 251 static void *iod_get_private(struct nvme_iod *iod)
 252 {
 253         return (void *) (iod->private & ~0x1UL);
 254 }
 255
 256 /*
 257  * If bit 0 is set, the iod is embedded in the request payload.
 258  */
 259 static bool iod_should_kfree(struct nvme_iod *iod)
 260 {
 261         return (iod->private & NVME_INT_MASK) == 0;
 262 }
 263
 264 /* Special values must be less than 0x1000 */
 265 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 266 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 267 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 268 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 269
 270 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 271                                                 struct nvme_completion *cqe)
 272 {
 273         if (ctx == CMD_CTX_CANCELLED)
 274                 return;
 275         if (ctx == CMD_CTX_COMPLETED) {
 276                 dev_warn(nvmeq->q_dmadev,
 277                                 "completed id %d twice on queue %d\n",
 278                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 279                 return;
 280         }
 281         if (ctx == CMD_CTX_INVALID) {
 282                 dev_warn(nvmeq->q_dmadev,
 283                                 "invalid id %d completed on queue %d\n",
 284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 285                 return;
 286         }
 287         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 288 }
 289
 290 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 291 {
 292         void *ctx;
 293
 294         if (fn)
 295                 *fn = cmd->fn;
 296         ctx = cmd->ctx;
 297         cmd->fn = special_completion;
 298         cmd->ctx = CMD_CTX_CANCELLED;
 299         return ctx;
 300 }
 301
 302 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 303                                                 struct nvme_completion *cqe)
 304 {
 305         u32 result = le32_to_cpup(&cqe->result);
 306         u16 status = le16_to_cpup(&cqe->status) >> 1;
 307
 308         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 309                 ++nvmeq->dev->event_limit;
 310         if (status == NVME_SC_SUCCESS)
 311                 dev_warn(nvmeq->q_dmadev,
 312                         "async event result %08x\n", result);
 313 }
 314
 315 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 316                                                 struct nvme_completion *cqe)
 317 {
 318         struct request *req = ctx;
 319
 320         u16 status = le16_to_cpup(&cqe->status) >> 1;
 321         u32 result = le32_to_cpup(&cqe->result);
 322
 323         blk_mq_free_hctx_request(nvmeq->hctx, req);
 324
 325         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 326         ++nvmeq->dev->abort_limit;
 327 }
 328
 329 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 330                                                 struct nvme_completion *cqe)
 331 {
 332         struct async_cmd_info *cmdinfo = ctx;
 333         cmdinfo->result = le32_to_cpup(&cqe->result);
 334         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 335         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 336         blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
 337 }
 338
 339 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 340                                   unsigned int tag)
 341 {
 342         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
 343         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
 344
 345         return blk_mq_rq_to_pdu(req);
 346 }
 347
 348 /*
 349  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 350  */
 351 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 352                                                 nvme_completion_fn *fn)
 353 {
 354         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 355         void *ctx;
 356         if (tag >= nvmeq->q_depth) {
 357                 *fn = special_completion;
 358                 return CMD_CTX_INVALID;
 359         }
 360         if (fn)
 361                 *fn = cmd->fn;
 362         ctx = cmd->ctx;
 363         cmd->fn = special_completion;
 364         cmd->ctx = CMD_CTX_COMPLETED;
 365         return ctx;
 366 }
 367
 368 /**
 369  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 370  * @nvmeq: The queue to use
 371  * @cmd: The command to send
 372  *
 373  * Safe to use from interrupt context
 374  */
 375 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 376 {
 377         u16 tail = nvmeq->sq_tail;
 378
 379         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 380         if (++tail == nvmeq->q_depth)
 381                 tail = 0;
 382         writel(tail, nvmeq->q_db);
 383         nvmeq->sq_tail = tail;
 384
 385         return 0;
 386 }
 387
 388 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 389 {
 390         unsigned long flags;
 391         int ret;
 392         spin_lock_irqsave(&nvmeq->q_lock, flags);
 393         ret = __nvme_submit_cmd(nvmeq, cmd);
 394         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 395         return ret;
 396 }
 397
 398 static __le64 **iod_list(struct nvme_iod *iod)
 399 {
 400         return ((void *)iod) + iod->offset;
 401 }
 402
 403 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 404                             unsigned nseg, unsigned long private)
 405 {
 406         iod->private = private;
 407         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 408         iod->npages = -1;
 409         iod->length = nbytes;
 410         iod->nents = 0;
 411 }
 412
 413 static struct nvme_iod *
 414 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 415                  unsigned long priv, gfp_t gfp)
 416 {
 417         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 418                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 419                                 sizeof(struct scatterlist) * nseg, gfp);
 420
 421         if (iod)
 422                 iod_init(iod, bytes, nseg, priv);
 423
 424         return iod;
 425 }
 426
 427 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 428                                        gfp_t gfp)
 429 {
 430         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 431                                                 sizeof(struct nvme_dsm_range);
 432         struct nvme_iod *iod;
 433
 434         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 435             size <= NVME_INT_BYTES(dev)) {
 436                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 437
 438                 iod = cmd->iod;
 439                 iod_init(iod, size, rq->nr_phys_segments,
 440                                 (unsigned long) rq | NVME_INT_MASK);
 441                 return iod;
 442         }
 443
 444         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 445                                 (unsigned long) rq, gfp);
 446 }
 447
 448 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 449 {
 450         const int last_prp = dev->page_size / 8 - 1;
 451         int i;
 452         __le64 **list = iod_list(iod);
 453         dma_addr_t prp_dma = iod->first_dma;
 454
 455         if (iod->npages == 0)
 456                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 457         for (i = 0; i < iod->npages; i++) {
 458                 __le64 *prp_list = list[i];
 459                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 460                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 461                 prp_dma = next_prp_dma;
 462         }
 463
 464         if (iod_should_kfree(iod))
 465                 kfree(iod);
 466 }
 467
 468 static int nvme_error_status(u16 status)
 469 {
 470         switch (status & 0x7ff) {
 471         case NVME_SC_SUCCESS:
 472                 return 0;
 473         case NVME_SC_CAP_EXCEEDED:
 474                 return -ENOSPC;
 475         default:
 476                 return -EIO;
 477         }
 478 }
 479
 480 #ifdef CONFIG_BLK_DEV_INTEGRITY
 481 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 482 {
 483         if (be32_to_cpu(pi->ref_tag) == v)
 484                 pi->ref_tag = cpu_to_be32(p);
 485 }
 486
 487 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 488 {
 489         if (be32_to_cpu(pi->ref_tag) == p)
 490                 pi->ref_tag = cpu_to_be32(v);
 491 }
 492
 493 /**
 494  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 495  *
 496  * The virtual start sector is the one that was originally submitted by the
 497  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 498  * start sector may be different. Remap protection information to match the
 499  * physical LBA on writes, and back to the original seed on reads.
 500  *
 501  * Type 0 and 3 do not have a ref tag, so no remapping required.
 502  */
 503 static void nvme_dif_remap(struct request *req,
 504                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 505 {
 506         struct nvme_ns *ns = req->rq_disk->private_data;
 507         struct bio_integrity_payload *bip;
 508         struct t10_pi_tuple *pi;
 509         void *p, *pmap;
 510         u32 i, nlb, ts, phys, virt;
 511
 512         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 513                 return;
 514
 515         bip = bio_integrity(req->bio);
 516         if (!bip)
 517                 return;
 518
 519         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 520
 521         p = pmap;
 522         virt = bip_get_seed(bip);
 523         phys = nvme_block_nr(ns, blk_rq_pos(req));
 524         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 525         ts = ns->disk->integrity->tuple_size;
 526
 527         for (i = 0; i < nlb; i++, virt++, phys++) {
 528                 pi = (struct t10_pi_tuple *)p;
 529                 dif_swap(phys, virt, pi);
 530                 p += ts;
 531         }
 532         kunmap_atomic(pmap);
 533 }
 534
 535 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 536 {
 537         return 0;
 538 }
 539
 540 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 541 {
 542         return 0;
 543 }
 544
 545 struct blk_integrity nvme_meta_noop = {
 546         .name                   = "NVME_META_NOOP",
 547         .generate_fn            = nvme_noop_generate,
 548         .verify_fn              = nvme_noop_verify,
 549 };
 550
 551 static void nvme_init_integrity(struct nvme_ns *ns)
 552 {
 553         struct blk_integrity integrity;
 554
 555         switch (ns->pi_type) {
 556         case NVME_NS_DPS_PI_TYPE3:
 557                 integrity = t10_pi_type3_crc;
 558                 break;
 559         case NVME_NS_DPS_PI_TYPE1:
 560         case NVME_NS_DPS_PI_TYPE2:
 561                 integrity = t10_pi_type1_crc;
 562                 break;
 563         default:
 564                 integrity = nvme_meta_noop;
 565                 break;
 566         }
 567         integrity.tuple_size = ns->ms;
 568         blk_integrity_register(ns->disk, &integrity);
 569         blk_queue_max_integrity_segments(ns->queue, 1);
 570 }
 571 #else /* CONFIG_BLK_DEV_INTEGRITY */
 572 static void nvme_dif_remap(struct request *req,
 573                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 574 {
 575 }
 576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 577 {
 578 }
 579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 580 {
 581 }
 582 static void nvme_init_integrity(struct nvme_ns *ns)
 583 {
 584 }
 585 #endif
 586
 587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 588                                                 struct nvme_completion *cqe)
 589 {
 590         struct nvme_iod *iod = ctx;
 591         struct request *req = iod_get_private(iod);
 592         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 593
 594         u16 status = le16_to_cpup(&cqe->status) >> 1;
 595
 596         if (unlikely(status)) {
 597                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 598                     && (jiffies - req->start_time) < req->timeout) {
 599                         unsigned long flags;
 600
 601                         blk_mq_requeue_request(req);
 602                         spin_lock_irqsave(req->q->queue_lock, flags);
 603                         if (!blk_queue_stopped(req->q))
 604                                 blk_mq_kick_requeue_list(req->q);
 605                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 606                         return;
 607                 }
 608                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 609                         req->errors = status;
 610                 } else {
 611                         req->errors = nvme_error_status(status);
 612                 }
 613         } else
 614                 req->errors = 0;
 615         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 616                 u32 result = le32_to_cpup(&cqe->result);
 617                 req->special = (void *)(uintptr_t)result;
 618         }
 619
 620         if (cmd_rq->aborted)
 621                 dev_warn(nvmeq->dev->dev,
 622                         "completing aborted command with status:%04x\n",
 623                         status);
 624
 625         if (iod->nents) {
 626                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 627                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 628                 if (blk_integrity_rq(req)) {
 629                         if (!rq_data_dir(req))
 630                                 nvme_dif_remap(req, nvme_dif_complete);
 631                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 632                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 633                 }
 634         }
 635         nvme_free_iod(nvmeq->dev, iod);
 636
 637         blk_mq_complete_request(req);
 638 }
 639
 640 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 641 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 642                 int total_len, gfp_t gfp)
 643 {
 644         struct dma_pool *pool;
 645         int length = total_len;
 646         struct scatterlist *sg = iod->sg;
 647         int dma_len = sg_dma_len(sg);
 648         u64 dma_addr = sg_dma_address(sg);
 649         u32 page_size = dev->page_size;
 650         int offset = dma_addr & (page_size - 1);
 651         __le64 *prp_list;
 652         __le64 **list = iod_list(iod);
 653         dma_addr_t prp_dma;
 654         int nprps, i;
 655
 656         length -= (page_size - offset);
 657         if (length <= 0)
 658                 return total_len;
 659
 660         dma_len -= (page_size - offset);
 661         if (dma_len) {
 662                 dma_addr += (page_size - offset);
 663         } else {
 664                 sg = sg_next(sg);
 665                 dma_addr = sg_dma_address(sg);
 666                 dma_len = sg_dma_len(sg);
 667         }
 668
 669         if (length <= page_size) {
 670                 iod->first_dma = dma_addr;
 671                 return total_len;
 672         }
 673
 674         nprps = DIV_ROUND_UP(length, page_size);
 675         if (nprps <= (256 / 8)) {
 676                 pool = dev->prp_small_pool;
 677                 iod->npages = 0;
 678         } else {
 679                 pool = dev->prp_page_pool;
 680                 iod->npages = 1;
 681         }
 682
 683         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 684         if (!prp_list) {
 685                 iod->first_dma = dma_addr;
 686                 iod->npages = -1;
 687                 return (total_len - length) + page_size;
 688         }
 689         list[0] = prp_list;
 690         iod->first_dma = prp_dma;
 691         i = 0;
 692         for (;;) {
 693                 if (i == page_size >> 3) {
 694                         __le64 *old_prp_list = prp_list;
 695                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 696                         if (!prp_list)
 697                                 return total_len - length;
 698                         list[iod->npages++] = prp_list;
 699                         prp_list[0] = old_prp_list[i - 1];
 700                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 701                         i = 1;
 702                 }
 703                 prp_list[i++] = cpu_to_le64(dma_addr);
 704                 dma_len -= page_size;
 705                 dma_addr += page_size;
 706                 length -= page_size;
 707                 if (length <= 0)
 708                         break;
 709                 if (dma_len > 0)
 710                         continue;
 711                 BUG_ON(dma_len < 0);
 712                 sg = sg_next(sg);
 713                 dma_addr = sg_dma_address(sg);
 714                 dma_len = sg_dma_len(sg);
 715         }
 716
 717         return total_len;
 718 }
 719
 720 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 721                 struct nvme_iod *iod)
 722 {
 723         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 724
 725         memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
 726         cmnd->rw.command_id = req->tag;
 727         if (req->nr_phys_segments) {
 728                 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 729                 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 730         }
 731
 732         if (++nvmeq->sq_tail == nvmeq->q_depth)
 733                 nvmeq->sq_tail = 0;
 734         writel(nvmeq->sq_tail, nvmeq->q_db);
 735 }
 736
 737 /*
 738  * We reuse the small pool to allocate the 16-byte range here as it is not
 739  * worth having a special pool for these or additional cases to handle freeing
 740  * the iod.
 741  */
 742 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 743                 struct request *req, struct nvme_iod *iod)
 744 {
 745         struct nvme_dsm_range *range =
 746                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 747         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 748
 749         range->cattr = cpu_to_le32(0);
 750         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 751         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 752
 753         memset(cmnd, 0, sizeof(*cmnd));
 754         cmnd->dsm.opcode = nvme_cmd_dsm;
 755         cmnd->dsm.command_id = req->tag;
 756         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 757         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 758         cmnd->dsm.nr = 0;
 759         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 760
 761         if (++nvmeq->sq_tail == nvmeq->q_depth)
 762                 nvmeq->sq_tail = 0;
 763         writel(nvmeq->sq_tail, nvmeq->q_db);
 764 }
 765
 766 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 767                                                                 int cmdid)
 768 {
 769         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 770
 771         memset(cmnd, 0, sizeof(*cmnd));
 772         cmnd->common.opcode = nvme_cmd_flush;
 773         cmnd->common.command_id = cmdid;
 774         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 775
 776         if (++nvmeq->sq_tail == nvmeq->q_depth)
 777                 nvmeq->sq_tail = 0;
 778         writel(nvmeq->sq_tail, nvmeq->q_db);
 779 }
 780
 781 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 782                                                         struct nvme_ns *ns)
 783 {
 784         struct request *req = iod_get_private(iod);
 785         struct nvme_command *cmnd;
 786         u16 control = 0;
 787         u32 dsmgmt = 0;
 788
 789         if (req->cmd_flags & REQ_FUA)
 790                 control |= NVME_RW_FUA;
 791         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 792                 control |= NVME_RW_LR;
 793
 794         if (req->cmd_flags & REQ_RAHEAD)
 795                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 796
 797         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 798         memset(cmnd, 0, sizeof(*cmnd));
 799
 800         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 801         cmnd->rw.command_id = req->tag;
 802         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 803         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 804         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 805         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 806         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 807
 808         if (blk_integrity_rq(req)) {
 809                 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
 810                 switch (ns->pi_type) {
 811                 case NVME_NS_DPS_PI_TYPE3:
 812                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 813                         break;
 814                 case NVME_NS_DPS_PI_TYPE1:
 815                 case NVME_NS_DPS_PI_TYPE2:
 816                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 817                                         NVME_RW_PRINFO_PRCHK_REF;
 818                         cmnd->rw.reftag = cpu_to_le32(
 819                                         nvme_block_nr(ns, blk_rq_pos(req)));
 820                         break;
 821                 }
 822         } else if (ns->ms)
 823                 control |= NVME_RW_PRINFO_PRACT;
 824
 825         cmnd->rw.control = cpu_to_le16(control);
 826         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 827
 828         if (++nvmeq->sq_tail == nvmeq->q_depth)
 829                 nvmeq->sq_tail = 0;
 830         writel(nvmeq->sq_tail, nvmeq->q_db);
 831
 832         return 0;
 833 }
 834
 835 /*
 836  * NOTE: ns is NULL when called on the admin queue.
 837  */
 838 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 839                          const struct blk_mq_queue_data *bd)
 840 {
 841         struct nvme_ns *ns = hctx->queue->queuedata;
 842         struct nvme_queue *nvmeq = hctx->driver_data;
 843         struct nvme_dev *dev = nvmeq->dev;
 844         struct request *req = bd->rq;
 845         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 846         struct nvme_iod *iod;
 847         enum dma_data_direction dma_dir;
 848
 849         /*
 850          * If formated with metadata, require the block layer provide a buffer
 851          * unless this namespace is formated such that the metadata can be
 852          * stripped/generated by the controller with PRACT=1.
 853          */
 854         if (ns && ns->ms && !blk_integrity_rq(req)) {
 855                 if (!(ns->pi_type && ns->ms == 8)) {
 856                         req->errors = -EFAULT;
 857                         blk_mq_complete_request(req);
 858                         return BLK_MQ_RQ_QUEUE_OK;
 859                 }
 860         }
 861
 862         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 863         if (!iod)
 864                 return BLK_MQ_RQ_QUEUE_BUSY;
 865
 866         if (req->cmd_flags & REQ_DISCARD) {
 867                 void *range;
 868                 /*
 869                  * We reuse the small pool to allocate the 16-byte range here
 870                  * as it is not worth having a special pool for these or
 871                  * additional cases to handle freeing the iod.
 872                  */
 873                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 874                                                 &iod->first_dma);
 875                 if (!range)
 876                         goto retry_cmd;
 877                 iod_list(iod)[0] = (__le64 *)range;
 878                 iod->npages = 0;
 879         } else if (req->nr_phys_segments) {
 880                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 881
 882                 sg_init_table(iod->sg, req->nr_phys_segments);
 883                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 884                 if (!iod->nents)
 885                         goto error_cmd;
 886
 887                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 888                         goto retry_cmd;
 889
 890                 if (blk_rq_bytes(req) !=
 891                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 892                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 893                         goto retry_cmd;
 894                 }
 895                 if (blk_integrity_rq(req)) {
 896                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 897                                 goto error_cmd;
 898
 899                         sg_init_table(iod->meta_sg, 1);
 900                         if (blk_rq_map_integrity_sg(
 901                                         req->q, req->bio, iod->meta_sg) != 1)
 902                                 goto error_cmd;
 903
 904                         if (rq_data_dir(req))
 905                                 nvme_dif_remap(req, nvme_dif_prep);
 906
 907                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 908                                 goto error_cmd;
 909                 }
 910         }
 911
 912         nvme_set_info(cmd, iod, req_completion);
 913         spin_lock_irq(&nvmeq->q_lock);
 914         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 915                 nvme_submit_priv(nvmeq, req, iod);
 916         else if (req->cmd_flags & REQ_DISCARD)
 917                 nvme_submit_discard(nvmeq, ns, req, iod);
 918         else if (req->cmd_flags & REQ_FLUSH)
 919                 nvme_submit_flush(nvmeq, ns, req->tag);
 920         else
 921                 nvme_submit_iod(nvmeq, iod, ns);
 922
 923         nvme_process_cq(nvmeq);
 924         spin_unlock_irq(&nvmeq->q_lock);
 925         return BLK_MQ_RQ_QUEUE_OK;
 926
 927  error_cmd:
 928         nvme_free_iod(dev, iod);
 929         return BLK_MQ_RQ_QUEUE_ERROR;
 930  retry_cmd:
 931         nvme_free_iod(dev, iod);
 932         return BLK_MQ_RQ_QUEUE_BUSY;
 933 }
 934
 935 static int nvme_process_cq(struct nvme_queue *nvmeq)
 936 {
 937         u16 head, phase;
 938
 939         head = nvmeq->cq_head;
 940         phase = nvmeq->cq_phase;
 941
 942         for (;;) {
 943                 void *ctx;
 944                 nvme_completion_fn fn;
 945                 struct nvme_completion cqe = nvmeq->cqes[head];
 946                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 947                         break;
 948                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 949                 if (++head == nvmeq->q_depth) {
 950                         head = 0;
 951                         phase = !phase;
 952                 }
 953                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 954                 fn(nvmeq, ctx, &cqe);
 955         }
 956
 957         /* If the controller ignores the cq head doorbell and continuously
 958          * writes to the queue, it is theoretically possible to wrap around
 959          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 960          * requires that 0.1% of your interrupts are handled, so this isn't
 961          * a big problem.
 962          */
 963         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 964                 return 0;
 965
 966         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 967         nvmeq->cq_head = head;
 968         nvmeq->cq_phase = phase;
 969
 970         nvmeq->cqe_seen = 1;
 971         return 1;
 972 }
 973
 974 static irqreturn_t nvme_irq(int irq, void *data)
 975 {
 976         irqreturn_t result;
 977         struct nvme_queue *nvmeq = data;
 978         spin_lock(&nvmeq->q_lock);
 979         nvme_process_cq(nvmeq);
 980         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 981         nvmeq->cqe_seen = 0;
 982         spin_unlock(&nvmeq->q_lock);
 983         return result;
 984 }
 985
 986 static irqreturn_t nvme_irq_check(int irq, void *data)
 987 {
 988         struct nvme_queue *nvmeq = data;
 989         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 990         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 991                 return IRQ_NONE;
 992         return IRQ_WAKE_THREAD;
 993 }
 994
 995 /*
 996  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 997  * if the result is positive, it's an NVM Express status code
 998  */
 999 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1000                 void *buffer, void __user *ubuffer, unsigned bufflen,
1001                 u32 *result, unsigned timeout)
1002 {
1003         bool write = cmd->common.opcode & 1;
1004         struct bio *bio = NULL;
1005         struct request *req;
1006         int ret;
1007
1008         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1009         if (IS_ERR(req))
1010                 return PTR_ERR(req);
1011
1012         req->cmd_type = REQ_TYPE_DRV_PRIV;
1013         req->cmd_flags = REQ_FAILFAST_DRIVER;
1014         req->__data_len = 0;
1015         req->__sector = (sector_t) -1;
1016         req->bio = req->biotail = NULL;
1017
1018         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1019
1020         req->cmd = (unsigned char *)cmd;
1021         req->cmd_len = sizeof(struct nvme_command);
1022         req->special = (void *)0;
1023
1024         if (buffer && bufflen) {
1025                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1026                 if (ret)
1027                         goto out;
1028         } else if (ubuffer && bufflen) {
1029                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1030                 if (ret)
1031                         goto out;
1032                 bio = req->bio;
1033         }
1034
1035         blk_execute_rq(req->q, NULL, req, 0);
1036         if (bio)
1037                 blk_rq_unmap_user(bio);
1038         if (result)
1039                 *result = (u32)(uintptr_t)req->special;
1040         ret = req->errors;
1041  out:
1042         blk_mq_free_request(req);
1043         return ret;
1044 }
1045
1046 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1047                 void *buffer, unsigned bufflen)
1048 {
1049         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1050 }
1051
1052 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1053 {
1054         struct nvme_queue *nvmeq = dev->queues[0];
1055         struct nvme_command c;
1056         struct nvme_cmd_info *cmd_info;
1057         struct request *req;
1058
1059         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1060         if (IS_ERR(req))
1061                 return PTR_ERR(req);
1062
1063         req->cmd_flags |= REQ_NO_TIMEOUT;
1064         cmd_info = blk_mq_rq_to_pdu(req);
1065         nvme_set_info(cmd_info, NULL, async_req_completion);
1066
1067         memset(&c, 0, sizeof(c));
1068         c.common.opcode = nvme_admin_async_event;
1069         c.common.command_id = req->tag;
1070
1071         blk_mq_free_hctx_request(nvmeq->hctx, req);
1072         return __nvme_submit_cmd(nvmeq, &c);
1073 }
1074
1075 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1076                         struct nvme_command *cmd,
1077                         struct async_cmd_info *cmdinfo, unsigned timeout)
1078 {
1079         struct nvme_queue *nvmeq = dev->queues[0];
1080         struct request *req;
1081         struct nvme_cmd_info *cmd_rq;
1082
1083         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1084         if (IS_ERR(req))
1085                 return PTR_ERR(req);
1086
1087         req->timeout = timeout;
1088         cmd_rq = blk_mq_rq_to_pdu(req);
1089         cmdinfo->req = req;
1090         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1091         cmdinfo->status = -EINTR;
1092
1093         cmd->common.command_id = req->tag;
1094
1095         return nvme_submit_cmd(nvmeq, cmd);
1096 }
1097
1098 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1099 {
1100         struct nvme_command c;
1101
1102         memset(&c, 0, sizeof(c));
1103         c.delete_queue.opcode = opcode;
1104         c.delete_queue.qid = cpu_to_le16(id);
1105
1106         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1107 }
1108
1109 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1110                                                 struct nvme_queue *nvmeq)
1111 {
1112         struct nvme_command c;
1113         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1114
1115         /*
1116          * Note: we (ab)use the fact the the prp fields survive if no data
1117          * is attached to the request.
1118          */
1119         memset(&c, 0, sizeof(c));
1120         c.create_cq.opcode = nvme_admin_create_cq;
1121         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1122         c.create_cq.cqid = cpu_to_le16(qid);
1123         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1124         c.create_cq.cq_flags = cpu_to_le16(flags);
1125         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1126
1127         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1128 }
1129
1130 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1131                                                 struct nvme_queue *nvmeq)
1132 {
1133         struct nvme_command c;
1134         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1135
1136         /*
1137          * Note: we (ab)use the fact the the prp fields survive if no data
1138          * is attached to the request.
1139          */
1140         memset(&c, 0, sizeof(c));
1141         c.create_sq.opcode = nvme_admin_create_sq;
1142         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1143         c.create_sq.sqid = cpu_to_le16(qid);
1144         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1145         c.create_sq.sq_flags = cpu_to_le16(flags);
1146         c.create_sq.cqid = cpu_to_le16(qid);
1147
1148         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1149 }
1150
1151 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1152 {
1153         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1154 }
1155
1156 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1157 {
1158         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1159 }
1160
1161 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1162 {
1163         struct nvme_command c = {
1164                 .identify.opcode = nvme_admin_identify,
1165                 .identify.cns = cpu_to_le32(1),
1166         };
1167         int error;
1168
1169         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1170         if (!*id)
1171                 return -ENOMEM;
1172
1173         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1174                         sizeof(struct nvme_id_ctrl));
1175         if (error)
1176                 kfree(*id);
1177         return error;
1178 }
1179
1180 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1181                 struct nvme_id_ns **id)
1182 {
1183         struct nvme_command c = {
1184                 .identify.opcode = nvme_admin_identify,
1185                 .identify.nsid = cpu_to_le32(nsid),
1186         };
1187         int error;
1188
1189         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1190         if (!*id)
1191                 return -ENOMEM;
1192
1193         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1194                         sizeof(struct nvme_id_ns));
1195         if (error)
1196                 kfree(*id);
1197         return error;
1198 }
1199
1200 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1201                                         dma_addr_t dma_addr, u32 *result)
1202 {
1203         struct nvme_command c;
1204
1205         memset(&c, 0, sizeof(c));
1206         c.features.opcode = nvme_admin_get_features;
1207         c.features.nsid = cpu_to_le32(nsid);
1208         c.features.prp1 = cpu_to_le64(dma_addr);
1209         c.features.fid = cpu_to_le32(fid);
1210
1211         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1212                         result, 0);
1213 }
1214
1215 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1216                                         dma_addr_t dma_addr, u32 *result)
1217 {
1218         struct nvme_command c;
1219
1220         memset(&c, 0, sizeof(c));
1221         c.features.opcode = nvme_admin_set_features;
1222         c.features.prp1 = cpu_to_le64(dma_addr);
1223         c.features.fid = cpu_to_le32(fid);
1224         c.features.dword11 = cpu_to_le32(dword11);
1225
1226         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1227                         result, 0);
1228 }
1229
1230 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1231 {
1232         struct nvme_command c = {
1233                 .common.opcode = nvme_admin_get_log_page,
1234                 .common.nsid = cpu_to_le32(0xFFFFFFFF),
1235                 .common.cdw10[0] = cpu_to_le32(
1236                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1237                          NVME_LOG_SMART),
1238         };
1239         int error;
1240
1241         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1242         if (!*log)
1243                 return -ENOMEM;
1244
1245         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1246                         sizeof(struct nvme_smart_log));
1247         if (error)
1248                 kfree(*log);
1249         return error;
1250 }
1251
1252 /**
1253  * nvme_abort_req - Attempt aborting a request
1254  *
1255  * Schedule controller reset if the command was already aborted once before and
1256  * still hasn't been returned to the driver, or if this is the admin queue.
1257  */
1258 static void nvme_abort_req(struct request *req)
1259 {
1260         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1261         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1262         struct nvme_dev *dev = nvmeq->dev;
1263         struct request *abort_req;
1264         struct nvme_cmd_info *abort_cmd;
1265         struct nvme_command cmd;
1266
1267         if (!nvmeq->qid || cmd_rq->aborted) {
1268                 unsigned long flags;
1269
1270                 spin_lock_irqsave(&dev_list_lock, flags);
1271                 if (work_busy(&dev->reset_work))
1272                         goto out;
1273                 list_del_init(&dev->node);
1274                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1275                                                         req->tag, nvmeq->qid);
1276                 dev->reset_workfn = nvme_reset_failed_dev;
1277                 queue_work(nvme_workq, &dev->reset_work);
1278  out:
1279                 spin_unlock_irqrestore(&dev_list_lock, flags);
1280                 return;
1281         }
1282
1283         if (!dev->abort_limit)
1284                 return;
1285
1286         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1287                                                                         false);
1288         if (IS_ERR(abort_req))
1289                 return;
1290
1291         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1292         nvme_set_info(abort_cmd, abort_req, abort_completion);
1293
1294         memset(&cmd, 0, sizeof(cmd));
1295         cmd.abort.opcode = nvme_admin_abort_cmd;
1296         cmd.abort.cid = req->tag;
1297         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1298         cmd.abort.command_id = abort_req->tag;
1299
1300         --dev->abort_limit;
1301         cmd_rq->aborted = 1;
1302
1303         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1304                                                         nvmeq->qid);
1305         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1306                 dev_warn(nvmeq->q_dmadev,
1307                                 "Could not abort I/O %d QID %d",
1308                                 req->tag, nvmeq->qid);
1309                 blk_mq_free_request(abort_req);
1310         }
1311 }
1312
1313 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1314                                 struct request *req, void *data, bool reserved)
1315 {
1316         struct nvme_queue *nvmeq = data;
1317         void *ctx;
1318         nvme_completion_fn fn;
1319         struct nvme_cmd_info *cmd;
1320         struct nvme_completion cqe;
1321
1322         if (!blk_mq_request_started(req))
1323                 return;
1324
1325         cmd = blk_mq_rq_to_pdu(req);
1326
1327         if (cmd->ctx == CMD_CTX_CANCELLED)
1328                 return;
1329
1330         if (blk_queue_dying(req->q))
1331                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1332         else
1333                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1334
1335
1336         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1337                                                 req->tag, nvmeq->qid);
1338         ctx = cancel_cmd_info(cmd, &fn);
1339         fn(nvmeq, ctx, &cqe);
1340 }
1341
1342 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1343 {
1344         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1345         struct nvme_queue *nvmeq = cmd->nvmeq;
1346
1347         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1348                                                         nvmeq->qid);
1349         spin_lock_irq(&nvmeq->q_lock);
1350         nvme_abort_req(req);
1351         spin_unlock_irq(&nvmeq->q_lock);
1352
1353         /*
1354          * The aborted req will be completed on receiving the abort req.
1355          * We enable the timer again. If hit twice, it'll cause a device reset,
1356          * as the device then is in a faulty state.
1357          */
1358         return BLK_EH_RESET_TIMER;
1359 }
1360
1361 static void nvme_free_queue(struct nvme_queue *nvmeq)
1362 {
1363         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1364                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1365         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1366                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1367         kfree(nvmeq);
1368 }
1369
1370 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1371 {
1372         int i;
1373
1374         for (i = dev->queue_count - 1; i >= lowest; i--) {
1375                 struct nvme_queue *nvmeq = dev->queues[i];
1376                 dev->queue_count--;
1377                 dev->queues[i] = NULL;
1378                 nvme_free_queue(nvmeq);
1379         }
1380 }
1381
1382 /**
1383  * nvme_suspend_queue - put queue into suspended state
1384  * @nvmeq - queue to suspend
1385  */
1386 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1387 {
1388         int vector;
1389
1390         spin_lock_irq(&nvmeq->q_lock);
1391         if (nvmeq->cq_vector == -1) {
1392                 spin_unlock_irq(&nvmeq->q_lock);
1393                 return 1;
1394         }
1395         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1396         nvmeq->dev->online_queues--;
1397         nvmeq->cq_vector = -1;
1398         spin_unlock_irq(&nvmeq->q_lock);
1399
1400         if (!nvmeq->qid && nvmeq->dev->admin_q)
1401                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1402
1403         irq_set_affinity_hint(vector, NULL);
1404         free_irq(vector, nvmeq);
1405
1406         return 0;
1407 }
1408
1409 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1410 {
1411         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1412
1413         spin_lock_irq(&nvmeq->q_lock);
1414         if (hctx && hctx->tags)
1415                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1416         spin_unlock_irq(&nvmeq->q_lock);
1417 }
1418
1419 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1420 {
1421         struct nvme_queue *nvmeq = dev->queues[qid];
1422
1423         if (!nvmeq)
1424                 return;
1425         if (nvme_suspend_queue(nvmeq))
1426                 return;
1427
1428         /* Don't tell the adapter to delete the admin queue.
1429          * Don't tell a removed adapter to delete IO queues. */
1430         if (qid && readl(&dev->bar->csts) != -1) {
1431                 adapter_delete_sq(dev, qid);
1432                 adapter_delete_cq(dev, qid);
1433         }
1434
1435         spin_lock_irq(&nvmeq->q_lock);
1436         nvme_process_cq(nvmeq);
1437         spin_unlock_irq(&nvmeq->q_lock);
1438 }
1439
1440 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1441                                                         int depth)
1442 {
1443         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1444         if (!nvmeq)
1445                 return NULL;
1446
1447         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1448                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1449         if (!nvmeq->cqes)
1450                 goto free_nvmeq;
1451
1452         nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1453                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1454         if (!nvmeq->sq_cmds)
1455                 goto free_cqdma;
1456
1457         nvmeq->q_dmadev = dev->dev;
1458         nvmeq->dev = dev;
1459         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1460                         dev->instance, qid);
1461         spin_lock_init(&nvmeq->q_lock);
1462         nvmeq->cq_head = 0;
1463         nvmeq->cq_phase = 1;
1464         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1465         nvmeq->q_depth = depth;
1466         nvmeq->qid = qid;
1467         dev->queue_count++;
1468         dev->queues[qid] = nvmeq;
1469
1470         return nvmeq;
1471
1472  free_cqdma:
1473         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1474                                                         nvmeq->cq_dma_addr);
1475  free_nvmeq:
1476         kfree(nvmeq);
1477         return NULL;
1478 }
1479
1480 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1481                                                         const char *name)
1482 {
1483         if (use_threaded_interrupts)
1484                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1485                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1486                                         name, nvmeq);
1487         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1488                                 IRQF_SHARED, name, nvmeq);
1489 }
1490
1491 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1492 {
1493         struct nvme_dev *dev = nvmeq->dev;
1494
1495         spin_lock_irq(&nvmeq->q_lock);
1496         nvmeq->sq_tail = 0;
1497         nvmeq->cq_head = 0;
1498         nvmeq->cq_phase = 1;
1499         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1500         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1501         dev->online_queues++;
1502         spin_unlock_irq(&nvmeq->q_lock);
1503 }
1504
1505 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1506 {
1507         struct nvme_dev *dev = nvmeq->dev;
1508         int result;
1509
1510         nvmeq->cq_vector = qid - 1;
1511         result = adapter_alloc_cq(dev, qid, nvmeq);
1512         if (result < 0)
1513                 return result;
1514
1515         result = adapter_alloc_sq(dev, qid, nvmeq);
1516         if (result < 0)
1517                 goto release_cq;
1518
1519         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1520         if (result < 0)
1521                 goto release_sq;
1522
1523         nvme_init_queue(nvmeq, qid);
1524         return result;
1525
1526  release_sq:
1527         adapter_delete_sq(dev, qid);
1528  release_cq:
1529         adapter_delete_cq(dev, qid);
1530         return result;
1531 }
1532
1533 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1534 {
1535         unsigned long timeout;
1536         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1537
1538         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1539
1540         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1541                 msleep(100);
1542                 if (fatal_signal_pending(current))
1543                         return -EINTR;
1544                 if (time_after(jiffies, timeout)) {
1545                         dev_err(dev->dev,
1546                                 "Device not ready; aborting %s\n", enabled ?
1547                                                 "initialisation" : "reset");
1548                         return -ENODEV;
1549                 }
1550         }
1551
1552         return 0;
1553 }
1554
1555 /*
1556  * If the device has been passed off to us in an enabled state, just clear
1557  * the enabled bit.  The spec says we should set the 'shutdown notification
1558  * bits', but doing so may cause the device to complete commands to the
1559  * admin queue ... and we don't know what memory that might be pointing at!
1560  */
1561 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1562 {
1563         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1564         dev->ctrl_config &= ~NVME_CC_ENABLE;
1565         writel(dev->ctrl_config, &dev->bar->cc);
1566
1567         return nvme_wait_ready(dev, cap, false);
1568 }
1569
1570 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1571 {
1572         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1573         dev->ctrl_config |= NVME_CC_ENABLE;
1574         writel(dev->ctrl_config, &dev->bar->cc);
1575
1576         return nvme_wait_ready(dev, cap, true);
1577 }
1578
1579 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1580 {
1581         unsigned long timeout;
1582
1583         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1584         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1585
1586         writel(dev->ctrl_config, &dev->bar->cc);
1587
1588         timeout = SHUTDOWN_TIMEOUT + jiffies;
1589         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1590                                                         NVME_CSTS_SHST_CMPLT) {
1591                 msleep(100);
1592                 if (fatal_signal_pending(current))
1593                         return -EINTR;
1594                 if (time_after(jiffies, timeout)) {
1595                         dev_err(dev->dev,
1596                                 "Device shutdown incomplete; abort shutdown\n");
1597                         return -ENODEV;
1598                 }
1599         }
1600
1601         return 0;
1602 }
1603
1604 static struct blk_mq_ops nvme_mq_admin_ops = {
1605         .queue_rq       = nvme_queue_rq,
1606         .map_queue      = blk_mq_map_queue,
1607         .init_hctx      = nvme_admin_init_hctx,
1608         .exit_hctx      = nvme_exit_hctx,
1609         .init_request   = nvme_admin_init_request,
1610         .timeout        = nvme_timeout,
1611 };
1612
1613 static struct blk_mq_ops nvme_mq_ops = {
1614         .queue_rq       = nvme_queue_rq,
1615         .map_queue      = blk_mq_map_queue,
1616         .init_hctx      = nvme_init_hctx,
1617         .exit_hctx      = nvme_exit_hctx,
1618         .init_request   = nvme_init_request,
1619         .timeout        = nvme_timeout,
1620 };
1621
1622 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1623 {
1624         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1625                 blk_cleanup_queue(dev->admin_q);
1626                 blk_mq_free_tag_set(&dev->admin_tagset);
1627         }
1628 }
1629
1630 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1631 {
1632         if (!dev->admin_q) {
1633                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1634                 dev->admin_tagset.nr_hw_queues = 1;
1635                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1636                 dev->admin_tagset.reserved_tags = 1;
1637                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1638                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1639                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1640                 dev->admin_tagset.driver_data = dev;
1641
1642                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1643                         return -ENOMEM;
1644
1645                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1646                 if (IS_ERR(dev->admin_q)) {
1647                         blk_mq_free_tag_set(&dev->admin_tagset);
1648                         return -ENOMEM;
1649                 }
1650                 if (!blk_get_queue(dev->admin_q)) {
1651                         nvme_dev_remove_admin(dev);
1652                         return -ENODEV;
1653                 }
1654         } else
1655                 blk_mq_unfreeze_queue(dev->admin_q);
1656
1657         return 0;
1658 }
1659
1660 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1661 {
1662         int result;
1663         u32 aqa;
1664         u64 cap = readq(&dev->bar->cap);
1665         struct nvme_queue *nvmeq;
1666         unsigned page_shift = PAGE_SHIFT;
1667         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1668         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1669
1670         if (page_shift < dev_page_min) {
1671                 dev_err(dev->dev,
1672                                 "Minimum device page size (%u) too large for "
1673                                 "host (%u)\n", 1 << dev_page_min,
1674                                 1 << page_shift);
1675                 return -ENODEV;
1676         }
1677         if (page_shift > dev_page_max) {
1678                 dev_info(dev->dev,
1679                                 "Device maximum page size (%u) smaller than "
1680                                 "host (%u); enabling work-around\n",
1681                                 1 << dev_page_max, 1 << page_shift);
1682                 page_shift = dev_page_max;
1683         }
1684
1685         result = nvme_disable_ctrl(dev, cap);
1686         if (result < 0)
1687                 return result;
1688
1689         nvmeq = dev->queues[0];
1690         if (!nvmeq) {
1691                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1692                 if (!nvmeq)
1693                         return -ENOMEM;
1694         }
1695
1696         aqa = nvmeq->q_depth - 1;
1697         aqa |= aqa << 16;
1698
1699         dev->page_size = 1 << page_shift;
1700
1701         dev->ctrl_config = NVME_CC_CSS_NVM;
1702         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1703         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1704         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1705
1706         writel(aqa, &dev->bar->aqa);
1707         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1708         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1709
1710         result = nvme_enable_ctrl(dev, cap);
1711         if (result)
1712                 goto free_nvmeq;
1713
1714         nvmeq->cq_vector = 0;
1715         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1716         if (result)
1717                 goto free_nvmeq;
1718
1719         return result;
1720
1721  free_nvmeq:
1722         nvme_free_queues(dev, 0);
1723         return result;
1724 }
1725
1726 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1727 {
1728         struct nvme_dev *dev = ns->dev;
1729         struct nvme_user_io io;
1730         struct nvme_command c;
1731         unsigned length, meta_len;
1732         int status, write;
1733         dma_addr_t meta_dma = 0;
1734         void *meta = NULL;
1735
1736         if (copy_from_user(&io, uio, sizeof(io)))
1737                 return -EFAULT;
1738
1739         switch (io.opcode) {
1740         case nvme_cmd_write:
1741         case nvme_cmd_read:
1742         case nvme_cmd_compare:
1743                 break;
1744         default:
1745                 return -EINVAL;
1746         }
1747
1748         length = (io.nblocks + 1) << ns->lba_shift;
1749         meta_len = (io.nblocks + 1) * ns->ms;
1750         write = io.opcode & 1;
1751
1752         if (meta_len) {
1753                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1754                         return -EINVAL;
1755
1756                 if (ns->ext) {
1757                         length += meta_len;
1758                         meta_len = 0;
1759                 }
1760
1761                 meta = dma_alloc_coherent(dev->dev, meta_len,
1762                                                 &meta_dma, GFP_KERNEL);
1763                 if (!meta) {
1764                         status = -ENOMEM;
1765                         goto unmap;
1766                 }
1767                 if (write) {
1768                         if (copy_from_user(meta, (void __user *)io.metadata,
1769                                                                 meta_len)) {
1770                                 status = -EFAULT;
1771                                 goto unmap;
1772                         }
1773                 }
1774         }
1775
1776         memset(&c, 0, sizeof(c));
1777         c.rw.opcode = io.opcode;
1778         c.rw.flags = io.flags;
1779         c.rw.nsid = cpu_to_le32(ns->ns_id);
1780         c.rw.slba = cpu_to_le64(io.slba);
1781         c.rw.length = cpu_to_le16(io.nblocks);
1782         c.rw.control = cpu_to_le16(io.control);
1783         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1784         c.rw.reftag = cpu_to_le32(io.reftag);
1785         c.rw.apptag = cpu_to_le16(io.apptag);
1786         c.rw.appmask = cpu_to_le16(io.appmask);
1787         c.rw.metadata = cpu_to_le64(meta_dma);
1788
1789         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1790                         (void __user *)io.addr, length, NULL, 0);
1791  unmap:
1792         if (meta) {
1793                 if (status == NVME_SC_SUCCESS && !write) {
1794                         if (copy_to_user((void __user *)io.metadata, meta,
1795                                                                 meta_len))
1796                                 status = -EFAULT;
1797                 }
1798                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1799         }
1800         return status;
1801 }
1802
1803 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1804                         struct nvme_passthru_cmd __user *ucmd)
1805 {
1806         struct nvme_passthru_cmd cmd;
1807         struct nvme_command c;
1808         unsigned timeout = 0;
1809         int status;
1810
1811         if (!capable(CAP_SYS_ADMIN))
1812                 return -EACCES;
1813         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1814                 return -EFAULT;
1815
1816         memset(&c, 0, sizeof(c));
1817         c.common.opcode = cmd.opcode;
1818         c.common.flags = cmd.flags;
1819         c.common.nsid = cpu_to_le32(cmd.nsid);
1820         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1821         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1822         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1823         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1824         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1825         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1826         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1827         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1828
1829         if (cmd.timeout_ms)
1830                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1831
1832         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1833                         NULL, (void __user *)cmd.addr, cmd.data_len,
1834                         &cmd.result, timeout);
1835         if (status >= 0) {
1836                 if (put_user(cmd.result, &ucmd->result))
1837                         return -EFAULT;
1838         }
1839
1840         return status;
1841 }
1842
1843 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1844                                                         unsigned long arg)
1845 {
1846         struct nvme_ns *ns = bdev->bd_disk->private_data;
1847
1848         switch (cmd) {
1849         case NVME_IOCTL_ID:
1850                 force_successful_syscall_return();
1851                 return ns->ns_id;
1852         case NVME_IOCTL_ADMIN_CMD:
1853                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1854         case NVME_IOCTL_IO_CMD:
1855                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1856         case NVME_IOCTL_SUBMIT_IO:
1857                 return nvme_submit_io(ns, (void __user *)arg);
1858         case SG_GET_VERSION_NUM:
1859                 return nvme_sg_get_version_num((void __user *)arg);
1860         case SG_IO:
1861                 return nvme_sg_io(ns, (void __user *)arg);
1862         default:
1863                 return -ENOTTY;
1864         }
1865 }
1866
1867 #ifdef CONFIG_COMPAT
1868 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1869                                         unsigned int cmd, unsigned long arg)
1870 {
1871         switch (cmd) {
1872         case SG_IO:
1873                 return -ENOIOCTLCMD;
1874         }
1875         return nvme_ioctl(bdev, mode, cmd, arg);
1876 }
1877 #else
1878 #define nvme_compat_ioctl       NULL
1879 #endif
1880
1881 static int nvme_open(struct block_device *bdev, fmode_t mode)
1882 {
1883         int ret = 0;
1884         struct nvme_ns *ns;
1885
1886         spin_lock(&dev_list_lock);
1887         ns = bdev->bd_disk->private_data;
1888         if (!ns)
1889                 ret = -ENXIO;
1890         else if (!kref_get_unless_zero(&ns->dev->kref))
1891                 ret = -ENXIO;
1892         spin_unlock(&dev_list_lock);
1893
1894         return ret;
1895 }
1896
1897 static void nvme_free_dev(struct kref *kref);
1898
1899 static void nvme_release(struct gendisk *disk, fmode_t mode)
1900 {
1901         struct nvme_ns *ns = disk->private_data;
1902         struct nvme_dev *dev = ns->dev;
1903
1904         kref_put(&dev->kref, nvme_free_dev);
1905 }
1906
1907 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1908 {
1909         /* some standard values */
1910         geo->heads = 1 << 6;
1911         geo->sectors = 1 << 5;
1912         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1913         return 0;
1914 }
1915
1916 static void nvme_config_discard(struct nvme_ns *ns)
1917 {
1918         u32 logical_block_size = queue_logical_block_size(ns->queue);
1919         ns->queue->limits.discard_zeroes_data = 0;
1920         ns->queue->limits.discard_alignment = logical_block_size;
1921         ns->queue->limits.discard_granularity = logical_block_size;
1922         ns->queue->limits.max_discard_sectors = 0xffffffff;
1923         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1924 }
1925
1926 static int nvme_revalidate_disk(struct gendisk *disk)
1927 {
1928         struct nvme_ns *ns = disk->private_data;
1929         struct nvme_dev *dev = ns->dev;
1930         struct nvme_id_ns *id;
1931         u8 lbaf, pi_type;
1932         u16 old_ms;
1933         unsigned short bs;
1934
1935         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1936                 dev_warn(dev->dev, "%s: Identify failure\n", __func__);
1937                 return 0;
1938         }
1939
1940         old_ms = ns->ms;
1941         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1942         ns->lba_shift = id->lbaf[lbaf].ds;
1943         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1944         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1945
1946         /*
1947          * If identify namespace failed, use default 512 byte block size so
1948          * block layer can use before failing read/write for 0 capacity.
1949          */
1950         if (ns->lba_shift == 0)
1951                 ns->lba_shift = 9;
1952         bs = 1 << ns->lba_shift;
1953
1954         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1955         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1956                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
1957
1958         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1959                                 ns->ms != old_ms ||
1960                                 bs != queue_logical_block_size(disk->queue) ||
1961                                 (ns->ms && ns->ext)))
1962                 blk_integrity_unregister(disk);
1963
1964         ns->pi_type = pi_type;
1965         blk_queue_logical_block_size(ns->queue, bs);
1966
1967         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
1968                                                                 !ns->ext)
1969                 nvme_init_integrity(ns);
1970
1971         if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
1972                 set_capacity(disk, 0);
1973         else
1974                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1975
1976         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1977                 nvme_config_discard(ns);
1978
1979         kfree(id);
1980         return 0;
1981 }
1982
1983 static const struct block_device_operations nvme_fops = {
1984         .owner          = THIS_MODULE,
1985         .ioctl          = nvme_ioctl,
1986         .compat_ioctl   = nvme_compat_ioctl,
1987         .open           = nvme_open,
1988         .release        = nvme_release,
1989         .getgeo         = nvme_getgeo,
1990         .revalidate_disk= nvme_revalidate_disk,
1991 };
1992
1993 static int nvme_kthread(void *data)
1994 {
1995         struct nvme_dev *dev, *next;
1996
1997         while (!kthread_should_stop()) {
1998                 set_current_state(TASK_INTERRUPTIBLE);
1999                 spin_lock(&dev_list_lock);
2000                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2001                         int i;
2002                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2003                                 if (work_busy(&dev->reset_work))
2004                                         continue;
2005                                 list_del_init(&dev->node);
2006                                 dev_warn(dev->dev,
2007                                         "Failed status: %x, reset controller\n",
2008                                         readl(&dev->bar->csts));
2009                                 dev->reset_workfn = nvme_reset_failed_dev;
2010                                 queue_work(nvme_workq, &dev->reset_work);
2011                                 continue;
2012                         }
2013                         for (i = 0; i < dev->queue_count; i++) {
2014                                 struct nvme_queue *nvmeq = dev->queues[i];
2015                                 if (!nvmeq)
2016                                         continue;
2017                                 spin_lock_irq(&nvmeq->q_lock);
2018                                 nvme_process_cq(nvmeq);
2019
2020                                 while ((i == 0) && (dev->event_limit > 0)) {
2021                                         if (nvme_submit_async_admin_req(dev))
2022                                                 break;
2023                                         dev->event_limit--;
2024                                 }
2025                                 spin_unlock_irq(&nvmeq->q_lock);
2026                         }
2027                 }
2028                 spin_unlock(&dev_list_lock);
2029                 schedule_timeout(round_jiffies_relative(HZ));
2030         }
2031         return 0;
2032 }
2033
2034 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2035 {
2036         struct nvme_ns *ns;
2037         struct gendisk *disk;
2038         int node = dev_to_node(dev->dev);
2039
2040         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2041         if (!ns)
2042                 return;
2043
2044         ns->queue = blk_mq_init_queue(&dev->tagset);
2045         if (IS_ERR(ns->queue))
2046                 goto out_free_ns;
2047         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2048         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2049         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2050         ns->dev = dev;
2051         ns->queue->queuedata = ns;
2052
2053         disk = alloc_disk_node(0, node);
2054         if (!disk)
2055                 goto out_free_queue;
2056
2057         ns->ns_id = nsid;
2058         ns->disk = disk;
2059         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2060         list_add_tail(&ns->list, &dev->namespaces);
2061
2062         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2063         if (dev->max_hw_sectors)
2064                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2065         if (dev->stripe_size)
2066                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2067         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2068                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2069
2070         disk->major = nvme_major;
2071         disk->first_minor = 0;
2072         disk->fops = &nvme_fops;
2073         disk->private_data = ns;
2074         disk->queue = ns->queue;
2075         disk->driverfs_dev = dev->device;
2076         disk->flags = GENHD_FL_EXT_DEVT;
2077         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2078
2079         /*
2080          * Initialize capacity to 0 until we establish the namespace format and
2081          * setup integrity extentions if necessary. The revalidate_disk after
2082          * add_disk allows the driver to register with integrity if the format
2083          * requires it.
2084          */
2085         set_capacity(disk, 0);
2086         nvme_revalidate_disk(ns->disk);
2087         add_disk(ns->disk);
2088         if (ns->ms)
2089                 revalidate_disk(ns->disk);
2090         return;
2091  out_free_queue:
2092         blk_cleanup_queue(ns->queue);
2093  out_free_ns:
2094         kfree(ns);
2095 }
2096
2097 static void nvme_create_io_queues(struct nvme_dev *dev)
2098 {
2099         unsigned i;
2100
2101         for (i = dev->queue_count; i <= dev->max_qid; i++)
2102                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2103                         break;
2104
2105         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2106                 if (nvme_create_queue(dev->queues[i], i))
2107                         break;
2108 }
2109
2110 static int set_queue_count(struct nvme_dev *dev, int count)
2111 {
2112         int status;
2113         u32 result;
2114         u32 q_count = (count - 1) | ((count - 1) << 16);
2115
2116         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2117                                                                 &result);
2118         if (status < 0)
2119                 return status;
2120         if (status > 0) {
2121                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2122                 return 0;
2123         }
2124         return min(result & 0xffff, result >> 16) + 1;
2125 }
2126
2127 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2128 {
2129         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2130 }
2131
2132 static int nvme_setup_io_queues(struct nvme_dev *dev)
2133 {
2134         struct nvme_queue *adminq = dev->queues[0];
2135         struct pci_dev *pdev = to_pci_dev(dev->dev);
2136         int result, i, vecs, nr_io_queues, size;
2137
2138         nr_io_queues = num_possible_cpus();
2139         result = set_queue_count(dev, nr_io_queues);
2140         if (result <= 0)
2141                 return result;
2142         if (result < nr_io_queues)
2143                 nr_io_queues = result;
2144
2145         size = db_bar_size(dev, nr_io_queues);
2146         if (size > 8192) {
2147                 iounmap(dev->bar);
2148                 do {
2149                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2150                         if (dev->bar)
2151                                 break;
2152                         if (!--nr_io_queues)
2153                                 return -ENOMEM;
2154                         size = db_bar_size(dev, nr_io_queues);
2155                 } while (1);
2156                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2157                 adminq->q_db = dev->dbs;
2158         }
2159
2160         /* Deregister the admin queue's interrupt */
2161         free_irq(dev->entry[0].vector, adminq);
2162
2163         /*
2164          * If we enable msix early due to not intx, disable it again before
2165          * setting up the full range we need.
2166          */
2167         if (!pdev->irq)
2168                 pci_disable_msix(pdev);
2169
2170         for (i = 0; i < nr_io_queues; i++)
2171                 dev->entry[i].entry = i;
2172         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2173         if (vecs < 0) {
2174                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2175                 if (vecs < 0) {
2176                         vecs = 1;
2177                 } else {
2178                         for (i = 0; i < vecs; i++)
2179                                 dev->entry[i].vector = i + pdev->irq;
2180                 }
2181         }
2182
2183         /*
2184          * Should investigate if there's a performance win from allocating
2185          * more queues than interrupt vectors; it might allow the submission
2186          * path to scale better, even if the receive path is limited by the
2187          * number of interrupts.
2188          */
2189         nr_io_queues = vecs;
2190         dev->max_qid = nr_io_queues;
2191
2192         result = queue_request_irq(dev, adminq, adminq->irqname);
2193         if (result)
2194                 goto free_queues;
2195
2196         /* Free previously allocated queues that are no longer usable */
2197         nvme_free_queues(dev, nr_io_queues + 1);
2198         nvme_create_io_queues(dev);
2199
2200         return 0;
2201
2202  free_queues:
2203         nvme_free_queues(dev, 1);
2204         return result;
2205 }
2206
2207 /*
2208  * Return: error value if an error occurred setting up the queues or calling
2209  * Identify Device.  0 if these succeeded, even if adding some of the
2210  * namespaces failed.  At the moment, these failures are silent.  TBD which
2211  * failures should be reported.
2212  */
2213 static int nvme_dev_add(struct nvme_dev *dev)
2214 {
2215         struct pci_dev *pdev = to_pci_dev(dev->dev);
2216         int res;
2217         unsigned nn, i;
2218         struct nvme_id_ctrl *ctrl;
2219         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2220
2221         res = nvme_identify_ctrl(dev, &ctrl);
2222         if (res) {
2223                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2224                 return -EIO;
2225         }
2226
2227         nn = le32_to_cpup(&ctrl->nn);
2228         dev->oncs = le16_to_cpup(&ctrl->oncs);
2229         dev->abort_limit = ctrl->acl + 1;
2230         dev->vwc = ctrl->vwc;
2231         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2232         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2233         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2234         if (ctrl->mdts)
2235                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2236         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2237                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2238                 unsigned int max_hw_sectors;
2239
2240                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2241                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2242                 if (dev->max_hw_sectors) {
2243                         dev->max_hw_sectors = min(max_hw_sectors,
2244                                                         dev->max_hw_sectors);
2245                 } else
2246                         dev->max_hw_sectors = max_hw_sectors;
2247         }
2248         kfree(ctrl);
2249
2250         dev->tagset.ops = &nvme_mq_ops;
2251         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2252         dev->tagset.timeout = NVME_IO_TIMEOUT;
2253         dev->tagset.numa_node = dev_to_node(dev->dev);
2254         dev->tagset.queue_depth =
2255                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2256         dev->tagset.cmd_size = nvme_cmd_size(dev);
2257         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2258         dev->tagset.driver_data = dev;
2259
2260         if (blk_mq_alloc_tag_set(&dev->tagset))
2261                 return 0;
2262
2263         for (i = 1; i <= nn; i++)
2264                 nvme_alloc_ns(dev, i);
2265
2266         return 0;
2267 }
2268
2269 static int nvme_dev_map(struct nvme_dev *dev)
2270 {
2271         u64 cap;
2272         int bars, result = -ENOMEM;
2273         struct pci_dev *pdev = to_pci_dev(dev->dev);
2274
2275         if (pci_enable_device_mem(pdev))
2276                 return result;
2277
2278         dev->entry[0].vector = pdev->irq;
2279         pci_set_master(pdev);
2280         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2281         if (!bars)
2282                 goto disable_pci;
2283
2284         if (pci_request_selected_regions(pdev, bars, "nvme"))
2285                 goto disable_pci;
2286
2287         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2288             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2289                 goto disable;
2290
2291         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2292         if (!dev->bar)
2293                 goto disable;
2294
2295         if (readl(&dev->bar->csts) == -1) {
2296                 result = -ENODEV;
2297                 goto unmap;
2298         }
2299
2300         /*
2301          * Some devices don't advertse INTx interrupts, pre-enable a single
2302          * MSIX vec for setup. We'll adjust this later.
2303          */
2304         if (!pdev->irq) {
2305                 result = pci_enable_msix(pdev, dev->entry, 1);
2306                 if (result < 0)
2307                         goto unmap;
2308         }
2309
2310         cap = readq(&dev->bar->cap);
2311         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2312         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2313         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2314
2315         return 0;
2316
2317  unmap:
2318         iounmap(dev->bar);
2319         dev->bar = NULL;
2320  disable:
2321         pci_release_regions(pdev);
2322  disable_pci:
2323         pci_disable_device(pdev);
2324         return result;
2325 }
2326
2327 static void nvme_dev_unmap(struct nvme_dev *dev)
2328 {
2329         struct pci_dev *pdev = to_pci_dev(dev->dev);
2330
2331         if (pdev->msi_enabled)
2332                 pci_disable_msi(pdev);
2333         else if (pdev->msix_enabled)
2334                 pci_disable_msix(pdev);
2335
2336         if (dev->bar) {
2337                 iounmap(dev->bar);
2338                 dev->bar = NULL;
2339                 pci_release_regions(pdev);
2340         }
2341
2342         if (pci_is_enabled(pdev))
2343                 pci_disable_device(pdev);
2344 }
2345
2346 struct nvme_delq_ctx {
2347         struct task_struct *waiter;
2348         struct kthread_worker *worker;
2349         atomic_t refcount;
2350 };
2351
2352 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2353 {
2354         dq->waiter = current;
2355         mb();
2356
2357         for (;;) {
2358                 set_current_state(TASK_KILLABLE);
2359                 if (!atomic_read(&dq->refcount))
2360                         break;
2361                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2362                                         fatal_signal_pending(current)) {
2363                         /*
2364                          * Disable the controller first since we can't trust it
2365                          * at this point, but leave the admin queue enabled
2366                          * until all queue deletion requests are flushed.
2367                          * FIXME: This may take a while if there are more h/w
2368                          * queues than admin tags.
2369                          */
2370                         set_current_state(TASK_RUNNING);
2371                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2372                         nvme_clear_queue(dev->queues[0]);
2373                         flush_kthread_worker(dq->worker);
2374                         nvme_disable_queue(dev, 0);
2375                         return;
2376                 }
2377         }
2378         set_current_state(TASK_RUNNING);
2379 }
2380
2381 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2382 {
2383         atomic_dec(&dq->refcount);
2384         if (dq->waiter)
2385                 wake_up_process(dq->waiter);
2386 }
2387
2388 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2389 {
2390         atomic_inc(&dq->refcount);
2391         return dq;
2392 }
2393
2394 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2395 {
2396         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2397         nvme_put_dq(dq);
2398 }
2399
2400 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2401                                                 kthread_work_func_t fn)
2402 {
2403         struct nvme_command c;
2404
2405         memset(&c, 0, sizeof(c));
2406         c.delete_queue.opcode = opcode;
2407         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2408
2409         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2410         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2411                                                                 ADMIN_TIMEOUT);
2412 }
2413
2414 static void nvme_del_cq_work_handler(struct kthread_work *work)
2415 {
2416         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2417                                                         cmdinfo.work);
2418         nvme_del_queue_end(nvmeq);
2419 }
2420
2421 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2422 {
2423         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2424                                                 nvme_del_cq_work_handler);
2425 }
2426
2427 static void nvme_del_sq_work_handler(struct kthread_work *work)
2428 {
2429         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2430                                                         cmdinfo.work);
2431         int status = nvmeq->cmdinfo.status;
2432
2433         if (!status)
2434                 status = nvme_delete_cq(nvmeq);
2435         if (status)
2436                 nvme_del_queue_end(nvmeq);
2437 }
2438
2439 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2440 {
2441         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2442                                                 nvme_del_sq_work_handler);
2443 }
2444
2445 static void nvme_del_queue_start(struct kthread_work *work)
2446 {
2447         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2448                                                         cmdinfo.work);
2449         if (nvme_delete_sq(nvmeq))
2450                 nvme_del_queue_end(nvmeq);
2451 }
2452
2453 static void nvme_disable_io_queues(struct nvme_dev *dev)
2454 {
2455         int i;
2456         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2457         struct nvme_delq_ctx dq;
2458         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2459                                         &worker, "nvme%d", dev->instance);
2460
2461         if (IS_ERR(kworker_task)) {
2462                 dev_err(dev->dev,
2463                         "Failed to create queue del task\n");
2464                 for (i = dev->queue_count - 1; i > 0; i--)
2465                         nvme_disable_queue(dev, i);
2466                 return;
2467         }
2468
2469         dq.waiter = NULL;
2470         atomic_set(&dq.refcount, 0);
2471         dq.worker = &worker;
2472         for (i = dev->queue_count - 1; i > 0; i--) {
2473                 struct nvme_queue *nvmeq = dev->queues[i];
2474
2475                 if (nvme_suspend_queue(nvmeq))
2476                         continue;
2477                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2478                 nvmeq->cmdinfo.worker = dq.worker;
2479                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2480                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2481         }
2482         nvme_wait_dq(&dq, dev);
2483         kthread_stop(kworker_task);
2484 }
2485
2486 /*
2487 * Remove the node from the device list and check
2488 * for whether or not we need to stop the nvme_thread.
2489 */
2490 static void nvme_dev_list_remove(struct nvme_dev *dev)
2491 {
2492         struct task_struct *tmp = NULL;
2493
2494         spin_lock(&dev_list_lock);
2495         list_del_init(&dev->node);
2496         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2497                 tmp = nvme_thread;
2498                 nvme_thread = NULL;
2499         }
2500         spin_unlock(&dev_list_lock);
2501
2502         if (tmp)
2503                 kthread_stop(tmp);
2504 }
2505
2506 static void nvme_freeze_queues(struct nvme_dev *dev)
2507 {
2508         struct nvme_ns *ns;
2509
2510         list_for_each_entry(ns, &dev->namespaces, list) {
2511                 blk_mq_freeze_queue_start(ns->queue);
2512
2513                 spin_lock_irq(ns->queue->queue_lock);
2514                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2515                 spin_unlock_irq(ns->queue->queue_lock);
2516
2517                 blk_mq_cancel_requeue_work(ns->queue);
2518                 blk_mq_stop_hw_queues(ns->queue);
2519         }
2520 }
2521
2522 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2523 {
2524         struct nvme_ns *ns;
2525
2526         list_for_each_entry(ns, &dev->namespaces, list) {
2527                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2528                 blk_mq_unfreeze_queue(ns->queue);
2529                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2530                 blk_mq_kick_requeue_list(ns->queue);
2531         }
2532 }
2533
2534 static void nvme_dev_shutdown(struct nvme_dev *dev)
2535 {
2536         int i;
2537         u32 csts = -1;
2538
2539         nvme_dev_list_remove(dev);
2540
2541         if (dev->bar) {
2542                 nvme_freeze_queues(dev);
2543                 csts = readl(&dev->bar->csts);
2544         }
2545         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2546                 for (i = dev->queue_count - 1; i >= 0; i--) {
2547                         struct nvme_queue *nvmeq = dev->queues[i];
2548                         nvme_suspend_queue(nvmeq);
2549                 }
2550         } else {
2551                 nvme_disable_io_queues(dev);
2552                 nvme_shutdown_ctrl(dev);
2553                 nvme_disable_queue(dev, 0);
2554         }
2555         nvme_dev_unmap(dev);
2556
2557         for (i = dev->queue_count - 1; i >= 0; i--)
2558                 nvme_clear_queue(dev->queues[i]);
2559 }
2560
2561 static void nvme_dev_remove(struct nvme_dev *dev)
2562 {
2563         struct nvme_ns *ns;
2564
2565         list_for_each_entry(ns, &dev->namespaces, list) {
2566                 if (ns->disk->flags & GENHD_FL_UP) {
2567                         if (blk_get_integrity(ns->disk))
2568                                 blk_integrity_unregister(ns->disk);
2569                         del_gendisk(ns->disk);
2570                 }
2571                 if (!blk_queue_dying(ns->queue)) {
2572                         blk_mq_abort_requeue_list(ns->queue);
2573                         blk_cleanup_queue(ns->queue);
2574                 }
2575         }
2576 }
2577
2578 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2579 {
2580         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2581                                                 PAGE_SIZE, PAGE_SIZE, 0);
2582         if (!dev->prp_page_pool)
2583                 return -ENOMEM;
2584
2585         /* Optimisation for I/Os between 4k and 128k */
2586         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2587                                                 256, 256, 0);
2588         if (!dev->prp_small_pool) {
2589                 dma_pool_destroy(dev->prp_page_pool);
2590                 return -ENOMEM;
2591         }
2592         return 0;
2593 }
2594
2595 static void nvme_release_prp_pools(struct nvme_dev *dev)
2596 {
2597         dma_pool_destroy(dev->prp_page_pool);
2598         dma_pool_destroy(dev->prp_small_pool);
2599 }
2600
2601 static DEFINE_IDA(nvme_instance_ida);
2602
2603 static int nvme_set_instance(struct nvme_dev *dev)
2604 {
2605         int instance, error;
2606
2607         do {
2608                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2609                         return -ENODEV;
2610
2611                 spin_lock(&dev_list_lock);
2612                 error = ida_get_new(&nvme_instance_ida, &instance);
2613                 spin_unlock(&dev_list_lock);
2614         } while (error == -EAGAIN);
2615
2616         if (error)
2617                 return -ENODEV;
2618
2619         dev->instance = instance;
2620         return 0;
2621 }
2622
2623 static void nvme_release_instance(struct nvme_dev *dev)
2624 {
2625         spin_lock(&dev_list_lock);
2626         ida_remove(&nvme_instance_ida, dev->instance);
2627         spin_unlock(&dev_list_lock);
2628 }
2629
2630 static void nvme_free_namespaces(struct nvme_dev *dev)
2631 {
2632         struct nvme_ns *ns, *next;
2633
2634         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2635                 list_del(&ns->list);
2636
2637                 spin_lock(&dev_list_lock);
2638                 ns->disk->private_data = NULL;
2639                 spin_unlock(&dev_list_lock);
2640
2641                 put_disk(ns->disk);
2642                 kfree(ns);
2643         }
2644 }
2645
2646 static void nvme_free_dev(struct kref *kref)
2647 {
2648         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2649
2650         put_device(dev->dev);
2651         put_device(dev->device);
2652         nvme_free_namespaces(dev);
2653         nvme_release_instance(dev);
2654         blk_mq_free_tag_set(&dev->tagset);
2655         blk_put_queue(dev->admin_q);
2656         kfree(dev->queues);
2657         kfree(dev->entry);
2658         kfree(dev);
2659 }
2660
2661 static int nvme_dev_open(struct inode *inode, struct file *f)
2662 {
2663         struct nvme_dev *dev;
2664         int instance = iminor(inode);
2665         int ret = -ENODEV;
2666
2667         spin_lock(&dev_list_lock);
2668         list_for_each_entry(dev, &dev_list, node) {
2669                 if (dev->instance == instance) {
2670                         if (!dev->admin_q) {
2671                                 ret = -EWOULDBLOCK;
2672                                 break;
2673                         }
2674                         if (!kref_get_unless_zero(&dev->kref))
2675                                 break;
2676                         f->private_data = dev;
2677                         ret = 0;
2678                         break;
2679                 }
2680         }
2681         spin_unlock(&dev_list_lock);
2682
2683         return ret;
2684 }
2685
2686 static int nvme_dev_release(struct inode *inode, struct file *f)
2687 {
2688         struct nvme_dev *dev = f->private_data;
2689         kref_put(&dev->kref, nvme_free_dev);
2690         return 0;
2691 }
2692
2693 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2694 {
2695         struct nvme_dev *dev = f->private_data;
2696         struct nvme_ns *ns;
2697
2698         switch (cmd) {
2699         case NVME_IOCTL_ADMIN_CMD:
2700                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2701         case NVME_IOCTL_IO_CMD:
2702                 if (list_empty(&dev->namespaces))
2703                         return -ENOTTY;
2704                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2705                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2706         default:
2707                 return -ENOTTY;
2708         }
2709 }
2710
2711 static const struct file_operations nvme_dev_fops = {
2712         .owner          = THIS_MODULE,
2713         .open           = nvme_dev_open,
2714         .release        = nvme_dev_release,
2715         .unlocked_ioctl = nvme_dev_ioctl,
2716         .compat_ioctl   = nvme_dev_ioctl,
2717 };
2718
2719 static void nvme_set_irq_hints(struct nvme_dev *dev)
2720 {
2721         struct nvme_queue *nvmeq;
2722         int i;
2723
2724         for (i = 0; i < dev->online_queues; i++) {
2725                 nvmeq = dev->queues[i];
2726
2727                 if (!nvmeq->hctx)
2728                         continue;
2729
2730                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2731                                                         nvmeq->hctx->cpumask);
2732         }
2733 }
2734
2735 static int nvme_dev_start(struct nvme_dev *dev)
2736 {
2737         int result;
2738         bool start_thread = false;
2739
2740         result = nvme_dev_map(dev);
2741         if (result)
2742                 return result;
2743
2744         result = nvme_configure_admin_queue(dev);
2745         if (result)
2746                 goto unmap;
2747
2748         spin_lock(&dev_list_lock);
2749         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2750                 start_thread = true;
2751                 nvme_thread = NULL;
2752         }
2753         list_add(&dev->node, &dev_list);
2754         spin_unlock(&dev_list_lock);
2755
2756         if (start_thread) {
2757                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2758                 wake_up_all(&nvme_kthread_wait);
2759         } else
2760                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2761
2762         if (IS_ERR_OR_NULL(nvme_thread)) {
2763                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2764                 goto disable;
2765         }
2766
2767         nvme_init_queue(dev->queues[0], 0);
2768         result = nvme_alloc_admin_tags(dev);
2769         if (result)
2770                 goto disable;
2771
2772         result = nvme_setup_io_queues(dev);
2773         if (result)
2774                 goto free_tags;
2775
2776         nvme_set_irq_hints(dev);
2777
2778         dev->event_limit = 1;
2779         return result;
2780
2781  free_tags:
2782         nvme_dev_remove_admin(dev);
2783  disable:
2784         nvme_disable_queue(dev, 0);
2785         nvme_dev_list_remove(dev);
2786  unmap:
2787         nvme_dev_unmap(dev);
2788         return result;
2789 }
2790
2791 static int nvme_remove_dead_ctrl(void *arg)
2792 {
2793         struct nvme_dev *dev = (struct nvme_dev *)arg;
2794         struct pci_dev *pdev = to_pci_dev(dev->dev);
2795
2796         if (pci_get_drvdata(pdev))
2797                 pci_stop_and_remove_bus_device_locked(pdev);
2798         kref_put(&dev->kref, nvme_free_dev);
2799         return 0;
2800 }
2801
2802 static void nvme_remove_disks(struct work_struct *ws)
2803 {
2804         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2805
2806         nvme_free_queues(dev, 1);
2807         nvme_dev_remove(dev);
2808 }
2809
2810 static int nvme_dev_resume(struct nvme_dev *dev)
2811 {
2812         int ret;
2813
2814         ret = nvme_dev_start(dev);
2815         if (ret)
2816                 return ret;
2817         if (dev->online_queues < 2) {
2818                 spin_lock(&dev_list_lock);
2819                 dev->reset_workfn = nvme_remove_disks;
2820                 queue_work(nvme_workq, &dev->reset_work);
2821                 spin_unlock(&dev_list_lock);
2822         } else {
2823                 nvme_unfreeze_queues(dev);
2824                 nvme_set_irq_hints(dev);
2825         }
2826         return 0;
2827 }
2828
2829 static void nvme_dev_reset(struct nvme_dev *dev)
2830 {
2831         nvme_dev_shutdown(dev);
2832         if (nvme_dev_resume(dev)) {
2833                 dev_warn(dev->dev, "Device failed to resume\n");
2834                 kref_get(&dev->kref);
2835                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2836                                                         dev->instance))) {
2837                         dev_err(dev->dev,
2838                                 "Failed to start controller remove task\n");
2839                         kref_put(&dev->kref, nvme_free_dev);
2840                 }
2841         }
2842 }
2843
2844 static void nvme_reset_failed_dev(struct work_struct *ws)
2845 {
2846         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2847         nvme_dev_reset(dev);
2848 }
2849
2850 static void nvme_reset_workfn(struct work_struct *work)
2851 {
2852         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2853         dev->reset_workfn(work);
2854 }
2855
2856 static void nvme_async_probe(struct work_struct *work);
2857 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2858 {
2859         int node, result = -ENOMEM;
2860         struct nvme_dev *dev;
2861
2862         node = dev_to_node(&pdev->dev);
2863         if (node == NUMA_NO_NODE)
2864                 set_dev_node(&pdev->dev, 0);
2865
2866         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2867         if (!dev)
2868                 return -ENOMEM;
2869         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2870                                                         GFP_KERNEL, node);
2871         if (!dev->entry)
2872                 goto free;
2873         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2874                                                         GFP_KERNEL, node);
2875         if (!dev->queues)
2876                 goto free;
2877
2878         INIT_LIST_HEAD(&dev->namespaces);
2879         dev->reset_workfn = nvme_reset_failed_dev;
2880         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2881         dev->dev = get_device(&pdev->dev);
2882         pci_set_drvdata(pdev, dev);
2883         result = nvme_set_instance(dev);
2884         if (result)
2885                 goto put_pci;
2886
2887         result = nvme_setup_prp_pools(dev);
2888         if (result)
2889                 goto release;
2890
2891         kref_init(&dev->kref);
2892         dev->device = device_create(nvme_class, &pdev->dev,
2893                                 MKDEV(nvme_char_major, dev->instance),
2894                                 dev, "nvme%d", dev->instance);
2895         if (IS_ERR(dev->device)) {
2896                 result = PTR_ERR(dev->device);
2897                 goto release_pools;
2898         }
2899         get_device(dev->device);
2900
2901         INIT_LIST_HEAD(&dev->node);
2902         INIT_WORK(&dev->probe_work, nvme_async_probe);
2903         schedule_work(&dev->probe_work);
2904         return 0;
2905
2906  release_pools:
2907         nvme_release_prp_pools(dev);
2908  release:
2909         nvme_release_instance(dev);
2910  put_pci:
2911         put_device(dev->dev);
2912  free:
2913         kfree(dev->queues);
2914         kfree(dev->entry);
2915         kfree(dev);
2916         return result;
2917 }
2918
2919 static void nvme_async_probe(struct work_struct *work)
2920 {
2921         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2922         int result;
2923
2924         result = nvme_dev_start(dev);
2925         if (result)
2926                 goto reset;
2927
2928         if (dev->online_queues > 1)
2929                 result = nvme_dev_add(dev);
2930         if (result)
2931                 goto reset;
2932
2933         nvme_set_irq_hints(dev);
2934         return;
2935  reset:
2936         if (!work_busy(&dev->reset_work)) {
2937                 dev->reset_workfn = nvme_reset_failed_dev;
2938                 queue_work(nvme_workq, &dev->reset_work);
2939         }
2940 }
2941
2942 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2943 {
2944         struct nvme_dev *dev = pci_get_drvdata(pdev);
2945
2946         if (prepare)
2947                 nvme_dev_shutdown(dev);
2948         else
2949                 nvme_dev_resume(dev);
2950 }
2951
2952 static void nvme_shutdown(struct pci_dev *pdev)
2953 {
2954         struct nvme_dev *dev = pci_get_drvdata(pdev);
2955         nvme_dev_shutdown(dev);
2956 }
2957
2958 static void nvme_remove(struct pci_dev *pdev)
2959 {
2960         struct nvme_dev *dev = pci_get_drvdata(pdev);
2961
2962         spin_lock(&dev_list_lock);
2963         list_del_init(&dev->node);
2964         spin_unlock(&dev_list_lock);
2965
2966         pci_set_drvdata(pdev, NULL);
2967         flush_work(&dev->probe_work);
2968         flush_work(&dev->reset_work);
2969         nvme_dev_shutdown(dev);
2970         nvme_dev_remove(dev);
2971         nvme_dev_remove_admin(dev);
2972         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
2973         nvme_free_queues(dev, 0);
2974         nvme_release_prp_pools(dev);
2975         kref_put(&dev->kref, nvme_free_dev);
2976 }
2977
2978 /* These functions are yet to be implemented */
2979 #define nvme_error_detected NULL
2980 #define nvme_dump_registers NULL
2981 #define nvme_link_reset NULL
2982 #define nvme_slot_reset NULL
2983 #define nvme_error_resume NULL
2984
2985 #ifdef CONFIG_PM_SLEEP
2986 static int nvme_suspend(struct device *dev)
2987 {
2988         struct pci_dev *pdev = to_pci_dev(dev);
2989         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2990
2991         nvme_dev_shutdown(ndev);
2992         return 0;
2993 }
2994
2995 static int nvme_resume(struct device *dev)
2996 {
2997         struct pci_dev *pdev = to_pci_dev(dev);
2998         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2999
3000         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3001                 ndev->reset_workfn = nvme_reset_failed_dev;
3002                 queue_work(nvme_workq, &ndev->reset_work);
3003         }
3004         return 0;
3005 }
3006 #endif
3007
3008 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3009
3010 static const struct pci_error_handlers nvme_err_handler = {
3011         .error_detected = nvme_error_detected,
3012         .mmio_enabled   = nvme_dump_registers,
3013         .link_reset     = nvme_link_reset,
3014         .slot_reset     = nvme_slot_reset,
3015         .resume         = nvme_error_resume,
3016         .reset_notify   = nvme_reset_notify,
3017 };
3018
3019 /* Move to pci_ids.h later */
3020 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3021
3022 static const struct pci_device_id nvme_id_table[] = {
3023         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3024         { 0, }
3025 };
3026 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3027
3028 static struct pci_driver nvme_driver = {
3029         .name           = "nvme",
3030         .id_table       = nvme_id_table,
3031         .probe          = nvme_probe,
3032         .remove         = nvme_remove,
3033         .shutdown       = nvme_shutdown,
3034         .driver         = {
3035                 .pm     = &nvme_dev_pm_ops,
3036         },
3037         .err_handler    = &nvme_err_handler,
3038 };
3039
3040 static int __init nvme_init(void)
3041 {
3042         int result;
3043
3044         init_waitqueue_head(&nvme_kthread_wait);
3045
3046         nvme_workq = create_singlethread_workqueue("nvme");
3047         if (!nvme_workq)
3048                 return -ENOMEM;
3049
3050         result = register_blkdev(nvme_major, "nvme");
3051         if (result < 0)
3052                 goto kill_workq;
3053         else if (result > 0)
3054                 nvme_major = result;
3055
3056         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3057                                                         &nvme_dev_fops);
3058         if (result < 0)
3059                 goto unregister_blkdev;
3060         else if (result > 0)
3061                 nvme_char_major = result;
3062
3063         nvme_class = class_create(THIS_MODULE, "nvme");
3064         if (IS_ERR(nvme_class)) {
3065                 result = PTR_ERR(nvme_class);
3066                 goto unregister_chrdev;
3067         }
3068
3069         result = pci_register_driver(&nvme_driver);
3070         if (result)
3071                 goto destroy_class;
3072         return 0;
3073
3074  destroy_class:
3075         class_destroy(nvme_class);
3076  unregister_chrdev:
3077         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3078  unregister_blkdev:
3079         unregister_blkdev(nvme_major, "nvme");
3080  kill_workq:
3081         destroy_workqueue(nvme_workq);
3082         return result;
3083 }
3084
3085 static void __exit nvme_exit(void)
3086 {
3087         pci_unregister_driver(&nvme_driver);
3088         unregister_blkdev(nvme_major, "nvme");
3089         destroy_workqueue(nvme_workq);
3090         class_destroy(nvme_class);
3091         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3092         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3093         _nvme_check_size();
3094 }
3095
3096 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3097 MODULE_LICENSE("GPL");
3098 MODULE_VERSION("1.0");
3099 module_init(nvme_init);
3100 module_exit(nvme_exit);