drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/list_sort.h>
  33 #include <linux/mm.h>
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/pci.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/t10-pi.h>
  42 #include <linux/types.h>
  43 #include <scsi/sg.h>
  44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  45
  46 #define NVME_MINORS             (1U << MINORBITS)
  47 #define NVME_Q_DEPTH            1024
  48 #define NVME_AQ_DEPTH           256
  49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char shutdown_timeout = 5;
  63 module_param(shutdown_timeout, byte, 0644);
  64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  65
  66 static int nvme_major;
  67 module_param(nvme_major, int, 0);
  68
  69 static int nvme_char_major;
  70 module_param(nvme_char_major, int, 0);
  71
  72 static int use_threaded_interrupts;
  73 module_param(use_threaded_interrupts, int, 0);
  74
  75 static bool use_cmb_sqes = true;
  76 module_param(use_cmb_sqes, bool, 0644);
  77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
  78
  79 static DEFINE_SPINLOCK(dev_list_lock);
  80 static LIST_HEAD(dev_list);
  81 static struct task_struct *nvme_thread;
  82 static struct workqueue_struct *nvme_workq;
  83 static wait_queue_head_t nvme_kthread_wait;
  84
  85 static struct class *nvme_class;
  86
  87 static int nvme_reset(struct nvme_dev *dev);
  88 static int nvme_process_cq(struct nvme_queue *nvmeq);
  89
  90 struct async_cmd_info {
  91         struct kthread_work work;
  92         struct kthread_worker *worker;
  93         struct request *req;
  94         u32 result;
  95         int status;
  96         void *ctx;
  97 };
  98
  99 /*
 100  * An NVM Express queue.  Each device has at least two (one for admin
 101  * commands and one for I/O commands).
 102  */
 103 struct nvme_queue {
 104         struct device *q_dmadev;
 105         struct nvme_dev *dev;
 106         char irqname[24];       /* nvme4294967295-65535\0 */
 107         spinlock_t q_lock;
 108         struct nvme_command *sq_cmds;
 109         struct nvme_command __iomem *sq_cmds_io;
 110         volatile struct nvme_completion *cqes;
 111         struct blk_mq_tags **tags;
 112         dma_addr_t sq_dma_addr;
 113         dma_addr_t cq_dma_addr;
 114         u32 __iomem *q_db;
 115         u16 q_depth;
 116         s16 cq_vector;
 117         u16 sq_head;
 118         u16 sq_tail;
 119         u16 cq_head;
 120         u16 qid;
 121         u8 cq_phase;
 122         u8 cqe_seen;
 123         struct async_cmd_info cmdinfo;
 124 };
 125
 126 /*
 127  * Check we didin't inadvertently grow the command struct
 128  */
 129 static inline void _nvme_check_size(void)
 130 {
 131         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 137         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 140         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 141         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 142         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 143 }
 144
 145 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 146                                                 struct nvme_completion *);
 147
 148 struct nvme_cmd_info {
 149         nvme_completion_fn fn;
 150         void *ctx;
 151         int aborted;
 152         struct nvme_queue *nvmeq;
 153         struct nvme_iod iod[0];
 154 };
 155
 156 /*
 157  * Max size of iod being embedded in the request payload
 158  */
 159 #define NVME_INT_PAGES          2
 160 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 161 #define NVME_INT_MASK           0x01
 162
 163 /*
 164  * Will slightly overestimate the number of pages needed.  This is OK
 165  * as it only leads to a small amount of wasted memory for the lifetime of
 166  * the I/O.
 167  */
 168 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 169 {
 170         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 171         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 172 }
 173
 174 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 175 {
 176         unsigned int ret = sizeof(struct nvme_cmd_info);
 177
 178         ret += sizeof(struct nvme_iod);
 179         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 180         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 181
 182         return ret;
 183 }
 184
 185 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 186                                 unsigned int hctx_idx)
 187 {
 188         struct nvme_dev *dev = data;
 189         struct nvme_queue *nvmeq = dev->queues[0];
 190
 191         WARN_ON(hctx_idx != 0);
 192         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 193         WARN_ON(nvmeq->tags);
 194
 195         hctx->driver_data = nvmeq;
 196         nvmeq->tags = &dev->admin_tagset.tags[0];
 197         return 0;
 198 }
 199
 200 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 201 {
 202         struct nvme_queue *nvmeq = hctx->driver_data;
 203
 204         nvmeq->tags = NULL;
 205 }
 206
 207 static int nvme_admin_init_request(void *data, struct request *req,
 208                                 unsigned int hctx_idx, unsigned int rq_idx,
 209                                 unsigned int numa_node)
 210 {
 211         struct nvme_dev *dev = data;
 212         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 213         struct nvme_queue *nvmeq = dev->queues[0];
 214
 215         BUG_ON(!nvmeq);
 216         cmd->nvmeq = nvmeq;
 217         return 0;
 218 }
 219
 220 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 221                           unsigned int hctx_idx)
 222 {
 223         struct nvme_dev *dev = data;
 224         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 225
 226         if (!nvmeq->tags)
 227                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 228
 229         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 230         hctx->driver_data = nvmeq;
 231         return 0;
 232 }
 233
 234 static int nvme_init_request(void *data, struct request *req,
 235                                 unsigned int hctx_idx, unsigned int rq_idx,
 236                                 unsigned int numa_node)
 237 {
 238         struct nvme_dev *dev = data;
 239         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 240         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 241
 242         BUG_ON(!nvmeq);
 243         cmd->nvmeq = nvmeq;
 244         return 0;
 245 }
 246
 247 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 248                                 nvme_completion_fn handler)
 249 {
 250         cmd->fn = handler;
 251         cmd->ctx = ctx;
 252         cmd->aborted = 0;
 253         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 254 }
 255
 256 static void *iod_get_private(struct nvme_iod *iod)
 257 {
 258         return (void *) (iod->private & ~0x1UL);
 259 }
 260
 261 /*
 262  * If bit 0 is set, the iod is embedded in the request payload.
 263  */
 264 static bool iod_should_kfree(struct nvme_iod *iod)
 265 {
 266         return (iod->private & NVME_INT_MASK) == 0;
 267 }
 268
 269 /* Special values must be less than 0x1000 */
 270 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 271 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 272 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 273 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 274
 275 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 276                                                 struct nvme_completion *cqe)
 277 {
 278         if (ctx == CMD_CTX_CANCELLED)
 279                 return;
 280         if (ctx == CMD_CTX_COMPLETED) {
 281                 dev_warn(nvmeq->q_dmadev,
 282                                 "completed id %d twice on queue %d\n",
 283                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 284                 return;
 285         }
 286         if (ctx == CMD_CTX_INVALID) {
 287                 dev_warn(nvmeq->q_dmadev,
 288                                 "invalid id %d completed on queue %d\n",
 289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 290                 return;
 291         }
 292         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 293 }
 294
 295 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 296 {
 297         void *ctx;
 298
 299         if (fn)
 300                 *fn = cmd->fn;
 301         ctx = cmd->ctx;
 302         cmd->fn = special_completion;
 303         cmd->ctx = CMD_CTX_CANCELLED;
 304         return ctx;
 305 }
 306
 307 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 308                                                 struct nvme_completion *cqe)
 309 {
 310         u32 result = le32_to_cpup(&cqe->result);
 311         u16 status = le16_to_cpup(&cqe->status) >> 1;
 312
 313         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 314                 ++nvmeq->dev->event_limit;
 315         if (status != NVME_SC_SUCCESS)
 316                 return;
 317
 318         switch (result & 0xff07) {
 319         case NVME_AER_NOTICE_NS_CHANGED:
 320                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 321                 schedule_work(&nvmeq->dev->scan_work);
 322         default:
 323                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 324         }
 325 }
 326
 327 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 328                                                 struct nvme_completion *cqe)
 329 {
 330         struct request *req = ctx;
 331
 332         u16 status = le16_to_cpup(&cqe->status) >> 1;
 333         u32 result = le32_to_cpup(&cqe->result);
 334
 335         blk_mq_free_request(req);
 336
 337         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 338         ++nvmeq->dev->abort_limit;
 339 }
 340
 341 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 342                                                 struct nvme_completion *cqe)
 343 {
 344         struct async_cmd_info *cmdinfo = ctx;
 345         cmdinfo->result = le32_to_cpup(&cqe->result);
 346         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 347         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 348         blk_mq_free_request(cmdinfo->req);
 349 }
 350
 351 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 352                                   unsigned int tag)
 353 {
 354         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 355
 356         return blk_mq_rq_to_pdu(req);
 357 }
 358
 359 /*
 360  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 361  */
 362 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 363                                                 nvme_completion_fn *fn)
 364 {
 365         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 366         void *ctx;
 367         if (tag >= nvmeq->q_depth) {
 368                 *fn = special_completion;
 369                 return CMD_CTX_INVALID;
 370         }
 371         if (fn)
 372                 *fn = cmd->fn;
 373         ctx = cmd->ctx;
 374         cmd->fn = special_completion;
 375         cmd->ctx = CMD_CTX_COMPLETED;
 376         return ctx;
 377 }
 378
 379 /**
 380  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 381  * @nvmeq: The queue to use
 382  * @cmd: The command to send
 383  *
 384  * Safe to use from interrupt context
 385  */
 386 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
 387                                                 struct nvme_command *cmd)
 388 {
 389         u16 tail = nvmeq->sq_tail;
 390
 391         if (nvmeq->sq_cmds_io)
 392                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
 393         else
 394                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 395
 396         if (++tail == nvmeq->q_depth)
 397                 tail = 0;
 398         writel(tail, nvmeq->q_db);
 399         nvmeq->sq_tail = tail;
 400 }
 401
 402 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 403 {
 404         unsigned long flags;
 405         spin_lock_irqsave(&nvmeq->q_lock, flags);
 406         __nvme_submit_cmd(nvmeq, cmd);
 407         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 408 }
 409
 410 static __le64 **iod_list(struct nvme_iod *iod)
 411 {
 412         return ((void *)iod) + iod->offset;
 413 }
 414
 415 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 416                             unsigned nseg, unsigned long private)
 417 {
 418         iod->private = private;
 419         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 420         iod->npages = -1;
 421         iod->length = nbytes;
 422         iod->nents = 0;
 423 }
 424
 425 static struct nvme_iod *
 426 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 427                  unsigned long priv, gfp_t gfp)
 428 {
 429         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 430                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 431                                 sizeof(struct scatterlist) * nseg, gfp);
 432
 433         if (iod)
 434                 iod_init(iod, bytes, nseg, priv);
 435
 436         return iod;
 437 }
 438
 439 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 440                                        gfp_t gfp)
 441 {
 442         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 443                                                 sizeof(struct nvme_dsm_range);
 444         struct nvme_iod *iod;
 445
 446         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 447             size <= NVME_INT_BYTES(dev)) {
 448                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 449
 450                 iod = cmd->iod;
 451                 iod_init(iod, size, rq->nr_phys_segments,
 452                                 (unsigned long) rq | NVME_INT_MASK);
 453                 return iod;
 454         }
 455
 456         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 457                                 (unsigned long) rq, gfp);
 458 }
 459
 460 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 461 {
 462         const int last_prp = dev->page_size / 8 - 1;
 463         int i;
 464         __le64 **list = iod_list(iod);
 465         dma_addr_t prp_dma = iod->first_dma;
 466
 467         if (iod->npages == 0)
 468                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 469         for (i = 0; i < iod->npages; i++) {
 470                 __le64 *prp_list = list[i];
 471                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 472                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 473                 prp_dma = next_prp_dma;
 474         }
 475
 476         if (iod_should_kfree(iod))
 477                 kfree(iod);
 478 }
 479
 480 static int nvme_error_status(u16 status)
 481 {
 482         switch (status & 0x7ff) {
 483         case NVME_SC_SUCCESS:
 484                 return 0;
 485         case NVME_SC_CAP_EXCEEDED:
 486                 return -ENOSPC;
 487         default:
 488                 return -EIO;
 489         }
 490 }
 491
 492 #ifdef CONFIG_BLK_DEV_INTEGRITY
 493 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 494 {
 495         if (be32_to_cpu(pi->ref_tag) == v)
 496                 pi->ref_tag = cpu_to_be32(p);
 497 }
 498
 499 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 500 {
 501         if (be32_to_cpu(pi->ref_tag) == p)
 502                 pi->ref_tag = cpu_to_be32(v);
 503 }
 504
 505 /**
 506  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 507  *
 508  * The virtual start sector is the one that was originally submitted by the
 509  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 510  * start sector may be different. Remap protection information to match the
 511  * physical LBA on writes, and back to the original seed on reads.
 512  *
 513  * Type 0 and 3 do not have a ref tag, so no remapping required.
 514  */
 515 static void nvme_dif_remap(struct request *req,
 516                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 517 {
 518         struct nvme_ns *ns = req->rq_disk->private_data;
 519         struct bio_integrity_payload *bip;
 520         struct t10_pi_tuple *pi;
 521         void *p, *pmap;
 522         u32 i, nlb, ts, phys, virt;
 523
 524         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 525                 return;
 526
 527         bip = bio_integrity(req->bio);
 528         if (!bip)
 529                 return;
 530
 531         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 532
 533         p = pmap;
 534         virt = bip_get_seed(bip);
 535         phys = nvme_block_nr(ns, blk_rq_pos(req));
 536         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 537         ts = ns->disk->integrity->tuple_size;
 538
 539         for (i = 0; i < nlb; i++, virt++, phys++) {
 540                 pi = (struct t10_pi_tuple *)p;
 541                 dif_swap(phys, virt, pi);
 542                 p += ts;
 543         }
 544         kunmap_atomic(pmap);
 545 }
 546
 547 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 548 {
 549         return 0;
 550 }
 551
 552 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 553 {
 554         return 0;
 555 }
 556
 557 struct blk_integrity nvme_meta_noop = {
 558         .name                   = "NVME_META_NOOP",
 559         .generate_fn            = nvme_noop_generate,
 560         .verify_fn              = nvme_noop_verify,
 561 };
 562
 563 static void nvme_init_integrity(struct nvme_ns *ns)
 564 {
 565         struct blk_integrity integrity;
 566
 567         switch (ns->pi_type) {
 568         case NVME_NS_DPS_PI_TYPE3:
 569                 integrity = t10_pi_type3_crc;
 570                 break;
 571         case NVME_NS_DPS_PI_TYPE1:
 572         case NVME_NS_DPS_PI_TYPE2:
 573                 integrity = t10_pi_type1_crc;
 574                 break;
 575         default:
 576                 integrity = nvme_meta_noop;
 577                 break;
 578         }
 579         integrity.tuple_size = ns->ms;
 580         blk_integrity_register(ns->disk, &integrity);
 581         blk_queue_max_integrity_segments(ns->queue, 1);
 582 }
 583 #else /* CONFIG_BLK_DEV_INTEGRITY */
 584 static void nvme_dif_remap(struct request *req,
 585                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 586 {
 587 }
 588 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 589 {
 590 }
 591 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 592 {
 593 }
 594 static void nvme_init_integrity(struct nvme_ns *ns)
 595 {
 596 }
 597 #endif
 598
 599 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 600                                                 struct nvme_completion *cqe)
 601 {
 602         struct nvme_iod *iod = ctx;
 603         struct request *req = iod_get_private(iod);
 604         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 605
 606         u16 status = le16_to_cpup(&cqe->status) >> 1;
 607
 608         if (unlikely(status)) {
 609                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 610                     && (jiffies - req->start_time) < req->timeout) {
 611                         unsigned long flags;
 612
 613                         blk_mq_requeue_request(req);
 614                         spin_lock_irqsave(req->q->queue_lock, flags);
 615                         if (!blk_queue_stopped(req->q))
 616                                 blk_mq_kick_requeue_list(req->q);
 617                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 618                         return;
 619                 }
 620
 621                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 622                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
 623                                 status = -EINTR;
 624                 } else {
 625                         status = nvme_error_status(status);
 626                 }
 627         }
 628
 629         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 630                 u32 result = le32_to_cpup(&cqe->result);
 631                 req->special = (void *)(uintptr_t)result;
 632         }
 633
 634         if (cmd_rq->aborted)
 635                 dev_warn(nvmeq->dev->dev,
 636                         "completing aborted command with status:%04x\n",
 637                         status);
 638
 639         if (iod->nents) {
 640                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 641                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 642                 if (blk_integrity_rq(req)) {
 643                         if (!rq_data_dir(req))
 644                                 nvme_dif_remap(req, nvme_dif_complete);
 645                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 646                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 647                 }
 648         }
 649         nvme_free_iod(nvmeq->dev, iod);
 650
 651         blk_mq_complete_request(req, status);
 652 }
 653
 654 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 655 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 656                 int total_len, gfp_t gfp)
 657 {
 658         struct dma_pool *pool;
 659         int length = total_len;
 660         struct scatterlist *sg = iod->sg;
 661         int dma_len = sg_dma_len(sg);
 662         u64 dma_addr = sg_dma_address(sg);
 663         u32 page_size = dev->page_size;
 664         int offset = dma_addr & (page_size - 1);
 665         __le64 *prp_list;
 666         __le64 **list = iod_list(iod);
 667         dma_addr_t prp_dma;
 668         int nprps, i;
 669
 670         length -= (page_size - offset);
 671         if (length <= 0)
 672                 return total_len;
 673
 674         dma_len -= (page_size - offset);
 675         if (dma_len) {
 676                 dma_addr += (page_size - offset);
 677         } else {
 678                 sg = sg_next(sg);
 679                 dma_addr = sg_dma_address(sg);
 680                 dma_len = sg_dma_len(sg);
 681         }
 682
 683         if (length <= page_size) {
 684                 iod->first_dma = dma_addr;
 685                 return total_len;
 686         }
 687
 688         nprps = DIV_ROUND_UP(length, page_size);
 689         if (nprps <= (256 / 8)) {
 690                 pool = dev->prp_small_pool;
 691                 iod->npages = 0;
 692         } else {
 693                 pool = dev->prp_page_pool;
 694                 iod->npages = 1;
 695         }
 696
 697         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 698         if (!prp_list) {
 699                 iod->first_dma = dma_addr;
 700                 iod->npages = -1;
 701                 return (total_len - length) + page_size;
 702         }
 703         list[0] = prp_list;
 704         iod->first_dma = prp_dma;
 705         i = 0;
 706         for (;;) {
 707                 if (i == page_size >> 3) {
 708                         __le64 *old_prp_list = prp_list;
 709                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 710                         if (!prp_list)
 711                                 return total_len - length;
 712                         list[iod->npages++] = prp_list;
 713                         prp_list[0] = old_prp_list[i - 1];
 714                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 715                         i = 1;
 716                 }
 717                 prp_list[i++] = cpu_to_le64(dma_addr);
 718                 dma_len -= page_size;
 719                 dma_addr += page_size;
 720                 length -= page_size;
 721                 if (length <= 0)
 722                         break;
 723                 if (dma_len > 0)
 724                         continue;
 725                 BUG_ON(dma_len < 0);
 726                 sg = sg_next(sg);
 727                 dma_addr = sg_dma_address(sg);
 728                 dma_len = sg_dma_len(sg);
 729         }
 730
 731         return total_len;
 732 }
 733
 734 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 735                 struct nvme_iod *iod)
 736 {
 737         struct nvme_command cmnd;
 738
 739         memcpy(&cmnd, req->cmd, sizeof(cmnd));
 740         cmnd.rw.command_id = req->tag;
 741         if (req->nr_phys_segments) {
 742                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 743                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 744         }
 745
 746         __nvme_submit_cmd(nvmeq, &cmnd);
 747 }
 748
 749 /*
 750  * We reuse the small pool to allocate the 16-byte range here as it is not
 751  * worth having a special pool for these or additional cases to handle freeing
 752  * the iod.
 753  */
 754 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 755                 struct request *req, struct nvme_iod *iod)
 756 {
 757         struct nvme_dsm_range *range =
 758                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 759         struct nvme_command cmnd;
 760
 761         range->cattr = cpu_to_le32(0);
 762         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 763         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 764
 765         memset(&cmnd, 0, sizeof(cmnd));
 766         cmnd.dsm.opcode = nvme_cmd_dsm;
 767         cmnd.dsm.command_id = req->tag;
 768         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
 769         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
 770         cmnd.dsm.nr = 0;
 771         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 772
 773         __nvme_submit_cmd(nvmeq, &cmnd);
 774 }
 775
 776 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 777                                                                 int cmdid)
 778 {
 779         struct nvme_command cmnd;
 780
 781         memset(&cmnd, 0, sizeof(cmnd));
 782         cmnd.common.opcode = nvme_cmd_flush;
 783         cmnd.common.command_id = cmdid;
 784         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
 785
 786         __nvme_submit_cmd(nvmeq, &cmnd);
 787 }
 788
 789 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 790                                                         struct nvme_ns *ns)
 791 {
 792         struct request *req = iod_get_private(iod);
 793         struct nvme_command cmnd;
 794         u16 control = 0;
 795         u32 dsmgmt = 0;
 796
 797         if (req->cmd_flags & REQ_FUA)
 798                 control |= NVME_RW_FUA;
 799         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 800                 control |= NVME_RW_LR;
 801
 802         if (req->cmd_flags & REQ_RAHEAD)
 803                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 804
 805         memset(&cmnd, 0, sizeof(cmnd));
 806         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 807         cmnd.rw.command_id = req->tag;
 808         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
 809         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 810         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 811         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 812         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 813
 814         if (ns->ms) {
 815                 switch (ns->pi_type) {
 816                 case NVME_NS_DPS_PI_TYPE3:
 817                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 818                         break;
 819                 case NVME_NS_DPS_PI_TYPE1:
 820                 case NVME_NS_DPS_PI_TYPE2:
 821                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 822                                         NVME_RW_PRINFO_PRCHK_REF;
 823                         cmnd.rw.reftag = cpu_to_le32(
 824                                         nvme_block_nr(ns, blk_rq_pos(req)));
 825                         break;
 826                 }
 827                 if (blk_integrity_rq(req))
 828                         cmnd.rw.metadata =
 829                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
 830                 else
 831                         control |= NVME_RW_PRINFO_PRACT;
 832         }
 833
 834         cmnd.rw.control = cpu_to_le16(control);
 835         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
 836
 837         __nvme_submit_cmd(nvmeq, &cmnd);
 838
 839         return 0;
 840 }
 841
 842 /*
 843  * NOTE: ns is NULL when called on the admin queue.
 844  */
 845 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 846                          const struct blk_mq_queue_data *bd)
 847 {
 848         struct nvme_ns *ns = hctx->queue->queuedata;
 849         struct nvme_queue *nvmeq = hctx->driver_data;
 850         struct nvme_dev *dev = nvmeq->dev;
 851         struct request *req = bd->rq;
 852         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 853         struct nvme_iod *iod;
 854         enum dma_data_direction dma_dir;
 855
 856         /*
 857          * If formated with metadata, require the block layer provide a buffer
 858          * unless this namespace is formated such that the metadata can be
 859          * stripped/generated by the controller with PRACT=1.
 860          */
 861         if (ns && ns->ms && !blk_integrity_rq(req)) {
 862                 if (!(ns->pi_type && ns->ms == 8) &&
 863                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 864                         blk_mq_complete_request(req, -EFAULT);
 865                         return BLK_MQ_RQ_QUEUE_OK;
 866                 }
 867         }
 868
 869         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 870         if (!iod)
 871                 return BLK_MQ_RQ_QUEUE_BUSY;
 872
 873         if (req->cmd_flags & REQ_DISCARD) {
 874                 void *range;
 875                 /*
 876                  * We reuse the small pool to allocate the 16-byte range here
 877                  * as it is not worth having a special pool for these or
 878                  * additional cases to handle freeing the iod.
 879                  */
 880                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 881                                                 &iod->first_dma);
 882                 if (!range)
 883                         goto retry_cmd;
 884                 iod_list(iod)[0] = (__le64 *)range;
 885                 iod->npages = 0;
 886         } else if (req->nr_phys_segments) {
 887                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 888
 889                 sg_init_table(iod->sg, req->nr_phys_segments);
 890                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 891                 if (!iod->nents)
 892                         goto error_cmd;
 893
 894                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 895                         goto retry_cmd;
 896
 897                 if (blk_rq_bytes(req) !=
 898                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 899                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 900                         goto retry_cmd;
 901                 }
 902                 if (blk_integrity_rq(req)) {
 903                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 904                                 goto error_cmd;
 905
 906                         sg_init_table(iod->meta_sg, 1);
 907                         if (blk_rq_map_integrity_sg(
 908                                         req->q, req->bio, iod->meta_sg) != 1)
 909                                 goto error_cmd;
 910
 911                         if (rq_data_dir(req))
 912                                 nvme_dif_remap(req, nvme_dif_prep);
 913
 914                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 915                                 goto error_cmd;
 916                 }
 917         }
 918
 919         nvme_set_info(cmd, iod, req_completion);
 920         spin_lock_irq(&nvmeq->q_lock);
 921         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 922                 nvme_submit_priv(nvmeq, req, iod);
 923         else if (req->cmd_flags & REQ_DISCARD)
 924                 nvme_submit_discard(nvmeq, ns, req, iod);
 925         else if (req->cmd_flags & REQ_FLUSH)
 926                 nvme_submit_flush(nvmeq, ns, req->tag);
 927         else
 928                 nvme_submit_iod(nvmeq, iod, ns);
 929
 930         nvme_process_cq(nvmeq);
 931         spin_unlock_irq(&nvmeq->q_lock);
 932         return BLK_MQ_RQ_QUEUE_OK;
 933
 934  error_cmd:
 935         nvme_free_iod(dev, iod);
 936         return BLK_MQ_RQ_QUEUE_ERROR;
 937  retry_cmd:
 938         nvme_free_iod(dev, iod);
 939         return BLK_MQ_RQ_QUEUE_BUSY;
 940 }
 941
 942 static int nvme_process_cq(struct nvme_queue *nvmeq)
 943 {
 944         u16 head, phase;
 945
 946         head = nvmeq->cq_head;
 947         phase = nvmeq->cq_phase;
 948
 949         for (;;) {
 950                 void *ctx;
 951                 nvme_completion_fn fn;
 952                 struct nvme_completion cqe = nvmeq->cqes[head];
 953                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 954                         break;
 955                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 956                 if (++head == nvmeq->q_depth) {
 957                         head = 0;
 958                         phase = !phase;
 959                 }
 960                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 961                 fn(nvmeq, ctx, &cqe);
 962         }
 963
 964         /* If the controller ignores the cq head doorbell and continuously
 965          * writes to the queue, it is theoretically possible to wrap around
 966          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 967          * requires that 0.1% of your interrupts are handled, so this isn't
 968          * a big problem.
 969          */
 970         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 971                 return 0;
 972
 973         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 974         nvmeq->cq_head = head;
 975         nvmeq->cq_phase = phase;
 976
 977         nvmeq->cqe_seen = 1;
 978         return 1;
 979 }
 980
 981 static irqreturn_t nvme_irq(int irq, void *data)
 982 {
 983         irqreturn_t result;
 984         struct nvme_queue *nvmeq = data;
 985         spin_lock(&nvmeq->q_lock);
 986         nvme_process_cq(nvmeq);
 987         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 988         nvmeq->cqe_seen = 0;
 989         spin_unlock(&nvmeq->q_lock);
 990         return result;
 991 }
 992
 993 static irqreturn_t nvme_irq_check(int irq, void *data)
 994 {
 995         struct nvme_queue *nvmeq = data;
 996         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 997         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 998                 return IRQ_NONE;
 999         return IRQ_WAKE_THREAD;
1000 }
1001
1002 /*
1003  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1004  * if the result is positive, it's an NVM Express status code
1005  */
1006 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1007                 void *buffer, void __user *ubuffer, unsigned bufflen,
1008                 u32 *result, unsigned timeout)
1009 {
1010         bool write = cmd->common.opcode & 1;
1011         struct bio *bio = NULL;
1012         struct request *req;
1013         int ret;
1014
1015         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1016         if (IS_ERR(req))
1017                 return PTR_ERR(req);
1018
1019         req->cmd_type = REQ_TYPE_DRV_PRIV;
1020         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1021         req->__data_len = 0;
1022         req->__sector = (sector_t) -1;
1023         req->bio = req->biotail = NULL;
1024
1025         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1026
1027         req->cmd = (unsigned char *)cmd;
1028         req->cmd_len = sizeof(struct nvme_command);
1029         req->special = (void *)0;
1030
1031         if (buffer && bufflen) {
1032                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1033                 if (ret)
1034                         goto out;
1035         } else if (ubuffer && bufflen) {
1036                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1037                 if (ret)
1038                         goto out;
1039                 bio = req->bio;
1040         }
1041
1042         blk_execute_rq(req->q, NULL, req, 0);
1043         if (bio)
1044                 blk_rq_unmap_user(bio);
1045         if (result)
1046                 *result = (u32)(uintptr_t)req->special;
1047         ret = req->errors;
1048  out:
1049         blk_mq_free_request(req);
1050         return ret;
1051 }
1052
1053 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1054                 void *buffer, unsigned bufflen)
1055 {
1056         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1057 }
1058
1059 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1060 {
1061         struct nvme_queue *nvmeq = dev->queues[0];
1062         struct nvme_command c;
1063         struct nvme_cmd_info *cmd_info;
1064         struct request *req;
1065
1066         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1067         if (IS_ERR(req))
1068                 return PTR_ERR(req);
1069
1070         req->cmd_flags |= REQ_NO_TIMEOUT;
1071         cmd_info = blk_mq_rq_to_pdu(req);
1072         nvme_set_info(cmd_info, NULL, async_req_completion);
1073
1074         memset(&c, 0, sizeof(c));
1075         c.common.opcode = nvme_admin_async_event;
1076         c.common.command_id = req->tag;
1077
1078         blk_mq_free_request(req);
1079         __nvme_submit_cmd(nvmeq, &c);
1080         return 0;
1081 }
1082
1083 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1084                         struct nvme_command *cmd,
1085                         struct async_cmd_info *cmdinfo, unsigned timeout)
1086 {
1087         struct nvme_queue *nvmeq = dev->queues[0];
1088         struct request *req;
1089         struct nvme_cmd_info *cmd_rq;
1090
1091         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1092         if (IS_ERR(req))
1093                 return PTR_ERR(req);
1094
1095         req->timeout = timeout;
1096         cmd_rq = blk_mq_rq_to_pdu(req);
1097         cmdinfo->req = req;
1098         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1099         cmdinfo->status = -EINTR;
1100
1101         cmd->common.command_id = req->tag;
1102
1103         nvme_submit_cmd(nvmeq, cmd);
1104         return 0;
1105 }
1106
1107 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1108 {
1109         struct nvme_command c;
1110
1111         memset(&c, 0, sizeof(c));
1112         c.delete_queue.opcode = opcode;
1113         c.delete_queue.qid = cpu_to_le16(id);
1114
1115         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1116 }
1117
1118 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1119                                                 struct nvme_queue *nvmeq)
1120 {
1121         struct nvme_command c;
1122         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1123
1124         /*
1125          * Note: we (ab)use the fact the the prp fields survive if no data
1126          * is attached to the request.
1127          */
1128         memset(&c, 0, sizeof(c));
1129         c.create_cq.opcode = nvme_admin_create_cq;
1130         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1131         c.create_cq.cqid = cpu_to_le16(qid);
1132         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1133         c.create_cq.cq_flags = cpu_to_le16(flags);
1134         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1135
1136         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1137 }
1138
1139 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1140                                                 struct nvme_queue *nvmeq)
1141 {
1142         struct nvme_command c;
1143         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1144
1145         /*
1146          * Note: we (ab)use the fact the the prp fields survive if no data
1147          * is attached to the request.
1148          */
1149         memset(&c, 0, sizeof(c));
1150         c.create_sq.opcode = nvme_admin_create_sq;
1151         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1152         c.create_sq.sqid = cpu_to_le16(qid);
1153         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1154         c.create_sq.sq_flags = cpu_to_le16(flags);
1155         c.create_sq.cqid = cpu_to_le16(qid);
1156
1157         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1158 }
1159
1160 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1161 {
1162         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1163 }
1164
1165 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1166 {
1167         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1168 }
1169
1170 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1171 {
1172         struct nvme_command c = { };
1173         int error;
1174
1175         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1176         c.identify.opcode = nvme_admin_identify;
1177         c.identify.cns = cpu_to_le32(1);
1178
1179         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1180         if (!*id)
1181                 return -ENOMEM;
1182
1183         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1184                         sizeof(struct nvme_id_ctrl));
1185         if (error)
1186                 kfree(*id);
1187         return error;
1188 }
1189
1190 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1191                 struct nvme_id_ns **id)
1192 {
1193         struct nvme_command c = { };
1194         int error;
1195
1196         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1197         c.identify.opcode = nvme_admin_identify,
1198         c.identify.nsid = cpu_to_le32(nsid),
1199
1200         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1201         if (!*id)
1202                 return -ENOMEM;
1203
1204         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1205                         sizeof(struct nvme_id_ns));
1206         if (error)
1207                 kfree(*id);
1208         return error;
1209 }
1210
1211 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1212                                         dma_addr_t dma_addr, u32 *result)
1213 {
1214         struct nvme_command c;
1215
1216         memset(&c, 0, sizeof(c));
1217         c.features.opcode = nvme_admin_get_features;
1218         c.features.nsid = cpu_to_le32(nsid);
1219         c.features.prp1 = cpu_to_le64(dma_addr);
1220         c.features.fid = cpu_to_le32(fid);
1221
1222         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1223                         result, 0);
1224 }
1225
1226 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1227                                         dma_addr_t dma_addr, u32 *result)
1228 {
1229         struct nvme_command c;
1230
1231         memset(&c, 0, sizeof(c));
1232         c.features.opcode = nvme_admin_set_features;
1233         c.features.prp1 = cpu_to_le64(dma_addr);
1234         c.features.fid = cpu_to_le32(fid);
1235         c.features.dword11 = cpu_to_le32(dword11);
1236
1237         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1238                         result, 0);
1239 }
1240
1241 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1242 {
1243         struct nvme_command c = { };
1244         int error;
1245
1246         c.common.opcode = nvme_admin_get_log_page,
1247         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1248         c.common.cdw10[0] = cpu_to_le32(
1249                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1250                          NVME_LOG_SMART),
1251
1252         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1253         if (!*log)
1254                 return -ENOMEM;
1255
1256         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1257                         sizeof(struct nvme_smart_log));
1258         if (error)
1259                 kfree(*log);
1260         return error;
1261 }
1262
1263 /**
1264  * nvme_abort_req - Attempt aborting a request
1265  *
1266  * Schedule controller reset if the command was already aborted once before and
1267  * still hasn't been returned to the driver, or if this is the admin queue.
1268  */
1269 static void nvme_abort_req(struct request *req)
1270 {
1271         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1272         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1273         struct nvme_dev *dev = nvmeq->dev;
1274         struct request *abort_req;
1275         struct nvme_cmd_info *abort_cmd;
1276         struct nvme_command cmd;
1277
1278         if (!nvmeq->qid || cmd_rq->aborted) {
1279                 unsigned long flags;
1280
1281                 spin_lock_irqsave(&dev_list_lock, flags);
1282                 if (work_busy(&dev->reset_work))
1283                         goto out;
1284                 list_del_init(&dev->node);
1285                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1286                                                         req->tag, nvmeq->qid);
1287                 queue_work(nvme_workq, &dev->reset_work);
1288  out:
1289                 spin_unlock_irqrestore(&dev_list_lock, flags);
1290                 return;
1291         }
1292
1293         if (!dev->abort_limit)
1294                 return;
1295
1296         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1297                                                                         false);
1298         if (IS_ERR(abort_req))
1299                 return;
1300
1301         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1302         nvme_set_info(abort_cmd, abort_req, abort_completion);
1303
1304         memset(&cmd, 0, sizeof(cmd));
1305         cmd.abort.opcode = nvme_admin_abort_cmd;
1306         cmd.abort.cid = req->tag;
1307         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1308         cmd.abort.command_id = abort_req->tag;
1309
1310         --dev->abort_limit;
1311         cmd_rq->aborted = 1;
1312
1313         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1314                                                         nvmeq->qid);
1315         nvme_submit_cmd(dev->queues[0], &cmd);
1316 }
1317
1318 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1319 {
1320         struct nvme_queue *nvmeq = data;
1321         void *ctx;
1322         nvme_completion_fn fn;
1323         struct nvme_cmd_info *cmd;
1324         struct nvme_completion cqe;
1325
1326         if (!blk_mq_request_started(req))
1327                 return;
1328
1329         cmd = blk_mq_rq_to_pdu(req);
1330
1331         if (cmd->ctx == CMD_CTX_CANCELLED)
1332                 return;
1333
1334         if (blk_queue_dying(req->q))
1335                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1336         else
1337                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1338
1339
1340         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1341                                                 req->tag, nvmeq->qid);
1342         ctx = cancel_cmd_info(cmd, &fn);
1343         fn(nvmeq, ctx, &cqe);
1344 }
1345
1346 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1347 {
1348         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1349         struct nvme_queue *nvmeq = cmd->nvmeq;
1350
1351         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1352                                                         nvmeq->qid);
1353         spin_lock_irq(&nvmeq->q_lock);
1354         nvme_abort_req(req);
1355         spin_unlock_irq(&nvmeq->q_lock);
1356
1357         /*
1358          * The aborted req will be completed on receiving the abort req.
1359          * We enable the timer again. If hit twice, it'll cause a device reset,
1360          * as the device then is in a faulty state.
1361          */
1362         return BLK_EH_RESET_TIMER;
1363 }
1364
1365 static void nvme_free_queue(struct nvme_queue *nvmeq)
1366 {
1367         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1368                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1369         if (nvmeq->sq_cmds)
1370                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1371                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1372         kfree(nvmeq);
1373 }
1374
1375 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1376 {
1377         int i;
1378
1379         for (i = dev->queue_count - 1; i >= lowest; i--) {
1380                 struct nvme_queue *nvmeq = dev->queues[i];
1381                 dev->queue_count--;
1382                 dev->queues[i] = NULL;
1383                 nvme_free_queue(nvmeq);
1384         }
1385 }
1386
1387 /**
1388  * nvme_suspend_queue - put queue into suspended state
1389  * @nvmeq - queue to suspend
1390  */
1391 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1392 {
1393         int vector;
1394
1395         spin_lock_irq(&nvmeq->q_lock);
1396         if (nvmeq->cq_vector == -1) {
1397                 spin_unlock_irq(&nvmeq->q_lock);
1398                 return 1;
1399         }
1400         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1401         nvmeq->dev->online_queues--;
1402         nvmeq->cq_vector = -1;
1403         spin_unlock_irq(&nvmeq->q_lock);
1404
1405         if (!nvmeq->qid && nvmeq->dev->admin_q)
1406                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1407
1408         irq_set_affinity_hint(vector, NULL);
1409         free_irq(vector, nvmeq);
1410
1411         return 0;
1412 }
1413
1414 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1415 {
1416         spin_lock_irq(&nvmeq->q_lock);
1417         if (nvmeq->tags && *nvmeq->tags)
1418                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1419         spin_unlock_irq(&nvmeq->q_lock);
1420 }
1421
1422 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1423 {
1424         struct nvme_queue *nvmeq = dev->queues[qid];
1425
1426         if (!nvmeq)
1427                 return;
1428         if (nvme_suspend_queue(nvmeq))
1429                 return;
1430
1431         /* Don't tell the adapter to delete the admin queue.
1432          * Don't tell a removed adapter to delete IO queues. */
1433         if (qid && readl(&dev->bar->csts) != -1) {
1434                 adapter_delete_sq(dev, qid);
1435                 adapter_delete_cq(dev, qid);
1436         }
1437
1438         spin_lock_irq(&nvmeq->q_lock);
1439         nvme_process_cq(nvmeq);
1440         spin_unlock_irq(&nvmeq->q_lock);
1441 }
1442
1443 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1444                                 int entry_size)
1445 {
1446         int q_depth = dev->q_depth;
1447         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1448
1449         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1450                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1451                 mem_per_q = round_down(mem_per_q, dev->page_size);
1452                 q_depth = div_u64(mem_per_q, entry_size);
1453
1454                 /*
1455                  * Ensure the reduced q_depth is above some threshold where it
1456                  * would be better to map queues in system memory with the
1457                  * original depth
1458                  */
1459                 if (q_depth < 64)
1460                         return -ENOMEM;
1461         }
1462
1463         return q_depth;
1464 }
1465
1466 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1467                                 int qid, int depth)
1468 {
1469         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1470                 unsigned offset = (qid - 1) *
1471                                         roundup(SQ_SIZE(depth), dev->page_size);
1472                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1473                 nvmeq->sq_cmds_io = dev->cmb + offset;
1474         } else {
1475                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1476                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1477                 if (!nvmeq->sq_cmds)
1478                         return -ENOMEM;
1479         }
1480
1481         return 0;
1482 }
1483
1484 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1485                                                         int depth)
1486 {
1487         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1488         if (!nvmeq)
1489                 return NULL;
1490
1491         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1492                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1493         if (!nvmeq->cqes)
1494                 goto free_nvmeq;
1495
1496         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1497                 goto free_cqdma;
1498
1499         nvmeq->q_dmadev = dev->dev;
1500         nvmeq->dev = dev;
1501         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1502                         dev->instance, qid);
1503         spin_lock_init(&nvmeq->q_lock);
1504         nvmeq->cq_head = 0;
1505         nvmeq->cq_phase = 1;
1506         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1507         nvmeq->q_depth = depth;
1508         nvmeq->qid = qid;
1509         nvmeq->cq_vector = -1;
1510         dev->queues[qid] = nvmeq;
1511
1512         /* make sure queue descriptor is set before queue count, for kthread */
1513         mb();
1514         dev->queue_count++;
1515
1516         return nvmeq;
1517
1518  free_cqdma:
1519         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1520                                                         nvmeq->cq_dma_addr);
1521  free_nvmeq:
1522         kfree(nvmeq);
1523         return NULL;
1524 }
1525
1526 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1527                                                         const char *name)
1528 {
1529         if (use_threaded_interrupts)
1530                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1531                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1532                                         name, nvmeq);
1533         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1534                                 IRQF_SHARED, name, nvmeq);
1535 }
1536
1537 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1538 {
1539         struct nvme_dev *dev = nvmeq->dev;
1540
1541         spin_lock_irq(&nvmeq->q_lock);
1542         nvmeq->sq_tail = 0;
1543         nvmeq->cq_head = 0;
1544         nvmeq->cq_phase = 1;
1545         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1546         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1547         dev->online_queues++;
1548         spin_unlock_irq(&nvmeq->q_lock);
1549 }
1550
1551 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1552 {
1553         struct nvme_dev *dev = nvmeq->dev;
1554         int result;
1555
1556         nvmeq->cq_vector = qid - 1;
1557         result = adapter_alloc_cq(dev, qid, nvmeq);
1558         if (result < 0)
1559                 return result;
1560
1561         result = adapter_alloc_sq(dev, qid, nvmeq);
1562         if (result < 0)
1563                 goto release_cq;
1564
1565         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1566         if (result < 0)
1567                 goto release_sq;
1568
1569         nvme_init_queue(nvmeq, qid);
1570         return result;
1571
1572  release_sq:
1573         adapter_delete_sq(dev, qid);
1574  release_cq:
1575         adapter_delete_cq(dev, qid);
1576         return result;
1577 }
1578
1579 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1580 {
1581         unsigned long timeout;
1582         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1583
1584         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1585
1586         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1587                 msleep(100);
1588                 if (fatal_signal_pending(current))
1589                         return -EINTR;
1590                 if (time_after(jiffies, timeout)) {
1591                         dev_err(dev->dev,
1592                                 "Device not ready; aborting %s\n", enabled ?
1593                                                 "initialisation" : "reset");
1594                         return -ENODEV;
1595                 }
1596         }
1597
1598         return 0;
1599 }
1600
1601 /*
1602  * If the device has been passed off to us in an enabled state, just clear
1603  * the enabled bit.  The spec says we should set the 'shutdown notification
1604  * bits', but doing so may cause the device to complete commands to the
1605  * admin queue ... and we don't know what memory that might be pointing at!
1606  */
1607 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1608 {
1609         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1610         dev->ctrl_config &= ~NVME_CC_ENABLE;
1611         writel(dev->ctrl_config, &dev->bar->cc);
1612
1613         return nvme_wait_ready(dev, cap, false);
1614 }
1615
1616 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1617 {
1618         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1619         dev->ctrl_config |= NVME_CC_ENABLE;
1620         writel(dev->ctrl_config, &dev->bar->cc);
1621
1622         return nvme_wait_ready(dev, cap, true);
1623 }
1624
1625 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1626 {
1627         unsigned long timeout;
1628
1629         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1630         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1631
1632         writel(dev->ctrl_config, &dev->bar->cc);
1633
1634         timeout = SHUTDOWN_TIMEOUT + jiffies;
1635         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1636                                                         NVME_CSTS_SHST_CMPLT) {
1637                 msleep(100);
1638                 if (fatal_signal_pending(current))
1639                         return -EINTR;
1640                 if (time_after(jiffies, timeout)) {
1641                         dev_err(dev->dev,
1642                                 "Device shutdown incomplete; abort shutdown\n");
1643                         return -ENODEV;
1644                 }
1645         }
1646
1647         return 0;
1648 }
1649
1650 static struct blk_mq_ops nvme_mq_admin_ops = {
1651         .queue_rq       = nvme_queue_rq,
1652         .map_queue      = blk_mq_map_queue,
1653         .init_hctx      = nvme_admin_init_hctx,
1654         .exit_hctx      = nvme_admin_exit_hctx,
1655         .init_request   = nvme_admin_init_request,
1656         .timeout        = nvme_timeout,
1657 };
1658
1659 static struct blk_mq_ops nvme_mq_ops = {
1660         .queue_rq       = nvme_queue_rq,
1661         .map_queue      = blk_mq_map_queue,
1662         .init_hctx      = nvme_init_hctx,
1663         .init_request   = nvme_init_request,
1664         .timeout        = nvme_timeout,
1665 };
1666
1667 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1668 {
1669         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1670                 blk_cleanup_queue(dev->admin_q);
1671                 blk_mq_free_tag_set(&dev->admin_tagset);
1672         }
1673 }
1674
1675 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1676 {
1677         if (!dev->admin_q) {
1678                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1679                 dev->admin_tagset.nr_hw_queues = 1;
1680                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1681                 dev->admin_tagset.reserved_tags = 1;
1682                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1683                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1684                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1685                 dev->admin_tagset.driver_data = dev;
1686
1687                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1688                         return -ENOMEM;
1689
1690                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1691                 if (IS_ERR(dev->admin_q)) {
1692                         blk_mq_free_tag_set(&dev->admin_tagset);
1693                         return -ENOMEM;
1694                 }
1695                 if (!blk_get_queue(dev->admin_q)) {
1696                         nvme_dev_remove_admin(dev);
1697                         dev->admin_q = NULL;
1698                         return -ENODEV;
1699                 }
1700         } else
1701                 blk_mq_unfreeze_queue(dev->admin_q);
1702
1703         return 0;
1704 }
1705
1706 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1707 {
1708         int result;
1709         u32 aqa;
1710         u64 cap = readq(&dev->bar->cap);
1711         struct nvme_queue *nvmeq;
1712         unsigned page_shift = PAGE_SHIFT;
1713         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1714         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1715
1716         if (page_shift < dev_page_min) {
1717                 dev_err(dev->dev,
1718                                 "Minimum device page size (%u) too large for "
1719                                 "host (%u)\n", 1 << dev_page_min,
1720                                 1 << page_shift);
1721                 return -ENODEV;
1722         }
1723         if (page_shift > dev_page_max) {
1724                 dev_info(dev->dev,
1725                                 "Device maximum page size (%u) smaller than "
1726                                 "host (%u); enabling work-around\n",
1727                                 1 << dev_page_max, 1 << page_shift);
1728                 page_shift = dev_page_max;
1729         }
1730
1731         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1732                                                 NVME_CAP_NSSRC(cap) : 0;
1733
1734         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1735                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1736
1737         result = nvme_disable_ctrl(dev, cap);
1738         if (result < 0)
1739                 return result;
1740
1741         nvmeq = dev->queues[0];
1742         if (!nvmeq) {
1743                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1744                 if (!nvmeq)
1745                         return -ENOMEM;
1746         }
1747
1748         aqa = nvmeq->q_depth - 1;
1749         aqa |= aqa << 16;
1750
1751         dev->page_size = 1 << page_shift;
1752
1753         dev->ctrl_config = NVME_CC_CSS_NVM;
1754         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1755         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1756         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1757
1758         writel(aqa, &dev->bar->aqa);
1759         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1760         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1761
1762         result = nvme_enable_ctrl(dev, cap);
1763         if (result)
1764                 goto free_nvmeq;
1765
1766         nvmeq->cq_vector = 0;
1767         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1768         if (result) {
1769                 nvmeq->cq_vector = -1;
1770                 goto free_nvmeq;
1771         }
1772
1773         return result;
1774
1775  free_nvmeq:
1776         nvme_free_queues(dev, 0);
1777         return result;
1778 }
1779
1780 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1781 {
1782         struct nvme_dev *dev = ns->dev;
1783         struct nvme_user_io io;
1784         struct nvme_command c;
1785         unsigned length, meta_len;
1786         int status, write;
1787         dma_addr_t meta_dma = 0;
1788         void *meta = NULL;
1789         void __user *metadata;
1790
1791         if (copy_from_user(&io, uio, sizeof(io)))
1792                 return -EFAULT;
1793
1794         switch (io.opcode) {
1795         case nvme_cmd_write:
1796         case nvme_cmd_read:
1797         case nvme_cmd_compare:
1798                 break;
1799         default:
1800                 return -EINVAL;
1801         }
1802
1803         length = (io.nblocks + 1) << ns->lba_shift;
1804         meta_len = (io.nblocks + 1) * ns->ms;
1805         metadata = (void __user *)(unsigned long)io.metadata;
1806         write = io.opcode & 1;
1807
1808         if (ns->ext) {
1809                 length += meta_len;
1810                 meta_len = 0;
1811         }
1812         if (meta_len) {
1813                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1814                         return -EINVAL;
1815
1816                 meta = dma_alloc_coherent(dev->dev, meta_len,
1817                                                 &meta_dma, GFP_KERNEL);
1818
1819                 if (!meta) {
1820                         status = -ENOMEM;
1821                         goto unmap;
1822                 }
1823                 if (write) {
1824                         if (copy_from_user(meta, metadata, meta_len)) {
1825                                 status = -EFAULT;
1826                                 goto unmap;
1827                         }
1828                 }
1829         }
1830
1831         memset(&c, 0, sizeof(c));
1832         c.rw.opcode = io.opcode;
1833         c.rw.flags = io.flags;
1834         c.rw.nsid = cpu_to_le32(ns->ns_id);
1835         c.rw.slba = cpu_to_le64(io.slba);
1836         c.rw.length = cpu_to_le16(io.nblocks);
1837         c.rw.control = cpu_to_le16(io.control);
1838         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1839         c.rw.reftag = cpu_to_le32(io.reftag);
1840         c.rw.apptag = cpu_to_le16(io.apptag);
1841         c.rw.appmask = cpu_to_le16(io.appmask);
1842         c.rw.metadata = cpu_to_le64(meta_dma);
1843
1844         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1845                         (void __user *)io.addr, length, NULL, 0);
1846  unmap:
1847         if (meta) {
1848                 if (status == NVME_SC_SUCCESS && !write) {
1849                         if (copy_to_user(metadata, meta, meta_len))
1850                                 status = -EFAULT;
1851                 }
1852                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1853         }
1854         return status;
1855 }
1856
1857 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1858                         struct nvme_passthru_cmd __user *ucmd)
1859 {
1860         struct nvme_passthru_cmd cmd;
1861         struct nvme_command c;
1862         unsigned timeout = 0;
1863         int status;
1864
1865         if (!capable(CAP_SYS_ADMIN))
1866                 return -EACCES;
1867         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1868                 return -EFAULT;
1869
1870         memset(&c, 0, sizeof(c));
1871         c.common.opcode = cmd.opcode;
1872         c.common.flags = cmd.flags;
1873         c.common.nsid = cpu_to_le32(cmd.nsid);
1874         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1875         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1876         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1877         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1878         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1879         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1880         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1881         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1882
1883         if (cmd.timeout_ms)
1884                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1885
1886         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1887                         NULL, (void __user *)cmd.addr, cmd.data_len,
1888                         &cmd.result, timeout);
1889         if (status >= 0) {
1890                 if (put_user(cmd.result, &ucmd->result))
1891                         return -EFAULT;
1892         }
1893
1894         return status;
1895 }
1896
1897 static int nvme_subsys_reset(struct nvme_dev *dev)
1898 {
1899         if (!dev->subsystem)
1900                 return -ENOTTY;
1901
1902         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1903         return 0;
1904 }
1905
1906 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1907                                                         unsigned long arg)
1908 {
1909         struct nvme_ns *ns = bdev->bd_disk->private_data;
1910
1911         switch (cmd) {
1912         case NVME_IOCTL_ID:
1913                 force_successful_syscall_return();
1914                 return ns->ns_id;
1915         case NVME_IOCTL_ADMIN_CMD:
1916                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1917         case NVME_IOCTL_IO_CMD:
1918                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1919         case NVME_IOCTL_SUBMIT_IO:
1920                 return nvme_submit_io(ns, (void __user *)arg);
1921         case SG_GET_VERSION_NUM:
1922                 return nvme_sg_get_version_num((void __user *)arg);
1923         case SG_IO:
1924                 return nvme_sg_io(ns, (void __user *)arg);
1925         default:
1926                 return -ENOTTY;
1927         }
1928 }
1929
1930 #ifdef CONFIG_COMPAT
1931 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1932                                         unsigned int cmd, unsigned long arg)
1933 {
1934         switch (cmd) {
1935         case SG_IO:
1936                 return -ENOIOCTLCMD;
1937         }
1938         return nvme_ioctl(bdev, mode, cmd, arg);
1939 }
1940 #else
1941 #define nvme_compat_ioctl       NULL
1942 #endif
1943
1944 static void nvme_free_dev(struct kref *kref);
1945 static void nvme_free_ns(struct kref *kref)
1946 {
1947         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1948
1949         spin_lock(&dev_list_lock);
1950         ns->disk->private_data = NULL;
1951         spin_unlock(&dev_list_lock);
1952
1953         kref_put(&ns->dev->kref, nvme_free_dev);
1954         put_disk(ns->disk);
1955         kfree(ns);
1956 }
1957
1958 static int nvme_open(struct block_device *bdev, fmode_t mode)
1959 {
1960         int ret = 0;
1961         struct nvme_ns *ns;
1962
1963         spin_lock(&dev_list_lock);
1964         ns = bdev->bd_disk->private_data;
1965         if (!ns)
1966                 ret = -ENXIO;
1967         else if (!kref_get_unless_zero(&ns->kref))
1968                 ret = -ENXIO;
1969         spin_unlock(&dev_list_lock);
1970
1971         return ret;
1972 }
1973
1974 static void nvme_release(struct gendisk *disk, fmode_t mode)
1975 {
1976         struct nvme_ns *ns = disk->private_data;
1977         kref_put(&ns->kref, nvme_free_ns);
1978 }
1979
1980 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1981 {
1982         /* some standard values */
1983         geo->heads = 1 << 6;
1984         geo->sectors = 1 << 5;
1985         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1986         return 0;
1987 }
1988
1989 static void nvme_config_discard(struct nvme_ns *ns)
1990 {
1991         u32 logical_block_size = queue_logical_block_size(ns->queue);
1992         ns->queue->limits.discard_zeroes_data = 0;
1993         ns->queue->limits.discard_alignment = logical_block_size;
1994         ns->queue->limits.discard_granularity = logical_block_size;
1995         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1996         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1997 }
1998
1999 static int nvme_revalidate_disk(struct gendisk *disk)
2000 {
2001         struct nvme_ns *ns = disk->private_data;
2002         struct nvme_dev *dev = ns->dev;
2003         struct nvme_id_ns *id;
2004         u8 lbaf, pi_type;
2005         u16 old_ms;
2006         unsigned short bs;
2007
2008         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2009                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2010                                                 dev->instance, ns->ns_id);
2011                 return -ENODEV;
2012         }
2013         if (id->ncap == 0) {
2014                 kfree(id);
2015                 return -ENODEV;
2016         }
2017
2018         old_ms = ns->ms;
2019         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2020         ns->lba_shift = id->lbaf[lbaf].ds;
2021         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2022         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2023
2024         /*
2025          * If identify namespace failed, use default 512 byte block size so
2026          * block layer can use before failing read/write for 0 capacity.
2027          */
2028         if (ns->lba_shift == 0)
2029                 ns->lba_shift = 9;
2030         bs = 1 << ns->lba_shift;
2031
2032         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2033         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2034                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2035
2036         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2037                                 ns->ms != old_ms ||
2038                                 bs != queue_logical_block_size(disk->queue) ||
2039                                 (ns->ms && ns->ext)))
2040                 blk_integrity_unregister(disk);
2041
2042         ns->pi_type = pi_type;
2043         blk_queue_logical_block_size(ns->queue, bs);
2044
2045         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2046                                                                 !ns->ext)
2047                 nvme_init_integrity(ns);
2048
2049         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2050                 set_capacity(disk, 0);
2051         else
2052                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2053
2054         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2055                 nvme_config_discard(ns);
2056
2057         kfree(id);
2058         return 0;
2059 }
2060
2061 static const struct block_device_operations nvme_fops = {
2062         .owner          = THIS_MODULE,
2063         .ioctl          = nvme_ioctl,
2064         .compat_ioctl   = nvme_compat_ioctl,
2065         .open           = nvme_open,
2066         .release        = nvme_release,
2067         .getgeo         = nvme_getgeo,
2068         .revalidate_disk= nvme_revalidate_disk,
2069 };
2070
2071 static int nvme_kthread(void *data)
2072 {
2073         struct nvme_dev *dev, *next;
2074
2075         while (!kthread_should_stop()) {
2076                 set_current_state(TASK_INTERRUPTIBLE);
2077                 spin_lock(&dev_list_lock);
2078                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2079                         int i;
2080                         u32 csts = readl(&dev->bar->csts);
2081
2082                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2083                                                         csts & NVME_CSTS_CFS) {
2084                                 if (work_busy(&dev->reset_work))
2085                                         continue;
2086                                 list_del_init(&dev->node);
2087                                 dev_warn(dev->dev,
2088                                         "Failed status: %x, reset controller\n",
2089                                         readl(&dev->bar->csts));
2090                                 queue_work(nvme_workq, &dev->reset_work);
2091                                 continue;
2092                         }
2093                         for (i = 0; i < dev->queue_count; i++) {
2094                                 struct nvme_queue *nvmeq = dev->queues[i];
2095                                 if (!nvmeq)
2096                                         continue;
2097                                 spin_lock_irq(&nvmeq->q_lock);
2098                                 nvme_process_cq(nvmeq);
2099
2100                                 while ((i == 0) && (dev->event_limit > 0)) {
2101                                         if (nvme_submit_async_admin_req(dev))
2102                                                 break;
2103                                         dev->event_limit--;
2104                                 }
2105                                 spin_unlock_irq(&nvmeq->q_lock);
2106                         }
2107                 }
2108                 spin_unlock(&dev_list_lock);
2109                 schedule_timeout(round_jiffies_relative(HZ));
2110         }
2111         return 0;
2112 }
2113
2114 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2115 {
2116         struct nvme_ns *ns;
2117         struct gendisk *disk;
2118         int node = dev_to_node(dev->dev);
2119
2120         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2121         if (!ns)
2122                 return;
2123
2124         ns->queue = blk_mq_init_queue(&dev->tagset);
2125         if (IS_ERR(ns->queue))
2126                 goto out_free_ns;
2127         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2128         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2129         ns->dev = dev;
2130         ns->queue->queuedata = ns;
2131
2132         disk = alloc_disk_node(0, node);
2133         if (!disk)
2134                 goto out_free_queue;
2135
2136         kref_init(&ns->kref);
2137         ns->ns_id = nsid;
2138         ns->disk = disk;
2139         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2140         list_add_tail(&ns->list, &dev->namespaces);
2141
2142         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2143         if (dev->max_hw_sectors) {
2144                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2145                 blk_queue_max_segments(ns->queue,
2146                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2147         }
2148         if (dev->stripe_size)
2149                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2150         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2151                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2152         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2153
2154         disk->major = nvme_major;
2155         disk->first_minor = 0;
2156         disk->fops = &nvme_fops;
2157         disk->private_data = ns;
2158         disk->queue = ns->queue;
2159         disk->driverfs_dev = dev->device;
2160         disk->flags = GENHD_FL_EXT_DEVT;
2161         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2162
2163         /*
2164          * Initialize capacity to 0 until we establish the namespace format and
2165          * setup integrity extentions if necessary. The revalidate_disk after
2166          * add_disk allows the driver to register with integrity if the format
2167          * requires it.
2168          */
2169         set_capacity(disk, 0);
2170         if (nvme_revalidate_disk(ns->disk))
2171                 goto out_free_disk;
2172
2173         kref_get(&dev->kref);
2174         add_disk(ns->disk);
2175         if (ns->ms) {
2176                 struct block_device *bd = bdget_disk(ns->disk, 0);
2177                 if (!bd)
2178                         return;
2179                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2180                         bdput(bd);
2181                         return;
2182                 }
2183                 blkdev_reread_part(bd);
2184                 blkdev_put(bd, FMODE_READ);
2185         }
2186         return;
2187  out_free_disk:
2188         kfree(disk);
2189         list_del(&ns->list);
2190  out_free_queue:
2191         blk_cleanup_queue(ns->queue);
2192  out_free_ns:
2193         kfree(ns);
2194 }
2195
2196 static void nvme_create_io_queues(struct nvme_dev *dev)
2197 {
2198         unsigned i;
2199
2200         for (i = dev->queue_count; i <= dev->max_qid; i++)
2201                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2202                         break;
2203
2204         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2205                 if (nvme_create_queue(dev->queues[i], i))
2206                         break;
2207 }
2208
2209 static int set_queue_count(struct nvme_dev *dev, int count)
2210 {
2211         int status;
2212         u32 result;
2213         u32 q_count = (count - 1) | ((count - 1) << 16);
2214
2215         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2216                                                                 &result);
2217         if (status < 0)
2218                 return status;
2219         if (status > 0) {
2220                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2221                 return 0;
2222         }
2223         return min(result & 0xffff, result >> 16) + 1;
2224 }
2225
2226 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2227 {
2228         u64 szu, size, offset;
2229         u32 cmbloc;
2230         resource_size_t bar_size;
2231         struct pci_dev *pdev = to_pci_dev(dev->dev);
2232         void __iomem *cmb;
2233         dma_addr_t dma_addr;
2234
2235         if (!use_cmb_sqes)
2236                 return NULL;
2237
2238         dev->cmbsz = readl(&dev->bar->cmbsz);
2239         if (!(NVME_CMB_SZ(dev->cmbsz)))
2240                 return NULL;
2241
2242         cmbloc = readl(&dev->bar->cmbloc);
2243
2244         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2245         size = szu * NVME_CMB_SZ(dev->cmbsz);
2246         offset = szu * NVME_CMB_OFST(cmbloc);
2247         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2248
2249         if (offset > bar_size)
2250                 return NULL;
2251
2252         /*
2253          * Controllers may support a CMB size larger than their BAR,
2254          * for example, due to being behind a bridge. Reduce the CMB to
2255          * the reported size of the BAR
2256          */
2257         if (size > bar_size - offset)
2258                 size = bar_size - offset;
2259
2260         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2261         cmb = ioremap_wc(dma_addr, size);
2262         if (!cmb)
2263                 return NULL;
2264
2265         dev->cmb_dma_addr = dma_addr;
2266         dev->cmb_size = size;
2267         return cmb;
2268 }
2269
2270 static inline void nvme_release_cmb(struct nvme_dev *dev)
2271 {
2272         if (dev->cmb) {
2273                 iounmap(dev->cmb);
2274                 dev->cmb = NULL;
2275         }
2276 }
2277
2278 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2279 {
2280         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2281 }
2282
2283 static int nvme_setup_io_queues(struct nvme_dev *dev)
2284 {
2285         struct nvme_queue *adminq = dev->queues[0];
2286         struct pci_dev *pdev = to_pci_dev(dev->dev);
2287         int result, i, vecs, nr_io_queues, size;
2288
2289         nr_io_queues = num_possible_cpus();
2290         result = set_queue_count(dev, nr_io_queues);
2291         if (result <= 0)
2292                 return result;
2293         if (result < nr_io_queues)
2294                 nr_io_queues = result;
2295
2296         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2297                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2298                                 sizeof(struct nvme_command));
2299                 if (result > 0)
2300                         dev->q_depth = result;
2301                 else
2302                         nvme_release_cmb(dev);
2303         }
2304
2305         size = db_bar_size(dev, nr_io_queues);
2306         if (size > 8192) {
2307                 iounmap(dev->bar);
2308                 do {
2309                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2310                         if (dev->bar)
2311                                 break;
2312                         if (!--nr_io_queues)
2313                                 return -ENOMEM;
2314                         size = db_bar_size(dev, nr_io_queues);
2315                 } while (1);
2316                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2317                 adminq->q_db = dev->dbs;
2318         }
2319
2320         /* Deregister the admin queue's interrupt */
2321         free_irq(dev->entry[0].vector, adminq);
2322
2323         /*
2324          * If we enable msix early due to not intx, disable it again before
2325          * setting up the full range we need.
2326          */
2327         if (!pdev->irq)
2328                 pci_disable_msix(pdev);
2329
2330         for (i = 0; i < nr_io_queues; i++)
2331                 dev->entry[i].entry = i;
2332         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2333         if (vecs < 0) {
2334                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2335                 if (vecs < 0) {
2336                         vecs = 1;
2337                 } else {
2338                         for (i = 0; i < vecs; i++)
2339                                 dev->entry[i].vector = i + pdev->irq;
2340                 }
2341         }
2342
2343         /*
2344          * Should investigate if there's a performance win from allocating
2345          * more queues than interrupt vectors; it might allow the submission
2346          * path to scale better, even if the receive path is limited by the
2347          * number of interrupts.
2348          */
2349         nr_io_queues = vecs;
2350         dev->max_qid = nr_io_queues;
2351
2352         result = queue_request_irq(dev, adminq, adminq->irqname);
2353         if (result) {
2354                 adminq->cq_vector = -1;
2355                 goto free_queues;
2356         }
2357
2358         /* Free previously allocated queues that are no longer usable */
2359         nvme_free_queues(dev, nr_io_queues + 1);
2360         nvme_create_io_queues(dev);
2361
2362         return 0;
2363
2364  free_queues:
2365         nvme_free_queues(dev, 1);
2366         return result;
2367 }
2368
2369 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2370 {
2371         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2372         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2373
2374         return nsa->ns_id - nsb->ns_id;
2375 }
2376
2377 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2378 {
2379         struct nvme_ns *ns;
2380
2381         list_for_each_entry(ns, &dev->namespaces, list) {
2382                 if (ns->ns_id == nsid)
2383                         return ns;
2384                 if (ns->ns_id > nsid)
2385                         break;
2386         }
2387         return NULL;
2388 }
2389
2390 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2391 {
2392         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2393                                                         dev->online_queues < 2);
2394 }
2395
2396 static void nvme_ns_remove(struct nvme_ns *ns)
2397 {
2398         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2399
2400         if (kill)
2401                 blk_set_queue_dying(ns->queue);
2402         if (ns->disk->flags & GENHD_FL_UP) {
2403                 if (blk_get_integrity(ns->disk))
2404                         blk_integrity_unregister(ns->disk);
2405                 del_gendisk(ns->disk);
2406         }
2407         if (kill || !blk_queue_dying(ns->queue)) {
2408                 blk_mq_abort_requeue_list(ns->queue);
2409                 blk_cleanup_queue(ns->queue);
2410         }
2411         list_del_init(&ns->list);
2412         kref_put(&ns->kref, nvme_free_ns);
2413 }
2414
2415 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2416 {
2417         struct nvme_ns *ns, *next;
2418         unsigned i;
2419
2420         for (i = 1; i <= nn; i++) {
2421                 ns = nvme_find_ns(dev, i);
2422                 if (ns) {
2423                         if (revalidate_disk(ns->disk))
2424                                 nvme_ns_remove(ns);
2425                 } else
2426                         nvme_alloc_ns(dev, i);
2427         }
2428         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2429                 if (ns->ns_id > nn)
2430                         nvme_ns_remove(ns);
2431         }
2432         list_sort(NULL, &dev->namespaces, ns_cmp);
2433 }
2434
2435 static void nvme_set_irq_hints(struct nvme_dev *dev)
2436 {
2437         struct nvme_queue *nvmeq;
2438         int i;
2439
2440         for (i = 0; i < dev->online_queues; i++) {
2441                 nvmeq = dev->queues[i];
2442
2443                 if (!nvmeq->tags || !(*nvmeq->tags))
2444                         continue;
2445
2446                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2447                                         blk_mq_tags_cpumask(*nvmeq->tags));
2448         }
2449 }
2450
2451 static void nvme_dev_scan(struct work_struct *work)
2452 {
2453         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2454         struct nvme_id_ctrl *ctrl;
2455
2456         if (!dev->tagset.tags)
2457                 return;
2458         if (nvme_identify_ctrl(dev, &ctrl))
2459                 return;
2460         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2461         kfree(ctrl);
2462         nvme_set_irq_hints(dev);
2463 }
2464
2465 /*
2466  * Return: error value if an error occurred setting up the queues or calling
2467  * Identify Device.  0 if these succeeded, even if adding some of the
2468  * namespaces failed.  At the moment, these failures are silent.  TBD which
2469  * failures should be reported.
2470  */
2471 static int nvme_dev_add(struct nvme_dev *dev)
2472 {
2473         struct pci_dev *pdev = to_pci_dev(dev->dev);
2474         int res;
2475         struct nvme_id_ctrl *ctrl;
2476         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2477
2478         res = nvme_identify_ctrl(dev, &ctrl);
2479         if (res) {
2480                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2481                 return -EIO;
2482         }
2483
2484         dev->oncs = le16_to_cpup(&ctrl->oncs);
2485         dev->abort_limit = ctrl->acl + 1;
2486         dev->vwc = ctrl->vwc;
2487         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2488         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2489         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2490         if (ctrl->mdts)
2491                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2492         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2493                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2494                 unsigned int max_hw_sectors;
2495
2496                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2497                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2498                 if (dev->max_hw_sectors) {
2499                         dev->max_hw_sectors = min(max_hw_sectors,
2500                                                         dev->max_hw_sectors);
2501                 } else
2502                         dev->max_hw_sectors = max_hw_sectors;
2503         }
2504         kfree(ctrl);
2505
2506         if (!dev->tagset.tags) {
2507                 dev->tagset.ops = &nvme_mq_ops;
2508                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2509                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2510                 dev->tagset.numa_node = dev_to_node(dev->dev);
2511                 dev->tagset.queue_depth =
2512                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2513                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2514                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2515                 dev->tagset.driver_data = dev;
2516
2517                 if (blk_mq_alloc_tag_set(&dev->tagset))
2518                         return 0;
2519         }
2520         schedule_work(&dev->scan_work);
2521         return 0;
2522 }
2523
2524 static int nvme_dev_map(struct nvme_dev *dev)
2525 {
2526         u64 cap;
2527         int bars, result = -ENOMEM;
2528         struct pci_dev *pdev = to_pci_dev(dev->dev);
2529
2530         if (pci_enable_device_mem(pdev))
2531                 return result;
2532
2533         dev->entry[0].vector = pdev->irq;
2534         pci_set_master(pdev);
2535         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2536         if (!bars)
2537                 goto disable_pci;
2538
2539         if (pci_request_selected_regions(pdev, bars, "nvme"))
2540                 goto disable_pci;
2541
2542         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2543             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2544                 goto disable;
2545
2546         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2547         if (!dev->bar)
2548                 goto disable;
2549
2550         if (readl(&dev->bar->csts) == -1) {
2551                 result = -ENODEV;
2552                 goto unmap;
2553         }
2554
2555         /*
2556          * Some devices don't advertse INTx interrupts, pre-enable a single
2557          * MSIX vec for setup. We'll adjust this later.
2558          */
2559         if (!pdev->irq) {
2560                 result = pci_enable_msix(pdev, dev->entry, 1);
2561                 if (result < 0)
2562                         goto unmap;
2563         }
2564
2565         cap = readq(&dev->bar->cap);
2566         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2567         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2568         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2569         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2570                 dev->cmb = nvme_map_cmb(dev);
2571
2572         return 0;
2573
2574  unmap:
2575         iounmap(dev->bar);
2576         dev->bar = NULL;
2577  disable:
2578         pci_release_regions(pdev);
2579  disable_pci:
2580         pci_disable_device(pdev);
2581         return result;
2582 }
2583
2584 static void nvme_dev_unmap(struct nvme_dev *dev)
2585 {
2586         struct pci_dev *pdev = to_pci_dev(dev->dev);
2587
2588         if (pdev->msi_enabled)
2589                 pci_disable_msi(pdev);
2590         else if (pdev->msix_enabled)
2591                 pci_disable_msix(pdev);
2592
2593         if (dev->bar) {
2594                 iounmap(dev->bar);
2595                 dev->bar = NULL;
2596                 pci_release_regions(pdev);
2597         }
2598
2599         if (pci_is_enabled(pdev))
2600                 pci_disable_device(pdev);
2601 }
2602
2603 struct nvme_delq_ctx {
2604         struct task_struct *waiter;
2605         struct kthread_worker *worker;
2606         atomic_t refcount;
2607 };
2608
2609 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2610 {
2611         dq->waiter = current;
2612         mb();
2613
2614         for (;;) {
2615                 set_current_state(TASK_KILLABLE);
2616                 if (!atomic_read(&dq->refcount))
2617                         break;
2618                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2619                                         fatal_signal_pending(current)) {
2620                         /*
2621                          * Disable the controller first since we can't trust it
2622                          * at this point, but leave the admin queue enabled
2623                          * until all queue deletion requests are flushed.
2624                          * FIXME: This may take a while if there are more h/w
2625                          * queues than admin tags.
2626                          */
2627                         set_current_state(TASK_RUNNING);
2628                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2629                         nvme_clear_queue(dev->queues[0]);
2630                         flush_kthread_worker(dq->worker);
2631                         nvme_disable_queue(dev, 0);
2632                         return;
2633                 }
2634         }
2635         set_current_state(TASK_RUNNING);
2636 }
2637
2638 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2639 {
2640         atomic_dec(&dq->refcount);
2641         if (dq->waiter)
2642                 wake_up_process(dq->waiter);
2643 }
2644
2645 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2646 {
2647         atomic_inc(&dq->refcount);
2648         return dq;
2649 }
2650
2651 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2652 {
2653         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2654         nvme_put_dq(dq);
2655 }
2656
2657 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2658                                                 kthread_work_func_t fn)
2659 {
2660         struct nvme_command c;
2661
2662         memset(&c, 0, sizeof(c));
2663         c.delete_queue.opcode = opcode;
2664         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2665
2666         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2667         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2668                                                                 ADMIN_TIMEOUT);
2669 }
2670
2671 static void nvme_del_cq_work_handler(struct kthread_work *work)
2672 {
2673         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2674                                                         cmdinfo.work);
2675         nvme_del_queue_end(nvmeq);
2676 }
2677
2678 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2679 {
2680         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2681                                                 nvme_del_cq_work_handler);
2682 }
2683
2684 static void nvme_del_sq_work_handler(struct kthread_work *work)
2685 {
2686         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2687                                                         cmdinfo.work);
2688         int status = nvmeq->cmdinfo.status;
2689
2690         if (!status)
2691                 status = nvme_delete_cq(nvmeq);
2692         if (status)
2693                 nvme_del_queue_end(nvmeq);
2694 }
2695
2696 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2697 {
2698         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2699                                                 nvme_del_sq_work_handler);
2700 }
2701
2702 static void nvme_del_queue_start(struct kthread_work *work)
2703 {
2704         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2705                                                         cmdinfo.work);
2706         if (nvme_delete_sq(nvmeq))
2707                 nvme_del_queue_end(nvmeq);
2708 }
2709
2710 static void nvme_disable_io_queues(struct nvme_dev *dev)
2711 {
2712         int i;
2713         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2714         struct nvme_delq_ctx dq;
2715         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2716                                         &worker, "nvme%d", dev->instance);
2717
2718         if (IS_ERR(kworker_task)) {
2719                 dev_err(dev->dev,
2720                         "Failed to create queue del task\n");
2721                 for (i = dev->queue_count - 1; i > 0; i--)
2722                         nvme_disable_queue(dev, i);
2723                 return;
2724         }
2725
2726         dq.waiter = NULL;
2727         atomic_set(&dq.refcount, 0);
2728         dq.worker = &worker;
2729         for (i = dev->queue_count - 1; i > 0; i--) {
2730                 struct nvme_queue *nvmeq = dev->queues[i];
2731
2732                 if (nvme_suspend_queue(nvmeq))
2733                         continue;
2734                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2735                 nvmeq->cmdinfo.worker = dq.worker;
2736                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2737                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2738         }
2739         nvme_wait_dq(&dq, dev);
2740         kthread_stop(kworker_task);
2741 }
2742
2743 /*
2744 * Remove the node from the device list and check
2745 * for whether or not we need to stop the nvme_thread.
2746 */
2747 static void nvme_dev_list_remove(struct nvme_dev *dev)
2748 {
2749         struct task_struct *tmp = NULL;
2750
2751         spin_lock(&dev_list_lock);
2752         list_del_init(&dev->node);
2753         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2754                 tmp = nvme_thread;
2755                 nvme_thread = NULL;
2756         }
2757         spin_unlock(&dev_list_lock);
2758
2759         if (tmp)
2760                 kthread_stop(tmp);
2761 }
2762
2763 static void nvme_freeze_queues(struct nvme_dev *dev)
2764 {
2765         struct nvme_ns *ns;
2766
2767         list_for_each_entry(ns, &dev->namespaces, list) {
2768                 blk_mq_freeze_queue_start(ns->queue);
2769
2770                 spin_lock_irq(ns->queue->queue_lock);
2771                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2772                 spin_unlock_irq(ns->queue->queue_lock);
2773
2774                 blk_mq_cancel_requeue_work(ns->queue);
2775                 blk_mq_stop_hw_queues(ns->queue);
2776         }
2777 }
2778
2779 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2780 {
2781         struct nvme_ns *ns;
2782
2783         list_for_each_entry(ns, &dev->namespaces, list) {
2784                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2785                 blk_mq_unfreeze_queue(ns->queue);
2786                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2787                 blk_mq_kick_requeue_list(ns->queue);
2788         }
2789 }
2790
2791 static void nvme_dev_shutdown(struct nvme_dev *dev)
2792 {
2793         int i;
2794         u32 csts = -1;
2795
2796         nvme_dev_list_remove(dev);
2797
2798         if (dev->bar) {
2799                 nvme_freeze_queues(dev);
2800                 csts = readl(&dev->bar->csts);
2801         }
2802         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2803                 for (i = dev->queue_count - 1; i >= 0; i--) {
2804                         struct nvme_queue *nvmeq = dev->queues[i];
2805                         nvme_suspend_queue(nvmeq);
2806                 }
2807         } else {
2808                 nvme_disable_io_queues(dev);
2809                 nvme_shutdown_ctrl(dev);
2810                 nvme_disable_queue(dev, 0);
2811         }
2812         nvme_dev_unmap(dev);
2813
2814         for (i = dev->queue_count - 1; i >= 0; i--)
2815                 nvme_clear_queue(dev->queues[i]);
2816 }
2817
2818 static void nvme_dev_remove(struct nvme_dev *dev)
2819 {
2820         struct nvme_ns *ns, *next;
2821
2822         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2823                 nvme_ns_remove(ns);
2824 }
2825
2826 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2827 {
2828         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2829                                                 PAGE_SIZE, PAGE_SIZE, 0);
2830         if (!dev->prp_page_pool)
2831                 return -ENOMEM;
2832
2833         /* Optimisation for I/Os between 4k and 128k */
2834         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2835                                                 256, 256, 0);
2836         if (!dev->prp_small_pool) {
2837                 dma_pool_destroy(dev->prp_page_pool);
2838                 return -ENOMEM;
2839         }
2840         return 0;
2841 }
2842
2843 static void nvme_release_prp_pools(struct nvme_dev *dev)
2844 {
2845         dma_pool_destroy(dev->prp_page_pool);
2846         dma_pool_destroy(dev->prp_small_pool);
2847 }
2848
2849 static DEFINE_IDA(nvme_instance_ida);
2850
2851 static int nvme_set_instance(struct nvme_dev *dev)
2852 {
2853         int instance, error;
2854
2855         do {
2856                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2857                         return -ENODEV;
2858
2859                 spin_lock(&dev_list_lock);
2860                 error = ida_get_new(&nvme_instance_ida, &instance);
2861                 spin_unlock(&dev_list_lock);
2862         } while (error == -EAGAIN);
2863
2864         if (error)
2865                 return -ENODEV;
2866
2867         dev->instance = instance;
2868         return 0;
2869 }
2870
2871 static void nvme_release_instance(struct nvme_dev *dev)
2872 {
2873         spin_lock(&dev_list_lock);
2874         ida_remove(&nvme_instance_ida, dev->instance);
2875         spin_unlock(&dev_list_lock);
2876 }
2877
2878 static void nvme_free_dev(struct kref *kref)
2879 {
2880         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2881
2882         put_device(dev->dev);
2883         put_device(dev->device);
2884         nvme_release_instance(dev);
2885         if (dev->tagset.tags)
2886                 blk_mq_free_tag_set(&dev->tagset);
2887         if (dev->admin_q)
2888                 blk_put_queue(dev->admin_q);
2889         kfree(dev->queues);
2890         kfree(dev->entry);
2891         kfree(dev);
2892 }
2893
2894 static int nvme_dev_open(struct inode *inode, struct file *f)
2895 {
2896         struct nvme_dev *dev;
2897         int instance = iminor(inode);
2898         int ret = -ENODEV;
2899
2900         spin_lock(&dev_list_lock);
2901         list_for_each_entry(dev, &dev_list, node) {
2902                 if (dev->instance == instance) {
2903                         if (!dev->admin_q) {
2904                                 ret = -EWOULDBLOCK;
2905                                 break;
2906                         }
2907                         if (!kref_get_unless_zero(&dev->kref))
2908                                 break;
2909                         f->private_data = dev;
2910                         ret = 0;
2911                         break;
2912                 }
2913         }
2914         spin_unlock(&dev_list_lock);
2915
2916         return ret;
2917 }
2918
2919 static int nvme_dev_release(struct inode *inode, struct file *f)
2920 {
2921         struct nvme_dev *dev = f->private_data;
2922         kref_put(&dev->kref, nvme_free_dev);
2923         return 0;
2924 }
2925
2926 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2927 {
2928         struct nvme_dev *dev = f->private_data;
2929         struct nvme_ns *ns;
2930
2931         switch (cmd) {
2932         case NVME_IOCTL_ADMIN_CMD:
2933                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2934         case NVME_IOCTL_IO_CMD:
2935                 if (list_empty(&dev->namespaces))
2936                         return -ENOTTY;
2937                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2938                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2939         case NVME_IOCTL_RESET:
2940                 dev_warn(dev->dev, "resetting controller\n");
2941                 return nvme_reset(dev);
2942         case NVME_IOCTL_SUBSYS_RESET:
2943                 return nvme_subsys_reset(dev);
2944         default:
2945                 return -ENOTTY;
2946         }
2947 }
2948
2949 static const struct file_operations nvme_dev_fops = {
2950         .owner          = THIS_MODULE,
2951         .open           = nvme_dev_open,
2952         .release        = nvme_dev_release,
2953         .unlocked_ioctl = nvme_dev_ioctl,
2954         .compat_ioctl   = nvme_dev_ioctl,
2955 };
2956
2957 static int nvme_dev_start(struct nvme_dev *dev)
2958 {
2959         int result;
2960         bool start_thread = false;
2961
2962         result = nvme_dev_map(dev);
2963         if (result)
2964                 return result;
2965
2966         result = nvme_configure_admin_queue(dev);
2967         if (result)
2968                 goto unmap;
2969
2970         spin_lock(&dev_list_lock);
2971         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2972                 start_thread = true;
2973                 nvme_thread = NULL;
2974         }
2975         list_add(&dev->node, &dev_list);
2976         spin_unlock(&dev_list_lock);
2977
2978         if (start_thread) {
2979                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2980                 wake_up_all(&nvme_kthread_wait);
2981         } else
2982                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2983
2984         if (IS_ERR_OR_NULL(nvme_thread)) {
2985                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2986                 goto disable;
2987         }
2988
2989         nvme_init_queue(dev->queues[0], 0);
2990         result = nvme_alloc_admin_tags(dev);
2991         if (result)
2992                 goto disable;
2993
2994         result = nvme_setup_io_queues(dev);
2995         if (result)
2996                 goto free_tags;
2997
2998         dev->event_limit = 1;
2999         return result;
3000
3001  free_tags:
3002         nvme_dev_remove_admin(dev);
3003         blk_put_queue(dev->admin_q);
3004         dev->admin_q = NULL;
3005         dev->queues[0]->tags = NULL;
3006  disable:
3007         nvme_disable_queue(dev, 0);
3008         nvme_dev_list_remove(dev);
3009  unmap:
3010         nvme_dev_unmap(dev);
3011         return result;
3012 }
3013
3014 static int nvme_remove_dead_ctrl(void *arg)
3015 {
3016         struct nvme_dev *dev = (struct nvme_dev *)arg;
3017         struct pci_dev *pdev = to_pci_dev(dev->dev);
3018
3019         if (pci_get_drvdata(pdev))
3020                 pci_stop_and_remove_bus_device_locked(pdev);
3021         kref_put(&dev->kref, nvme_free_dev);
3022         return 0;
3023 }
3024
3025 static int nvme_dev_resume(struct nvme_dev *dev)
3026 {
3027         int ret;
3028
3029         ret = nvme_dev_start(dev);
3030         if (ret)
3031                 return ret;
3032         if (dev->online_queues < 2) {
3033                 dev_warn(dev->dev, "IO queues not created\n");
3034                 nvme_free_queues(dev, 1);
3035                 nvme_dev_remove(dev);
3036         } else {
3037                 nvme_unfreeze_queues(dev);
3038                 nvme_dev_add(dev);
3039         }
3040         return 0;
3041 }
3042
3043 static void nvme_dead_ctrl(struct nvme_dev *dev)
3044 {
3045         dev_warn(dev->dev, "Device failed to resume\n");
3046         kref_get(&dev->kref);
3047         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3048                                                 dev->instance))) {
3049                 dev_err(dev->dev,
3050                         "Failed to start controller remove task\n");
3051                 kref_put(&dev->kref, nvme_free_dev);
3052         }
3053 }
3054
3055 static void nvme_reset_work(struct work_struct *ws)
3056 {
3057         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3058         bool in_probe = work_busy(&dev->probe_work);
3059
3060         nvme_dev_shutdown(dev);
3061
3062         /* Synchronize with device probe so that work will see failure status
3063          * and exit gracefully without trying to schedule another reset */
3064         flush_work(&dev->probe_work);
3065
3066         /* Fail this device if reset occured during probe to avoid
3067          * infinite initialization loops. */
3068         if (in_probe) {
3069                 nvme_dead_ctrl(dev);
3070                 return;
3071         }
3072         /* Schedule device resume asynchronously so the reset work is available
3073          * to cleanup errors that may occur during reinitialization */
3074         schedule_work(&dev->probe_work);
3075 }
3076
3077 static int nvme_reset(struct nvme_dev *dev)
3078 {
3079         int ret = -EBUSY;
3080
3081         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3082                 return -ENODEV;
3083
3084         spin_lock(&dev_list_lock);
3085         if (!work_pending(&dev->reset_work)) {
3086                 list_del_init(&dev->node);
3087                 queue_work(nvme_workq, &dev->reset_work);
3088                 ret = 0;
3089         }
3090         spin_unlock(&dev_list_lock);
3091
3092         if (!ret) {
3093                 flush_work(&dev->reset_work);
3094                 flush_work(&dev->probe_work);
3095                 return 0;
3096         }
3097
3098         return ret;
3099 }
3100
3101 static ssize_t nvme_sysfs_reset(struct device *dev,
3102                                 struct device_attribute *attr, const char *buf,
3103                                 size_t count)
3104 {
3105         struct nvme_dev *ndev = dev_get_drvdata(dev);
3106         int ret;
3107
3108         ret = nvme_reset(ndev);
3109         if (ret < 0)
3110                 return ret;
3111
3112         return count;
3113 }
3114 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3115
3116 static void nvme_async_probe(struct work_struct *work);
3117 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3118 {
3119         int node, result = -ENOMEM;
3120         struct nvme_dev *dev;
3121
3122         node = dev_to_node(&pdev->dev);
3123         if (node == NUMA_NO_NODE)
3124                 set_dev_node(&pdev->dev, 0);
3125
3126         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3127         if (!dev)
3128                 return -ENOMEM;
3129         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3130                                                         GFP_KERNEL, node);
3131         if (!dev->entry)
3132                 goto free;
3133         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3134                                                         GFP_KERNEL, node);
3135         if (!dev->queues)
3136                 goto free;
3137
3138         INIT_LIST_HEAD(&dev->namespaces);
3139         INIT_WORK(&dev->reset_work, nvme_reset_work);
3140         dev->dev = get_device(&pdev->dev);
3141         pci_set_drvdata(pdev, dev);
3142         result = nvme_set_instance(dev);
3143         if (result)
3144                 goto put_pci;
3145
3146         result = nvme_setup_prp_pools(dev);
3147         if (result)
3148                 goto release;
3149
3150         kref_init(&dev->kref);
3151         dev->device = device_create(nvme_class, &pdev->dev,
3152                                 MKDEV(nvme_char_major, dev->instance),
3153                                 dev, "nvme%d", dev->instance);
3154         if (IS_ERR(dev->device)) {
3155                 result = PTR_ERR(dev->device);
3156                 goto release_pools;
3157         }
3158         get_device(dev->device);
3159         dev_set_drvdata(dev->device, dev);
3160
3161         result = device_create_file(dev->device, &dev_attr_reset_controller);
3162         if (result)
3163                 goto put_dev;
3164
3165         INIT_LIST_HEAD(&dev->node);
3166         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3167         INIT_WORK(&dev->probe_work, nvme_async_probe);
3168         schedule_work(&dev->probe_work);
3169         return 0;
3170
3171  put_dev:
3172         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3173         put_device(dev->device);
3174  release_pools:
3175         nvme_release_prp_pools(dev);
3176  release:
3177         nvme_release_instance(dev);
3178  put_pci:
3179         put_device(dev->dev);
3180  free:
3181         kfree(dev->queues);
3182         kfree(dev->entry);
3183         kfree(dev);
3184         return result;
3185 }
3186
3187 static void nvme_async_probe(struct work_struct *work)
3188 {
3189         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3190
3191         if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3192                 nvme_dead_ctrl(dev);
3193 }
3194
3195 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3196 {
3197         struct nvme_dev *dev = pci_get_drvdata(pdev);
3198
3199         if (prepare)
3200                 nvme_dev_shutdown(dev);
3201         else
3202                 schedule_work(&dev->probe_work);
3203 }
3204
3205 static void nvme_shutdown(struct pci_dev *pdev)
3206 {
3207         struct nvme_dev *dev = pci_get_drvdata(pdev);
3208         nvme_dev_shutdown(dev);
3209 }
3210
3211 static void nvme_remove(struct pci_dev *pdev)
3212 {
3213         struct nvme_dev *dev = pci_get_drvdata(pdev);
3214
3215         spin_lock(&dev_list_lock);
3216         list_del_init(&dev->node);
3217         spin_unlock(&dev_list_lock);
3218
3219         pci_set_drvdata(pdev, NULL);
3220         flush_work(&dev->probe_work);
3221         flush_work(&dev->reset_work);
3222         flush_work(&dev->scan_work);
3223         device_remove_file(dev->device, &dev_attr_reset_controller);
3224         nvme_dev_remove(dev);
3225         nvme_dev_shutdown(dev);
3226         nvme_dev_remove_admin(dev);
3227         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3228         nvme_free_queues(dev, 0);
3229         nvme_release_cmb(dev);
3230         nvme_release_prp_pools(dev);
3231         kref_put(&dev->kref, nvme_free_dev);
3232 }
3233
3234 /* These functions are yet to be implemented */
3235 #define nvme_error_detected NULL
3236 #define nvme_dump_registers NULL
3237 #define nvme_link_reset NULL
3238 #define nvme_slot_reset NULL
3239 #define nvme_error_resume NULL
3240
3241 #ifdef CONFIG_PM_SLEEP
3242 static int nvme_suspend(struct device *dev)
3243 {
3244         struct pci_dev *pdev = to_pci_dev(dev);
3245         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3246
3247         nvme_dev_shutdown(ndev);
3248         return 0;
3249 }
3250
3251 static int nvme_resume(struct device *dev)
3252 {
3253         struct pci_dev *pdev = to_pci_dev(dev);
3254         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3255
3256         schedule_work(&ndev->probe_work);
3257         return 0;
3258 }
3259 #endif
3260
3261 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3262
3263 static const struct pci_error_handlers nvme_err_handler = {
3264         .error_detected = nvme_error_detected,
3265         .mmio_enabled   = nvme_dump_registers,
3266         .link_reset     = nvme_link_reset,
3267         .slot_reset     = nvme_slot_reset,
3268         .resume         = nvme_error_resume,
3269         .reset_notify   = nvme_reset_notify,
3270 };
3271
3272 /* Move to pci_ids.h later */
3273 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3274
3275 static const struct pci_device_id nvme_id_table[] = {
3276         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3277         { 0, }
3278 };
3279 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3280
3281 static struct pci_driver nvme_driver = {
3282         .name           = "nvme",
3283         .id_table       = nvme_id_table,
3284         .probe          = nvme_probe,
3285         .remove         = nvme_remove,
3286         .shutdown       = nvme_shutdown,
3287         .driver         = {
3288                 .pm     = &nvme_dev_pm_ops,
3289         },
3290         .err_handler    = &nvme_err_handler,
3291 };
3292
3293 static int __init nvme_init(void)
3294 {
3295         int result;
3296
3297         init_waitqueue_head(&nvme_kthread_wait);
3298
3299         nvme_workq = create_singlethread_workqueue("nvme");
3300         if (!nvme_workq)
3301                 return -ENOMEM;
3302
3303         result = register_blkdev(nvme_major, "nvme");
3304         if (result < 0)
3305                 goto kill_workq;
3306         else if (result > 0)
3307                 nvme_major = result;
3308
3309         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3310                                                         &nvme_dev_fops);
3311         if (result < 0)
3312                 goto unregister_blkdev;
3313         else if (result > 0)
3314                 nvme_char_major = result;
3315
3316         nvme_class = class_create(THIS_MODULE, "nvme");
3317         if (IS_ERR(nvme_class)) {
3318                 result = PTR_ERR(nvme_class);
3319                 goto unregister_chrdev;
3320         }
3321
3322         result = pci_register_driver(&nvme_driver);
3323         if (result)
3324                 goto destroy_class;
3325         return 0;
3326
3327  destroy_class:
3328         class_destroy(nvme_class);
3329  unregister_chrdev:
3330         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3331  unregister_blkdev:
3332         unregister_blkdev(nvme_major, "nvme");
3333  kill_workq:
3334         destroy_workqueue(nvme_workq);
3335         return result;
3336 }
3337
3338 static void __exit nvme_exit(void)
3339 {
3340         pci_unregister_driver(&nvme_driver);
3341         unregister_blkdev(nvme_major, "nvme");
3342         destroy_workqueue(nvme_workq);
3343         class_destroy(nvme_class);
3344         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3345         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3346         _nvme_check_size();
3347 }
3348
3349 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3350 MODULE_LICENSE("GPL");
3351 MODULE_VERSION("1.0");
3352 module_init(nvme_init);
3353 module_exit(nvme_exit);