drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/types.h>
  41 #include <scsi/sg.h>
  42 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  43
  44 #define NVME_Q_DEPTH            1024
  45 #define NVME_AQ_DEPTH           64
  46 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  47 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  48 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  49 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  50 #define IOD_TIMEOUT             (retry_time * HZ)
  51
  52 static unsigned char admin_timeout = 60;
  53 module_param(admin_timeout, byte, 0644);
  54 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  55
  56 unsigned char nvme_io_timeout = 30;
  57 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  59
  60 static unsigned char retry_time = 30;
  61 module_param(retry_time, byte, 0644);
  62 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
  63
  64 static unsigned char shutdown_timeout = 5;
  65 module_param(shutdown_timeout, byte, 0644);
  66 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  67
  68 static int nvme_major;
  69 module_param(nvme_major, int, 0);
  70
  71 static int use_threaded_interrupts;
  72 module_param(use_threaded_interrupts, int, 0);
  73
  74 static DEFINE_SPINLOCK(dev_list_lock);
  75 static LIST_HEAD(dev_list);
  76 static struct task_struct *nvme_thread;
  77 static struct workqueue_struct *nvme_workq;
  78 static wait_queue_head_t nvme_kthread_wait;
  79 static struct notifier_block nvme_nb;
  80
  81 static void nvme_reset_failed_dev(struct work_struct *ws);
  82 static int nvme_process_cq(struct nvme_queue *nvmeq);
  83
  84 struct async_cmd_info {
  85         struct kthread_work work;
  86         struct kthread_worker *worker;
  87         struct request *req;
  88         u32 result;
  89         int status;
  90         void *ctx;
  91 };
  92
  93 /*
  94  * An NVM Express queue.  Each device has at least two (one for admin
  95  * commands and one for I/O commands).
  96  */
  97 struct nvme_queue {
  98         struct llist_node node;
  99         struct device *q_dmadev;
 100         struct nvme_dev *dev;
 101         char irqname[24];       /* nvme4294967295-65535\0 */
 102         spinlock_t q_lock;
 103         struct nvme_command *sq_cmds;
 104         volatile struct nvme_completion *cqes;
 105         dma_addr_t sq_dma_addr;
 106         dma_addr_t cq_dma_addr;
 107         u32 __iomem *q_db;
 108         u16 q_depth;
 109         u16 cq_vector;
 110         u16 sq_head;
 111         u16 sq_tail;
 112         u16 cq_head;
 113         u16 qid;
 114         u8 cq_phase;
 115         u8 cqe_seen;
 116         struct async_cmd_info cmdinfo;
 117         struct blk_mq_hw_ctx *hctx;
 118 };
 119
 120 /*
 121  * Check we didin't inadvertently grow the command struct
 122  */
 123 static inline void _nvme_check_size(void)
 124 {
 125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 137 }
 138
 139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 140                                                 struct nvme_completion *);
 141
 142 struct nvme_cmd_info {
 143         nvme_completion_fn fn;
 144         void *ctx;
 145         int aborted;
 146         struct nvme_queue *nvmeq;
 147 };
 148
 149 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 150                                 unsigned int hctx_idx)
 151 {
 152         struct nvme_dev *dev = data;
 153         struct nvme_queue *nvmeq = dev->queues[0];
 154
 155         WARN_ON(nvmeq->hctx);
 156         nvmeq->hctx = hctx;
 157         hctx->driver_data = nvmeq;
 158         return 0;
 159 }
 160
 161 static int nvme_admin_init_request(void *data, struct request *req,
 162                                 unsigned int hctx_idx, unsigned int rq_idx,
 163                                 unsigned int numa_node)
 164 {
 165         struct nvme_dev *dev = data;
 166         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 167         struct nvme_queue *nvmeq = dev->queues[0];
 168
 169         BUG_ON(!nvmeq);
 170         cmd->nvmeq = nvmeq;
 171         return 0;
 172 }
 173
 174 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 175 {
 176         struct nvme_queue *nvmeq = hctx->driver_data;
 177
 178         nvmeq->hctx = NULL;
 179 }
 180
 181 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 182                           unsigned int hctx_idx)
 183 {
 184         struct nvme_dev *dev = data;
 185         struct nvme_queue *nvmeq = dev->queues[
 186                                         (hctx_idx % dev->queue_count) + 1];
 187
 188         if (!nvmeq->hctx)
 189                 nvmeq->hctx = hctx;
 190
 191         /* nvmeq queues are shared between namespaces. We assume here that
 192          * blk-mq map the tags so they match up with the nvme queue tags. */
 193         WARN_ON(nvmeq->hctx->tags != hctx->tags);
 194
 195         hctx->driver_data = nvmeq;
 196         return 0;
 197 }
 198
 199 static int nvme_init_request(void *data, struct request *req,
 200                                 unsigned int hctx_idx, unsigned int rq_idx,
 201                                 unsigned int numa_node)
 202 {
 203         struct nvme_dev *dev = data;
 204         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 205         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 206
 207         BUG_ON(!nvmeq);
 208         cmd->nvmeq = nvmeq;
 209         return 0;
 210 }
 211
 212 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 213                                 nvme_completion_fn handler)
 214 {
 215         cmd->fn = handler;
 216         cmd->ctx = ctx;
 217         cmd->aborted = 0;
 218 }
 219
 220 /* Special values must be less than 0x1000 */
 221 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 222 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 223 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 224 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 225
 226 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 227                                                 struct nvme_completion *cqe)
 228 {
 229         if (ctx == CMD_CTX_CANCELLED)
 230                 return;
 231         if (ctx == CMD_CTX_COMPLETED) {
 232                 dev_warn(nvmeq->q_dmadev,
 233                                 "completed id %d twice on queue %d\n",
 234                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 235                 return;
 236         }
 237         if (ctx == CMD_CTX_INVALID) {
 238                 dev_warn(nvmeq->q_dmadev,
 239                                 "invalid id %d completed on queue %d\n",
 240                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 241                 return;
 242         }
 243         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 244 }
 245
 246 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 247 {
 248         void *ctx;
 249
 250         if (fn)
 251                 *fn = cmd->fn;
 252         ctx = cmd->ctx;
 253         cmd->fn = special_completion;
 254         cmd->ctx = CMD_CTX_CANCELLED;
 255         return ctx;
 256 }
 257
 258 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 259                                                 struct nvme_completion *cqe)
 260 {
 261         struct request *req = ctx;
 262
 263         u32 result = le32_to_cpup(&cqe->result);
 264         u16 status = le16_to_cpup(&cqe->status) >> 1;
 265
 266         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 267                 ++nvmeq->dev->event_limit;
 268         if (status == NVME_SC_SUCCESS)
 269                 dev_warn(nvmeq->q_dmadev,
 270                         "async event result %08x\n", result);
 271
 272         blk_mq_free_hctx_request(nvmeq->hctx, req);
 273 }
 274
 275 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 276                                                 struct nvme_completion *cqe)
 277 {
 278         struct request *req = ctx;
 279
 280         u16 status = le16_to_cpup(&cqe->status) >> 1;
 281         u32 result = le32_to_cpup(&cqe->result);
 282
 283         blk_mq_free_hctx_request(nvmeq->hctx, req);
 284
 285         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 286         ++nvmeq->dev->abort_limit;
 287 }
 288
 289 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 290                                                 struct nvme_completion *cqe)
 291 {
 292         struct async_cmd_info *cmdinfo = ctx;
 293         cmdinfo->result = le32_to_cpup(&cqe->result);
 294         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 295         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 296         blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
 297 }
 298
 299 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 300                                   unsigned int tag)
 301 {
 302         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
 303         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
 304
 305         return blk_mq_rq_to_pdu(req);
 306 }
 307
 308 /*
 309  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 310  */
 311 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 312                                                 nvme_completion_fn *fn)
 313 {
 314         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 315         void *ctx;
 316         if (tag >= nvmeq->q_depth) {
 317                 *fn = special_completion;
 318                 return CMD_CTX_INVALID;
 319         }
 320         if (fn)
 321                 *fn = cmd->fn;
 322         ctx = cmd->ctx;
 323         cmd->fn = special_completion;
 324         cmd->ctx = CMD_CTX_COMPLETED;
 325         return ctx;
 326 }
 327
 328 /**
 329  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 330  * @nvmeq: The queue to use
 331  * @cmd: The command to send
 332  *
 333  * Safe to use from interrupt context
 334  */
 335 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 336 {
 337         u16 tail = nvmeq->sq_tail;
 338
 339         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 340         if (++tail == nvmeq->q_depth)
 341                 tail = 0;
 342         writel(tail, nvmeq->q_db);
 343         nvmeq->sq_tail = tail;
 344
 345         return 0;
 346 }
 347
 348 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 349 {
 350         unsigned long flags;
 351         int ret;
 352         spin_lock_irqsave(&nvmeq->q_lock, flags);
 353         ret = __nvme_submit_cmd(nvmeq, cmd);
 354         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 355         return ret;
 356 }
 357
 358 static __le64 **iod_list(struct nvme_iod *iod)
 359 {
 360         return ((void *)iod) + iod->offset;
 361 }
 362
 363 /*
 364  * Will slightly overestimate the number of pages needed.  This is OK
 365  * as it only leads to a small amount of wasted memory for the lifetime of
 366  * the I/O.
 367  */
 368 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 369 {
 370         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 371         return DIV_ROUND_UP(8 * nprps, dev->page_size - 8);
 372 }
 373
 374 static struct nvme_iod *
 375 nvme_alloc_iod(unsigned nseg, unsigned nbytes, struct nvme_dev *dev, gfp_t gfp)
 376 {
 377         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 378                                 sizeof(__le64 *) * nvme_npages(nbytes, dev) +
 379                                 sizeof(struct scatterlist) * nseg, gfp);
 380
 381         if (iod) {
 382                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 383                 iod->npages = -1;
 384                 iod->length = nbytes;
 385                 iod->nents = 0;
 386                 iod->first_dma = 0ULL;
 387         }
 388
 389         return iod;
 390 }
 391
 392 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 393 {
 394         const int last_prp = dev->page_size / 8 - 1;
 395         int i;
 396         __le64 **list = iod_list(iod);
 397         dma_addr_t prp_dma = iod->first_dma;
 398
 399         if (iod->npages == 0)
 400                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 401         for (i = 0; i < iod->npages; i++) {
 402                 __le64 *prp_list = list[i];
 403                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 404                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 405                 prp_dma = next_prp_dma;
 406         }
 407         kfree(iod);
 408 }
 409
 410 static int nvme_error_status(u16 status)
 411 {
 412         switch (status & 0x7ff) {
 413         case NVME_SC_SUCCESS:
 414                 return 0;
 415         case NVME_SC_CAP_EXCEEDED:
 416                 return -ENOSPC;
 417         default:
 418                 return -EIO;
 419         }
 420 }
 421
 422 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 423                                                 struct nvme_completion *cqe)
 424 {
 425         struct nvme_iod *iod = ctx;
 426         struct request *req = iod->private;
 427         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 428
 429         u16 status = le16_to_cpup(&cqe->status) >> 1;
 430
 431         if (unlikely(status)) {
 432                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 433                     && (jiffies - req->start_time) < req->timeout) {
 434                         blk_mq_requeue_request(req);
 435                         blk_mq_kick_requeue_list(req->q);
 436                         return;
 437                 }
 438                 req->errors = nvme_error_status(status);
 439         } else
 440                 req->errors = 0;
 441
 442         if (cmd_rq->aborted)
 443                 dev_warn(&nvmeq->dev->pci_dev->dev,
 444                         "completing aborted command with status:%04x\n",
 445                         status);
 446
 447         if (iod->nents)
 448                 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
 449                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 450         nvme_free_iod(nvmeq->dev, iod);
 451
 452         blk_mq_complete_request(req);
 453 }
 454
 455 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 456 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
 457                                                                 gfp_t gfp)
 458 {
 459         struct dma_pool *pool;
 460         int length = total_len;
 461         struct scatterlist *sg = iod->sg;
 462         int dma_len = sg_dma_len(sg);
 463         u64 dma_addr = sg_dma_address(sg);
 464         int offset = offset_in_page(dma_addr);
 465         __le64 *prp_list;
 466         __le64 **list = iod_list(iod);
 467         dma_addr_t prp_dma;
 468         int nprps, i;
 469         u32 page_size = dev->page_size;
 470
 471         length -= (page_size - offset);
 472         if (length <= 0)
 473                 return total_len;
 474
 475         dma_len -= (page_size - offset);
 476         if (dma_len) {
 477                 dma_addr += (page_size - offset);
 478         } else {
 479                 sg = sg_next(sg);
 480                 dma_addr = sg_dma_address(sg);
 481                 dma_len = sg_dma_len(sg);
 482         }
 483
 484         if (length <= page_size) {
 485                 iod->first_dma = dma_addr;
 486                 return total_len;
 487         }
 488
 489         nprps = DIV_ROUND_UP(length, page_size);
 490         if (nprps <= (256 / 8)) {
 491                 pool = dev->prp_small_pool;
 492                 iod->npages = 0;
 493         } else {
 494                 pool = dev->prp_page_pool;
 495                 iod->npages = 1;
 496         }
 497
 498         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 499         if (!prp_list) {
 500                 iod->first_dma = dma_addr;
 501                 iod->npages = -1;
 502                 return (total_len - length) + page_size;
 503         }
 504         list[0] = prp_list;
 505         iod->first_dma = prp_dma;
 506         i = 0;
 507         for (;;) {
 508                 if (i == page_size >> 3) {
 509                         __le64 *old_prp_list = prp_list;
 510                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 511                         if (!prp_list)
 512                                 return total_len - length;
 513                         list[iod->npages++] = prp_list;
 514                         prp_list[0] = old_prp_list[i - 1];
 515                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 516                         i = 1;
 517                 }
 518                 prp_list[i++] = cpu_to_le64(dma_addr);
 519                 dma_len -= page_size;
 520                 dma_addr += page_size;
 521                 length -= page_size;
 522                 if (length <= 0)
 523                         break;
 524                 if (dma_len > 0)
 525                         continue;
 526                 BUG_ON(dma_len < 0);
 527                 sg = sg_next(sg);
 528                 dma_addr = sg_dma_address(sg);
 529                 dma_len = sg_dma_len(sg);
 530         }
 531
 532         return total_len;
 533 }
 534
 535 /*
 536  * We reuse the small pool to allocate the 16-byte range here as it is not
 537  * worth having a special pool for these or additional cases to handle freeing
 538  * the iod.
 539  */
 540 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 541                 struct request *req, struct nvme_iod *iod)
 542 {
 543         struct nvme_dsm_range *range =
 544                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 545         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 546
 547         range->cattr = cpu_to_le32(0);
 548         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 549         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 550
 551         memset(cmnd, 0, sizeof(*cmnd));
 552         cmnd->dsm.opcode = nvme_cmd_dsm;
 553         cmnd->dsm.command_id = req->tag;
 554         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 555         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 556         cmnd->dsm.nr = 0;
 557         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 558
 559         if (++nvmeq->sq_tail == nvmeq->q_depth)
 560                 nvmeq->sq_tail = 0;
 561         writel(nvmeq->sq_tail, nvmeq->q_db);
 562 }
 563
 564 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 565                                                                 int cmdid)
 566 {
 567         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 568
 569         memset(cmnd, 0, sizeof(*cmnd));
 570         cmnd->common.opcode = nvme_cmd_flush;
 571         cmnd->common.command_id = cmdid;
 572         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 573
 574         if (++nvmeq->sq_tail == nvmeq->q_depth)
 575                 nvmeq->sq_tail = 0;
 576         writel(nvmeq->sq_tail, nvmeq->q_db);
 577 }
 578
 579 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 580                                                         struct nvme_ns *ns)
 581 {
 582         struct request *req = iod->private;
 583         struct nvme_command *cmnd;
 584         u16 control = 0;
 585         u32 dsmgmt = 0;
 586
 587         if (req->cmd_flags & REQ_FUA)
 588                 control |= NVME_RW_FUA;
 589         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 590                 control |= NVME_RW_LR;
 591
 592         if (req->cmd_flags & REQ_RAHEAD)
 593                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 594
 595         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 596         memset(cmnd, 0, sizeof(*cmnd));
 597
 598         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 599         cmnd->rw.command_id = req->tag;
 600         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 601         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 602         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 603         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 604         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 605         cmnd->rw.control = cpu_to_le16(control);
 606         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 607
 608         if (++nvmeq->sq_tail == nvmeq->q_depth)
 609                 nvmeq->sq_tail = 0;
 610         writel(nvmeq->sq_tail, nvmeq->q_db);
 611
 612         return 0;
 613 }
 614
 615 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 616                          const struct blk_mq_queue_data *bd)
 617 {
 618         struct nvme_ns *ns = hctx->queue->queuedata;
 619         struct nvme_queue *nvmeq = hctx->driver_data;
 620         struct request *req = bd->rq;
 621         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 622         struct nvme_iod *iod;
 623         int psegs = req->nr_phys_segments;
 624         enum dma_data_direction dma_dir;
 625         unsigned size = !(req->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(req) :
 626                                                 sizeof(struct nvme_dsm_range);
 627
 628         iod = nvme_alloc_iod(psegs, size, ns->dev, GFP_ATOMIC);
 629         if (!iod)
 630                 return BLK_MQ_RQ_QUEUE_BUSY;
 631
 632         iod->private = req;
 633
 634         if (req->cmd_flags & REQ_DISCARD) {
 635                 void *range;
 636                 /*
 637                  * We reuse the small pool to allocate the 16-byte range here
 638                  * as it is not worth having a special pool for these or
 639                  * additional cases to handle freeing the iod.
 640                  */
 641                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
 642                                                 GFP_ATOMIC,
 643                                                 &iod->first_dma);
 644                 if (!range)
 645                         goto retry_cmd;
 646                 iod_list(iod)[0] = (__le64 *)range;
 647                 iod->npages = 0;
 648         } else if (psegs) {
 649                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 650
 651                 sg_init_table(iod->sg, psegs);
 652                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 653                 if (!iod->nents)
 654                         goto error_cmd;
 655
 656                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 657                         goto retry_cmd;
 658
 659                 if (blk_rq_bytes(req) !=
 660                     nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 661                         dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg,
 662                                         iod->nents, dma_dir);
 663                         goto retry_cmd;
 664                 }
 665         }
 666
 667         blk_mq_start_request(req);
 668
 669         nvme_set_info(cmd, iod, req_completion);
 670         spin_lock_irq(&nvmeq->q_lock);
 671         if (req->cmd_flags & REQ_DISCARD)
 672                 nvme_submit_discard(nvmeq, ns, req, iod);
 673         else if (req->cmd_flags & REQ_FLUSH)
 674                 nvme_submit_flush(nvmeq, ns, req->tag);
 675         else
 676                 nvme_submit_iod(nvmeq, iod, ns);
 677
 678         nvme_process_cq(nvmeq);
 679         spin_unlock_irq(&nvmeq->q_lock);
 680         return BLK_MQ_RQ_QUEUE_OK;
 681
 682  error_cmd:
 683         nvme_free_iod(nvmeq->dev, iod);
 684         return BLK_MQ_RQ_QUEUE_ERROR;
 685  retry_cmd:
 686         nvme_free_iod(nvmeq->dev, iod);
 687         return BLK_MQ_RQ_QUEUE_BUSY;
 688 }
 689
 690 static int nvme_process_cq(struct nvme_queue *nvmeq)
 691 {
 692         u16 head, phase;
 693
 694         head = nvmeq->cq_head;
 695         phase = nvmeq->cq_phase;
 696
 697         for (;;) {
 698                 void *ctx;
 699                 nvme_completion_fn fn;
 700                 struct nvme_completion cqe = nvmeq->cqes[head];
 701                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 702                         break;
 703                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 704                 if (++head == nvmeq->q_depth) {
 705                         head = 0;
 706                         phase = !phase;
 707                 }
 708                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 709                 fn(nvmeq, ctx, &cqe);
 710         }
 711
 712         /* If the controller ignores the cq head doorbell and continuously
 713          * writes to the queue, it is theoretically possible to wrap around
 714          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 715          * requires that 0.1% of your interrupts are handled, so this isn't
 716          * a big problem.
 717          */
 718         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 719                 return 0;
 720
 721         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 722         nvmeq->cq_head = head;
 723         nvmeq->cq_phase = phase;
 724
 725         nvmeq->cqe_seen = 1;
 726         return 1;
 727 }
 728
 729 /* Admin queue isn't initialized as a request queue. If at some point this
 730  * happens anyway, make sure to notify the user */
 731 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
 732                                const struct blk_mq_queue_data *bd)
 733 {
 734         WARN_ON_ONCE(1);
 735         return BLK_MQ_RQ_QUEUE_ERROR;
 736 }
 737
 738 static irqreturn_t nvme_irq(int irq, void *data)
 739 {
 740         irqreturn_t result;
 741         struct nvme_queue *nvmeq = data;
 742         spin_lock(&nvmeq->q_lock);
 743         nvme_process_cq(nvmeq);
 744         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 745         nvmeq->cqe_seen = 0;
 746         spin_unlock(&nvmeq->q_lock);
 747         return result;
 748 }
 749
 750 static irqreturn_t nvme_irq_check(int irq, void *data)
 751 {
 752         struct nvme_queue *nvmeq = data;
 753         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 754         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 755                 return IRQ_NONE;
 756         return IRQ_WAKE_THREAD;
 757 }
 758
 759 static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
 760                                                                 cmd_info)
 761 {
 762         spin_lock_irq(&nvmeq->q_lock);
 763         cancel_cmd_info(cmd_info, NULL);
 764         spin_unlock_irq(&nvmeq->q_lock);
 765 }
 766
 767 struct sync_cmd_info {
 768         struct task_struct *task;
 769         u32 result;
 770         int status;
 771 };
 772
 773 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
 774                                                 struct nvme_completion *cqe)
 775 {
 776         struct sync_cmd_info *cmdinfo = ctx;
 777         cmdinfo->result = le32_to_cpup(&cqe->result);
 778         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 779         wake_up_process(cmdinfo->task);
 780 }
 781
 782 /*
 783  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 784  * if the result is positive, it's an NVM Express status code
 785  */
 786 static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
 787                                                 u32 *result, unsigned timeout)
 788 {
 789         int ret;
 790         struct sync_cmd_info cmdinfo;
 791         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 792         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
 793
 794         cmdinfo.task = current;
 795         cmdinfo.status = -EINTR;
 796
 797         cmd->common.command_id = req->tag;
 798
 799         nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
 800
 801         set_current_state(TASK_KILLABLE);
 802         ret = nvme_submit_cmd(nvmeq, cmd);
 803         if (ret) {
 804                 nvme_finish_cmd(nvmeq, req->tag, NULL);
 805                 set_current_state(TASK_RUNNING);
 806         }
 807         schedule_timeout(timeout);
 808
 809         if (cmdinfo.status == -EINTR) {
 810                 nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
 811                 return -EINTR;
 812         }
 813
 814         if (result)
 815                 *result = cmdinfo.result;
 816
 817         return cmdinfo.status;
 818 }
 819
 820 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
 821 {
 822         struct nvme_queue *nvmeq = dev->queues[0];
 823         struct nvme_command c;
 824         struct nvme_cmd_info *cmd_info;
 825         struct request *req;
 826
 827         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false);
 828         if (IS_ERR(req))
 829                 return PTR_ERR(req);
 830
 831         cmd_info = blk_mq_rq_to_pdu(req);
 832         nvme_set_info(cmd_info, req, async_req_completion);
 833
 834         memset(&c, 0, sizeof(c));
 835         c.common.opcode = nvme_admin_async_event;
 836         c.common.command_id = req->tag;
 837
 838         return __nvme_submit_cmd(nvmeq, &c);
 839 }
 840
 841 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
 842                         struct nvme_command *cmd,
 843                         struct async_cmd_info *cmdinfo, unsigned timeout)
 844 {
 845         struct nvme_queue *nvmeq = dev->queues[0];
 846         struct request *req;
 847         struct nvme_cmd_info *cmd_rq;
 848
 849         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 850         if (IS_ERR(req))
 851                 return PTR_ERR(req);
 852
 853         req->timeout = timeout;
 854         cmd_rq = blk_mq_rq_to_pdu(req);
 855         cmdinfo->req = req;
 856         nvme_set_info(cmd_rq, cmdinfo, async_completion);
 857         cmdinfo->status = -EINTR;
 858
 859         cmd->common.command_id = req->tag;
 860
 861         return nvme_submit_cmd(nvmeq, cmd);
 862 }
 863
 864 static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 865                                                 u32 *result, unsigned timeout)
 866 {
 867         int res;
 868         struct request *req;
 869
 870         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 871         if (IS_ERR(req))
 872                 return PTR_ERR(req);
 873         res = nvme_submit_sync_cmd(req, cmd, result, timeout);
 874         blk_mq_free_request(req);
 875         return res;
 876 }
 877
 878 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 879                                                                 u32 *result)
 880 {
 881         return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT);
 882 }
 883
 884 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
 885                                         struct nvme_command *cmd, u32 *result)
 886 {
 887         int res;
 888         struct request *req;
 889
 890         req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT),
 891                                                                         false);
 892         if (IS_ERR(req))
 893                 return PTR_ERR(req);
 894         res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT);
 895         blk_mq_free_request(req);
 896         return res;
 897 }
 898
 899 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
 900 {
 901         struct nvme_command c;
 902
 903         memset(&c, 0, sizeof(c));
 904         c.delete_queue.opcode = opcode;
 905         c.delete_queue.qid = cpu_to_le16(id);
 906
 907         return nvme_submit_admin_cmd(dev, &c, NULL);
 908 }
 909
 910 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
 911                                                 struct nvme_queue *nvmeq)
 912 {
 913         struct nvme_command c;
 914         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
 915
 916         memset(&c, 0, sizeof(c));
 917         c.create_cq.opcode = nvme_admin_create_cq;
 918         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
 919         c.create_cq.cqid = cpu_to_le16(qid);
 920         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 921         c.create_cq.cq_flags = cpu_to_le16(flags);
 922         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
 923
 924         return nvme_submit_admin_cmd(dev, &c, NULL);
 925 }
 926
 927 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
 928                                                 struct nvme_queue *nvmeq)
 929 {
 930         struct nvme_command c;
 931         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
 932
 933         memset(&c, 0, sizeof(c));
 934         c.create_sq.opcode = nvme_admin_create_sq;
 935         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
 936         c.create_sq.sqid = cpu_to_le16(qid);
 937         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 938         c.create_sq.sq_flags = cpu_to_le16(flags);
 939         c.create_sq.cqid = cpu_to_le16(qid);
 940
 941         return nvme_submit_admin_cmd(dev, &c, NULL);
 942 }
 943
 944 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
 945 {
 946         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
 947 }
 948
 949 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
 950 {
 951         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
 952 }
 953
 954 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
 955                                                         dma_addr_t dma_addr)
 956 {
 957         struct nvme_command c;
 958
 959         memset(&c, 0, sizeof(c));
 960         c.identify.opcode = nvme_admin_identify;
 961         c.identify.nsid = cpu_to_le32(nsid);
 962         c.identify.prp1 = cpu_to_le64(dma_addr);
 963         c.identify.cns = cpu_to_le32(cns);
 964
 965         return nvme_submit_admin_cmd(dev, &c, NULL);
 966 }
 967
 968 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
 969                                         dma_addr_t dma_addr, u32 *result)
 970 {
 971         struct nvme_command c;
 972
 973         memset(&c, 0, sizeof(c));
 974         c.features.opcode = nvme_admin_get_features;
 975         c.features.nsid = cpu_to_le32(nsid);
 976         c.features.prp1 = cpu_to_le64(dma_addr);
 977         c.features.fid = cpu_to_le32(fid);
 978
 979         return nvme_submit_admin_cmd(dev, &c, result);
 980 }
 981
 982 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
 983                                         dma_addr_t dma_addr, u32 *result)
 984 {
 985         struct nvme_command c;
 986
 987         memset(&c, 0, sizeof(c));
 988         c.features.opcode = nvme_admin_set_features;
 989         c.features.prp1 = cpu_to_le64(dma_addr);
 990         c.features.fid = cpu_to_le32(fid);
 991         c.features.dword11 = cpu_to_le32(dword11);
 992
 993         return nvme_submit_admin_cmd(dev, &c, result);
 994 }
 995
 996 /**
 997  * nvme_abort_req - Attempt aborting a request
 998  *
 999  * Schedule controller reset if the command was already aborted once before and
1000  * still hasn't been returned to the driver, or if this is the admin queue.
1001  */
1002 static void nvme_abort_req(struct request *req)
1003 {
1004         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1005         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1006         struct nvme_dev *dev = nvmeq->dev;
1007         struct request *abort_req;
1008         struct nvme_cmd_info *abort_cmd;
1009         struct nvme_command cmd;
1010
1011         if (!nvmeq->qid || cmd_rq->aborted) {
1012                 if (work_busy(&dev->reset_work))
1013                         return;
1014                 list_del_init(&dev->node);
1015                 dev_warn(&dev->pci_dev->dev,
1016                         "I/O %d QID %d timeout, reset controller\n",
1017                                                         req->tag, nvmeq->qid);
1018                 dev->reset_workfn = nvme_reset_failed_dev;
1019                 queue_work(nvme_workq, &dev->reset_work);
1020                 return;
1021         }
1022
1023         if (!dev->abort_limit)
1024                 return;
1025
1026         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1027                                                                         false);
1028         if (IS_ERR(abort_req))
1029                 return;
1030
1031         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1032         nvme_set_info(abort_cmd, abort_req, abort_completion);
1033
1034         memset(&cmd, 0, sizeof(cmd));
1035         cmd.abort.opcode = nvme_admin_abort_cmd;
1036         cmd.abort.cid = req->tag;
1037         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1038         cmd.abort.command_id = abort_req->tag;
1039
1040         --dev->abort_limit;
1041         cmd_rq->aborted = 1;
1042
1043         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1044                                                         nvmeq->qid);
1045         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1046                 dev_warn(nvmeq->q_dmadev,
1047                                 "Could not abort I/O %d QID %d",
1048                                 req->tag, nvmeq->qid);
1049                 blk_mq_free_request(abort_req);
1050         }
1051 }
1052
1053 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1054                                 struct request *req, void *data, bool reserved)
1055 {
1056         struct nvme_queue *nvmeq = data;
1057         void *ctx;
1058         nvme_completion_fn fn;
1059         struct nvme_cmd_info *cmd;
1060         static struct nvme_completion cqe = {
1061                 .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1062         };
1063
1064         cmd = blk_mq_rq_to_pdu(req);
1065
1066         if (cmd->ctx == CMD_CTX_CANCELLED)
1067                 return;
1068
1069         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1070                                                 req->tag, nvmeq->qid);
1071         ctx = cancel_cmd_info(cmd, &fn);
1072         fn(nvmeq, ctx, &cqe);
1073 }
1074
1075 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1076 {
1077         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1078         struct nvme_queue *nvmeq = cmd->nvmeq;
1079
1080         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1081                                                         nvmeq->qid);
1082         if (nvmeq->dev->initialized)
1083                 nvme_abort_req(req);
1084
1085         /*
1086          * The aborted req will be completed on receiving the abort req.
1087          * We enable the timer again. If hit twice, it'll cause a device reset,
1088          * as the device then is in a faulty state.
1089          */
1090         return BLK_EH_RESET_TIMER;
1091 }
1092
1093 static void nvme_free_queue(struct nvme_queue *nvmeq)
1094 {
1095         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1096                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1097         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1098                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1099         kfree(nvmeq);
1100 }
1101
1102 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1103 {
1104         LLIST_HEAD(q_list);
1105         struct nvme_queue *nvmeq, *next;
1106         struct llist_node *entry;
1107         int i;
1108
1109         for (i = dev->queue_count - 1; i >= lowest; i--) {
1110                 struct nvme_queue *nvmeq = dev->queues[i];
1111                 llist_add(&nvmeq->node, &q_list);
1112                 dev->queue_count--;
1113                 dev->queues[i] = NULL;
1114         }
1115         synchronize_rcu();
1116         entry = llist_del_all(&q_list);
1117         llist_for_each_entry_safe(nvmeq, next, entry, node)
1118                 nvme_free_queue(nvmeq);
1119 }
1120
1121 /**
1122  * nvme_suspend_queue - put queue into suspended state
1123  * @nvmeq - queue to suspend
1124  */
1125 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1126 {
1127         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1128
1129         spin_lock_irq(&nvmeq->q_lock);
1130         nvmeq->dev->online_queues--;
1131         spin_unlock_irq(&nvmeq->q_lock);
1132
1133         irq_set_affinity_hint(vector, NULL);
1134         free_irq(vector, nvmeq);
1135
1136         return 0;
1137 }
1138
1139 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1140 {
1141         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1142
1143         spin_lock_irq(&nvmeq->q_lock);
1144         nvme_process_cq(nvmeq);
1145         if (hctx && hctx->tags)
1146                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1147         spin_unlock_irq(&nvmeq->q_lock);
1148 }
1149
1150 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1151 {
1152         struct nvme_queue *nvmeq = dev->queues[qid];
1153
1154         if (!nvmeq)
1155                 return;
1156         if (nvme_suspend_queue(nvmeq))
1157                 return;
1158
1159         /* Don't tell the adapter to delete the admin queue.
1160          * Don't tell a removed adapter to delete IO queues. */
1161         if (qid && readl(&dev->bar->csts) != -1) {
1162                 adapter_delete_sq(dev, qid);
1163                 adapter_delete_cq(dev, qid);
1164         }
1165         nvme_clear_queue(nvmeq);
1166 }
1167
1168 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1169                                                         int depth, int vector)
1170 {
1171         struct device *dmadev = &dev->pci_dev->dev;
1172         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1173         if (!nvmeq)
1174                 return NULL;
1175
1176         nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1177                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1178         if (!nvmeq->cqes)
1179                 goto free_nvmeq;
1180
1181         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1182                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1183         if (!nvmeq->sq_cmds)
1184                 goto free_cqdma;
1185
1186         nvmeq->q_dmadev = dmadev;
1187         nvmeq->dev = dev;
1188         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1189                         dev->instance, qid);
1190         spin_lock_init(&nvmeq->q_lock);
1191         nvmeq->cq_head = 0;
1192         nvmeq->cq_phase = 1;
1193         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1194         nvmeq->q_depth = depth;
1195         nvmeq->cq_vector = vector;
1196         nvmeq->qid = qid;
1197         dev->queue_count++;
1198         dev->queues[qid] = nvmeq;
1199
1200         return nvmeq;
1201
1202  free_cqdma:
1203         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1204                                                         nvmeq->cq_dma_addr);
1205  free_nvmeq:
1206         kfree(nvmeq);
1207         return NULL;
1208 }
1209
1210 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1211                                                         const char *name)
1212 {
1213         if (use_threaded_interrupts)
1214                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1215                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1216                                         name, nvmeq);
1217         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1218                                 IRQF_SHARED, name, nvmeq);
1219 }
1220
1221 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1222 {
1223         struct nvme_dev *dev = nvmeq->dev;
1224
1225         spin_lock_irq(&nvmeq->q_lock);
1226         nvmeq->sq_tail = 0;
1227         nvmeq->cq_head = 0;
1228         nvmeq->cq_phase = 1;
1229         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1230         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1231         dev->online_queues++;
1232         spin_unlock_irq(&nvmeq->q_lock);
1233 }
1234
1235 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1236 {
1237         struct nvme_dev *dev = nvmeq->dev;
1238         int result;
1239
1240         result = adapter_alloc_cq(dev, qid, nvmeq);
1241         if (result < 0)
1242                 return result;
1243
1244         result = adapter_alloc_sq(dev, qid, nvmeq);
1245         if (result < 0)
1246                 goto release_cq;
1247
1248         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1249         if (result < 0)
1250                 goto release_sq;
1251
1252         nvme_init_queue(nvmeq, qid);
1253         return result;
1254
1255  release_sq:
1256         adapter_delete_sq(dev, qid);
1257  release_cq:
1258         adapter_delete_cq(dev, qid);
1259         return result;
1260 }
1261
1262 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1263 {
1264         unsigned long timeout;
1265         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1266
1267         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1268
1269         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1270                 msleep(100);
1271                 if (fatal_signal_pending(current))
1272                         return -EINTR;
1273                 if (time_after(jiffies, timeout)) {
1274                         dev_err(&dev->pci_dev->dev,
1275                                 "Device not ready; aborting %s\n", enabled ?
1276                                                 "initialisation" : "reset");
1277                         return -ENODEV;
1278                 }
1279         }
1280
1281         return 0;
1282 }
1283
1284 /*
1285  * If the device has been passed off to us in an enabled state, just clear
1286  * the enabled bit.  The spec says we should set the 'shutdown notification
1287  * bits', but doing so may cause the device to complete commands to the
1288  * admin queue ... and we don't know what memory that might be pointing at!
1289  */
1290 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1291 {
1292         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1293         dev->ctrl_config &= ~NVME_CC_ENABLE;
1294         writel(dev->ctrl_config, &dev->bar->cc);
1295
1296         return nvme_wait_ready(dev, cap, false);
1297 }
1298
1299 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1300 {
1301         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1302         dev->ctrl_config |= NVME_CC_ENABLE;
1303         writel(dev->ctrl_config, &dev->bar->cc);
1304
1305         return nvme_wait_ready(dev, cap, true);
1306 }
1307
1308 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1309 {
1310         unsigned long timeout;
1311
1312         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1313         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1314
1315         writel(dev->ctrl_config, &dev->bar->cc);
1316
1317         timeout = SHUTDOWN_TIMEOUT + jiffies;
1318         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1319                                                         NVME_CSTS_SHST_CMPLT) {
1320                 msleep(100);
1321                 if (fatal_signal_pending(current))
1322                         return -EINTR;
1323                 if (time_after(jiffies, timeout)) {
1324                         dev_err(&dev->pci_dev->dev,
1325                                 "Device shutdown incomplete; abort shutdown\n");
1326                         return -ENODEV;
1327                 }
1328         }
1329
1330         return 0;
1331 }
1332
1333 static struct blk_mq_ops nvme_mq_admin_ops = {
1334         .queue_rq       = nvme_admin_queue_rq,
1335         .map_queue      = blk_mq_map_queue,
1336         .init_hctx      = nvme_admin_init_hctx,
1337         .exit_hctx      = nvme_exit_hctx,
1338         .init_request   = nvme_admin_init_request,
1339         .timeout        = nvme_timeout,
1340 };
1341
1342 static struct blk_mq_ops nvme_mq_ops = {
1343         .queue_rq       = nvme_queue_rq,
1344         .map_queue      = blk_mq_map_queue,
1345         .init_hctx      = nvme_init_hctx,
1346         .exit_hctx      = nvme_exit_hctx,
1347         .init_request   = nvme_init_request,
1348         .timeout        = nvme_timeout,
1349 };
1350
1351 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1352 {
1353         if (!dev->admin_q) {
1354                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1355                 dev->admin_tagset.nr_hw_queues = 1;
1356                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1357                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1358                 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1359                 dev->admin_tagset.cmd_size = sizeof(struct nvme_cmd_info);
1360                 dev->admin_tagset.driver_data = dev;
1361
1362                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1363                         return -ENOMEM;
1364
1365                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1366                 if (!dev->admin_q) {
1367                         blk_mq_free_tag_set(&dev->admin_tagset);
1368                         return -ENOMEM;
1369                 }
1370         }
1371
1372         return 0;
1373 }
1374
1375 static void nvme_free_admin_tags(struct nvme_dev *dev)
1376 {
1377         if (dev->admin_q)
1378                 blk_mq_free_tag_set(&dev->admin_tagset);
1379 }
1380
1381 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1382 {
1383         int result;
1384         u32 aqa;
1385         u64 cap = readq(&dev->bar->cap);
1386         struct nvme_queue *nvmeq;
1387         unsigned page_shift = PAGE_SHIFT;
1388         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1389         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1390
1391         if (page_shift < dev_page_min) {
1392                 dev_err(&dev->pci_dev->dev,
1393                                 "Minimum device page size (%u) too large for "
1394                                 "host (%u)\n", 1 << dev_page_min,
1395                                 1 << page_shift);
1396                 return -ENODEV;
1397         }
1398         if (page_shift > dev_page_max) {
1399                 dev_info(&dev->pci_dev->dev,
1400                                 "Device maximum page size (%u) smaller than "
1401                                 "host (%u); enabling work-around\n",
1402                                 1 << dev_page_max, 1 << page_shift);
1403                 page_shift = dev_page_max;
1404         }
1405
1406         result = nvme_disable_ctrl(dev, cap);
1407         if (result < 0)
1408                 return result;
1409
1410         nvmeq = dev->queues[0];
1411         if (!nvmeq) {
1412                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH, 0);
1413                 if (!nvmeq)
1414                         return -ENOMEM;
1415         }
1416
1417         aqa = nvmeq->q_depth - 1;
1418         aqa |= aqa << 16;
1419
1420         dev->page_size = 1 << page_shift;
1421
1422         dev->ctrl_config = NVME_CC_CSS_NVM;
1423         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1424         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1425         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1426
1427         writel(aqa, &dev->bar->aqa);
1428         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1429         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1430
1431         result = nvme_enable_ctrl(dev, cap);
1432         if (result)
1433                 goto free_nvmeq;
1434
1435         result = nvme_alloc_admin_tags(dev);
1436         if (result)
1437                 goto free_nvmeq;
1438
1439         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1440         if (result)
1441                 goto free_tags;
1442
1443         return result;
1444
1445  free_tags:
1446         nvme_free_admin_tags(dev);
1447  free_nvmeq:
1448         nvme_free_queues(dev, 0);
1449         return result;
1450 }
1451
1452 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1453                                 unsigned long addr, unsigned length)
1454 {
1455         int i, err, count, nents, offset;
1456         struct scatterlist *sg;
1457         struct page **pages;
1458         struct nvme_iod *iod;
1459
1460         if (addr & 3)
1461                 return ERR_PTR(-EINVAL);
1462         if (!length || length > INT_MAX - PAGE_SIZE)
1463                 return ERR_PTR(-EINVAL);
1464
1465         offset = offset_in_page(addr);
1466         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1467         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1468         if (!pages)
1469                 return ERR_PTR(-ENOMEM);
1470
1471         err = get_user_pages_fast(addr, count, 1, pages);
1472         if (err < count) {
1473                 count = err;
1474                 err = -EFAULT;
1475                 goto put_pages;
1476         }
1477
1478         err = -ENOMEM;
1479         iod = nvme_alloc_iod(count, length, dev, GFP_KERNEL);
1480         if (!iod)
1481                 goto put_pages;
1482
1483         sg = iod->sg;
1484         sg_init_table(sg, count);
1485         for (i = 0; i < count; i++) {
1486                 sg_set_page(&sg[i], pages[i],
1487                             min_t(unsigned, length, PAGE_SIZE - offset),
1488                             offset);
1489                 length -= (PAGE_SIZE - offset);
1490                 offset = 0;
1491         }
1492         sg_mark_end(&sg[i - 1]);
1493         iod->nents = count;
1494
1495         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1496                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1497         if (!nents)
1498                 goto free_iod;
1499
1500         kfree(pages);
1501         return iod;
1502
1503  free_iod:
1504         kfree(iod);
1505  put_pages:
1506         for (i = 0; i < count; i++)
1507                 put_page(pages[i]);
1508         kfree(pages);
1509         return ERR_PTR(err);
1510 }
1511
1512 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1513                         struct nvme_iod *iod)
1514 {
1515         int i;
1516
1517         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1518                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1519
1520         for (i = 0; i < iod->nents; i++)
1521                 put_page(sg_page(&iod->sg[i]));
1522 }
1523
1524 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1525 {
1526         struct nvme_dev *dev = ns->dev;
1527         struct nvme_user_io io;
1528         struct nvme_command c;
1529         unsigned length, meta_len;
1530         int status, i;
1531         struct nvme_iod *iod, *meta_iod = NULL;
1532         dma_addr_t meta_dma_addr;
1533         void *meta, *uninitialized_var(meta_mem);
1534
1535         if (copy_from_user(&io, uio, sizeof(io)))
1536                 return -EFAULT;
1537         length = (io.nblocks + 1) << ns->lba_shift;
1538         meta_len = (io.nblocks + 1) * ns->ms;
1539
1540         if (meta_len && ((io.metadata & 3) || !io.metadata))
1541                 return -EINVAL;
1542
1543         switch (io.opcode) {
1544         case nvme_cmd_write:
1545         case nvme_cmd_read:
1546         case nvme_cmd_compare:
1547                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1548                 break;
1549         default:
1550                 return -EINVAL;
1551         }
1552
1553         if (IS_ERR(iod))
1554                 return PTR_ERR(iod);
1555
1556         memset(&c, 0, sizeof(c));
1557         c.rw.opcode = io.opcode;
1558         c.rw.flags = io.flags;
1559         c.rw.nsid = cpu_to_le32(ns->ns_id);
1560         c.rw.slba = cpu_to_le64(io.slba);
1561         c.rw.length = cpu_to_le16(io.nblocks);
1562         c.rw.control = cpu_to_le16(io.control);
1563         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1564         c.rw.reftag = cpu_to_le32(io.reftag);
1565         c.rw.apptag = cpu_to_le16(io.apptag);
1566         c.rw.appmask = cpu_to_le16(io.appmask);
1567
1568         if (meta_len) {
1569                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1570                                                                 meta_len);
1571                 if (IS_ERR(meta_iod)) {
1572                         status = PTR_ERR(meta_iod);
1573                         meta_iod = NULL;
1574                         goto unmap;
1575                 }
1576
1577                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1578                                                 &meta_dma_addr, GFP_KERNEL);
1579                 if (!meta_mem) {
1580                         status = -ENOMEM;
1581                         goto unmap;
1582                 }
1583
1584                 if (io.opcode & 1) {
1585                         int meta_offset = 0;
1586
1587                         for (i = 0; i < meta_iod->nents; i++) {
1588                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1589                                                 meta_iod->sg[i].offset;
1590                                 memcpy(meta_mem + meta_offset, meta,
1591                                                 meta_iod->sg[i].length);
1592                                 kunmap_atomic(meta);
1593                                 meta_offset += meta_iod->sg[i].length;
1594                         }
1595                 }
1596
1597                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1598         }
1599
1600         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1601         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1602         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1603
1604         if (length != (io.nblocks + 1) << ns->lba_shift)
1605                 status = -ENOMEM;
1606         else
1607                 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1608
1609         if (meta_len) {
1610                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1611                         int meta_offset = 0;
1612
1613                         for (i = 0; i < meta_iod->nents; i++) {
1614                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1615                                                 meta_iod->sg[i].offset;
1616                                 memcpy(meta, meta_mem + meta_offset,
1617                                                 meta_iod->sg[i].length);
1618                                 kunmap_atomic(meta);
1619                                 meta_offset += meta_iod->sg[i].length;
1620                         }
1621                 }
1622
1623                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1624                                                                 meta_dma_addr);
1625         }
1626
1627  unmap:
1628         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1629         nvme_free_iod(dev, iod);
1630
1631         if (meta_iod) {
1632                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1633                 nvme_free_iod(dev, meta_iod);
1634         }
1635
1636         return status;
1637 }
1638
1639 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1640                         struct nvme_passthru_cmd __user *ucmd)
1641 {
1642         struct nvme_passthru_cmd cmd;
1643         struct nvme_command c;
1644         int status, length;
1645         struct nvme_iod *uninitialized_var(iod);
1646         unsigned timeout;
1647
1648         if (!capable(CAP_SYS_ADMIN))
1649                 return -EACCES;
1650         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1651                 return -EFAULT;
1652
1653         memset(&c, 0, sizeof(c));
1654         c.common.opcode = cmd.opcode;
1655         c.common.flags = cmd.flags;
1656         c.common.nsid = cpu_to_le32(cmd.nsid);
1657         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1658         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1659         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1660         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1661         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1662         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1663         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1664         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1665
1666         length = cmd.data_len;
1667         if (cmd.data_len) {
1668                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1669                                                                 length);
1670                 if (IS_ERR(iod))
1671                         return PTR_ERR(iod);
1672                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1673                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1674                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1675         }
1676
1677         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1678                                                                 ADMIN_TIMEOUT;
1679
1680         if (length != cmd.data_len)
1681                 status = -ENOMEM;
1682         else if (ns) {
1683                 struct request *req;
1684
1685                 req = blk_mq_alloc_request(ns->queue, WRITE,
1686                                                 (GFP_KERNEL|__GFP_WAIT), false);
1687                 if (IS_ERR(req))
1688                         status = PTR_ERR(req);
1689                 else {
1690                         status = nvme_submit_sync_cmd(req, &c, &cmd.result,
1691                                                                 timeout);
1692                         blk_mq_free_request(req);
1693                 }
1694         } else
1695                 status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout);
1696
1697         if (cmd.data_len) {
1698                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1699                 nvme_free_iod(dev, iod);
1700         }
1701
1702         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1703                                                         sizeof(cmd.result)))
1704                 status = -EFAULT;
1705
1706         return status;
1707 }
1708
1709 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1710                                                         unsigned long arg)
1711 {
1712         struct nvme_ns *ns = bdev->bd_disk->private_data;
1713
1714         switch (cmd) {
1715         case NVME_IOCTL_ID:
1716                 force_successful_syscall_return();
1717                 return ns->ns_id;
1718         case NVME_IOCTL_ADMIN_CMD:
1719                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1720         case NVME_IOCTL_IO_CMD:
1721                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1722         case NVME_IOCTL_SUBMIT_IO:
1723                 return nvme_submit_io(ns, (void __user *)arg);
1724         case SG_GET_VERSION_NUM:
1725                 return nvme_sg_get_version_num((void __user *)arg);
1726         case SG_IO:
1727                 return nvme_sg_io(ns, (void __user *)arg);
1728         default:
1729                 return -ENOTTY;
1730         }
1731 }
1732
1733 #ifdef CONFIG_COMPAT
1734 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1735                                         unsigned int cmd, unsigned long arg)
1736 {
1737         switch (cmd) {
1738         case SG_IO:
1739                 return -ENOIOCTLCMD;
1740         }
1741         return nvme_ioctl(bdev, mode, cmd, arg);
1742 }
1743 #else
1744 #define nvme_compat_ioctl       NULL
1745 #endif
1746
1747 static int nvme_open(struct block_device *bdev, fmode_t mode)
1748 {
1749         int ret = 0;
1750         struct nvme_ns *ns;
1751
1752         spin_lock(&dev_list_lock);
1753         ns = bdev->bd_disk->private_data;
1754         if (!ns)
1755                 ret = -ENXIO;
1756         else if (!kref_get_unless_zero(&ns->dev->kref))
1757                 ret = -ENXIO;
1758         spin_unlock(&dev_list_lock);
1759
1760         return ret;
1761 }
1762
1763 static void nvme_free_dev(struct kref *kref);
1764
1765 static void nvme_release(struct gendisk *disk, fmode_t mode)
1766 {
1767         struct nvme_ns *ns = disk->private_data;
1768         struct nvme_dev *dev = ns->dev;
1769
1770         kref_put(&dev->kref, nvme_free_dev);
1771 }
1772
1773 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1774 {
1775         /* some standard values */
1776         geo->heads = 1 << 6;
1777         geo->sectors = 1 << 5;
1778         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1779         return 0;
1780 }
1781
1782 static int nvme_revalidate_disk(struct gendisk *disk)
1783 {
1784         struct nvme_ns *ns = disk->private_data;
1785         struct nvme_dev *dev = ns->dev;
1786         struct nvme_id_ns *id;
1787         dma_addr_t dma_addr;
1788         int lbaf;
1789
1790         id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
1791                                                                 GFP_KERNEL);
1792         if (!id) {
1793                 dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n",
1794                                                                 __func__);
1795                 return 0;
1796         }
1797
1798         if (nvme_identify(dev, ns->ns_id, 0, dma_addr))
1799                 goto free;
1800
1801         lbaf = id->flbas & 0xf;
1802         ns->lba_shift = id->lbaf[lbaf].ds;
1803
1804         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1805         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1806  free:
1807         dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
1808         return 0;
1809 }
1810
1811 static const struct block_device_operations nvme_fops = {
1812         .owner          = THIS_MODULE,
1813         .ioctl          = nvme_ioctl,
1814         .compat_ioctl   = nvme_compat_ioctl,
1815         .open           = nvme_open,
1816         .release        = nvme_release,
1817         .getgeo         = nvme_getgeo,
1818         .revalidate_disk= nvme_revalidate_disk,
1819 };
1820
1821 static int nvme_kthread(void *data)
1822 {
1823         struct nvme_dev *dev, *next;
1824
1825         while (!kthread_should_stop()) {
1826                 set_current_state(TASK_INTERRUPTIBLE);
1827                 spin_lock(&dev_list_lock);
1828                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1829                         int i;
1830                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1831                                                         dev->initialized) {
1832                                 if (work_busy(&dev->reset_work))
1833                                         continue;
1834                                 list_del_init(&dev->node);
1835                                 dev_warn(&dev->pci_dev->dev,
1836                                         "Failed status: %x, reset controller\n",
1837                                         readl(&dev->bar->csts));
1838                                 dev->reset_workfn = nvme_reset_failed_dev;
1839                                 queue_work(nvme_workq, &dev->reset_work);
1840                                 continue;
1841                         }
1842                         for (i = 0; i < dev->queue_count; i++) {
1843                                 struct nvme_queue *nvmeq = dev->queues[i];
1844                                 if (!nvmeq)
1845                                         continue;
1846                                 spin_lock_irq(&nvmeq->q_lock);
1847                                 nvme_process_cq(nvmeq);
1848
1849                                 while ((i == 0) && (dev->event_limit > 0)) {
1850                                         if (nvme_submit_async_admin_req(dev))
1851                                                 break;
1852                                         dev->event_limit--;
1853                                 }
1854                                 spin_unlock_irq(&nvmeq->q_lock);
1855                         }
1856                 }
1857                 spin_unlock(&dev_list_lock);
1858                 schedule_timeout(round_jiffies_relative(HZ));
1859         }
1860         return 0;
1861 }
1862
1863 static void nvme_config_discard(struct nvme_ns *ns)
1864 {
1865         u32 logical_block_size = queue_logical_block_size(ns->queue);
1866         ns->queue->limits.discard_zeroes_data = 0;
1867         ns->queue->limits.discard_alignment = logical_block_size;
1868         ns->queue->limits.discard_granularity = logical_block_size;
1869         ns->queue->limits.max_discard_sectors = 0xffffffff;
1870         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1871 }
1872
1873 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1874                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1875 {
1876         struct nvme_ns *ns;
1877         struct gendisk *disk;
1878         int node = dev_to_node(&dev->pci_dev->dev);
1879         int lbaf;
1880
1881         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1882                 return NULL;
1883
1884         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1885         if (!ns)
1886                 return NULL;
1887         ns->queue = blk_mq_init_queue(&dev->tagset);
1888         if (IS_ERR(ns->queue))
1889                 goto out_free_ns;
1890         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1891         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1892         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
1893         ns->dev = dev;
1894         ns->queue->queuedata = ns;
1895
1896         disk = alloc_disk_node(0, node);
1897         if (!disk)
1898                 goto out_free_queue;
1899
1900         ns->ns_id = nsid;
1901         ns->disk = disk;
1902         lbaf = id->flbas & 0xf;
1903         ns->lba_shift = id->lbaf[lbaf].ds;
1904         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1905         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1906         if (dev->max_hw_sectors)
1907                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1908         if (dev->stripe_size)
1909                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
1910         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
1911                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1912
1913         disk->major = nvme_major;
1914         disk->first_minor = 0;
1915         disk->fops = &nvme_fops;
1916         disk->private_data = ns;
1917         disk->queue = ns->queue;
1918         disk->driverfs_dev = &dev->pci_dev->dev;
1919         disk->flags = GENHD_FL_EXT_DEVT;
1920         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1921         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1922
1923         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1924                 nvme_config_discard(ns);
1925
1926         return ns;
1927
1928  out_free_queue:
1929         blk_cleanup_queue(ns->queue);
1930  out_free_ns:
1931         kfree(ns);
1932         return NULL;
1933 }
1934
1935 static void nvme_create_io_queues(struct nvme_dev *dev)
1936 {
1937         unsigned i;
1938
1939         for (i = dev->queue_count; i <= dev->max_qid; i++)
1940                 if (!nvme_alloc_queue(dev, i, dev->q_depth, i - 1))
1941                         break;
1942
1943         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
1944                 if (nvme_create_queue(dev->queues[i], i))
1945                         break;
1946 }
1947
1948 static int set_queue_count(struct nvme_dev *dev, int count)
1949 {
1950         int status;
1951         u32 result;
1952         u32 q_count = (count - 1) | ((count - 1) << 16);
1953
1954         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
1955                                                                 &result);
1956         if (status < 0)
1957                 return status;
1958         if (status > 0) {
1959                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
1960                                                                         status);
1961                 return 0;
1962         }
1963         return min(result & 0xffff, result >> 16) + 1;
1964 }
1965
1966 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
1967 {
1968         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
1969 }
1970
1971 static int nvme_setup_io_queues(struct nvme_dev *dev)
1972 {
1973         struct nvme_queue *adminq = dev->queues[0];
1974         struct pci_dev *pdev = dev->pci_dev;
1975         int result, i, vecs, nr_io_queues, size;
1976
1977         nr_io_queues = num_possible_cpus();
1978         result = set_queue_count(dev, nr_io_queues);
1979         if (result <= 0)
1980                 return result;
1981         if (result < nr_io_queues)
1982                 nr_io_queues = result;
1983
1984         size = db_bar_size(dev, nr_io_queues);
1985         if (size > 8192) {
1986                 iounmap(dev->bar);
1987                 do {
1988                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
1989                         if (dev->bar)
1990                                 break;
1991                         if (!--nr_io_queues)
1992                                 return -ENOMEM;
1993                         size = db_bar_size(dev, nr_io_queues);
1994                 } while (1);
1995                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
1996                 adminq->q_db = dev->dbs;
1997         }
1998
1999         /* Deregister the admin queue's interrupt */
2000         free_irq(dev->entry[0].vector, adminq);
2001
2002         /*
2003          * If we enable msix early due to not intx, disable it again before
2004          * setting up the full range we need.
2005          */
2006         if (!pdev->irq)
2007                 pci_disable_msix(pdev);
2008
2009         for (i = 0; i < nr_io_queues; i++)
2010                 dev->entry[i].entry = i;
2011         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2012         if (vecs < 0) {
2013                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2014                 if (vecs < 0) {
2015                         vecs = 1;
2016                 } else {
2017                         for (i = 0; i < vecs; i++)
2018                                 dev->entry[i].vector = i + pdev->irq;
2019                 }
2020         }
2021
2022         /*
2023          * Should investigate if there's a performance win from allocating
2024          * more queues than interrupt vectors; it might allow the submission
2025          * path to scale better, even if the receive path is limited by the
2026          * number of interrupts.
2027          */
2028         nr_io_queues = vecs;
2029         dev->max_qid = nr_io_queues;
2030
2031         result = queue_request_irq(dev, adminq, adminq->irqname);
2032         if (result)
2033                 goto free_queues;
2034
2035         /* Free previously allocated queues that are no longer usable */
2036         nvme_free_queues(dev, nr_io_queues + 1);
2037         nvme_create_io_queues(dev);
2038
2039         return 0;
2040
2041  free_queues:
2042         nvme_free_queues(dev, 1);
2043         return result;
2044 }
2045
2046 /*
2047  * Return: error value if an error occurred setting up the queues or calling
2048  * Identify Device.  0 if these succeeded, even if adding some of the
2049  * namespaces failed.  At the moment, these failures are silent.  TBD which
2050  * failures should be reported.
2051  */
2052 static int nvme_dev_add(struct nvme_dev *dev)
2053 {
2054         struct pci_dev *pdev = dev->pci_dev;
2055         int res;
2056         unsigned nn, i;
2057         struct nvme_ns *ns;
2058         struct nvme_id_ctrl *ctrl;
2059         struct nvme_id_ns *id_ns;
2060         void *mem;
2061         dma_addr_t dma_addr;
2062         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2063
2064         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2065         if (!mem)
2066                 return -ENOMEM;
2067
2068         res = nvme_identify(dev, 0, 1, dma_addr);
2069         if (res) {
2070                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2071                 res = -EIO;
2072                 goto out;
2073         }
2074
2075         ctrl = mem;
2076         nn = le32_to_cpup(&ctrl->nn);
2077         dev->oncs = le16_to_cpup(&ctrl->oncs);
2078         dev->abort_limit = ctrl->acl + 1;
2079         dev->vwc = ctrl->vwc;
2080         dev->event_limit = min(ctrl->aerl + 1, 8);
2081         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2082         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2083         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2084         if (ctrl->mdts)
2085                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2086         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2087                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2088                 unsigned int max_hw_sectors;
2089
2090                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2091                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2092                 if (dev->max_hw_sectors) {
2093                         dev->max_hw_sectors = min(max_hw_sectors,
2094                                                         dev->max_hw_sectors);
2095                 } else
2096                         dev->max_hw_sectors = max_hw_sectors;
2097         }
2098
2099         dev->tagset.ops = &nvme_mq_ops;
2100         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2101         dev->tagset.timeout = NVME_IO_TIMEOUT;
2102         dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
2103         dev->tagset.queue_depth =
2104                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2105         dev->tagset.cmd_size = sizeof(struct nvme_cmd_info);
2106         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2107         dev->tagset.driver_data = dev;
2108
2109         if (blk_mq_alloc_tag_set(&dev->tagset))
2110                 goto out;
2111
2112         id_ns = mem;
2113         for (i = 1; i <= nn; i++) {
2114                 res = nvme_identify(dev, i, 0, dma_addr);
2115                 if (res)
2116                         continue;
2117
2118                 if (id_ns->ncap == 0)
2119                         continue;
2120
2121                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2122                                                         dma_addr + 4096, NULL);
2123                 if (res)
2124                         memset(mem + 4096, 0, 4096);
2125
2126                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2127                 if (ns)
2128                         list_add_tail(&ns->list, &dev->namespaces);
2129         }
2130         list_for_each_entry(ns, &dev->namespaces, list)
2131                 add_disk(ns->disk);
2132         res = 0;
2133
2134  out:
2135         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2136         return res;
2137 }
2138
2139 static int nvme_dev_map(struct nvme_dev *dev)
2140 {
2141         u64 cap;
2142         int bars, result = -ENOMEM;
2143         struct pci_dev *pdev = dev->pci_dev;
2144
2145         if (pci_enable_device_mem(pdev))
2146                 return result;
2147
2148         dev->entry[0].vector = pdev->irq;
2149         pci_set_master(pdev);
2150         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2151         if (!bars)
2152                 goto disable_pci;
2153
2154         if (pci_request_selected_regions(pdev, bars, "nvme"))
2155                 goto disable_pci;
2156
2157         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2158             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2159                 goto disable;
2160
2161         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2162         if (!dev->bar)
2163                 goto disable;
2164
2165         if (readl(&dev->bar->csts) == -1) {
2166                 result = -ENODEV;
2167                 goto unmap;
2168         }
2169
2170         /*
2171          * Some devices don't advertse INTx interrupts, pre-enable a single
2172          * MSIX vec for setup. We'll adjust this later.
2173          */
2174         if (!pdev->irq) {
2175                 result = pci_enable_msix(pdev, dev->entry, 1);
2176                 if (result < 0)
2177                         goto unmap;
2178         }
2179
2180         cap = readq(&dev->bar->cap);
2181         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2182         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2183         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2184
2185         return 0;
2186
2187  unmap:
2188         iounmap(dev->bar);
2189         dev->bar = NULL;
2190  disable:
2191         pci_release_regions(pdev);
2192  disable_pci:
2193         pci_disable_device(pdev);
2194         return result;
2195 }
2196
2197 static void nvme_dev_unmap(struct nvme_dev *dev)
2198 {
2199         if (dev->pci_dev->msi_enabled)
2200                 pci_disable_msi(dev->pci_dev);
2201         else if (dev->pci_dev->msix_enabled)
2202                 pci_disable_msix(dev->pci_dev);
2203
2204         if (dev->bar) {
2205                 iounmap(dev->bar);
2206                 dev->bar = NULL;
2207                 pci_release_regions(dev->pci_dev);
2208         }
2209
2210         if (pci_is_enabled(dev->pci_dev))
2211                 pci_disable_device(dev->pci_dev);
2212 }
2213
2214 struct nvme_delq_ctx {
2215         struct task_struct *waiter;
2216         struct kthread_worker *worker;
2217         atomic_t refcount;
2218 };
2219
2220 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2221 {
2222         dq->waiter = current;
2223         mb();
2224
2225         for (;;) {
2226                 set_current_state(TASK_KILLABLE);
2227                 if (!atomic_read(&dq->refcount))
2228                         break;
2229                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2230                                         fatal_signal_pending(current)) {
2231                         set_current_state(TASK_RUNNING);
2232
2233                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2234                         nvme_disable_queue(dev, 0);
2235
2236                         send_sig(SIGKILL, dq->worker->task, 1);
2237                         flush_kthread_worker(dq->worker);
2238                         return;
2239                 }
2240         }
2241         set_current_state(TASK_RUNNING);
2242 }
2243
2244 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2245 {
2246         atomic_dec(&dq->refcount);
2247         if (dq->waiter)
2248                 wake_up_process(dq->waiter);
2249 }
2250
2251 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2252 {
2253         atomic_inc(&dq->refcount);
2254         return dq;
2255 }
2256
2257 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2258 {
2259         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2260
2261         nvme_clear_queue(nvmeq);
2262         nvme_put_dq(dq);
2263 }
2264
2265 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2266                                                 kthread_work_func_t fn)
2267 {
2268         struct nvme_command c;
2269
2270         memset(&c, 0, sizeof(c));
2271         c.delete_queue.opcode = opcode;
2272         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2273
2274         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2275         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2276                                                                 ADMIN_TIMEOUT);
2277 }
2278
2279 static void nvme_del_cq_work_handler(struct kthread_work *work)
2280 {
2281         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2282                                                         cmdinfo.work);
2283         nvme_del_queue_end(nvmeq);
2284 }
2285
2286 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2287 {
2288         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2289                                                 nvme_del_cq_work_handler);
2290 }
2291
2292 static void nvme_del_sq_work_handler(struct kthread_work *work)
2293 {
2294         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2295                                                         cmdinfo.work);
2296         int status = nvmeq->cmdinfo.status;
2297
2298         if (!status)
2299                 status = nvme_delete_cq(nvmeq);
2300         if (status)
2301                 nvme_del_queue_end(nvmeq);
2302 }
2303
2304 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2305 {
2306         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2307                                                 nvme_del_sq_work_handler);
2308 }
2309
2310 static void nvme_del_queue_start(struct kthread_work *work)
2311 {
2312         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2313                                                         cmdinfo.work);
2314         allow_signal(SIGKILL);
2315         if (nvme_delete_sq(nvmeq))
2316                 nvme_del_queue_end(nvmeq);
2317 }
2318
2319 static void nvme_disable_io_queues(struct nvme_dev *dev)
2320 {
2321         int i;
2322         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2323         struct nvme_delq_ctx dq;
2324         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2325                                         &worker, "nvme%d", dev->instance);
2326
2327         if (IS_ERR(kworker_task)) {
2328                 dev_err(&dev->pci_dev->dev,
2329                         "Failed to create queue del task\n");
2330                 for (i = dev->queue_count - 1; i > 0; i--)
2331                         nvme_disable_queue(dev, i);
2332                 return;
2333         }
2334
2335         dq.waiter = NULL;
2336         atomic_set(&dq.refcount, 0);
2337         dq.worker = &worker;
2338         for (i = dev->queue_count - 1; i > 0; i--) {
2339                 struct nvme_queue *nvmeq = dev->queues[i];
2340
2341                 if (nvme_suspend_queue(nvmeq))
2342                         continue;
2343                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2344                 nvmeq->cmdinfo.worker = dq.worker;
2345                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2346                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2347         }
2348         nvme_wait_dq(&dq, dev);
2349         kthread_stop(kworker_task);
2350 }
2351
2352 /*
2353 * Remove the node from the device list and check
2354 * for whether or not we need to stop the nvme_thread.
2355 */
2356 static void nvme_dev_list_remove(struct nvme_dev *dev)
2357 {
2358         struct task_struct *tmp = NULL;
2359
2360         spin_lock(&dev_list_lock);
2361         list_del_init(&dev->node);
2362         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2363                 tmp = nvme_thread;
2364                 nvme_thread = NULL;
2365         }
2366         spin_unlock(&dev_list_lock);
2367
2368         if (tmp)
2369                 kthread_stop(tmp);
2370 }
2371
2372 static void nvme_dev_shutdown(struct nvme_dev *dev)
2373 {
2374         int i;
2375         u32 csts = -1;
2376
2377         dev->initialized = 0;
2378         nvme_dev_list_remove(dev);
2379
2380         if (dev->bar)
2381                 csts = readl(&dev->bar->csts);
2382         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2383                 for (i = dev->queue_count - 1; i >= 0; i--) {
2384                         struct nvme_queue *nvmeq = dev->queues[i];
2385                         nvme_suspend_queue(nvmeq);
2386                         nvme_clear_queue(nvmeq);
2387                 }
2388         } else {
2389                 nvme_disable_io_queues(dev);
2390                 nvme_shutdown_ctrl(dev);
2391                 nvme_disable_queue(dev, 0);
2392         }
2393         nvme_dev_unmap(dev);
2394 }
2395
2396 static void nvme_dev_remove_admin(struct nvme_dev *dev)
2397 {
2398         if (dev->admin_q && !blk_queue_dying(dev->admin_q))
2399                 blk_cleanup_queue(dev->admin_q);
2400 }
2401
2402 static void nvme_dev_remove(struct nvme_dev *dev)
2403 {
2404         struct nvme_ns *ns;
2405
2406         list_for_each_entry(ns, &dev->namespaces, list) {
2407                 if (ns->disk->flags & GENHD_FL_UP)
2408                         del_gendisk(ns->disk);
2409                 if (!blk_queue_dying(ns->queue))
2410                         blk_cleanup_queue(ns->queue);
2411         }
2412 }
2413
2414 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2415 {
2416         struct device *dmadev = &dev->pci_dev->dev;
2417         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2418                                                 PAGE_SIZE, PAGE_SIZE, 0);
2419         if (!dev->prp_page_pool)
2420                 return -ENOMEM;
2421
2422         /* Optimisation for I/Os between 4k and 128k */
2423         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2424                                                 256, 256, 0);
2425         if (!dev->prp_small_pool) {
2426                 dma_pool_destroy(dev->prp_page_pool);
2427                 return -ENOMEM;
2428         }
2429         return 0;
2430 }
2431
2432 static void nvme_release_prp_pools(struct nvme_dev *dev)
2433 {
2434         dma_pool_destroy(dev->prp_page_pool);
2435         dma_pool_destroy(dev->prp_small_pool);
2436 }
2437
2438 static DEFINE_IDA(nvme_instance_ida);
2439
2440 static int nvme_set_instance(struct nvme_dev *dev)
2441 {
2442         int instance, error;
2443
2444         do {
2445                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2446                         return -ENODEV;
2447
2448                 spin_lock(&dev_list_lock);
2449                 error = ida_get_new(&nvme_instance_ida, &instance);
2450                 spin_unlock(&dev_list_lock);
2451         } while (error == -EAGAIN);
2452
2453         if (error)
2454                 return -ENODEV;
2455
2456         dev->instance = instance;
2457         return 0;
2458 }
2459
2460 static void nvme_release_instance(struct nvme_dev *dev)
2461 {
2462         spin_lock(&dev_list_lock);
2463         ida_remove(&nvme_instance_ida, dev->instance);
2464         spin_unlock(&dev_list_lock);
2465 }
2466
2467 static void nvme_free_namespaces(struct nvme_dev *dev)
2468 {
2469         struct nvme_ns *ns, *next;
2470
2471         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2472                 list_del(&ns->list);
2473
2474                 spin_lock(&dev_list_lock);
2475                 ns->disk->private_data = NULL;
2476                 spin_unlock(&dev_list_lock);
2477
2478                 put_disk(ns->disk);
2479                 kfree(ns);
2480         }
2481 }
2482
2483 static void nvme_free_dev(struct kref *kref)
2484 {
2485         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2486
2487         pci_dev_put(dev->pci_dev);
2488         nvme_free_namespaces(dev);
2489         nvme_release_instance(dev);
2490         blk_mq_free_tag_set(&dev->tagset);
2491         kfree(dev->queues);
2492         kfree(dev->entry);
2493         kfree(dev);
2494 }
2495
2496 static int nvme_dev_open(struct inode *inode, struct file *f)
2497 {
2498         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2499                                                                 miscdev);
2500         kref_get(&dev->kref);
2501         f->private_data = dev;
2502         return 0;
2503 }
2504
2505 static int nvme_dev_release(struct inode *inode, struct file *f)
2506 {
2507         struct nvme_dev *dev = f->private_data;
2508         kref_put(&dev->kref, nvme_free_dev);
2509         return 0;
2510 }
2511
2512 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2513 {
2514         struct nvme_dev *dev = f->private_data;
2515         struct nvme_ns *ns;
2516
2517         switch (cmd) {
2518         case NVME_IOCTL_ADMIN_CMD:
2519                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2520         case NVME_IOCTL_IO_CMD:
2521                 if (list_empty(&dev->namespaces))
2522                         return -ENOTTY;
2523                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2524                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2525         default:
2526                 return -ENOTTY;
2527         }
2528 }
2529
2530 static const struct file_operations nvme_dev_fops = {
2531         .owner          = THIS_MODULE,
2532         .open           = nvme_dev_open,
2533         .release        = nvme_dev_release,
2534         .unlocked_ioctl = nvme_dev_ioctl,
2535         .compat_ioctl   = nvme_dev_ioctl,
2536 };
2537
2538 static void nvme_set_irq_hints(struct nvme_dev *dev)
2539 {
2540         struct nvme_queue *nvmeq;
2541         int i;
2542
2543         for (i = 0; i < dev->online_queues; i++) {
2544                 nvmeq = dev->queues[i];
2545
2546                 if (!nvmeq->hctx)
2547                         continue;
2548
2549                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2550                                                         nvmeq->hctx->cpumask);
2551         }
2552 }
2553
2554 static int nvme_dev_start(struct nvme_dev *dev)
2555 {
2556         int result;
2557         bool start_thread = false;
2558
2559         result = nvme_dev_map(dev);
2560         if (result)
2561                 return result;
2562
2563         result = nvme_configure_admin_queue(dev);
2564         if (result)
2565                 goto unmap;
2566
2567         spin_lock(&dev_list_lock);
2568         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2569                 start_thread = true;
2570                 nvme_thread = NULL;
2571         }
2572         list_add(&dev->node, &dev_list);
2573         spin_unlock(&dev_list_lock);
2574
2575         if (start_thread) {
2576                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2577                 wake_up_all(&nvme_kthread_wait);
2578         } else
2579                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2580
2581         if (IS_ERR_OR_NULL(nvme_thread)) {
2582                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2583                 goto disable;
2584         }
2585
2586         nvme_init_queue(dev->queues[0], 0);
2587
2588         result = nvme_setup_io_queues(dev);
2589         if (result)
2590                 goto disable;
2591
2592         nvme_set_irq_hints(dev);
2593
2594         return result;
2595
2596  disable:
2597         nvme_disable_queue(dev, 0);
2598         nvme_dev_list_remove(dev);
2599  unmap:
2600         nvme_dev_unmap(dev);
2601         return result;
2602 }
2603
2604 static int nvme_remove_dead_ctrl(void *arg)
2605 {
2606         struct nvme_dev *dev = (struct nvme_dev *)arg;
2607         struct pci_dev *pdev = dev->pci_dev;
2608
2609         if (pci_get_drvdata(pdev))
2610                 pci_stop_and_remove_bus_device_locked(pdev);
2611         kref_put(&dev->kref, nvme_free_dev);
2612         return 0;
2613 }
2614
2615 static void nvme_remove_disks(struct work_struct *ws)
2616 {
2617         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2618
2619         nvme_free_queues(dev, 1);
2620         nvme_dev_remove(dev);
2621 }
2622
2623 static int nvme_dev_resume(struct nvme_dev *dev)
2624 {
2625         int ret;
2626
2627         ret = nvme_dev_start(dev);
2628         if (ret)
2629                 return ret;
2630         if (dev->online_queues < 2) {
2631                 spin_lock(&dev_list_lock);
2632                 dev->reset_workfn = nvme_remove_disks;
2633                 queue_work(nvme_workq, &dev->reset_work);
2634                 spin_unlock(&dev_list_lock);
2635         }
2636         dev->initialized = 1;
2637         return 0;
2638 }
2639
2640 static void nvme_dev_reset(struct nvme_dev *dev)
2641 {
2642         nvme_dev_shutdown(dev);
2643         if (nvme_dev_resume(dev)) {
2644                 dev_warn(&dev->pci_dev->dev, "Device failed to resume\n");
2645                 kref_get(&dev->kref);
2646                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2647                                                         dev->instance))) {
2648                         dev_err(&dev->pci_dev->dev,
2649                                 "Failed to start controller remove task\n");
2650                         kref_put(&dev->kref, nvme_free_dev);
2651                 }
2652         }
2653 }
2654
2655 static void nvme_reset_failed_dev(struct work_struct *ws)
2656 {
2657         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2658         nvme_dev_reset(dev);
2659 }
2660
2661 static void nvme_reset_workfn(struct work_struct *work)
2662 {
2663         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2664         dev->reset_workfn(work);
2665 }
2666
2667 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2668 {
2669         int node, result = -ENOMEM;
2670         struct nvme_dev *dev;
2671
2672         node = dev_to_node(&pdev->dev);
2673         if (node == NUMA_NO_NODE)
2674                 set_dev_node(&pdev->dev, 0);
2675
2676         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2677         if (!dev)
2678                 return -ENOMEM;
2679         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2680                                                         GFP_KERNEL, node);
2681         if (!dev->entry)
2682                 goto free;
2683         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2684                                                         GFP_KERNEL, node);
2685         if (!dev->queues)
2686                 goto free;
2687
2688         INIT_LIST_HEAD(&dev->namespaces);
2689         dev->reset_workfn = nvme_reset_failed_dev;
2690         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2691         dev->pci_dev = pci_dev_get(pdev);
2692         pci_set_drvdata(pdev, dev);
2693         result = nvme_set_instance(dev);
2694         if (result)
2695                 goto put_pci;
2696
2697         result = nvme_setup_prp_pools(dev);
2698         if (result)
2699                 goto release;
2700
2701         kref_init(&dev->kref);
2702         result = nvme_dev_start(dev);
2703         if (result)
2704                 goto release_pools;
2705
2706         if (dev->online_queues > 1)
2707                 result = nvme_dev_add(dev);
2708         if (result)
2709                 goto shutdown;
2710
2711         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2712         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2713         dev->miscdev.parent = &pdev->dev;
2714         dev->miscdev.name = dev->name;
2715         dev->miscdev.fops = &nvme_dev_fops;
2716         result = misc_register(&dev->miscdev);
2717         if (result)
2718                 goto remove;
2719
2720         nvme_set_irq_hints(dev);
2721
2722         dev->initialized = 1;
2723         return 0;
2724
2725  remove:
2726         nvme_dev_remove(dev);
2727         nvme_dev_remove_admin(dev);
2728         nvme_free_namespaces(dev);
2729  shutdown:
2730         nvme_dev_shutdown(dev);
2731  release_pools:
2732         nvme_free_queues(dev, 0);
2733         nvme_release_prp_pools(dev);
2734  release:
2735         nvme_release_instance(dev);
2736  put_pci:
2737         pci_dev_put(dev->pci_dev);
2738  free:
2739         kfree(dev->queues);
2740         kfree(dev->entry);
2741         kfree(dev);
2742         return result;
2743 }
2744
2745 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2746 {
2747         struct nvme_dev *dev = pci_get_drvdata(pdev);
2748
2749         if (prepare)
2750                 nvme_dev_shutdown(dev);
2751         else
2752                 nvme_dev_resume(dev);
2753 }
2754
2755 static void nvme_shutdown(struct pci_dev *pdev)
2756 {
2757         struct nvme_dev *dev = pci_get_drvdata(pdev);
2758         nvme_dev_shutdown(dev);
2759 }
2760
2761 static void nvme_remove(struct pci_dev *pdev)
2762 {
2763         struct nvme_dev *dev = pci_get_drvdata(pdev);
2764
2765         spin_lock(&dev_list_lock);
2766         list_del_init(&dev->node);
2767         spin_unlock(&dev_list_lock);
2768
2769         pci_set_drvdata(pdev, NULL);
2770         flush_work(&dev->reset_work);
2771         misc_deregister(&dev->miscdev);
2772         nvme_dev_remove(dev);
2773         nvme_dev_shutdown(dev);
2774         nvme_dev_remove_admin(dev);
2775         nvme_free_queues(dev, 0);
2776         nvme_free_admin_tags(dev);
2777         nvme_release_prp_pools(dev);
2778         kref_put(&dev->kref, nvme_free_dev);
2779 }
2780
2781 /* These functions are yet to be implemented */
2782 #define nvme_error_detected NULL
2783 #define nvme_dump_registers NULL
2784 #define nvme_link_reset NULL
2785 #define nvme_slot_reset NULL
2786 #define nvme_error_resume NULL
2787
2788 #ifdef CONFIG_PM_SLEEP
2789 static int nvme_suspend(struct device *dev)
2790 {
2791         struct pci_dev *pdev = to_pci_dev(dev);
2792         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2793
2794         nvme_dev_shutdown(ndev);
2795         return 0;
2796 }
2797
2798 static int nvme_resume(struct device *dev)
2799 {
2800         struct pci_dev *pdev = to_pci_dev(dev);
2801         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2802
2803         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2804                 ndev->reset_workfn = nvme_reset_failed_dev;
2805                 queue_work(nvme_workq, &ndev->reset_work);
2806         }
2807         return 0;
2808 }
2809 #endif
2810
2811 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2812
2813 static const struct pci_error_handlers nvme_err_handler = {
2814         .error_detected = nvme_error_detected,
2815         .mmio_enabled   = nvme_dump_registers,
2816         .link_reset     = nvme_link_reset,
2817         .slot_reset     = nvme_slot_reset,
2818         .resume         = nvme_error_resume,
2819         .reset_notify   = nvme_reset_notify,
2820 };
2821
2822 /* Move to pci_ids.h later */
2823 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2824
2825 static const struct pci_device_id nvme_id_table[] = {
2826         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2827         { 0, }
2828 };
2829 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2830
2831 static struct pci_driver nvme_driver = {
2832         .name           = "nvme",
2833         .id_table       = nvme_id_table,
2834         .probe          = nvme_probe,
2835         .remove         = nvme_remove,
2836         .shutdown       = nvme_shutdown,
2837         .driver         = {
2838                 .pm     = &nvme_dev_pm_ops,
2839         },
2840         .err_handler    = &nvme_err_handler,
2841 };
2842
2843 static int __init nvme_init(void)
2844 {
2845         int result;
2846
2847         init_waitqueue_head(&nvme_kthread_wait);
2848
2849         nvme_workq = create_singlethread_workqueue("nvme");
2850         if (!nvme_workq)
2851                 return -ENOMEM;
2852
2853         result = register_blkdev(nvme_major, "nvme");
2854         if (result < 0)
2855                 goto kill_workq;
2856         else if (result > 0)
2857                 nvme_major = result;
2858
2859         result = pci_register_driver(&nvme_driver);
2860         if (result)
2861                 goto unregister_blkdev;
2862         return 0;
2863
2864  unregister_blkdev:
2865         unregister_blkdev(nvme_major, "nvme");
2866  kill_workq:
2867         destroy_workqueue(nvme_workq);
2868         return result;
2869 }
2870
2871 static void __exit nvme_exit(void)
2872 {
2873         pci_unregister_driver(&nvme_driver);
2874         unregister_hotcpu_notifier(&nvme_nb);
2875         unregister_blkdev(nvme_major, "nvme");
2876         destroy_workqueue(nvme_workq);
2877         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
2878         _nvme_check_size();
2879 }
2880
2881 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2882 MODULE_LICENSE("GPL");
2883 MODULE_VERSION("1.0");
2884 module_init(nvme_init);
2885 module_exit(nvme_exit);