870a926e1ddcb06b857015826609a2f951fd4a09
[linux-2.6-block.git] / drivers / block / nvme-core.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/fs.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <scsi/sg.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
44
45 #define NVME_MINORS             (1U << MINORBITS)
46 #define NVME_Q_DEPTH            1024
47 #define NVME_AQ_DEPTH           256
48 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
51 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
52
53 static unsigned char admin_timeout = 60;
54 module_param(admin_timeout, byte, 0644);
55 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
56
57 unsigned char nvme_io_timeout = 30;
58 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
59 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
60
61 static unsigned char shutdown_timeout = 5;
62 module_param(shutdown_timeout, byte, 0644);
63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
64
65 static int nvme_major;
66 module_param(nvme_major, int, 0);
67
68 static int nvme_char_major;
69 module_param(nvme_char_major, int, 0);
70
71 static int use_threaded_interrupts;
72 module_param(use_threaded_interrupts, int, 0);
73
74 static DEFINE_SPINLOCK(dev_list_lock);
75 static LIST_HEAD(dev_list);
76 static struct task_struct *nvme_thread;
77 static struct workqueue_struct *nvme_workq;
78 static wait_queue_head_t nvme_kthread_wait;
79
80 static struct class *nvme_class;
81
82 static void nvme_reset_failed_dev(struct work_struct *ws);
83 static int nvme_process_cq(struct nvme_queue *nvmeq);
84
85 struct async_cmd_info {
86         struct kthread_work work;
87         struct kthread_worker *worker;
88         struct request *req;
89         u32 result;
90         int status;
91         void *ctx;
92 };
93
94 /*
95  * An NVM Express queue.  Each device has at least two (one for admin
96  * commands and one for I/O commands).
97  */
98 struct nvme_queue {
99         struct device *q_dmadev;
100         struct nvme_dev *dev;
101         char irqname[24];       /* nvme4294967295-65535\0 */
102         spinlock_t q_lock;
103         struct nvme_command *sq_cmds;
104         volatile struct nvme_completion *cqes;
105         dma_addr_t sq_dma_addr;
106         dma_addr_t cq_dma_addr;
107         u32 __iomem *q_db;
108         u16 q_depth;
109         s16 cq_vector;
110         u16 sq_head;
111         u16 sq_tail;
112         u16 cq_head;
113         u16 qid;
114         u8 cq_phase;
115         u8 cqe_seen;
116         struct async_cmd_info cmdinfo;
117         struct blk_mq_hw_ctx *hctx;
118 };
119
120 /*
121  * Check we didin't inadvertently grow the command struct
122  */
123 static inline void _nvme_check_size(void)
124 {
125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
137 }
138
139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
140                                                 struct nvme_completion *);
141
142 struct nvme_cmd_info {
143         nvme_completion_fn fn;
144         void *ctx;
145         int aborted;
146         struct nvme_queue *nvmeq;
147         struct nvme_iod iod[0];
148 };
149
150 /*
151  * Max size of iod being embedded in the request payload
152  */
153 #define NVME_INT_PAGES          2
154 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
155 #define NVME_INT_MASK           0x01
156
157 /*
158  * Will slightly overestimate the number of pages needed.  This is OK
159  * as it only leads to a small amount of wasted memory for the lifetime of
160  * the I/O.
161  */
162 static int nvme_npages(unsigned size, struct nvme_dev *dev)
163 {
164         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
165         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
166 }
167
168 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
169 {
170         unsigned int ret = sizeof(struct nvme_cmd_info);
171
172         ret += sizeof(struct nvme_iod);
173         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
174         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
175
176         return ret;
177 }
178
179 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
180                                 unsigned int hctx_idx)
181 {
182         struct nvme_dev *dev = data;
183         struct nvme_queue *nvmeq = dev->queues[0];
184
185         WARN_ON(nvmeq->hctx);
186         nvmeq->hctx = hctx;
187         hctx->driver_data = nvmeq;
188         return 0;
189 }
190
191 static int nvme_admin_init_request(void *data, struct request *req,
192                                 unsigned int hctx_idx, unsigned int rq_idx,
193                                 unsigned int numa_node)
194 {
195         struct nvme_dev *dev = data;
196         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
197         struct nvme_queue *nvmeq = dev->queues[0];
198
199         BUG_ON(!nvmeq);
200         cmd->nvmeq = nvmeq;
201         return 0;
202 }
203
204 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
205 {
206         struct nvme_queue *nvmeq = hctx->driver_data;
207
208         nvmeq->hctx = NULL;
209 }
210
211 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
212                           unsigned int hctx_idx)
213 {
214         struct nvme_dev *dev = data;
215         struct nvme_queue *nvmeq = dev->queues[
216                                         (hctx_idx % dev->queue_count) + 1];
217
218         if (!nvmeq->hctx)
219                 nvmeq->hctx = hctx;
220
221         /* nvmeq queues are shared between namespaces. We assume here that
222          * blk-mq map the tags so they match up with the nvme queue tags. */
223         WARN_ON(nvmeq->hctx->tags != hctx->tags);
224
225         hctx->driver_data = nvmeq;
226         return 0;
227 }
228
229 static int nvme_init_request(void *data, struct request *req,
230                                 unsigned int hctx_idx, unsigned int rq_idx,
231                                 unsigned int numa_node)
232 {
233         struct nvme_dev *dev = data;
234         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
235         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
236
237         BUG_ON(!nvmeq);
238         cmd->nvmeq = nvmeq;
239         return 0;
240 }
241
242 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
243                                 nvme_completion_fn handler)
244 {
245         cmd->fn = handler;
246         cmd->ctx = ctx;
247         cmd->aborted = 0;
248         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
249 }
250
251 static void *iod_get_private(struct nvme_iod *iod)
252 {
253         return (void *) (iod->private & ~0x1UL);
254 }
255
256 /*
257  * If bit 0 is set, the iod is embedded in the request payload.
258  */
259 static bool iod_should_kfree(struct nvme_iod *iod)
260 {
261         return (iod->private & NVME_INT_MASK) == 0;
262 }
263
264 /* Special values must be less than 0x1000 */
265 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
266 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
267 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
268 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
269
270 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
271                                                 struct nvme_completion *cqe)
272 {
273         if (ctx == CMD_CTX_CANCELLED)
274                 return;
275         if (ctx == CMD_CTX_COMPLETED) {
276                 dev_warn(nvmeq->q_dmadev,
277                                 "completed id %d twice on queue %d\n",
278                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
279                 return;
280         }
281         if (ctx == CMD_CTX_INVALID) {
282                 dev_warn(nvmeq->q_dmadev,
283                                 "invalid id %d completed on queue %d\n",
284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
285                 return;
286         }
287         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
288 }
289
290 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
291 {
292         void *ctx;
293
294         if (fn)
295                 *fn = cmd->fn;
296         ctx = cmd->ctx;
297         cmd->fn = special_completion;
298         cmd->ctx = CMD_CTX_CANCELLED;
299         return ctx;
300 }
301
302 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
303                                                 struct nvme_completion *cqe)
304 {
305         u32 result = le32_to_cpup(&cqe->result);
306         u16 status = le16_to_cpup(&cqe->status) >> 1;
307
308         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
309                 ++nvmeq->dev->event_limit;
310         if (status == NVME_SC_SUCCESS)
311                 dev_warn(nvmeq->q_dmadev,
312                         "async event result %08x\n", result);
313 }
314
315 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
316                                                 struct nvme_completion *cqe)
317 {
318         struct request *req = ctx;
319
320         u16 status = le16_to_cpup(&cqe->status) >> 1;
321         u32 result = le32_to_cpup(&cqe->result);
322
323         blk_mq_free_hctx_request(nvmeq->hctx, req);
324
325         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
326         ++nvmeq->dev->abort_limit;
327 }
328
329 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
330                                                 struct nvme_completion *cqe)
331 {
332         struct async_cmd_info *cmdinfo = ctx;
333         cmdinfo->result = le32_to_cpup(&cqe->result);
334         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
335         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
336         blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
337 }
338
339 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
340                                   unsigned int tag)
341 {
342         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
343         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
344
345         return blk_mq_rq_to_pdu(req);
346 }
347
348 /*
349  * Called with local interrupts disabled and the q_lock held.  May not sleep.
350  */
351 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
352                                                 nvme_completion_fn *fn)
353 {
354         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
355         void *ctx;
356         if (tag >= nvmeq->q_depth) {
357                 *fn = special_completion;
358                 return CMD_CTX_INVALID;
359         }
360         if (fn)
361                 *fn = cmd->fn;
362         ctx = cmd->ctx;
363         cmd->fn = special_completion;
364         cmd->ctx = CMD_CTX_COMPLETED;
365         return ctx;
366 }
367
368 /**
369  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
370  * @nvmeq: The queue to use
371  * @cmd: The command to send
372  *
373  * Safe to use from interrupt context
374  */
375 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
376 {
377         u16 tail = nvmeq->sq_tail;
378
379         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
380         if (++tail == nvmeq->q_depth)
381                 tail = 0;
382         writel(tail, nvmeq->q_db);
383         nvmeq->sq_tail = tail;
384
385         return 0;
386 }
387
388 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
389 {
390         unsigned long flags;
391         int ret;
392         spin_lock_irqsave(&nvmeq->q_lock, flags);
393         ret = __nvme_submit_cmd(nvmeq, cmd);
394         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
395         return ret;
396 }
397
398 static __le64 **iod_list(struct nvme_iod *iod)
399 {
400         return ((void *)iod) + iod->offset;
401 }
402
403 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
404                             unsigned nseg, unsigned long private)
405 {
406         iod->private = private;
407         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
408         iod->npages = -1;
409         iod->length = nbytes;
410         iod->nents = 0;
411 }
412
413 static struct nvme_iod *
414 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
415                  unsigned long priv, gfp_t gfp)
416 {
417         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
418                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
419                                 sizeof(struct scatterlist) * nseg, gfp);
420
421         if (iod)
422                 iod_init(iod, bytes, nseg, priv);
423
424         return iod;
425 }
426
427 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
428                                        gfp_t gfp)
429 {
430         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
431                                                 sizeof(struct nvme_dsm_range);
432         struct nvme_iod *iod;
433
434         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
435             size <= NVME_INT_BYTES(dev)) {
436                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
437
438                 iod = cmd->iod;
439                 iod_init(iod, size, rq->nr_phys_segments,
440                                 (unsigned long) rq | NVME_INT_MASK);
441                 return iod;
442         }
443
444         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
445                                 (unsigned long) rq, gfp);
446 }
447
448 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
449 {
450         const int last_prp = dev->page_size / 8 - 1;
451         int i;
452         __le64 **list = iod_list(iod);
453         dma_addr_t prp_dma = iod->first_dma;
454
455         if (iod->npages == 0)
456                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
457         for (i = 0; i < iod->npages; i++) {
458                 __le64 *prp_list = list[i];
459                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
460                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
461                 prp_dma = next_prp_dma;
462         }
463
464         if (iod_should_kfree(iod))
465                 kfree(iod);
466 }
467
468 static int nvme_error_status(u16 status)
469 {
470         switch (status & 0x7ff) {
471         case NVME_SC_SUCCESS:
472                 return 0;
473         case NVME_SC_CAP_EXCEEDED:
474                 return -ENOSPC;
475         default:
476                 return -EIO;
477         }
478 }
479
480 #ifdef CONFIG_BLK_DEV_INTEGRITY
481 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
482 {
483         if (be32_to_cpu(pi->ref_tag) == v)
484                 pi->ref_tag = cpu_to_be32(p);
485 }
486
487 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
488 {
489         if (be32_to_cpu(pi->ref_tag) == p)
490                 pi->ref_tag = cpu_to_be32(v);
491 }
492
493 /**
494  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
495  *
496  * The virtual start sector is the one that was originally submitted by the
497  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
498  * start sector may be different. Remap protection information to match the
499  * physical LBA on writes, and back to the original seed on reads.
500  *
501  * Type 0 and 3 do not have a ref tag, so no remapping required.
502  */
503 static void nvme_dif_remap(struct request *req,
504                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
505 {
506         struct nvme_ns *ns = req->rq_disk->private_data;
507         struct bio_integrity_payload *bip;
508         struct t10_pi_tuple *pi;
509         void *p, *pmap;
510         u32 i, nlb, ts, phys, virt;
511
512         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
513                 return;
514
515         bip = bio_integrity(req->bio);
516         if (!bip)
517                 return;
518
519         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
520
521         p = pmap;
522         virt = bip_get_seed(bip);
523         phys = nvme_block_nr(ns, blk_rq_pos(req));
524         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
525         ts = ns->disk->integrity->tuple_size;
526
527         for (i = 0; i < nlb; i++, virt++, phys++) {
528                 pi = (struct t10_pi_tuple *)p;
529                 dif_swap(phys, virt, pi);
530                 p += ts;
531         }
532         kunmap_atomic(pmap);
533 }
534
535 static int nvme_noop_verify(struct blk_integrity_iter *iter)
536 {
537         return 0;
538 }
539
540 static int nvme_noop_generate(struct blk_integrity_iter *iter)
541 {
542         return 0;
543 }
544
545 struct blk_integrity nvme_meta_noop = {
546         .name                   = "NVME_META_NOOP",
547         .generate_fn            = nvme_noop_generate,
548         .verify_fn              = nvme_noop_verify,
549 };
550
551 static void nvme_init_integrity(struct nvme_ns *ns)
552 {
553         struct blk_integrity integrity;
554
555         switch (ns->pi_type) {
556         case NVME_NS_DPS_PI_TYPE3:
557                 integrity = t10_pi_type3_crc;
558                 break;
559         case NVME_NS_DPS_PI_TYPE1:
560         case NVME_NS_DPS_PI_TYPE2:
561                 integrity = t10_pi_type1_crc;
562                 break;
563         default:
564                 integrity = nvme_meta_noop;
565                 break;
566         }
567         integrity.tuple_size = ns->ms;
568         blk_integrity_register(ns->disk, &integrity);
569         blk_queue_max_integrity_segments(ns->queue, 1);
570 }
571 #else /* CONFIG_BLK_DEV_INTEGRITY */
572 static void nvme_dif_remap(struct request *req,
573                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
574 {
575 }
576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
577 {
578 }
579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
580 {
581 }
582 static void nvme_init_integrity(struct nvme_ns *ns)
583 {
584 }
585 #endif
586
587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
588                                                 struct nvme_completion *cqe)
589 {
590         struct nvme_iod *iod = ctx;
591         struct request *req = iod_get_private(iod);
592         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
593
594         u16 status = le16_to_cpup(&cqe->status) >> 1;
595
596         if (unlikely(status)) {
597                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
598                     && (jiffies - req->start_time) < req->timeout) {
599                         unsigned long flags;
600
601                         blk_mq_requeue_request(req);
602                         spin_lock_irqsave(req->q->queue_lock, flags);
603                         if (!blk_queue_stopped(req->q))
604                                 blk_mq_kick_requeue_list(req->q);
605                         spin_unlock_irqrestore(req->q->queue_lock, flags);
606                         return;
607                 }
608                 req->errors = nvme_error_status(status);
609         } else
610                 req->errors = 0;
611
612         if (cmd_rq->aborted)
613                 dev_warn(nvmeq->dev->dev,
614                         "completing aborted command with status:%04x\n",
615                         status);
616
617         if (iod->nents) {
618                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
619                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
620                 if (blk_integrity_rq(req)) {
621                         if (!rq_data_dir(req))
622                                 nvme_dif_remap(req, nvme_dif_complete);
623                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
624                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
625                 }
626         }
627         nvme_free_iod(nvmeq->dev, iod);
628
629         blk_mq_complete_request(req);
630 }
631
632 /* length is in bytes.  gfp flags indicates whether we may sleep. */
633 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
634                                                                 gfp_t gfp)
635 {
636         struct dma_pool *pool;
637         int length = total_len;
638         struct scatterlist *sg = iod->sg;
639         int dma_len = sg_dma_len(sg);
640         u64 dma_addr = sg_dma_address(sg);
641         u32 page_size = dev->page_size;
642         int offset = dma_addr & (page_size - 1);
643         __le64 *prp_list;
644         __le64 **list = iod_list(iod);
645         dma_addr_t prp_dma;
646         int nprps, i;
647
648         length -= (page_size - offset);
649         if (length <= 0)
650                 return total_len;
651
652         dma_len -= (page_size - offset);
653         if (dma_len) {
654                 dma_addr += (page_size - offset);
655         } else {
656                 sg = sg_next(sg);
657                 dma_addr = sg_dma_address(sg);
658                 dma_len = sg_dma_len(sg);
659         }
660
661         if (length <= page_size) {
662                 iod->first_dma = dma_addr;
663                 return total_len;
664         }
665
666         nprps = DIV_ROUND_UP(length, page_size);
667         if (nprps <= (256 / 8)) {
668                 pool = dev->prp_small_pool;
669                 iod->npages = 0;
670         } else {
671                 pool = dev->prp_page_pool;
672                 iod->npages = 1;
673         }
674
675         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
676         if (!prp_list) {
677                 iod->first_dma = dma_addr;
678                 iod->npages = -1;
679                 return (total_len - length) + page_size;
680         }
681         list[0] = prp_list;
682         iod->first_dma = prp_dma;
683         i = 0;
684         for (;;) {
685                 if (i == page_size >> 3) {
686                         __le64 *old_prp_list = prp_list;
687                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
688                         if (!prp_list)
689                                 return total_len - length;
690                         list[iod->npages++] = prp_list;
691                         prp_list[0] = old_prp_list[i - 1];
692                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
693                         i = 1;
694                 }
695                 prp_list[i++] = cpu_to_le64(dma_addr);
696                 dma_len -= page_size;
697                 dma_addr += page_size;
698                 length -= page_size;
699                 if (length <= 0)
700                         break;
701                 if (dma_len > 0)
702                         continue;
703                 BUG_ON(dma_len < 0);
704                 sg = sg_next(sg);
705                 dma_addr = sg_dma_address(sg);
706                 dma_len = sg_dma_len(sg);
707         }
708
709         return total_len;
710 }
711
712 /*
713  * We reuse the small pool to allocate the 16-byte range here as it is not
714  * worth having a special pool for these or additional cases to handle freeing
715  * the iod.
716  */
717 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
718                 struct request *req, struct nvme_iod *iod)
719 {
720         struct nvme_dsm_range *range =
721                                 (struct nvme_dsm_range *)iod_list(iod)[0];
722         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
723
724         range->cattr = cpu_to_le32(0);
725         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
726         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
727
728         memset(cmnd, 0, sizeof(*cmnd));
729         cmnd->dsm.opcode = nvme_cmd_dsm;
730         cmnd->dsm.command_id = req->tag;
731         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
732         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
733         cmnd->dsm.nr = 0;
734         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
735
736         if (++nvmeq->sq_tail == nvmeq->q_depth)
737                 nvmeq->sq_tail = 0;
738         writel(nvmeq->sq_tail, nvmeq->q_db);
739 }
740
741 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
742                                                                 int cmdid)
743 {
744         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
745
746         memset(cmnd, 0, sizeof(*cmnd));
747         cmnd->common.opcode = nvme_cmd_flush;
748         cmnd->common.command_id = cmdid;
749         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
750
751         if (++nvmeq->sq_tail == nvmeq->q_depth)
752                 nvmeq->sq_tail = 0;
753         writel(nvmeq->sq_tail, nvmeq->q_db);
754 }
755
756 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
757                                                         struct nvme_ns *ns)
758 {
759         struct request *req = iod_get_private(iod);
760         struct nvme_command *cmnd;
761         u16 control = 0;
762         u32 dsmgmt = 0;
763
764         if (req->cmd_flags & REQ_FUA)
765                 control |= NVME_RW_FUA;
766         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
767                 control |= NVME_RW_LR;
768
769         if (req->cmd_flags & REQ_RAHEAD)
770                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
771
772         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
773         memset(cmnd, 0, sizeof(*cmnd));
774
775         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
776         cmnd->rw.command_id = req->tag;
777         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
778         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
779         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
780         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
781         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
782
783         if (blk_integrity_rq(req)) {
784                 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
785                 switch (ns->pi_type) {
786                 case NVME_NS_DPS_PI_TYPE3:
787                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
788                         break;
789                 case NVME_NS_DPS_PI_TYPE1:
790                 case NVME_NS_DPS_PI_TYPE2:
791                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
792                                         NVME_RW_PRINFO_PRCHK_REF;
793                         cmnd->rw.reftag = cpu_to_le32(
794                                         nvme_block_nr(ns, blk_rq_pos(req)));
795                         break;
796                 }
797         } else if (ns->ms)
798                 control |= NVME_RW_PRINFO_PRACT;
799
800         cmnd->rw.control = cpu_to_le16(control);
801         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
802
803         if (++nvmeq->sq_tail == nvmeq->q_depth)
804                 nvmeq->sq_tail = 0;
805         writel(nvmeq->sq_tail, nvmeq->q_db);
806
807         return 0;
808 }
809
810 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
811                          const struct blk_mq_queue_data *bd)
812 {
813         struct nvme_ns *ns = hctx->queue->queuedata;
814         struct nvme_queue *nvmeq = hctx->driver_data;
815         struct request *req = bd->rq;
816         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
817         struct nvme_iod *iod;
818         enum dma_data_direction dma_dir;
819
820         /*
821          * If formated with metadata, require the block layer provide a buffer
822          * unless this namespace is formated such that the metadata can be
823          * stripped/generated by the controller with PRACT=1.
824          */
825         if (ns->ms && !blk_integrity_rq(req)) {
826                 if (!(ns->pi_type && ns->ms == 8)) {
827                         req->errors = -EFAULT;
828                         blk_mq_complete_request(req);
829                         return BLK_MQ_RQ_QUEUE_OK;
830                 }
831         }
832
833         iod = nvme_alloc_iod(req, ns->dev, GFP_ATOMIC);
834         if (!iod)
835                 return BLK_MQ_RQ_QUEUE_BUSY;
836
837         if (req->cmd_flags & REQ_DISCARD) {
838                 void *range;
839                 /*
840                  * We reuse the small pool to allocate the 16-byte range here
841                  * as it is not worth having a special pool for these or
842                  * additional cases to handle freeing the iod.
843                  */
844                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
845                                                 GFP_ATOMIC,
846                                                 &iod->first_dma);
847                 if (!range)
848                         goto retry_cmd;
849                 iod_list(iod)[0] = (__le64 *)range;
850                 iod->npages = 0;
851         } else if (req->nr_phys_segments) {
852                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
853
854                 sg_init_table(iod->sg, req->nr_phys_segments);
855                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
856                 if (!iod->nents)
857                         goto error_cmd;
858
859                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
860                         goto retry_cmd;
861
862                 if (blk_rq_bytes(req) !=
863                     nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
864                         dma_unmap_sg(nvmeq->dev->dev, iod->sg,
865                                         iod->nents, dma_dir);
866                         goto retry_cmd;
867                 }
868                 if (blk_integrity_rq(req)) {
869                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
870                                 goto error_cmd;
871
872                         sg_init_table(iod->meta_sg, 1);
873                         if (blk_rq_map_integrity_sg(
874                                         req->q, req->bio, iod->meta_sg) != 1)
875                                 goto error_cmd;
876
877                         if (rq_data_dir(req))
878                                 nvme_dif_remap(req, nvme_dif_prep);
879
880                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
881                                 goto error_cmd;
882                 }
883         }
884
885         nvme_set_info(cmd, iod, req_completion);
886         spin_lock_irq(&nvmeq->q_lock);
887         if (req->cmd_flags & REQ_DISCARD)
888                 nvme_submit_discard(nvmeq, ns, req, iod);
889         else if (req->cmd_flags & REQ_FLUSH)
890                 nvme_submit_flush(nvmeq, ns, req->tag);
891         else
892                 nvme_submit_iod(nvmeq, iod, ns);
893
894         nvme_process_cq(nvmeq);
895         spin_unlock_irq(&nvmeq->q_lock);
896         return BLK_MQ_RQ_QUEUE_OK;
897
898  error_cmd:
899         nvme_free_iod(nvmeq->dev, iod);
900         return BLK_MQ_RQ_QUEUE_ERROR;
901  retry_cmd:
902         nvme_free_iod(nvmeq->dev, iod);
903         return BLK_MQ_RQ_QUEUE_BUSY;
904 }
905
906 static int nvme_process_cq(struct nvme_queue *nvmeq)
907 {
908         u16 head, phase;
909
910         head = nvmeq->cq_head;
911         phase = nvmeq->cq_phase;
912
913         for (;;) {
914                 void *ctx;
915                 nvme_completion_fn fn;
916                 struct nvme_completion cqe = nvmeq->cqes[head];
917                 if ((le16_to_cpu(cqe.status) & 1) != phase)
918                         break;
919                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
920                 if (++head == nvmeq->q_depth) {
921                         head = 0;
922                         phase = !phase;
923                 }
924                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
925                 fn(nvmeq, ctx, &cqe);
926         }
927
928         /* If the controller ignores the cq head doorbell and continuously
929          * writes to the queue, it is theoretically possible to wrap around
930          * the queue twice and mistakenly return IRQ_NONE.  Linux only
931          * requires that 0.1% of your interrupts are handled, so this isn't
932          * a big problem.
933          */
934         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
935                 return 0;
936
937         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
938         nvmeq->cq_head = head;
939         nvmeq->cq_phase = phase;
940
941         nvmeq->cqe_seen = 1;
942         return 1;
943 }
944
945 /* Admin queue isn't initialized as a request queue. If at some point this
946  * happens anyway, make sure to notify the user */
947 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
948                                const struct blk_mq_queue_data *bd)
949 {
950         WARN_ON_ONCE(1);
951         return BLK_MQ_RQ_QUEUE_ERROR;
952 }
953
954 static irqreturn_t nvme_irq(int irq, void *data)
955 {
956         irqreturn_t result;
957         struct nvme_queue *nvmeq = data;
958         spin_lock(&nvmeq->q_lock);
959         nvme_process_cq(nvmeq);
960         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
961         nvmeq->cqe_seen = 0;
962         spin_unlock(&nvmeq->q_lock);
963         return result;
964 }
965
966 static irqreturn_t nvme_irq_check(int irq, void *data)
967 {
968         struct nvme_queue *nvmeq = data;
969         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
970         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
971                 return IRQ_NONE;
972         return IRQ_WAKE_THREAD;
973 }
974
975 struct sync_cmd_info {
976         struct task_struct *task;
977         u32 result;
978         int status;
979 };
980
981 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
982                                                 struct nvme_completion *cqe)
983 {
984         struct sync_cmd_info *cmdinfo = ctx;
985         cmdinfo->result = le32_to_cpup(&cqe->result);
986         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
987         wake_up_process(cmdinfo->task);
988 }
989
990 /*
991  * Returns 0 on success.  If the result is negative, it's a Linux error code;
992  * if the result is positive, it's an NVM Express status code
993  */
994 static int __nvme_submit_sync_cmd(struct request_queue *q,
995                 struct nvme_command *cmd, u32 *result, unsigned timeout)
996 {
997         struct sync_cmd_info cmdinfo;
998         struct nvme_cmd_info *cmd_rq;
999         struct request *req;
1000         int res;
1001
1002         req = blk_mq_alloc_request(q, WRITE, GFP_KERNEL, false);
1003         if (IS_ERR(req))
1004                 return PTR_ERR(req);
1005
1006         cmdinfo.task = current;
1007         cmdinfo.status = -EINTR;
1008
1009         cmd->common.command_id = req->tag;
1010
1011         cmd_rq = blk_mq_rq_to_pdu(req);
1012         nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
1013
1014         set_current_state(TASK_UNINTERRUPTIBLE);
1015         nvme_submit_cmd(cmd_rq->nvmeq, cmd);
1016         schedule();
1017
1018         if (result)
1019                 *result = cmdinfo.result;
1020         res = cmdinfo.status;
1021         blk_mq_free_request(req);
1022         return res;
1023 }
1024
1025 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd)
1026 {
1027         return __nvme_submit_sync_cmd(q, cmd, NULL, 0);
1028 }
1029
1030 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1031 {
1032         struct nvme_queue *nvmeq = dev->queues[0];
1033         struct nvme_command c;
1034         struct nvme_cmd_info *cmd_info;
1035         struct request *req;
1036
1037         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1038         if (IS_ERR(req))
1039                 return PTR_ERR(req);
1040
1041         req->cmd_flags |= REQ_NO_TIMEOUT;
1042         cmd_info = blk_mq_rq_to_pdu(req);
1043         nvme_set_info(cmd_info, NULL, async_req_completion);
1044
1045         memset(&c, 0, sizeof(c));
1046         c.common.opcode = nvme_admin_async_event;
1047         c.common.command_id = req->tag;
1048
1049         blk_mq_free_hctx_request(nvmeq->hctx, req);
1050         return __nvme_submit_cmd(nvmeq, &c);
1051 }
1052
1053 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1054                         struct nvme_command *cmd,
1055                         struct async_cmd_info *cmdinfo, unsigned timeout)
1056 {
1057         struct nvme_queue *nvmeq = dev->queues[0];
1058         struct request *req;
1059         struct nvme_cmd_info *cmd_rq;
1060
1061         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1062         if (IS_ERR(req))
1063                 return PTR_ERR(req);
1064
1065         req->timeout = timeout;
1066         cmd_rq = blk_mq_rq_to_pdu(req);
1067         cmdinfo->req = req;
1068         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1069         cmdinfo->status = -EINTR;
1070
1071         cmd->common.command_id = req->tag;
1072
1073         return nvme_submit_cmd(nvmeq, cmd);
1074 }
1075
1076 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1077 {
1078         struct nvme_command c;
1079
1080         memset(&c, 0, sizeof(c));
1081         c.delete_queue.opcode = opcode;
1082         c.delete_queue.qid = cpu_to_le16(id);
1083
1084         return nvme_submit_sync_cmd(dev->admin_q, &c);
1085 }
1086
1087 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1088                                                 struct nvme_queue *nvmeq)
1089 {
1090         struct nvme_command c;
1091         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1092
1093         memset(&c, 0, sizeof(c));
1094         c.create_cq.opcode = nvme_admin_create_cq;
1095         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1096         c.create_cq.cqid = cpu_to_le16(qid);
1097         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1098         c.create_cq.cq_flags = cpu_to_le16(flags);
1099         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1100
1101         return nvme_submit_sync_cmd(dev->admin_q, &c);
1102 }
1103
1104 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1105                                                 struct nvme_queue *nvmeq)
1106 {
1107         struct nvme_command c;
1108         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1109
1110         memset(&c, 0, sizeof(c));
1111         c.create_sq.opcode = nvme_admin_create_sq;
1112         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1113         c.create_sq.sqid = cpu_to_le16(qid);
1114         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1115         c.create_sq.sq_flags = cpu_to_le16(flags);
1116         c.create_sq.cqid = cpu_to_le16(qid);
1117
1118         return nvme_submit_sync_cmd(dev->admin_q, &c);
1119 }
1120
1121 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1122 {
1123         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1124 }
1125
1126 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1127 {
1128         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1129 }
1130
1131 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1132                                                         dma_addr_t dma_addr)
1133 {
1134         struct nvme_command c;
1135
1136         memset(&c, 0, sizeof(c));
1137         c.identify.opcode = nvme_admin_identify;
1138         c.identify.nsid = cpu_to_le32(nsid);
1139         c.identify.prp1 = cpu_to_le64(dma_addr);
1140         c.identify.cns = cpu_to_le32(cns);
1141
1142         return nvme_submit_sync_cmd(dev->admin_q, &c);
1143 }
1144
1145 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1146                                         dma_addr_t dma_addr, u32 *result)
1147 {
1148         struct nvme_command c;
1149
1150         memset(&c, 0, sizeof(c));
1151         c.features.opcode = nvme_admin_get_features;
1152         c.features.nsid = cpu_to_le32(nsid);
1153         c.features.prp1 = cpu_to_le64(dma_addr);
1154         c.features.fid = cpu_to_le32(fid);
1155
1156         return __nvme_submit_sync_cmd(dev->admin_q, &c, result, 0);
1157 }
1158
1159 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1160                                         dma_addr_t dma_addr, u32 *result)
1161 {
1162         struct nvme_command c;
1163
1164         memset(&c, 0, sizeof(c));
1165         c.features.opcode = nvme_admin_set_features;
1166         c.features.prp1 = cpu_to_le64(dma_addr);
1167         c.features.fid = cpu_to_le32(fid);
1168         c.features.dword11 = cpu_to_le32(dword11);
1169
1170         return __nvme_submit_sync_cmd(dev->admin_q, &c, result, 0);
1171 }
1172
1173 /**
1174  * nvme_abort_req - Attempt aborting a request
1175  *
1176  * Schedule controller reset if the command was already aborted once before and
1177  * still hasn't been returned to the driver, or if this is the admin queue.
1178  */
1179 static void nvme_abort_req(struct request *req)
1180 {
1181         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1182         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1183         struct nvme_dev *dev = nvmeq->dev;
1184         struct request *abort_req;
1185         struct nvme_cmd_info *abort_cmd;
1186         struct nvme_command cmd;
1187
1188         if (!nvmeq->qid || cmd_rq->aborted) {
1189                 unsigned long flags;
1190
1191                 spin_lock_irqsave(&dev_list_lock, flags);
1192                 if (work_busy(&dev->reset_work))
1193                         goto out;
1194                 list_del_init(&dev->node);
1195                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1196                                                         req->tag, nvmeq->qid);
1197                 dev->reset_workfn = nvme_reset_failed_dev;
1198                 queue_work(nvme_workq, &dev->reset_work);
1199  out:
1200                 spin_unlock_irqrestore(&dev_list_lock, flags);
1201                 return;
1202         }
1203
1204         if (!dev->abort_limit)
1205                 return;
1206
1207         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1208                                                                         false);
1209         if (IS_ERR(abort_req))
1210                 return;
1211
1212         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1213         nvme_set_info(abort_cmd, abort_req, abort_completion);
1214
1215         memset(&cmd, 0, sizeof(cmd));
1216         cmd.abort.opcode = nvme_admin_abort_cmd;
1217         cmd.abort.cid = req->tag;
1218         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1219         cmd.abort.command_id = abort_req->tag;
1220
1221         --dev->abort_limit;
1222         cmd_rq->aborted = 1;
1223
1224         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1225                                                         nvmeq->qid);
1226         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1227                 dev_warn(nvmeq->q_dmadev,
1228                                 "Could not abort I/O %d QID %d",
1229                                 req->tag, nvmeq->qid);
1230                 blk_mq_free_request(abort_req);
1231         }
1232 }
1233
1234 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1235                                 struct request *req, void *data, bool reserved)
1236 {
1237         struct nvme_queue *nvmeq = data;
1238         void *ctx;
1239         nvme_completion_fn fn;
1240         struct nvme_cmd_info *cmd;
1241         struct nvme_completion cqe;
1242
1243         if (!blk_mq_request_started(req))
1244                 return;
1245
1246         cmd = blk_mq_rq_to_pdu(req);
1247
1248         if (cmd->ctx == CMD_CTX_CANCELLED)
1249                 return;
1250
1251         if (blk_queue_dying(req->q))
1252                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1253         else
1254                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1255
1256
1257         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1258                                                 req->tag, nvmeq->qid);
1259         ctx = cancel_cmd_info(cmd, &fn);
1260         fn(nvmeq, ctx, &cqe);
1261 }
1262
1263 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1264 {
1265         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1266         struct nvme_queue *nvmeq = cmd->nvmeq;
1267
1268         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1269                                                         nvmeq->qid);
1270         spin_lock_irq(&nvmeq->q_lock);
1271         nvme_abort_req(req);
1272         spin_unlock_irq(&nvmeq->q_lock);
1273
1274         /*
1275          * The aborted req will be completed on receiving the abort req.
1276          * We enable the timer again. If hit twice, it'll cause a device reset,
1277          * as the device then is in a faulty state.
1278          */
1279         return BLK_EH_RESET_TIMER;
1280 }
1281
1282 static void nvme_free_queue(struct nvme_queue *nvmeq)
1283 {
1284         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1285                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1286         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1287                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1288         kfree(nvmeq);
1289 }
1290
1291 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1292 {
1293         int i;
1294
1295         for (i = dev->queue_count - 1; i >= lowest; i--) {
1296                 struct nvme_queue *nvmeq = dev->queues[i];
1297                 dev->queue_count--;
1298                 dev->queues[i] = NULL;
1299                 nvme_free_queue(nvmeq);
1300         }
1301 }
1302
1303 /**
1304  * nvme_suspend_queue - put queue into suspended state
1305  * @nvmeq - queue to suspend
1306  */
1307 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1308 {
1309         int vector;
1310
1311         spin_lock_irq(&nvmeq->q_lock);
1312         if (nvmeq->cq_vector == -1) {
1313                 spin_unlock_irq(&nvmeq->q_lock);
1314                 return 1;
1315         }
1316         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1317         nvmeq->dev->online_queues--;
1318         nvmeq->cq_vector = -1;
1319         spin_unlock_irq(&nvmeq->q_lock);
1320
1321         if (!nvmeq->qid && nvmeq->dev->admin_q)
1322                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1323
1324         irq_set_affinity_hint(vector, NULL);
1325         free_irq(vector, nvmeq);
1326
1327         return 0;
1328 }
1329
1330 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1331 {
1332         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1333
1334         spin_lock_irq(&nvmeq->q_lock);
1335         if (hctx && hctx->tags)
1336                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1337         spin_unlock_irq(&nvmeq->q_lock);
1338 }
1339
1340 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1341 {
1342         struct nvme_queue *nvmeq = dev->queues[qid];
1343
1344         if (!nvmeq)
1345                 return;
1346         if (nvme_suspend_queue(nvmeq))
1347                 return;
1348
1349         /* Don't tell the adapter to delete the admin queue.
1350          * Don't tell a removed adapter to delete IO queues. */
1351         if (qid && readl(&dev->bar->csts) != -1) {
1352                 adapter_delete_sq(dev, qid);
1353                 adapter_delete_cq(dev, qid);
1354         }
1355
1356         spin_lock_irq(&nvmeq->q_lock);
1357         nvme_process_cq(nvmeq);
1358         spin_unlock_irq(&nvmeq->q_lock);
1359 }
1360
1361 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1362                                                         int depth)
1363 {
1364         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1365         if (!nvmeq)
1366                 return NULL;
1367
1368         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1369                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1370         if (!nvmeq->cqes)
1371                 goto free_nvmeq;
1372
1373         nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1374                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1375         if (!nvmeq->sq_cmds)
1376                 goto free_cqdma;
1377
1378         nvmeq->q_dmadev = dev->dev;
1379         nvmeq->dev = dev;
1380         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1381                         dev->instance, qid);
1382         spin_lock_init(&nvmeq->q_lock);
1383         nvmeq->cq_head = 0;
1384         nvmeq->cq_phase = 1;
1385         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1386         nvmeq->q_depth = depth;
1387         nvmeq->qid = qid;
1388         dev->queue_count++;
1389         dev->queues[qid] = nvmeq;
1390
1391         return nvmeq;
1392
1393  free_cqdma:
1394         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1395                                                         nvmeq->cq_dma_addr);
1396  free_nvmeq:
1397         kfree(nvmeq);
1398         return NULL;
1399 }
1400
1401 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1402                                                         const char *name)
1403 {
1404         if (use_threaded_interrupts)
1405                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1406                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1407                                         name, nvmeq);
1408         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1409                                 IRQF_SHARED, name, nvmeq);
1410 }
1411
1412 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1413 {
1414         struct nvme_dev *dev = nvmeq->dev;
1415
1416         spin_lock_irq(&nvmeq->q_lock);
1417         nvmeq->sq_tail = 0;
1418         nvmeq->cq_head = 0;
1419         nvmeq->cq_phase = 1;
1420         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1421         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1422         dev->online_queues++;
1423         spin_unlock_irq(&nvmeq->q_lock);
1424 }
1425
1426 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1427 {
1428         struct nvme_dev *dev = nvmeq->dev;
1429         int result;
1430
1431         nvmeq->cq_vector = qid - 1;
1432         result = adapter_alloc_cq(dev, qid, nvmeq);
1433         if (result < 0)
1434                 return result;
1435
1436         result = adapter_alloc_sq(dev, qid, nvmeq);
1437         if (result < 0)
1438                 goto release_cq;
1439
1440         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1441         if (result < 0)
1442                 goto release_sq;
1443
1444         nvme_init_queue(nvmeq, qid);
1445         return result;
1446
1447  release_sq:
1448         adapter_delete_sq(dev, qid);
1449  release_cq:
1450         adapter_delete_cq(dev, qid);
1451         return result;
1452 }
1453
1454 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1455 {
1456         unsigned long timeout;
1457         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1458
1459         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1460
1461         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1462                 msleep(100);
1463                 if (fatal_signal_pending(current))
1464                         return -EINTR;
1465                 if (time_after(jiffies, timeout)) {
1466                         dev_err(dev->dev,
1467                                 "Device not ready; aborting %s\n", enabled ?
1468                                                 "initialisation" : "reset");
1469                         return -ENODEV;
1470                 }
1471         }
1472
1473         return 0;
1474 }
1475
1476 /*
1477  * If the device has been passed off to us in an enabled state, just clear
1478  * the enabled bit.  The spec says we should set the 'shutdown notification
1479  * bits', but doing so may cause the device to complete commands to the
1480  * admin queue ... and we don't know what memory that might be pointing at!
1481  */
1482 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1483 {
1484         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1485         dev->ctrl_config &= ~NVME_CC_ENABLE;
1486         writel(dev->ctrl_config, &dev->bar->cc);
1487
1488         return nvme_wait_ready(dev, cap, false);
1489 }
1490
1491 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1492 {
1493         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1494         dev->ctrl_config |= NVME_CC_ENABLE;
1495         writel(dev->ctrl_config, &dev->bar->cc);
1496
1497         return nvme_wait_ready(dev, cap, true);
1498 }
1499
1500 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1501 {
1502         unsigned long timeout;
1503
1504         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1505         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1506
1507         writel(dev->ctrl_config, &dev->bar->cc);
1508
1509         timeout = SHUTDOWN_TIMEOUT + jiffies;
1510         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1511                                                         NVME_CSTS_SHST_CMPLT) {
1512                 msleep(100);
1513                 if (fatal_signal_pending(current))
1514                         return -EINTR;
1515                 if (time_after(jiffies, timeout)) {
1516                         dev_err(dev->dev,
1517                                 "Device shutdown incomplete; abort shutdown\n");
1518                         return -ENODEV;
1519                 }
1520         }
1521
1522         return 0;
1523 }
1524
1525 static struct blk_mq_ops nvme_mq_admin_ops = {
1526         .queue_rq       = nvme_admin_queue_rq,
1527         .map_queue      = blk_mq_map_queue,
1528         .init_hctx      = nvme_admin_init_hctx,
1529         .exit_hctx      = nvme_exit_hctx,
1530         .init_request   = nvme_admin_init_request,
1531         .timeout        = nvme_timeout,
1532 };
1533
1534 static struct blk_mq_ops nvme_mq_ops = {
1535         .queue_rq       = nvme_queue_rq,
1536         .map_queue      = blk_mq_map_queue,
1537         .init_hctx      = nvme_init_hctx,
1538         .exit_hctx      = nvme_exit_hctx,
1539         .init_request   = nvme_init_request,
1540         .timeout        = nvme_timeout,
1541 };
1542
1543 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1544 {
1545         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1546                 blk_cleanup_queue(dev->admin_q);
1547                 blk_mq_free_tag_set(&dev->admin_tagset);
1548         }
1549 }
1550
1551 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1552 {
1553         if (!dev->admin_q) {
1554                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1555                 dev->admin_tagset.nr_hw_queues = 1;
1556                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1557                 dev->admin_tagset.reserved_tags = 1;
1558                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1559                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1560                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1561                 dev->admin_tagset.driver_data = dev;
1562
1563                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1564                         return -ENOMEM;
1565
1566                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1567                 if (IS_ERR(dev->admin_q)) {
1568                         blk_mq_free_tag_set(&dev->admin_tagset);
1569                         return -ENOMEM;
1570                 }
1571                 if (!blk_get_queue(dev->admin_q)) {
1572                         nvme_dev_remove_admin(dev);
1573                         return -ENODEV;
1574                 }
1575         } else
1576                 blk_mq_unfreeze_queue(dev->admin_q);
1577
1578         return 0;
1579 }
1580
1581 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1582 {
1583         int result;
1584         u32 aqa;
1585         u64 cap = readq(&dev->bar->cap);
1586         struct nvme_queue *nvmeq;
1587         unsigned page_shift = PAGE_SHIFT;
1588         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1589         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1590
1591         if (page_shift < dev_page_min) {
1592                 dev_err(dev->dev,
1593                                 "Minimum device page size (%u) too large for "
1594                                 "host (%u)\n", 1 << dev_page_min,
1595                                 1 << page_shift);
1596                 return -ENODEV;
1597         }
1598         if (page_shift > dev_page_max) {
1599                 dev_info(dev->dev,
1600                                 "Device maximum page size (%u) smaller than "
1601                                 "host (%u); enabling work-around\n",
1602                                 1 << dev_page_max, 1 << page_shift);
1603                 page_shift = dev_page_max;
1604         }
1605
1606         result = nvme_disable_ctrl(dev, cap);
1607         if (result < 0)
1608                 return result;
1609
1610         nvmeq = dev->queues[0];
1611         if (!nvmeq) {
1612                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1613                 if (!nvmeq)
1614                         return -ENOMEM;
1615         }
1616
1617         aqa = nvmeq->q_depth - 1;
1618         aqa |= aqa << 16;
1619
1620         dev->page_size = 1 << page_shift;
1621
1622         dev->ctrl_config = NVME_CC_CSS_NVM;
1623         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1624         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1625         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1626
1627         writel(aqa, &dev->bar->aqa);
1628         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1629         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1630
1631         result = nvme_enable_ctrl(dev, cap);
1632         if (result)
1633                 goto free_nvmeq;
1634
1635         nvmeq->cq_vector = 0;
1636         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1637         if (result)
1638                 goto free_nvmeq;
1639
1640         return result;
1641
1642  free_nvmeq:
1643         nvme_free_queues(dev, 0);
1644         return result;
1645 }
1646
1647 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1648                                 unsigned long addr, unsigned length)
1649 {
1650         int i, err, count, nents, offset;
1651         struct scatterlist *sg;
1652         struct page **pages;
1653         struct nvme_iod *iod;
1654
1655         if (addr & 3)
1656                 return ERR_PTR(-EINVAL);
1657         if (!length || length > INT_MAX - PAGE_SIZE)
1658                 return ERR_PTR(-EINVAL);
1659
1660         offset = offset_in_page(addr);
1661         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1662         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1663         if (!pages)
1664                 return ERR_PTR(-ENOMEM);
1665
1666         err = get_user_pages_fast(addr, count, 1, pages);
1667         if (err < count) {
1668                 count = err;
1669                 err = -EFAULT;
1670                 goto put_pages;
1671         }
1672
1673         err = -ENOMEM;
1674         iod = __nvme_alloc_iod(count, length, dev, 0, GFP_KERNEL);
1675         if (!iod)
1676                 goto put_pages;
1677
1678         sg = iod->sg;
1679         sg_init_table(sg, count);
1680         for (i = 0; i < count; i++) {
1681                 sg_set_page(&sg[i], pages[i],
1682                             min_t(unsigned, length, PAGE_SIZE - offset),
1683                             offset);
1684                 length -= (PAGE_SIZE - offset);
1685                 offset = 0;
1686         }
1687         sg_mark_end(&sg[i - 1]);
1688         iod->nents = count;
1689
1690         nents = dma_map_sg(dev->dev, sg, count,
1691                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1692         if (!nents)
1693                 goto free_iod;
1694
1695         kfree(pages);
1696         return iod;
1697
1698  free_iod:
1699         kfree(iod);
1700  put_pages:
1701         for (i = 0; i < count; i++)
1702                 put_page(pages[i]);
1703         kfree(pages);
1704         return ERR_PTR(err);
1705 }
1706
1707 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1708                         struct nvme_iod *iod)
1709 {
1710         int i;
1711
1712         dma_unmap_sg(dev->dev, iod->sg, iod->nents,
1713                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1714
1715         for (i = 0; i < iod->nents; i++)
1716                 put_page(sg_page(&iod->sg[i]));
1717 }
1718
1719 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1720 {
1721         struct nvme_dev *dev = ns->dev;
1722         struct nvme_user_io io;
1723         struct nvme_command c;
1724         unsigned length, meta_len, prp_len;
1725         int status, write;
1726         struct nvme_iod *iod;
1727         dma_addr_t meta_dma = 0;
1728         void *meta = NULL;
1729
1730         if (copy_from_user(&io, uio, sizeof(io)))
1731                 return -EFAULT;
1732         length = (io.nblocks + 1) << ns->lba_shift;
1733         meta_len = (io.nblocks + 1) * ns->ms;
1734
1735         if (meta_len && ((io.metadata & 3) || !io.metadata) && !ns->ext)
1736                 return -EINVAL;
1737         else if (meta_len && ns->ext) {
1738                 length += meta_len;
1739                 meta_len = 0;
1740         }
1741
1742         write = io.opcode & 1;
1743
1744         switch (io.opcode) {
1745         case nvme_cmd_write:
1746         case nvme_cmd_read:
1747         case nvme_cmd_compare:
1748                 iod = nvme_map_user_pages(dev, write, io.addr, length);
1749                 break;
1750         default:
1751                 return -EINVAL;
1752         }
1753
1754         if (IS_ERR(iod))
1755                 return PTR_ERR(iod);
1756
1757         prp_len = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1758         if (length != prp_len) {
1759                 status = -ENOMEM;
1760                 goto unmap;
1761         }
1762         if (meta_len) {
1763                 meta = dma_alloc_coherent(dev->dev, meta_len,
1764                                                 &meta_dma, GFP_KERNEL);
1765                 if (!meta) {
1766                         status = -ENOMEM;
1767                         goto unmap;
1768                 }
1769                 if (write) {
1770                         if (copy_from_user(meta, (void __user *)io.metadata,
1771                                                                 meta_len)) {
1772                                 status = -EFAULT;
1773                                 goto unmap;
1774                         }
1775                 }
1776         }
1777
1778         memset(&c, 0, sizeof(c));
1779         c.rw.opcode = io.opcode;
1780         c.rw.flags = io.flags;
1781         c.rw.nsid = cpu_to_le32(ns->ns_id);
1782         c.rw.slba = cpu_to_le64(io.slba);
1783         c.rw.length = cpu_to_le16(io.nblocks);
1784         c.rw.control = cpu_to_le16(io.control);
1785         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1786         c.rw.reftag = cpu_to_le32(io.reftag);
1787         c.rw.apptag = cpu_to_le16(io.apptag);
1788         c.rw.appmask = cpu_to_le16(io.appmask);
1789         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1790         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1791         c.rw.metadata = cpu_to_le64(meta_dma);
1792         status = nvme_submit_sync_cmd(ns->queue, &c);
1793  unmap:
1794         nvme_unmap_user_pages(dev, write, iod);
1795         nvme_free_iod(dev, iod);
1796         if (meta) {
1797                 if (status == NVME_SC_SUCCESS && !write) {
1798                         if (copy_to_user((void __user *)io.metadata, meta,
1799                                                                 meta_len))
1800                                 status = -EFAULT;
1801                 }
1802                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1803         }
1804         return status;
1805 }
1806
1807 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1808                         struct nvme_passthru_cmd __user *ucmd)
1809 {
1810         struct nvme_passthru_cmd cmd;
1811         struct nvme_command c;
1812         int status, length;
1813         struct nvme_iod *uninitialized_var(iod);
1814         unsigned timeout;
1815
1816         if (!capable(CAP_SYS_ADMIN))
1817                 return -EACCES;
1818         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1819                 return -EFAULT;
1820
1821         memset(&c, 0, sizeof(c));
1822         c.common.opcode = cmd.opcode;
1823         c.common.flags = cmd.flags;
1824         c.common.nsid = cpu_to_le32(cmd.nsid);
1825         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1826         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1827         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1828         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1829         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1830         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1831         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1832         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1833
1834         length = cmd.data_len;
1835         if (cmd.data_len) {
1836                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1837                                                                 length);
1838                 if (IS_ERR(iod))
1839                         return PTR_ERR(iod);
1840                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1841                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1842                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1843         }
1844
1845         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1846                                                                 ADMIN_TIMEOUT;
1847
1848         if (length != cmd.data_len) {
1849                 status = -ENOMEM;
1850                 goto out;
1851         }
1852
1853         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1854                                         &cmd.result, timeout);
1855
1856 out:
1857         if (cmd.data_len) {
1858                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1859                 nvme_free_iod(dev, iod);
1860         }
1861
1862         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1863                                                         sizeof(cmd.result)))
1864                 status = -EFAULT;
1865
1866         return status;
1867 }
1868
1869 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1870                                                         unsigned long arg)
1871 {
1872         struct nvme_ns *ns = bdev->bd_disk->private_data;
1873
1874         switch (cmd) {
1875         case NVME_IOCTL_ID:
1876                 force_successful_syscall_return();
1877                 return ns->ns_id;
1878         case NVME_IOCTL_ADMIN_CMD:
1879                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1880         case NVME_IOCTL_IO_CMD:
1881                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1882         case NVME_IOCTL_SUBMIT_IO:
1883                 return nvme_submit_io(ns, (void __user *)arg);
1884         case SG_GET_VERSION_NUM:
1885                 return nvme_sg_get_version_num((void __user *)arg);
1886         case SG_IO:
1887                 return nvme_sg_io(ns, (void __user *)arg);
1888         default:
1889                 return -ENOTTY;
1890         }
1891 }
1892
1893 #ifdef CONFIG_COMPAT
1894 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1895                                         unsigned int cmd, unsigned long arg)
1896 {
1897         switch (cmd) {
1898         case SG_IO:
1899                 return -ENOIOCTLCMD;
1900         }
1901         return nvme_ioctl(bdev, mode, cmd, arg);
1902 }
1903 #else
1904 #define nvme_compat_ioctl       NULL
1905 #endif
1906
1907 static int nvme_open(struct block_device *bdev, fmode_t mode)
1908 {
1909         int ret = 0;
1910         struct nvme_ns *ns;
1911
1912         spin_lock(&dev_list_lock);
1913         ns = bdev->bd_disk->private_data;
1914         if (!ns)
1915                 ret = -ENXIO;
1916         else if (!kref_get_unless_zero(&ns->dev->kref))
1917                 ret = -ENXIO;
1918         spin_unlock(&dev_list_lock);
1919
1920         return ret;
1921 }
1922
1923 static void nvme_free_dev(struct kref *kref);
1924
1925 static void nvme_release(struct gendisk *disk, fmode_t mode)
1926 {
1927         struct nvme_ns *ns = disk->private_data;
1928         struct nvme_dev *dev = ns->dev;
1929
1930         kref_put(&dev->kref, nvme_free_dev);
1931 }
1932
1933 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1934 {
1935         /* some standard values */
1936         geo->heads = 1 << 6;
1937         geo->sectors = 1 << 5;
1938         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1939         return 0;
1940 }
1941
1942 static void nvme_config_discard(struct nvme_ns *ns)
1943 {
1944         u32 logical_block_size = queue_logical_block_size(ns->queue);
1945         ns->queue->limits.discard_zeroes_data = 0;
1946         ns->queue->limits.discard_alignment = logical_block_size;
1947         ns->queue->limits.discard_granularity = logical_block_size;
1948         ns->queue->limits.max_discard_sectors = 0xffffffff;
1949         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1950 }
1951
1952 static int nvme_revalidate_disk(struct gendisk *disk)
1953 {
1954         struct nvme_ns *ns = disk->private_data;
1955         struct nvme_dev *dev = ns->dev;
1956         struct nvme_id_ns *id;
1957         dma_addr_t dma_addr;
1958         u8 lbaf, pi_type;
1959         u16 old_ms;
1960         unsigned short bs;
1961
1962         id = dma_alloc_coherent(dev->dev, 4096, &dma_addr, GFP_KERNEL);
1963         if (!id) {
1964                 dev_warn(dev->dev, "%s: Memory alocation failure\n", __func__);
1965                 return 0;
1966         }
1967         if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) {
1968                 dev_warn(dev->dev,
1969                         "identify failed ns:%d, setting capacity to 0\n",
1970                         ns->ns_id);
1971                 memset(id, 0, sizeof(*id));
1972         }
1973
1974         old_ms = ns->ms;
1975         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1976         ns->lba_shift = id->lbaf[lbaf].ds;
1977         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1978         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1979
1980         /*
1981          * If identify namespace failed, use default 512 byte block size so
1982          * block layer can use before failing read/write for 0 capacity.
1983          */
1984         if (ns->lba_shift == 0)
1985                 ns->lba_shift = 9;
1986         bs = 1 << ns->lba_shift;
1987
1988         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1989         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1990                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
1991
1992         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1993                                 ns->ms != old_ms ||
1994                                 bs != queue_logical_block_size(disk->queue) ||
1995                                 (ns->ms && ns->ext)))
1996                 blk_integrity_unregister(disk);
1997
1998         ns->pi_type = pi_type;
1999         blk_queue_logical_block_size(ns->queue, bs);
2000
2001         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2002                                                                 !ns->ext)
2003                 nvme_init_integrity(ns);
2004
2005         if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
2006                 set_capacity(disk, 0);
2007         else
2008                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2009
2010         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2011                 nvme_config_discard(ns);
2012
2013         dma_free_coherent(dev->dev, 4096, id, dma_addr);
2014         return 0;
2015 }
2016
2017 static const struct block_device_operations nvme_fops = {
2018         .owner          = THIS_MODULE,
2019         .ioctl          = nvme_ioctl,
2020         .compat_ioctl   = nvme_compat_ioctl,
2021         .open           = nvme_open,
2022         .release        = nvme_release,
2023         .getgeo         = nvme_getgeo,
2024         .revalidate_disk= nvme_revalidate_disk,
2025 };
2026
2027 static int nvme_kthread(void *data)
2028 {
2029         struct nvme_dev *dev, *next;
2030
2031         while (!kthread_should_stop()) {
2032                 set_current_state(TASK_INTERRUPTIBLE);
2033                 spin_lock(&dev_list_lock);
2034                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2035                         int i;
2036                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2037                                 if (work_busy(&dev->reset_work))
2038                                         continue;
2039                                 list_del_init(&dev->node);
2040                                 dev_warn(dev->dev,
2041                                         "Failed status: %x, reset controller\n",
2042                                         readl(&dev->bar->csts));
2043                                 dev->reset_workfn = nvme_reset_failed_dev;
2044                                 queue_work(nvme_workq, &dev->reset_work);
2045                                 continue;
2046                         }
2047                         for (i = 0; i < dev->queue_count; i++) {
2048                                 struct nvme_queue *nvmeq = dev->queues[i];
2049                                 if (!nvmeq)
2050                                         continue;
2051                                 spin_lock_irq(&nvmeq->q_lock);
2052                                 nvme_process_cq(nvmeq);
2053
2054                                 while ((i == 0) && (dev->event_limit > 0)) {
2055                                         if (nvme_submit_async_admin_req(dev))
2056                                                 break;
2057                                         dev->event_limit--;
2058                                 }
2059                                 spin_unlock_irq(&nvmeq->q_lock);
2060                         }
2061                 }
2062                 spin_unlock(&dev_list_lock);
2063                 schedule_timeout(round_jiffies_relative(HZ));
2064         }
2065         return 0;
2066 }
2067
2068 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2069 {
2070         struct nvme_ns *ns;
2071         struct gendisk *disk;
2072         int node = dev_to_node(dev->dev);
2073
2074         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2075         if (!ns)
2076                 return;
2077
2078         ns->queue = blk_mq_init_queue(&dev->tagset);
2079         if (IS_ERR(ns->queue))
2080                 goto out_free_ns;
2081         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2082         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2083         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2084         ns->dev = dev;
2085         ns->queue->queuedata = ns;
2086
2087         disk = alloc_disk_node(0, node);
2088         if (!disk)
2089                 goto out_free_queue;
2090
2091         ns->ns_id = nsid;
2092         ns->disk = disk;
2093         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2094         list_add_tail(&ns->list, &dev->namespaces);
2095
2096         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2097         if (dev->max_hw_sectors)
2098                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2099         if (dev->stripe_size)
2100                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2101         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2102                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2103
2104         disk->major = nvme_major;
2105         disk->first_minor = 0;
2106         disk->fops = &nvme_fops;
2107         disk->private_data = ns;
2108         disk->queue = ns->queue;
2109         disk->driverfs_dev = dev->device;
2110         disk->flags = GENHD_FL_EXT_DEVT;
2111         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2112
2113         /*
2114          * Initialize capacity to 0 until we establish the namespace format and
2115          * setup integrity extentions if necessary. The revalidate_disk after
2116          * add_disk allows the driver to register with integrity if the format
2117          * requires it.
2118          */
2119         set_capacity(disk, 0);
2120         nvme_revalidate_disk(ns->disk);
2121         add_disk(ns->disk);
2122         if (ns->ms)
2123                 revalidate_disk(ns->disk);
2124         return;
2125  out_free_queue:
2126         blk_cleanup_queue(ns->queue);
2127  out_free_ns:
2128         kfree(ns);
2129 }
2130
2131 static void nvme_create_io_queues(struct nvme_dev *dev)
2132 {
2133         unsigned i;
2134
2135         for (i = dev->queue_count; i <= dev->max_qid; i++)
2136                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2137                         break;
2138
2139         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2140                 if (nvme_create_queue(dev->queues[i], i))
2141                         break;
2142 }
2143
2144 static int set_queue_count(struct nvme_dev *dev, int count)
2145 {
2146         int status;
2147         u32 result;
2148         u32 q_count = (count - 1) | ((count - 1) << 16);
2149
2150         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2151                                                                 &result);
2152         if (status < 0)
2153                 return status;
2154         if (status > 0) {
2155                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2156                 return 0;
2157         }
2158         return min(result & 0xffff, result >> 16) + 1;
2159 }
2160
2161 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2162 {
2163         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2164 }
2165
2166 static int nvme_setup_io_queues(struct nvme_dev *dev)
2167 {
2168         struct nvme_queue *adminq = dev->queues[0];
2169         struct pci_dev *pdev = to_pci_dev(dev->dev);
2170         int result, i, vecs, nr_io_queues, size;
2171
2172         nr_io_queues = num_possible_cpus();
2173         result = set_queue_count(dev, nr_io_queues);
2174         if (result <= 0)
2175                 return result;
2176         if (result < nr_io_queues)
2177                 nr_io_queues = result;
2178
2179         size = db_bar_size(dev, nr_io_queues);
2180         if (size > 8192) {
2181                 iounmap(dev->bar);
2182                 do {
2183                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2184                         if (dev->bar)
2185                                 break;
2186                         if (!--nr_io_queues)
2187                                 return -ENOMEM;
2188                         size = db_bar_size(dev, nr_io_queues);
2189                 } while (1);
2190                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2191                 adminq->q_db = dev->dbs;
2192         }
2193
2194         /* Deregister the admin queue's interrupt */
2195         free_irq(dev->entry[0].vector, adminq);
2196
2197         /*
2198          * If we enable msix early due to not intx, disable it again before
2199          * setting up the full range we need.
2200          */
2201         if (!pdev->irq)
2202                 pci_disable_msix(pdev);
2203
2204         for (i = 0; i < nr_io_queues; i++)
2205                 dev->entry[i].entry = i;
2206         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2207         if (vecs < 0) {
2208                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2209                 if (vecs < 0) {
2210                         vecs = 1;
2211                 } else {
2212                         for (i = 0; i < vecs; i++)
2213                                 dev->entry[i].vector = i + pdev->irq;
2214                 }
2215         }
2216
2217         /*
2218          * Should investigate if there's a performance win from allocating
2219          * more queues than interrupt vectors; it might allow the submission
2220          * path to scale better, even if the receive path is limited by the
2221          * number of interrupts.
2222          */
2223         nr_io_queues = vecs;
2224         dev->max_qid = nr_io_queues;
2225
2226         result = queue_request_irq(dev, adminq, adminq->irqname);
2227         if (result)
2228                 goto free_queues;
2229
2230         /* Free previously allocated queues that are no longer usable */
2231         nvme_free_queues(dev, nr_io_queues + 1);
2232         nvme_create_io_queues(dev);
2233
2234         return 0;
2235
2236  free_queues:
2237         nvme_free_queues(dev, 1);
2238         return result;
2239 }
2240
2241 /*
2242  * Return: error value if an error occurred setting up the queues or calling
2243  * Identify Device.  0 if these succeeded, even if adding some of the
2244  * namespaces failed.  At the moment, these failures are silent.  TBD which
2245  * failures should be reported.
2246  */
2247 static int nvme_dev_add(struct nvme_dev *dev)
2248 {
2249         struct pci_dev *pdev = to_pci_dev(dev->dev);
2250         int res;
2251         unsigned nn, i;
2252         struct nvme_id_ctrl *ctrl;
2253         void *mem;
2254         dma_addr_t dma_addr;
2255         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2256
2257         mem = dma_alloc_coherent(dev->dev, 4096, &dma_addr, GFP_KERNEL);
2258         if (!mem)
2259                 return -ENOMEM;
2260
2261         res = nvme_identify(dev, 0, 1, dma_addr);
2262         if (res) {
2263                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2264                 dma_free_coherent(dev->dev, 4096, mem, dma_addr);
2265                 return -EIO;
2266         }
2267
2268         ctrl = mem;
2269         nn = le32_to_cpup(&ctrl->nn);
2270         dev->oncs = le16_to_cpup(&ctrl->oncs);
2271         dev->abort_limit = ctrl->acl + 1;
2272         dev->vwc = ctrl->vwc;
2273         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2274         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2275         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2276         if (ctrl->mdts)
2277                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2278         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2279                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2280                 unsigned int max_hw_sectors;
2281
2282                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2283                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2284                 if (dev->max_hw_sectors) {
2285                         dev->max_hw_sectors = min(max_hw_sectors,
2286                                                         dev->max_hw_sectors);
2287                 } else
2288                         dev->max_hw_sectors = max_hw_sectors;
2289         }
2290         dma_free_coherent(dev->dev, 4096, mem, dma_addr);
2291
2292         dev->tagset.ops = &nvme_mq_ops;
2293         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2294         dev->tagset.timeout = NVME_IO_TIMEOUT;
2295         dev->tagset.numa_node = dev_to_node(dev->dev);
2296         dev->tagset.queue_depth =
2297                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2298         dev->tagset.cmd_size = nvme_cmd_size(dev);
2299         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2300         dev->tagset.driver_data = dev;
2301
2302         if (blk_mq_alloc_tag_set(&dev->tagset))
2303                 return 0;
2304
2305         for (i = 1; i <= nn; i++)
2306                 nvme_alloc_ns(dev, i);
2307
2308         return 0;
2309 }
2310
2311 static int nvme_dev_map(struct nvme_dev *dev)
2312 {
2313         u64 cap;
2314         int bars, result = -ENOMEM;
2315         struct pci_dev *pdev = to_pci_dev(dev->dev);
2316
2317         if (pci_enable_device_mem(pdev))
2318                 return result;
2319
2320         dev->entry[0].vector = pdev->irq;
2321         pci_set_master(pdev);
2322         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2323         if (!bars)
2324                 goto disable_pci;
2325
2326         if (pci_request_selected_regions(pdev, bars, "nvme"))
2327                 goto disable_pci;
2328
2329         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2330             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2331                 goto disable;
2332
2333         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2334         if (!dev->bar)
2335                 goto disable;
2336
2337         if (readl(&dev->bar->csts) == -1) {
2338                 result = -ENODEV;
2339                 goto unmap;
2340         }
2341
2342         /*
2343          * Some devices don't advertse INTx interrupts, pre-enable a single
2344          * MSIX vec for setup. We'll adjust this later.
2345          */
2346         if (!pdev->irq) {
2347                 result = pci_enable_msix(pdev, dev->entry, 1);
2348                 if (result < 0)
2349                         goto unmap;
2350         }
2351
2352         cap = readq(&dev->bar->cap);
2353         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2354         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2355         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2356
2357         return 0;
2358
2359  unmap:
2360         iounmap(dev->bar);
2361         dev->bar = NULL;
2362  disable:
2363         pci_release_regions(pdev);
2364  disable_pci:
2365         pci_disable_device(pdev);
2366         return result;
2367 }
2368
2369 static void nvme_dev_unmap(struct nvme_dev *dev)
2370 {
2371         struct pci_dev *pdev = to_pci_dev(dev->dev);
2372
2373         if (pdev->msi_enabled)
2374                 pci_disable_msi(pdev);
2375         else if (pdev->msix_enabled)
2376                 pci_disable_msix(pdev);
2377
2378         if (dev->bar) {
2379                 iounmap(dev->bar);
2380                 dev->bar = NULL;
2381                 pci_release_regions(pdev);
2382         }
2383
2384         if (pci_is_enabled(pdev))
2385                 pci_disable_device(pdev);
2386 }
2387
2388 struct nvme_delq_ctx {
2389         struct task_struct *waiter;
2390         struct kthread_worker *worker;
2391         atomic_t refcount;
2392 };
2393
2394 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2395 {
2396         dq->waiter = current;
2397         mb();
2398
2399         for (;;) {
2400                 set_current_state(TASK_KILLABLE);
2401                 if (!atomic_read(&dq->refcount))
2402                         break;
2403                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2404                                         fatal_signal_pending(current)) {
2405                         /*
2406                          * Disable the controller first since we can't trust it
2407                          * at this point, but leave the admin queue enabled
2408                          * until all queue deletion requests are flushed.
2409                          * FIXME: This may take a while if there are more h/w
2410                          * queues than admin tags.
2411                          */
2412                         set_current_state(TASK_RUNNING);
2413                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2414                         nvme_clear_queue(dev->queues[0]);
2415                         flush_kthread_worker(dq->worker);
2416                         nvme_disable_queue(dev, 0);
2417                         return;
2418                 }
2419         }
2420         set_current_state(TASK_RUNNING);
2421 }
2422
2423 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2424 {
2425         atomic_dec(&dq->refcount);
2426         if (dq->waiter)
2427                 wake_up_process(dq->waiter);
2428 }
2429
2430 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2431 {
2432         atomic_inc(&dq->refcount);
2433         return dq;
2434 }
2435
2436 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2437 {
2438         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2439         nvme_put_dq(dq);
2440 }
2441
2442 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2443                                                 kthread_work_func_t fn)
2444 {
2445         struct nvme_command c;
2446
2447         memset(&c, 0, sizeof(c));
2448         c.delete_queue.opcode = opcode;
2449         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2450
2451         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2452         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2453                                                                 ADMIN_TIMEOUT);
2454 }
2455
2456 static void nvme_del_cq_work_handler(struct kthread_work *work)
2457 {
2458         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2459                                                         cmdinfo.work);
2460         nvme_del_queue_end(nvmeq);
2461 }
2462
2463 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2464 {
2465         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2466                                                 nvme_del_cq_work_handler);
2467 }
2468
2469 static void nvme_del_sq_work_handler(struct kthread_work *work)
2470 {
2471         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2472                                                         cmdinfo.work);
2473         int status = nvmeq->cmdinfo.status;
2474
2475         if (!status)
2476                 status = nvme_delete_cq(nvmeq);
2477         if (status)
2478                 nvme_del_queue_end(nvmeq);
2479 }
2480
2481 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2482 {
2483         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2484                                                 nvme_del_sq_work_handler);
2485 }
2486
2487 static void nvme_del_queue_start(struct kthread_work *work)
2488 {
2489         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2490                                                         cmdinfo.work);
2491         if (nvme_delete_sq(nvmeq))
2492                 nvme_del_queue_end(nvmeq);
2493 }
2494
2495 static void nvme_disable_io_queues(struct nvme_dev *dev)
2496 {
2497         int i;
2498         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2499         struct nvme_delq_ctx dq;
2500         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2501                                         &worker, "nvme%d", dev->instance);
2502
2503         if (IS_ERR(kworker_task)) {
2504                 dev_err(dev->dev,
2505                         "Failed to create queue del task\n");
2506                 for (i = dev->queue_count - 1; i > 0; i--)
2507                         nvme_disable_queue(dev, i);
2508                 return;
2509         }
2510
2511         dq.waiter = NULL;
2512         atomic_set(&dq.refcount, 0);
2513         dq.worker = &worker;
2514         for (i = dev->queue_count - 1; i > 0; i--) {
2515                 struct nvme_queue *nvmeq = dev->queues[i];
2516
2517                 if (nvme_suspend_queue(nvmeq))
2518                         continue;
2519                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2520                 nvmeq->cmdinfo.worker = dq.worker;
2521                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2522                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2523         }
2524         nvme_wait_dq(&dq, dev);
2525         kthread_stop(kworker_task);
2526 }
2527
2528 /*
2529 * Remove the node from the device list and check
2530 * for whether or not we need to stop the nvme_thread.
2531 */
2532 static void nvme_dev_list_remove(struct nvme_dev *dev)
2533 {
2534         struct task_struct *tmp = NULL;
2535
2536         spin_lock(&dev_list_lock);
2537         list_del_init(&dev->node);
2538         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2539                 tmp = nvme_thread;
2540                 nvme_thread = NULL;
2541         }
2542         spin_unlock(&dev_list_lock);
2543
2544         if (tmp)
2545                 kthread_stop(tmp);
2546 }
2547
2548 static void nvme_freeze_queues(struct nvme_dev *dev)
2549 {
2550         struct nvme_ns *ns;
2551
2552         list_for_each_entry(ns, &dev->namespaces, list) {
2553                 blk_mq_freeze_queue_start(ns->queue);
2554
2555                 spin_lock_irq(ns->queue->queue_lock);
2556                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2557                 spin_unlock_irq(ns->queue->queue_lock);
2558
2559                 blk_mq_cancel_requeue_work(ns->queue);
2560                 blk_mq_stop_hw_queues(ns->queue);
2561         }
2562 }
2563
2564 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2565 {
2566         struct nvme_ns *ns;
2567
2568         list_for_each_entry(ns, &dev->namespaces, list) {
2569                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2570                 blk_mq_unfreeze_queue(ns->queue);
2571                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2572                 blk_mq_kick_requeue_list(ns->queue);
2573         }
2574 }
2575
2576 static void nvme_dev_shutdown(struct nvme_dev *dev)
2577 {
2578         int i;
2579         u32 csts = -1;
2580
2581         nvme_dev_list_remove(dev);
2582
2583         if (dev->bar) {
2584                 nvme_freeze_queues(dev);
2585                 csts = readl(&dev->bar->csts);
2586         }
2587         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2588                 for (i = dev->queue_count - 1; i >= 0; i--) {
2589                         struct nvme_queue *nvmeq = dev->queues[i];
2590                         nvme_suspend_queue(nvmeq);
2591                 }
2592         } else {
2593                 nvme_disable_io_queues(dev);
2594                 nvme_shutdown_ctrl(dev);
2595                 nvme_disable_queue(dev, 0);
2596         }
2597         nvme_dev_unmap(dev);
2598
2599         for (i = dev->queue_count - 1; i >= 0; i--)
2600                 nvme_clear_queue(dev->queues[i]);
2601 }
2602
2603 static void nvme_dev_remove(struct nvme_dev *dev)
2604 {
2605         struct nvme_ns *ns;
2606
2607         list_for_each_entry(ns, &dev->namespaces, list) {
2608                 if (ns->disk->flags & GENHD_FL_UP) {
2609                         if (blk_get_integrity(ns->disk))
2610                                 blk_integrity_unregister(ns->disk);
2611                         del_gendisk(ns->disk);
2612                 }
2613                 if (!blk_queue_dying(ns->queue)) {
2614                         blk_mq_abort_requeue_list(ns->queue);
2615                         blk_cleanup_queue(ns->queue);
2616                 }
2617         }
2618 }
2619
2620 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2621 {
2622         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2623                                                 PAGE_SIZE, PAGE_SIZE, 0);
2624         if (!dev->prp_page_pool)
2625                 return -ENOMEM;
2626
2627         /* Optimisation for I/Os between 4k and 128k */
2628         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2629                                                 256, 256, 0);
2630         if (!dev->prp_small_pool) {
2631                 dma_pool_destroy(dev->prp_page_pool);
2632                 return -ENOMEM;
2633         }
2634         return 0;
2635 }
2636
2637 static void nvme_release_prp_pools(struct nvme_dev *dev)
2638 {
2639         dma_pool_destroy(dev->prp_page_pool);
2640         dma_pool_destroy(dev->prp_small_pool);
2641 }
2642
2643 static DEFINE_IDA(nvme_instance_ida);
2644
2645 static int nvme_set_instance(struct nvme_dev *dev)
2646 {
2647         int instance, error;
2648
2649         do {
2650                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2651                         return -ENODEV;
2652
2653                 spin_lock(&dev_list_lock);
2654                 error = ida_get_new(&nvme_instance_ida, &instance);
2655                 spin_unlock(&dev_list_lock);
2656         } while (error == -EAGAIN);
2657
2658         if (error)
2659                 return -ENODEV;
2660
2661         dev->instance = instance;
2662         return 0;
2663 }
2664
2665 static void nvme_release_instance(struct nvme_dev *dev)
2666 {
2667         spin_lock(&dev_list_lock);
2668         ida_remove(&nvme_instance_ida, dev->instance);
2669         spin_unlock(&dev_list_lock);
2670 }
2671
2672 static void nvme_free_namespaces(struct nvme_dev *dev)
2673 {
2674         struct nvme_ns *ns, *next;
2675
2676         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2677                 list_del(&ns->list);
2678
2679                 spin_lock(&dev_list_lock);
2680                 ns->disk->private_data = NULL;
2681                 spin_unlock(&dev_list_lock);
2682
2683                 put_disk(ns->disk);
2684                 kfree(ns);
2685         }
2686 }
2687
2688 static void nvme_free_dev(struct kref *kref)
2689 {
2690         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2691
2692         put_device(dev->dev);
2693         put_device(dev->device);
2694         nvme_free_namespaces(dev);
2695         nvme_release_instance(dev);
2696         blk_mq_free_tag_set(&dev->tagset);
2697         blk_put_queue(dev->admin_q);
2698         kfree(dev->queues);
2699         kfree(dev->entry);
2700         kfree(dev);
2701 }
2702
2703 static int nvme_dev_open(struct inode *inode, struct file *f)
2704 {
2705         struct nvme_dev *dev;
2706         int instance = iminor(inode);
2707         int ret = -ENODEV;
2708
2709         spin_lock(&dev_list_lock);
2710         list_for_each_entry(dev, &dev_list, node) {
2711                 if (dev->instance == instance) {
2712                         if (!dev->admin_q) {
2713                                 ret = -EWOULDBLOCK;
2714                                 break;
2715                         }
2716                         if (!kref_get_unless_zero(&dev->kref))
2717                                 break;
2718                         f->private_data = dev;
2719                         ret = 0;
2720                         break;
2721                 }
2722         }
2723         spin_unlock(&dev_list_lock);
2724
2725         return ret;
2726 }
2727
2728 static int nvme_dev_release(struct inode *inode, struct file *f)
2729 {
2730         struct nvme_dev *dev = f->private_data;
2731         kref_put(&dev->kref, nvme_free_dev);
2732         return 0;
2733 }
2734
2735 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2736 {
2737         struct nvme_dev *dev = f->private_data;
2738         struct nvme_ns *ns;
2739
2740         switch (cmd) {
2741         case NVME_IOCTL_ADMIN_CMD:
2742                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2743         case NVME_IOCTL_IO_CMD:
2744                 if (list_empty(&dev->namespaces))
2745                         return -ENOTTY;
2746                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2747                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2748         default:
2749                 return -ENOTTY;
2750         }
2751 }
2752
2753 static const struct file_operations nvme_dev_fops = {
2754         .owner          = THIS_MODULE,
2755         .open           = nvme_dev_open,
2756         .release        = nvme_dev_release,
2757         .unlocked_ioctl = nvme_dev_ioctl,
2758         .compat_ioctl   = nvme_dev_ioctl,
2759 };
2760
2761 static void nvme_set_irq_hints(struct nvme_dev *dev)
2762 {
2763         struct nvme_queue *nvmeq;
2764         int i;
2765
2766         for (i = 0; i < dev->online_queues; i++) {
2767                 nvmeq = dev->queues[i];
2768
2769                 if (!nvmeq->hctx)
2770                         continue;
2771
2772                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2773                                                         nvmeq->hctx->cpumask);
2774         }
2775 }
2776
2777 static int nvme_dev_start(struct nvme_dev *dev)
2778 {
2779         int result;
2780         bool start_thread = false;
2781
2782         result = nvme_dev_map(dev);
2783         if (result)
2784                 return result;
2785
2786         result = nvme_configure_admin_queue(dev);
2787         if (result)
2788                 goto unmap;
2789
2790         spin_lock(&dev_list_lock);
2791         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2792                 start_thread = true;
2793                 nvme_thread = NULL;
2794         }
2795         list_add(&dev->node, &dev_list);
2796         spin_unlock(&dev_list_lock);
2797
2798         if (start_thread) {
2799                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2800                 wake_up_all(&nvme_kthread_wait);
2801         } else
2802                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2803
2804         if (IS_ERR_OR_NULL(nvme_thread)) {
2805                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2806                 goto disable;
2807         }
2808
2809         nvme_init_queue(dev->queues[0], 0);
2810         result = nvme_alloc_admin_tags(dev);
2811         if (result)
2812                 goto disable;
2813
2814         result = nvme_setup_io_queues(dev);
2815         if (result)
2816                 goto free_tags;
2817
2818         nvme_set_irq_hints(dev);
2819
2820         dev->event_limit = 1;
2821         return result;
2822
2823  free_tags:
2824         nvme_dev_remove_admin(dev);
2825  disable:
2826         nvme_disable_queue(dev, 0);
2827         nvme_dev_list_remove(dev);
2828  unmap:
2829         nvme_dev_unmap(dev);
2830         return result;
2831 }
2832
2833 static int nvme_remove_dead_ctrl(void *arg)
2834 {
2835         struct nvme_dev *dev = (struct nvme_dev *)arg;
2836         struct pci_dev *pdev = to_pci_dev(dev->dev);
2837
2838         if (pci_get_drvdata(pdev))
2839                 pci_stop_and_remove_bus_device_locked(pdev);
2840         kref_put(&dev->kref, nvme_free_dev);
2841         return 0;
2842 }
2843
2844 static void nvme_remove_disks(struct work_struct *ws)
2845 {
2846         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2847
2848         nvme_free_queues(dev, 1);
2849         nvme_dev_remove(dev);
2850 }
2851
2852 static int nvme_dev_resume(struct nvme_dev *dev)
2853 {
2854         int ret;
2855
2856         ret = nvme_dev_start(dev);
2857         if (ret)
2858                 return ret;
2859         if (dev->online_queues < 2) {
2860                 spin_lock(&dev_list_lock);
2861                 dev->reset_workfn = nvme_remove_disks;
2862                 queue_work(nvme_workq, &dev->reset_work);
2863                 spin_unlock(&dev_list_lock);
2864         } else {
2865                 nvme_unfreeze_queues(dev);
2866                 nvme_set_irq_hints(dev);
2867         }
2868         return 0;
2869 }
2870
2871 static void nvme_dev_reset(struct nvme_dev *dev)
2872 {
2873         nvme_dev_shutdown(dev);
2874         if (nvme_dev_resume(dev)) {
2875                 dev_warn(dev->dev, "Device failed to resume\n");
2876                 kref_get(&dev->kref);
2877                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2878                                                         dev->instance))) {
2879                         dev_err(dev->dev,
2880                                 "Failed to start controller remove task\n");
2881                         kref_put(&dev->kref, nvme_free_dev);
2882                 }
2883         }
2884 }
2885
2886 static void nvme_reset_failed_dev(struct work_struct *ws)
2887 {
2888         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2889         nvme_dev_reset(dev);
2890 }
2891
2892 static void nvme_reset_workfn(struct work_struct *work)
2893 {
2894         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2895         dev->reset_workfn(work);
2896 }
2897
2898 static void nvme_async_probe(struct work_struct *work);
2899 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2900 {
2901         int node, result = -ENOMEM;
2902         struct nvme_dev *dev;
2903
2904         node = dev_to_node(&pdev->dev);
2905         if (node == NUMA_NO_NODE)
2906                 set_dev_node(&pdev->dev, 0);
2907
2908         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2909         if (!dev)
2910                 return -ENOMEM;
2911         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2912                                                         GFP_KERNEL, node);
2913         if (!dev->entry)
2914                 goto free;
2915         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2916                                                         GFP_KERNEL, node);
2917         if (!dev->queues)
2918                 goto free;
2919
2920         INIT_LIST_HEAD(&dev->namespaces);
2921         dev->reset_workfn = nvme_reset_failed_dev;
2922         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2923         dev->dev = get_device(&pdev->dev);
2924         pci_set_drvdata(pdev, dev);
2925         result = nvme_set_instance(dev);
2926         if (result)
2927                 goto put_pci;
2928
2929         result = nvme_setup_prp_pools(dev);
2930         if (result)
2931                 goto release;
2932
2933         kref_init(&dev->kref);
2934         dev->device = device_create(nvme_class, &pdev->dev,
2935                                 MKDEV(nvme_char_major, dev->instance),
2936                                 dev, "nvme%d", dev->instance);
2937         if (IS_ERR(dev->device)) {
2938                 result = PTR_ERR(dev->device);
2939                 goto release_pools;
2940         }
2941         get_device(dev->device);
2942
2943         INIT_LIST_HEAD(&dev->node);
2944         INIT_WORK(&dev->probe_work, nvme_async_probe);
2945         schedule_work(&dev->probe_work);
2946         return 0;
2947
2948  release_pools:
2949         nvme_release_prp_pools(dev);
2950  release:
2951         nvme_release_instance(dev);
2952  put_pci:
2953         put_device(dev->dev);
2954  free:
2955         kfree(dev->queues);
2956         kfree(dev->entry);
2957         kfree(dev);
2958         return result;
2959 }
2960
2961 static void nvme_async_probe(struct work_struct *work)
2962 {
2963         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2964         int result;
2965
2966         result = nvme_dev_start(dev);
2967         if (result)
2968                 goto reset;
2969
2970         if (dev->online_queues > 1)
2971                 result = nvme_dev_add(dev);
2972         if (result)
2973                 goto reset;
2974
2975         nvme_set_irq_hints(dev);
2976         return;
2977  reset:
2978         if (!work_busy(&dev->reset_work)) {
2979                 dev->reset_workfn = nvme_reset_failed_dev;
2980                 queue_work(nvme_workq, &dev->reset_work);
2981         }
2982 }
2983
2984 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2985 {
2986         struct nvme_dev *dev = pci_get_drvdata(pdev);
2987
2988         if (prepare)
2989                 nvme_dev_shutdown(dev);
2990         else
2991                 nvme_dev_resume(dev);
2992 }
2993
2994 static void nvme_shutdown(struct pci_dev *pdev)
2995 {
2996         struct nvme_dev *dev = pci_get_drvdata(pdev);
2997         nvme_dev_shutdown(dev);
2998 }
2999
3000 static void nvme_remove(struct pci_dev *pdev)
3001 {
3002         struct nvme_dev *dev = pci_get_drvdata(pdev);
3003
3004         spin_lock(&dev_list_lock);
3005         list_del_init(&dev->node);
3006         spin_unlock(&dev_list_lock);
3007
3008         pci_set_drvdata(pdev, NULL);
3009         flush_work(&dev->probe_work);
3010         flush_work(&dev->reset_work);
3011         nvme_dev_shutdown(dev);
3012         nvme_dev_remove(dev);
3013         nvme_dev_remove_admin(dev);
3014         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3015         nvme_free_queues(dev, 0);
3016         nvme_release_prp_pools(dev);
3017         kref_put(&dev->kref, nvme_free_dev);
3018 }
3019
3020 /* These functions are yet to be implemented */
3021 #define nvme_error_detected NULL
3022 #define nvme_dump_registers NULL
3023 #define nvme_link_reset NULL
3024 #define nvme_slot_reset NULL
3025 #define nvme_error_resume NULL
3026
3027 #ifdef CONFIG_PM_SLEEP
3028 static int nvme_suspend(struct device *dev)
3029 {
3030         struct pci_dev *pdev = to_pci_dev(dev);
3031         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3032
3033         nvme_dev_shutdown(ndev);
3034         return 0;
3035 }
3036
3037 static int nvme_resume(struct device *dev)
3038 {
3039         struct pci_dev *pdev = to_pci_dev(dev);
3040         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3041
3042         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3043                 ndev->reset_workfn = nvme_reset_failed_dev;
3044                 queue_work(nvme_workq, &ndev->reset_work);
3045         }
3046         return 0;
3047 }
3048 #endif
3049
3050 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3051
3052 static const struct pci_error_handlers nvme_err_handler = {
3053         .error_detected = nvme_error_detected,
3054         .mmio_enabled   = nvme_dump_registers,
3055         .link_reset     = nvme_link_reset,
3056         .slot_reset     = nvme_slot_reset,
3057         .resume         = nvme_error_resume,
3058         .reset_notify   = nvme_reset_notify,
3059 };
3060
3061 /* Move to pci_ids.h later */
3062 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3063
3064 static const struct pci_device_id nvme_id_table[] = {
3065         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3066         { 0, }
3067 };
3068 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3069
3070 static struct pci_driver nvme_driver = {
3071         .name           = "nvme",
3072         .id_table       = nvme_id_table,
3073         .probe          = nvme_probe,
3074         .remove         = nvme_remove,
3075         .shutdown       = nvme_shutdown,
3076         .driver         = {
3077                 .pm     = &nvme_dev_pm_ops,
3078         },
3079         .err_handler    = &nvme_err_handler,
3080 };
3081
3082 static int __init nvme_init(void)
3083 {
3084         int result;
3085
3086         init_waitqueue_head(&nvme_kthread_wait);
3087
3088         nvme_workq = create_singlethread_workqueue("nvme");
3089         if (!nvme_workq)
3090                 return -ENOMEM;
3091
3092         result = register_blkdev(nvme_major, "nvme");
3093         if (result < 0)
3094                 goto kill_workq;
3095         else if (result > 0)
3096                 nvme_major = result;
3097
3098         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3099                                                         &nvme_dev_fops);
3100         if (result < 0)
3101                 goto unregister_blkdev;
3102         else if (result > 0)
3103                 nvme_char_major = result;
3104
3105         nvme_class = class_create(THIS_MODULE, "nvme");
3106         if (IS_ERR(nvme_class)) {
3107                 result = PTR_ERR(nvme_class);
3108                 goto unregister_chrdev;
3109         }
3110
3111         result = pci_register_driver(&nvme_driver);
3112         if (result)
3113                 goto destroy_class;
3114         return 0;
3115
3116  destroy_class:
3117         class_destroy(nvme_class);
3118  unregister_chrdev:
3119         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3120  unregister_blkdev:
3121         unregister_blkdev(nvme_major, "nvme");
3122  kill_workq:
3123         destroy_workqueue(nvme_workq);
3124         return result;
3125 }
3126
3127 static void __exit nvme_exit(void)
3128 {
3129         pci_unregister_driver(&nvme_driver);
3130         unregister_blkdev(nvme_major, "nvme");
3131         destroy_workqueue(nvme_workq);
3132         class_destroy(nvme_class);
3133         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3134         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3135         _nvme_check_size();
3136 }
3137
3138 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3139 MODULE_LICENSE("GPL");
3140 MODULE_VERSION("1.0");
3141 module_init(nvme_init);
3142 module_exit(nvme_exit);