NVMe: Async IO queue deletion
[linux-2.6-block.git] / drivers / block / nvme-core.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17  */
18
19 #include <linux/nvme.h>
20 #include <linux/bio.h>
21 #include <linux/bitops.h>
22 #include <linux/blkdev.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/fs.h>
26 #include <linux/genhd.h>
27 #include <linux/idr.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/io.h>
31 #include <linux/kdev_t.h>
32 #include <linux/kthread.h>
33 #include <linux/kernel.h>
34 #include <linux/mm.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/pci.h>
38 #include <linux/poison.h>
39 #include <linux/ptrace.h>
40 #include <linux/sched.h>
41 #include <linux/slab.h>
42 #include <linux/types.h>
43 #include <scsi/sg.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45
46 #define NVME_Q_DEPTH 1024
47 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
48 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
49 #define NVME_MINORS 64
50 #define ADMIN_TIMEOUT   (60 * HZ)
51
52 static int nvme_major;
53 module_param(nvme_major, int, 0);
54
55 static int use_threaded_interrupts;
56 module_param(use_threaded_interrupts, int, 0);
57
58 static DEFINE_SPINLOCK(dev_list_lock);
59 static LIST_HEAD(dev_list);
60 static struct task_struct *nvme_thread;
61 static struct workqueue_struct *nvme_workq;
62
63 static void nvme_reset_failed_dev(struct work_struct *ws);
64
65 struct async_cmd_info {
66         struct kthread_work work;
67         struct kthread_worker *worker;
68         u32 result;
69         int status;
70         void *ctx;
71 };
72
73 /*
74  * An NVM Express queue.  Each device has at least two (one for admin
75  * commands and one for I/O commands).
76  */
77 struct nvme_queue {
78         struct device *q_dmadev;
79         struct nvme_dev *dev;
80         spinlock_t q_lock;
81         struct nvme_command *sq_cmds;
82         volatile struct nvme_completion *cqes;
83         dma_addr_t sq_dma_addr;
84         dma_addr_t cq_dma_addr;
85         wait_queue_head_t sq_full;
86         wait_queue_t sq_cong_wait;
87         struct bio_list sq_cong;
88         u32 __iomem *q_db;
89         u16 q_depth;
90         u16 cq_vector;
91         u16 sq_head;
92         u16 sq_tail;
93         u16 cq_head;
94         u16 qid;
95         u8 cq_phase;
96         u8 cqe_seen;
97         u8 q_suspended;
98         struct async_cmd_info cmdinfo;
99         unsigned long cmdid_data[];
100 };
101
102 /*
103  * Check we didin't inadvertently grow the command struct
104  */
105 static inline void _nvme_check_size(void)
106 {
107         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
108         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
109         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
110         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
111         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
112         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
113         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
114         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
115         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
116         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
117         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
118         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
119 }
120
121 typedef void (*nvme_completion_fn)(struct nvme_dev *, void *,
122                                                 struct nvme_completion *);
123
124 struct nvme_cmd_info {
125         nvme_completion_fn fn;
126         void *ctx;
127         unsigned long timeout;
128         int aborted;
129 };
130
131 static struct nvme_cmd_info *nvme_cmd_info(struct nvme_queue *nvmeq)
132 {
133         return (void *)&nvmeq->cmdid_data[BITS_TO_LONGS(nvmeq->q_depth)];
134 }
135
136 static unsigned nvme_queue_extra(int depth)
137 {
138         return DIV_ROUND_UP(depth, 8) + (depth * sizeof(struct nvme_cmd_info));
139 }
140
141 /**
142  * alloc_cmdid() - Allocate a Command ID
143  * @nvmeq: The queue that will be used for this command
144  * @ctx: A pointer that will be passed to the handler
145  * @handler: The function to call on completion
146  *
147  * Allocate a Command ID for a queue.  The data passed in will
148  * be passed to the completion handler.  This is implemented by using
149  * the bottom two bits of the ctx pointer to store the handler ID.
150  * Passing in a pointer that's not 4-byte aligned will cause a BUG.
151  * We can change this if it becomes a problem.
152  *
153  * May be called with local interrupts disabled and the q_lock held,
154  * or with interrupts enabled and no locks held.
155  */
156 static int alloc_cmdid(struct nvme_queue *nvmeq, void *ctx,
157                                 nvme_completion_fn handler, unsigned timeout)
158 {
159         int depth = nvmeq->q_depth - 1;
160         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
161         int cmdid;
162
163         do {
164                 cmdid = find_first_zero_bit(nvmeq->cmdid_data, depth);
165                 if (cmdid >= depth)
166                         return -EBUSY;
167         } while (test_and_set_bit(cmdid, nvmeq->cmdid_data));
168
169         info[cmdid].fn = handler;
170         info[cmdid].ctx = ctx;
171         info[cmdid].timeout = jiffies + timeout;
172         info[cmdid].aborted = 0;
173         return cmdid;
174 }
175
176 static int alloc_cmdid_killable(struct nvme_queue *nvmeq, void *ctx,
177                                 nvme_completion_fn handler, unsigned timeout)
178 {
179         int cmdid;
180         wait_event_killable(nvmeq->sq_full,
181                 (cmdid = alloc_cmdid(nvmeq, ctx, handler, timeout)) >= 0);
182         return (cmdid < 0) ? -EINTR : cmdid;
183 }
184
185 /* Special values must be less than 0x1000 */
186 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
187 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
188 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
189 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
190 #define CMD_CTX_FLUSH           (0x318 + CMD_CTX_BASE)
191 #define CMD_CTX_ABORT           (0x31C + CMD_CTX_BASE)
192
193 static void special_completion(struct nvme_dev *dev, void *ctx,
194                                                 struct nvme_completion *cqe)
195 {
196         if (ctx == CMD_CTX_CANCELLED)
197                 return;
198         if (ctx == CMD_CTX_FLUSH)
199                 return;
200         if (ctx == CMD_CTX_ABORT) {
201                 ++dev->abort_limit;
202                 return;
203         }
204         if (ctx == CMD_CTX_COMPLETED) {
205                 dev_warn(&dev->pci_dev->dev,
206                                 "completed id %d twice on queue %d\n",
207                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
208                 return;
209         }
210         if (ctx == CMD_CTX_INVALID) {
211                 dev_warn(&dev->pci_dev->dev,
212                                 "invalid id %d completed on queue %d\n",
213                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
214                 return;
215         }
216
217         dev_warn(&dev->pci_dev->dev, "Unknown special completion %p\n", ctx);
218 }
219
220 static void async_completion(struct nvme_dev *dev, void *ctx,
221                                                 struct nvme_completion *cqe)
222 {
223         struct async_cmd_info *cmdinfo = ctx;
224         cmdinfo->result = le32_to_cpup(&cqe->result);
225         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
226         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
227 }
228
229 /*
230  * Called with local interrupts disabled and the q_lock held.  May not sleep.
231  */
232 static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid,
233                                                 nvme_completion_fn *fn)
234 {
235         void *ctx;
236         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
237
238         if (cmdid >= nvmeq->q_depth) {
239                 *fn = special_completion;
240                 return CMD_CTX_INVALID;
241         }
242         if (fn)
243                 *fn = info[cmdid].fn;
244         ctx = info[cmdid].ctx;
245         info[cmdid].fn = special_completion;
246         info[cmdid].ctx = CMD_CTX_COMPLETED;
247         clear_bit(cmdid, nvmeq->cmdid_data);
248         wake_up(&nvmeq->sq_full);
249         return ctx;
250 }
251
252 static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
253                                                 nvme_completion_fn *fn)
254 {
255         void *ctx;
256         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
257         if (fn)
258                 *fn = info[cmdid].fn;
259         ctx = info[cmdid].ctx;
260         info[cmdid].fn = special_completion;
261         info[cmdid].ctx = CMD_CTX_CANCELLED;
262         return ctx;
263 }
264
265 struct nvme_queue *get_nvmeq(struct nvme_dev *dev)
266 {
267         return dev->queues[get_cpu() + 1];
268 }
269
270 void put_nvmeq(struct nvme_queue *nvmeq)
271 {
272         put_cpu();
273 }
274
275 /**
276  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
277  * @nvmeq: The queue to use
278  * @cmd: The command to send
279  *
280  * Safe to use from interrupt context
281  */
282 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
283 {
284         unsigned long flags;
285         u16 tail;
286         spin_lock_irqsave(&nvmeq->q_lock, flags);
287         tail = nvmeq->sq_tail;
288         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
289         if (++tail == nvmeq->q_depth)
290                 tail = 0;
291         writel(tail, nvmeq->q_db);
292         nvmeq->sq_tail = tail;
293         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
294
295         return 0;
296 }
297
298 static __le64 **iod_list(struct nvme_iod *iod)
299 {
300         return ((void *)iod) + iod->offset;
301 }
302
303 /*
304  * Will slightly overestimate the number of pages needed.  This is OK
305  * as it only leads to a small amount of wasted memory for the lifetime of
306  * the I/O.
307  */
308 static int nvme_npages(unsigned size)
309 {
310         unsigned nprps = DIV_ROUND_UP(size + PAGE_SIZE, PAGE_SIZE);
311         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
312 }
313
314 static struct nvme_iod *
315 nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp)
316 {
317         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
318                                 sizeof(__le64 *) * nvme_npages(nbytes) +
319                                 sizeof(struct scatterlist) * nseg, gfp);
320
321         if (iod) {
322                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
323                 iod->npages = -1;
324                 iod->length = nbytes;
325                 iod->nents = 0;
326                 iod->start_time = jiffies;
327         }
328
329         return iod;
330 }
331
332 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
333 {
334         const int last_prp = PAGE_SIZE / 8 - 1;
335         int i;
336         __le64 **list = iod_list(iod);
337         dma_addr_t prp_dma = iod->first_dma;
338
339         if (iod->npages == 0)
340                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
341         for (i = 0; i < iod->npages; i++) {
342                 __le64 *prp_list = list[i];
343                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
344                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
345                 prp_dma = next_prp_dma;
346         }
347         kfree(iod);
348 }
349
350 static void nvme_start_io_acct(struct bio *bio)
351 {
352         struct gendisk *disk = bio->bi_bdev->bd_disk;
353         const int rw = bio_data_dir(bio);
354         int cpu = part_stat_lock();
355         part_round_stats(cpu, &disk->part0);
356         part_stat_inc(cpu, &disk->part0, ios[rw]);
357         part_stat_add(cpu, &disk->part0, sectors[rw], bio_sectors(bio));
358         part_inc_in_flight(&disk->part0, rw);
359         part_stat_unlock();
360 }
361
362 static void nvme_end_io_acct(struct bio *bio, unsigned long start_time)
363 {
364         struct gendisk *disk = bio->bi_bdev->bd_disk;
365         const int rw = bio_data_dir(bio);
366         unsigned long duration = jiffies - start_time;
367         int cpu = part_stat_lock();
368         part_stat_add(cpu, &disk->part0, ticks[rw], duration);
369         part_round_stats(cpu, &disk->part0);
370         part_dec_in_flight(&disk->part0, rw);
371         part_stat_unlock();
372 }
373
374 static void bio_completion(struct nvme_dev *dev, void *ctx,
375                                                 struct nvme_completion *cqe)
376 {
377         struct nvme_iod *iod = ctx;
378         struct bio *bio = iod->private;
379         u16 status = le16_to_cpup(&cqe->status) >> 1;
380
381         if (iod->nents) {
382                 dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
383                         bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
384                 nvme_end_io_acct(bio, iod->start_time);
385         }
386         nvme_free_iod(dev, iod);
387         if (status)
388                 bio_endio(bio, -EIO);
389         else
390                 bio_endio(bio, 0);
391 }
392
393 /* length is in bytes.  gfp flags indicates whether we may sleep. */
394 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_common_command *cmd,
395                         struct nvme_iod *iod, int total_len, gfp_t gfp)
396 {
397         struct dma_pool *pool;
398         int length = total_len;
399         struct scatterlist *sg = iod->sg;
400         int dma_len = sg_dma_len(sg);
401         u64 dma_addr = sg_dma_address(sg);
402         int offset = offset_in_page(dma_addr);
403         __le64 *prp_list;
404         __le64 **list = iod_list(iod);
405         dma_addr_t prp_dma;
406         int nprps, i;
407
408         cmd->prp1 = cpu_to_le64(dma_addr);
409         length -= (PAGE_SIZE - offset);
410         if (length <= 0)
411                 return total_len;
412
413         dma_len -= (PAGE_SIZE - offset);
414         if (dma_len) {
415                 dma_addr += (PAGE_SIZE - offset);
416         } else {
417                 sg = sg_next(sg);
418                 dma_addr = sg_dma_address(sg);
419                 dma_len = sg_dma_len(sg);
420         }
421
422         if (length <= PAGE_SIZE) {
423                 cmd->prp2 = cpu_to_le64(dma_addr);
424                 return total_len;
425         }
426
427         nprps = DIV_ROUND_UP(length, PAGE_SIZE);
428         if (nprps <= (256 / 8)) {
429                 pool = dev->prp_small_pool;
430                 iod->npages = 0;
431         } else {
432                 pool = dev->prp_page_pool;
433                 iod->npages = 1;
434         }
435
436         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
437         if (!prp_list) {
438                 cmd->prp2 = cpu_to_le64(dma_addr);
439                 iod->npages = -1;
440                 return (total_len - length) + PAGE_SIZE;
441         }
442         list[0] = prp_list;
443         iod->first_dma = prp_dma;
444         cmd->prp2 = cpu_to_le64(prp_dma);
445         i = 0;
446         for (;;) {
447                 if (i == PAGE_SIZE / 8) {
448                         __le64 *old_prp_list = prp_list;
449                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
450                         if (!prp_list)
451                                 return total_len - length;
452                         list[iod->npages++] = prp_list;
453                         prp_list[0] = old_prp_list[i - 1];
454                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
455                         i = 1;
456                 }
457                 prp_list[i++] = cpu_to_le64(dma_addr);
458                 dma_len -= PAGE_SIZE;
459                 dma_addr += PAGE_SIZE;
460                 length -= PAGE_SIZE;
461                 if (length <= 0)
462                         break;
463                 if (dma_len > 0)
464                         continue;
465                 BUG_ON(dma_len < 0);
466                 sg = sg_next(sg);
467                 dma_addr = sg_dma_address(sg);
468                 dma_len = sg_dma_len(sg);
469         }
470
471         return total_len;
472 }
473
474 struct nvme_bio_pair {
475         struct bio b1, b2, *parent;
476         struct bio_vec *bv1, *bv2;
477         int err;
478         atomic_t cnt;
479 };
480
481 static void nvme_bio_pair_endio(struct bio *bio, int err)
482 {
483         struct nvme_bio_pair *bp = bio->bi_private;
484
485         if (err)
486                 bp->err = err;
487
488         if (atomic_dec_and_test(&bp->cnt)) {
489                 bio_endio(bp->parent, bp->err);
490                 kfree(bp->bv1);
491                 kfree(bp->bv2);
492                 kfree(bp);
493         }
494 }
495
496 static struct nvme_bio_pair *nvme_bio_split(struct bio *bio, int idx,
497                                                         int len, int offset)
498 {
499         struct nvme_bio_pair *bp;
500
501         BUG_ON(len > bio->bi_size);
502         BUG_ON(idx > bio->bi_vcnt);
503
504         bp = kmalloc(sizeof(*bp), GFP_ATOMIC);
505         if (!bp)
506                 return NULL;
507         bp->err = 0;
508
509         bp->b1 = *bio;
510         bp->b2 = *bio;
511
512         bp->b1.bi_size = len;
513         bp->b2.bi_size -= len;
514         bp->b1.bi_vcnt = idx;
515         bp->b2.bi_idx = idx;
516         bp->b2.bi_sector += len >> 9;
517
518         if (offset) {
519                 bp->bv1 = kmalloc(bio->bi_max_vecs * sizeof(struct bio_vec),
520                                                                 GFP_ATOMIC);
521                 if (!bp->bv1)
522                         goto split_fail_1;
523
524                 bp->bv2 = kmalloc(bio->bi_max_vecs * sizeof(struct bio_vec),
525                                                                 GFP_ATOMIC);
526                 if (!bp->bv2)
527                         goto split_fail_2;
528
529                 memcpy(bp->bv1, bio->bi_io_vec,
530                         bio->bi_max_vecs * sizeof(struct bio_vec));
531                 memcpy(bp->bv2, bio->bi_io_vec,
532                         bio->bi_max_vecs * sizeof(struct bio_vec));
533
534                 bp->b1.bi_io_vec = bp->bv1;
535                 bp->b2.bi_io_vec = bp->bv2;
536                 bp->b2.bi_io_vec[idx].bv_offset += offset;
537                 bp->b2.bi_io_vec[idx].bv_len -= offset;
538                 bp->b1.bi_io_vec[idx].bv_len = offset;
539                 bp->b1.bi_vcnt++;
540         } else
541                 bp->bv1 = bp->bv2 = NULL;
542
543         bp->b1.bi_private = bp;
544         bp->b2.bi_private = bp;
545
546         bp->b1.bi_end_io = nvme_bio_pair_endio;
547         bp->b2.bi_end_io = nvme_bio_pair_endio;
548
549         bp->parent = bio;
550         atomic_set(&bp->cnt, 2);
551
552         return bp;
553
554  split_fail_2:
555         kfree(bp->bv1);
556  split_fail_1:
557         kfree(bp);
558         return NULL;
559 }
560
561 static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
562                                                 int idx, int len, int offset)
563 {
564         struct nvme_bio_pair *bp = nvme_bio_split(bio, idx, len, offset);
565         if (!bp)
566                 return -ENOMEM;
567
568         if (bio_list_empty(&nvmeq->sq_cong))
569                 add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
570         bio_list_add(&nvmeq->sq_cong, &bp->b1);
571         bio_list_add(&nvmeq->sq_cong, &bp->b2);
572
573         return 0;
574 }
575
576 /* NVMe scatterlists require no holes in the virtual address */
577 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2)   ((vec2)->bv_offset || \
578                         (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
579
580 static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
581                 struct bio *bio, enum dma_data_direction dma_dir, int psegs)
582 {
583         struct bio_vec *bvec, *bvprv = NULL;
584         struct scatterlist *sg = NULL;
585         int i, length = 0, nsegs = 0, split_len = bio->bi_size;
586
587         if (nvmeq->dev->stripe_size)
588                 split_len = nvmeq->dev->stripe_size -
589                         ((bio->bi_sector << 9) & (nvmeq->dev->stripe_size - 1));
590
591         sg_init_table(iod->sg, psegs);
592         bio_for_each_segment(bvec, bio, i) {
593                 if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
594                         sg->length += bvec->bv_len;
595                 } else {
596                         if (bvprv && BIOVEC_NOT_VIRT_MERGEABLE(bvprv, bvec))
597                                 return nvme_split_and_submit(bio, nvmeq, i,
598                                                                 length, 0);
599
600                         sg = sg ? sg + 1 : iod->sg;
601                         sg_set_page(sg, bvec->bv_page, bvec->bv_len,
602                                                         bvec->bv_offset);
603                         nsegs++;
604                 }
605
606                 if (split_len - length < bvec->bv_len)
607                         return nvme_split_and_submit(bio, nvmeq, i, split_len,
608                                                         split_len - length);
609                 length += bvec->bv_len;
610                 bvprv = bvec;
611         }
612         iod->nents = nsegs;
613         sg_mark_end(sg);
614         if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
615                 return -ENOMEM;
616
617         BUG_ON(length != bio->bi_size);
618         return length;
619 }
620
621 /*
622  * We reuse the small pool to allocate the 16-byte range here as it is not
623  * worth having a special pool for these or additional cases to handle freeing
624  * the iod.
625  */
626 static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
627                 struct bio *bio, struct nvme_iod *iod, int cmdid)
628 {
629         struct nvme_dsm_range *range;
630         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
631
632         range = dma_pool_alloc(nvmeq->dev->prp_small_pool, GFP_ATOMIC,
633                                                         &iod->first_dma);
634         if (!range)
635                 return -ENOMEM;
636
637         iod_list(iod)[0] = (__le64 *)range;
638         iod->npages = 0;
639
640         range->cattr = cpu_to_le32(0);
641         range->nlb = cpu_to_le32(bio->bi_size >> ns->lba_shift);
642         range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_sector));
643
644         memset(cmnd, 0, sizeof(*cmnd));
645         cmnd->dsm.opcode = nvme_cmd_dsm;
646         cmnd->dsm.command_id = cmdid;
647         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
648         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
649         cmnd->dsm.nr = 0;
650         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
651
652         if (++nvmeq->sq_tail == nvmeq->q_depth)
653                 nvmeq->sq_tail = 0;
654         writel(nvmeq->sq_tail, nvmeq->q_db);
655
656         return 0;
657 }
658
659 static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
660                                                                 int cmdid)
661 {
662         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
663
664         memset(cmnd, 0, sizeof(*cmnd));
665         cmnd->common.opcode = nvme_cmd_flush;
666         cmnd->common.command_id = cmdid;
667         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
668
669         if (++nvmeq->sq_tail == nvmeq->q_depth)
670                 nvmeq->sq_tail = 0;
671         writel(nvmeq->sq_tail, nvmeq->q_db);
672
673         return 0;
674 }
675
676 int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns)
677 {
678         int cmdid = alloc_cmdid(nvmeq, (void *)CMD_CTX_FLUSH,
679                                         special_completion, NVME_IO_TIMEOUT);
680         if (unlikely(cmdid < 0))
681                 return cmdid;
682
683         return nvme_submit_flush(nvmeq, ns, cmdid);
684 }
685
686 /*
687  * Called with local interrupts disabled and the q_lock held.  May not sleep.
688  */
689 static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
690                                                                 struct bio *bio)
691 {
692         struct nvme_command *cmnd;
693         struct nvme_iod *iod;
694         enum dma_data_direction dma_dir;
695         int cmdid, length, result;
696         u16 control;
697         u32 dsmgmt;
698         int psegs = bio_phys_segments(ns->queue, bio);
699
700         if ((bio->bi_rw & REQ_FLUSH) && psegs) {
701                 result = nvme_submit_flush_data(nvmeq, ns);
702                 if (result)
703                         return result;
704         }
705
706         result = -ENOMEM;
707         iod = nvme_alloc_iod(psegs, bio->bi_size, GFP_ATOMIC);
708         if (!iod)
709                 goto nomem;
710         iod->private = bio;
711
712         result = -EBUSY;
713         cmdid = alloc_cmdid(nvmeq, iod, bio_completion, NVME_IO_TIMEOUT);
714         if (unlikely(cmdid < 0))
715                 goto free_iod;
716
717         if (bio->bi_rw & REQ_DISCARD) {
718                 result = nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
719                 if (result)
720                         goto free_cmdid;
721                 return result;
722         }
723         if ((bio->bi_rw & REQ_FLUSH) && !psegs)
724                 return nvme_submit_flush(nvmeq, ns, cmdid);
725
726         control = 0;
727         if (bio->bi_rw & REQ_FUA)
728                 control |= NVME_RW_FUA;
729         if (bio->bi_rw & (REQ_FAILFAST_DEV | REQ_RAHEAD))
730                 control |= NVME_RW_LR;
731
732         dsmgmt = 0;
733         if (bio->bi_rw & REQ_RAHEAD)
734                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
735
736         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
737
738         memset(cmnd, 0, sizeof(*cmnd));
739         if (bio_data_dir(bio)) {
740                 cmnd->rw.opcode = nvme_cmd_write;
741                 dma_dir = DMA_TO_DEVICE;
742         } else {
743                 cmnd->rw.opcode = nvme_cmd_read;
744                 dma_dir = DMA_FROM_DEVICE;
745         }
746
747         result = nvme_map_bio(nvmeq, iod, bio, dma_dir, psegs);
748         if (result <= 0)
749                 goto free_cmdid;
750         length = result;
751
752         cmnd->rw.command_id = cmdid;
753         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
754         length = nvme_setup_prps(nvmeq->dev, &cmnd->common, iod, length,
755                                                                 GFP_ATOMIC);
756         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_sector));
757         cmnd->rw.length = cpu_to_le16((length >> ns->lba_shift) - 1);
758         cmnd->rw.control = cpu_to_le16(control);
759         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
760
761         nvme_start_io_acct(bio);
762         if (++nvmeq->sq_tail == nvmeq->q_depth)
763                 nvmeq->sq_tail = 0;
764         writel(nvmeq->sq_tail, nvmeq->q_db);
765
766         return 0;
767
768  free_cmdid:
769         free_cmdid(nvmeq, cmdid, NULL);
770  free_iod:
771         nvme_free_iod(nvmeq->dev, iod);
772  nomem:
773         return result;
774 }
775
776 static int nvme_process_cq(struct nvme_queue *nvmeq)
777 {
778         u16 head, phase;
779
780         head = nvmeq->cq_head;
781         phase = nvmeq->cq_phase;
782
783         for (;;) {
784                 void *ctx;
785                 nvme_completion_fn fn;
786                 struct nvme_completion cqe = nvmeq->cqes[head];
787                 if ((le16_to_cpu(cqe.status) & 1) != phase)
788                         break;
789                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
790                 if (++head == nvmeq->q_depth) {
791                         head = 0;
792                         phase = !phase;
793                 }
794
795                 ctx = free_cmdid(nvmeq, cqe.command_id, &fn);
796                 fn(nvmeq->dev, ctx, &cqe);
797         }
798
799         /* If the controller ignores the cq head doorbell and continuously
800          * writes to the queue, it is theoretically possible to wrap around
801          * the queue twice and mistakenly return IRQ_NONE.  Linux only
802          * requires that 0.1% of your interrupts are handled, so this isn't
803          * a big problem.
804          */
805         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
806                 return 0;
807
808         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
809         nvmeq->cq_head = head;
810         nvmeq->cq_phase = phase;
811
812         nvmeq->cqe_seen = 1;
813         return 1;
814 }
815
816 static void nvme_make_request(struct request_queue *q, struct bio *bio)
817 {
818         struct nvme_ns *ns = q->queuedata;
819         struct nvme_queue *nvmeq = get_nvmeq(ns->dev);
820         int result = -EBUSY;
821
822         if (!nvmeq) {
823                 put_nvmeq(NULL);
824                 bio_endio(bio, -EIO);
825                 return;
826         }
827
828         spin_lock_irq(&nvmeq->q_lock);
829         if (!nvmeq->q_suspended && bio_list_empty(&nvmeq->sq_cong))
830                 result = nvme_submit_bio_queue(nvmeq, ns, bio);
831         if (unlikely(result)) {
832                 if (bio_list_empty(&nvmeq->sq_cong))
833                         add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
834                 bio_list_add(&nvmeq->sq_cong, bio);
835         }
836
837         nvme_process_cq(nvmeq);
838         spin_unlock_irq(&nvmeq->q_lock);
839         put_nvmeq(nvmeq);
840 }
841
842 static irqreturn_t nvme_irq(int irq, void *data)
843 {
844         irqreturn_t result;
845         struct nvme_queue *nvmeq = data;
846         spin_lock(&nvmeq->q_lock);
847         nvme_process_cq(nvmeq);
848         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
849         nvmeq->cqe_seen = 0;
850         spin_unlock(&nvmeq->q_lock);
851         return result;
852 }
853
854 static irqreturn_t nvme_irq_check(int irq, void *data)
855 {
856         struct nvme_queue *nvmeq = data;
857         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
858         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
859                 return IRQ_NONE;
860         return IRQ_WAKE_THREAD;
861 }
862
863 static void nvme_abort_command(struct nvme_queue *nvmeq, int cmdid)
864 {
865         spin_lock_irq(&nvmeq->q_lock);
866         cancel_cmdid(nvmeq, cmdid, NULL);
867         spin_unlock_irq(&nvmeq->q_lock);
868 }
869
870 struct sync_cmd_info {
871         struct task_struct *task;
872         u32 result;
873         int status;
874 };
875
876 static void sync_completion(struct nvme_dev *dev, void *ctx,
877                                                 struct nvme_completion *cqe)
878 {
879         struct sync_cmd_info *cmdinfo = ctx;
880         cmdinfo->result = le32_to_cpup(&cqe->result);
881         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
882         wake_up_process(cmdinfo->task);
883 }
884
885 /*
886  * Returns 0 on success.  If the result is negative, it's a Linux error code;
887  * if the result is positive, it's an NVM Express status code
888  */
889 int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd,
890                                                 u32 *result, unsigned timeout)
891 {
892         int cmdid;
893         struct sync_cmd_info cmdinfo;
894
895         cmdinfo.task = current;
896         cmdinfo.status = -EINTR;
897
898         cmdid = alloc_cmdid_killable(nvmeq, &cmdinfo, sync_completion,
899                                                                 timeout);
900         if (cmdid < 0)
901                 return cmdid;
902         cmd->common.command_id = cmdid;
903
904         set_current_state(TASK_KILLABLE);
905         nvme_submit_cmd(nvmeq, cmd);
906         schedule_timeout(timeout);
907
908         if (cmdinfo.status == -EINTR) {
909                 nvme_abort_command(nvmeq, cmdid);
910                 return -EINTR;
911         }
912
913         if (result)
914                 *result = cmdinfo.result;
915
916         return cmdinfo.status;
917 }
918
919 static int nvme_submit_async_cmd(struct nvme_queue *nvmeq,
920                         struct nvme_command *cmd,
921                         struct async_cmd_info *cmdinfo, unsigned timeout)
922 {
923         int cmdid;
924
925         cmdid = alloc_cmdid_killable(nvmeq, cmdinfo, async_completion, timeout);
926         if (cmdid < 0)
927                 return cmdid;
928         cmdinfo->status = -EINTR;
929         cmd->common.command_id = cmdid;
930         nvme_submit_cmd(nvmeq, cmd);
931         return 0;
932 }
933
934 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
935                                                                 u32 *result)
936 {
937         return nvme_submit_sync_cmd(dev->queues[0], cmd, result, ADMIN_TIMEOUT);
938 }
939
940 static int nvme_submit_admin_cmd_async(struct nvme_dev *dev,
941                 struct nvme_command *cmd, struct async_cmd_info *cmdinfo)
942 {
943         return nvme_submit_async_cmd(dev->queues[0], cmd, cmdinfo,
944                                                                 ADMIN_TIMEOUT);
945 }
946
947 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
948 {
949         int status;
950         struct nvme_command c;
951
952         memset(&c, 0, sizeof(c));
953         c.delete_queue.opcode = opcode;
954         c.delete_queue.qid = cpu_to_le16(id);
955
956         status = nvme_submit_admin_cmd(dev, &c, NULL);
957         if (status)
958                 return -EIO;
959         return 0;
960 }
961
962 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
963                                                 struct nvme_queue *nvmeq)
964 {
965         int status;
966         struct nvme_command c;
967         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
968
969         memset(&c, 0, sizeof(c));
970         c.create_cq.opcode = nvme_admin_create_cq;
971         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
972         c.create_cq.cqid = cpu_to_le16(qid);
973         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
974         c.create_cq.cq_flags = cpu_to_le16(flags);
975         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
976
977         status = nvme_submit_admin_cmd(dev, &c, NULL);
978         if (status)
979                 return -EIO;
980         return 0;
981 }
982
983 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
984                                                 struct nvme_queue *nvmeq)
985 {
986         int status;
987         struct nvme_command c;
988         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
989
990         memset(&c, 0, sizeof(c));
991         c.create_sq.opcode = nvme_admin_create_sq;
992         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
993         c.create_sq.sqid = cpu_to_le16(qid);
994         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
995         c.create_sq.sq_flags = cpu_to_le16(flags);
996         c.create_sq.cqid = cpu_to_le16(qid);
997
998         status = nvme_submit_admin_cmd(dev, &c, NULL);
999         if (status)
1000                 return -EIO;
1001         return 0;
1002 }
1003
1004 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1005 {
1006         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1007 }
1008
1009 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1010 {
1011         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1012 }
1013
1014 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1015                                                         dma_addr_t dma_addr)
1016 {
1017         struct nvme_command c;
1018
1019         memset(&c, 0, sizeof(c));
1020         c.identify.opcode = nvme_admin_identify;
1021         c.identify.nsid = cpu_to_le32(nsid);
1022         c.identify.prp1 = cpu_to_le64(dma_addr);
1023         c.identify.cns = cpu_to_le32(cns);
1024
1025         return nvme_submit_admin_cmd(dev, &c, NULL);
1026 }
1027
1028 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1029                                         dma_addr_t dma_addr, u32 *result)
1030 {
1031         struct nvme_command c;
1032
1033         memset(&c, 0, sizeof(c));
1034         c.features.opcode = nvme_admin_get_features;
1035         c.features.nsid = cpu_to_le32(nsid);
1036         c.features.prp1 = cpu_to_le64(dma_addr);
1037         c.features.fid = cpu_to_le32(fid);
1038
1039         return nvme_submit_admin_cmd(dev, &c, result);
1040 }
1041
1042 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1043                                         dma_addr_t dma_addr, u32 *result)
1044 {
1045         struct nvme_command c;
1046
1047         memset(&c, 0, sizeof(c));
1048         c.features.opcode = nvme_admin_set_features;
1049         c.features.prp1 = cpu_to_le64(dma_addr);
1050         c.features.fid = cpu_to_le32(fid);
1051         c.features.dword11 = cpu_to_le32(dword11);
1052
1053         return nvme_submit_admin_cmd(dev, &c, result);
1054 }
1055
1056 /**
1057  * nvme_abort_cmd - Attempt aborting a command
1058  * @cmdid: Command id of a timed out IO
1059  * @queue: The queue with timed out IO
1060  *
1061  * Schedule controller reset if the command was already aborted once before and
1062  * still hasn't been returned to the driver, or if this is the admin queue.
1063  */
1064 static void nvme_abort_cmd(int cmdid, struct nvme_queue *nvmeq)
1065 {
1066         int a_cmdid;
1067         struct nvme_command cmd;
1068         struct nvme_dev *dev = nvmeq->dev;
1069         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1070
1071         if (!nvmeq->qid || info[cmdid].aborted) {
1072                 if (work_busy(&dev->reset_work))
1073                         return;
1074                 list_del_init(&dev->node);
1075                 dev_warn(&dev->pci_dev->dev,
1076                         "I/O %d QID %d timeout, reset controller\n", cmdid,
1077                                                                 nvmeq->qid);
1078                 INIT_WORK(&dev->reset_work, nvme_reset_failed_dev);
1079                 queue_work(nvme_workq, &dev->reset_work);
1080                 return;
1081         }
1082
1083         if (!dev->abort_limit)
1084                 return;
1085
1086         a_cmdid = alloc_cmdid(dev->queues[0], CMD_CTX_ABORT, special_completion,
1087                                                                 ADMIN_TIMEOUT);
1088         if (a_cmdid < 0)
1089                 return;
1090
1091         memset(&cmd, 0, sizeof(cmd));
1092         cmd.abort.opcode = nvme_admin_abort_cmd;
1093         cmd.abort.cid = cmdid;
1094         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1095         cmd.abort.command_id = a_cmdid;
1096
1097         --dev->abort_limit;
1098         info[cmdid].aborted = 1;
1099         info[cmdid].timeout = jiffies + ADMIN_TIMEOUT;
1100
1101         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", cmdid,
1102                                                         nvmeq->qid);
1103         nvme_submit_cmd(dev->queues[0], &cmd);
1104 }
1105
1106 /**
1107  * nvme_cancel_ios - Cancel outstanding I/Os
1108  * @queue: The queue to cancel I/Os on
1109  * @timeout: True to only cancel I/Os which have timed out
1110  */
1111 static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
1112 {
1113         int depth = nvmeq->q_depth - 1;
1114         struct nvme_cmd_info *info = nvme_cmd_info(nvmeq);
1115         unsigned long now = jiffies;
1116         int cmdid;
1117
1118         for_each_set_bit(cmdid, nvmeq->cmdid_data, depth) {
1119                 void *ctx;
1120                 nvme_completion_fn fn;
1121                 static struct nvme_completion cqe = {
1122                         .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1123                 };
1124
1125                 if (timeout && !time_after(now, info[cmdid].timeout))
1126                         continue;
1127                 if (info[cmdid].ctx == CMD_CTX_CANCELLED)
1128                         continue;
1129                 if (timeout && nvmeq->dev->initialized) {
1130                         nvme_abort_cmd(cmdid, nvmeq);
1131                         continue;
1132                 }
1133                 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", cmdid,
1134                                                                 nvmeq->qid);
1135                 ctx = cancel_cmdid(nvmeq, cmdid, &fn);
1136                 fn(nvmeq->dev, ctx, &cqe);
1137         }
1138 }
1139
1140 static void nvme_free_queue(struct nvme_queue *nvmeq)
1141 {
1142         spin_lock_irq(&nvmeq->q_lock);
1143         while (bio_list_peek(&nvmeq->sq_cong)) {
1144                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1145                 bio_endio(bio, -EIO);
1146         }
1147         spin_unlock_irq(&nvmeq->q_lock);
1148
1149         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1150                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1151         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1152                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1153         kfree(nvmeq);
1154 }
1155
1156 static void nvme_free_queues(struct nvme_dev *dev)
1157 {
1158         int i;
1159
1160         for (i = dev->queue_count - 1; i >= 0; i--) {
1161                 nvme_free_queue(dev->queues[i]);
1162                 dev->queue_count--;
1163                 dev->queues[i] = NULL;
1164         }
1165 }
1166
1167 /**
1168  * nvme_suspend_queue - put queue into suspended state
1169  * @nvmeq - queue to suspend
1170  *
1171  * Returns 1 if already suspended, 0 otherwise.
1172  */
1173 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1174 {
1175         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1176
1177         spin_lock_irq(&nvmeq->q_lock);
1178         if (nvmeq->q_suspended) {
1179                 spin_unlock_irq(&nvmeq->q_lock);
1180                 return 1;
1181         }
1182         nvmeq->q_suspended = 1;
1183         spin_unlock_irq(&nvmeq->q_lock);
1184
1185         irq_set_affinity_hint(vector, NULL);
1186         free_irq(vector, nvmeq);
1187
1188         return 0;
1189 }
1190
1191 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1192 {
1193         spin_lock_irq(&nvmeq->q_lock);
1194         nvme_process_cq(nvmeq);
1195         nvme_cancel_ios(nvmeq, false);
1196         spin_unlock_irq(&nvmeq->q_lock);
1197 }
1198
1199 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1200 {
1201         struct nvme_queue *nvmeq = dev->queues[qid];
1202
1203         if (!nvmeq)
1204                 return;
1205         if (nvme_suspend_queue(nvmeq))
1206                 return;
1207
1208         /* Don't tell the adapter to delete the admin queue.
1209          * Don't tell a removed adapter to delete IO queues. */
1210         if (qid && readl(&dev->bar->csts) != -1) {
1211                 adapter_delete_sq(dev, qid);
1212                 adapter_delete_cq(dev, qid);
1213         }
1214         nvme_clear_queue(nvmeq);
1215 }
1216
1217 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1218                                                         int depth, int vector)
1219 {
1220         struct device *dmadev = &dev->pci_dev->dev;
1221         unsigned extra = nvme_queue_extra(depth);
1222         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq) + extra, GFP_KERNEL);
1223         if (!nvmeq)
1224                 return NULL;
1225
1226         nvmeq->cqes = dma_alloc_coherent(dmadev, CQ_SIZE(depth),
1227                                         &nvmeq->cq_dma_addr, GFP_KERNEL);
1228         if (!nvmeq->cqes)
1229                 goto free_nvmeq;
1230         memset((void *)nvmeq->cqes, 0, CQ_SIZE(depth));
1231
1232         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1233                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1234         if (!nvmeq->sq_cmds)
1235                 goto free_cqdma;
1236
1237         nvmeq->q_dmadev = dmadev;
1238         nvmeq->dev = dev;
1239         spin_lock_init(&nvmeq->q_lock);
1240         nvmeq->cq_head = 0;
1241         nvmeq->cq_phase = 1;
1242         init_waitqueue_head(&nvmeq->sq_full);
1243         init_waitqueue_entry(&nvmeq->sq_cong_wait, nvme_thread);
1244         bio_list_init(&nvmeq->sq_cong);
1245         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1246         nvmeq->q_depth = depth;
1247         nvmeq->cq_vector = vector;
1248         nvmeq->qid = qid;
1249         nvmeq->q_suspended = 1;
1250         dev->queue_count++;
1251
1252         return nvmeq;
1253
1254  free_cqdma:
1255         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1256                                                         nvmeq->cq_dma_addr);
1257  free_nvmeq:
1258         kfree(nvmeq);
1259         return NULL;
1260 }
1261
1262 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1263                                                         const char *name)
1264 {
1265         if (use_threaded_interrupts)
1266                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1267                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1268                                         name, nvmeq);
1269         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1270                                 IRQF_SHARED, name, nvmeq);
1271 }
1272
1273 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1274 {
1275         struct nvme_dev *dev = nvmeq->dev;
1276         unsigned extra = nvme_queue_extra(nvmeq->q_depth);
1277
1278         nvmeq->sq_tail = 0;
1279         nvmeq->cq_head = 0;
1280         nvmeq->cq_phase = 1;
1281         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1282         memset(nvmeq->cmdid_data, 0, extra);
1283         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1284         nvme_cancel_ios(nvmeq, false);
1285         nvmeq->q_suspended = 0;
1286 }
1287
1288 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1289 {
1290         struct nvme_dev *dev = nvmeq->dev;
1291         int result;
1292
1293         result = adapter_alloc_cq(dev, qid, nvmeq);
1294         if (result < 0)
1295                 return result;
1296
1297         result = adapter_alloc_sq(dev, qid, nvmeq);
1298         if (result < 0)
1299                 goto release_cq;
1300
1301         result = queue_request_irq(dev, nvmeq, "nvme");
1302         if (result < 0)
1303                 goto release_sq;
1304
1305         spin_lock_irq(&nvmeq->q_lock);
1306         nvme_init_queue(nvmeq, qid);
1307         spin_unlock_irq(&nvmeq->q_lock);
1308
1309         return result;
1310
1311  release_sq:
1312         adapter_delete_sq(dev, qid);
1313  release_cq:
1314         adapter_delete_cq(dev, qid);
1315         return result;
1316 }
1317
1318 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1319 {
1320         unsigned long timeout;
1321         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1322
1323         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1324
1325         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1326                 msleep(100);
1327                 if (fatal_signal_pending(current))
1328                         return -EINTR;
1329                 if (time_after(jiffies, timeout)) {
1330                         dev_err(&dev->pci_dev->dev,
1331                                 "Device not ready; aborting initialisation\n");
1332                         return -ENODEV;
1333                 }
1334         }
1335
1336         return 0;
1337 }
1338
1339 /*
1340  * If the device has been passed off to us in an enabled state, just clear
1341  * the enabled bit.  The spec says we should set the 'shutdown notification
1342  * bits', but doing so may cause the device to complete commands to the
1343  * admin queue ... and we don't know what memory that might be pointing at!
1344  */
1345 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1346 {
1347         u32 cc = readl(&dev->bar->cc);
1348
1349         if (cc & NVME_CC_ENABLE)
1350                 writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
1351         return nvme_wait_ready(dev, cap, false);
1352 }
1353
1354 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1355 {
1356         return nvme_wait_ready(dev, cap, true);
1357 }
1358
1359 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1360 {
1361         unsigned long timeout;
1362         u32 cc;
1363
1364         cc = (readl(&dev->bar->cc) & ~NVME_CC_SHN_MASK) | NVME_CC_SHN_NORMAL;
1365         writel(cc, &dev->bar->cc);
1366
1367         timeout = 2 * HZ + jiffies;
1368         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1369                                                         NVME_CSTS_SHST_CMPLT) {
1370                 msleep(100);
1371                 if (fatal_signal_pending(current))
1372                         return -EINTR;
1373                 if (time_after(jiffies, timeout)) {
1374                         dev_err(&dev->pci_dev->dev,
1375                                 "Device shutdown incomplete; abort shutdown\n");
1376                         return -ENODEV;
1377                 }
1378         }
1379
1380         return 0;
1381 }
1382
1383 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1384 {
1385         int result;
1386         u32 aqa;
1387         u64 cap = readq(&dev->bar->cap);
1388         struct nvme_queue *nvmeq;
1389
1390         result = nvme_disable_ctrl(dev, cap);
1391         if (result < 0)
1392                 return result;
1393
1394         nvmeq = dev->queues[0];
1395         if (!nvmeq) {
1396                 nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
1397                 if (!nvmeq)
1398                         return -ENOMEM;
1399                 dev->queues[0] = nvmeq;
1400         }
1401
1402         aqa = nvmeq->q_depth - 1;
1403         aqa |= aqa << 16;
1404
1405         dev->ctrl_config = NVME_CC_ENABLE | NVME_CC_CSS_NVM;
1406         dev->ctrl_config |= (PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
1407         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1408         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1409
1410         writel(aqa, &dev->bar->aqa);
1411         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1412         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1413         writel(dev->ctrl_config, &dev->bar->cc);
1414
1415         result = nvme_enable_ctrl(dev, cap);
1416         if (result)
1417                 return result;
1418
1419         result = queue_request_irq(dev, nvmeq, "nvme admin");
1420         if (result)
1421                 return result;
1422
1423         spin_lock_irq(&nvmeq->q_lock);
1424         nvme_init_queue(nvmeq, 0);
1425         spin_unlock_irq(&nvmeq->q_lock);
1426         return result;
1427 }
1428
1429 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1430                                 unsigned long addr, unsigned length)
1431 {
1432         int i, err, count, nents, offset;
1433         struct scatterlist *sg;
1434         struct page **pages;
1435         struct nvme_iod *iod;
1436
1437         if (addr & 3)
1438                 return ERR_PTR(-EINVAL);
1439         if (!length || length > INT_MAX - PAGE_SIZE)
1440                 return ERR_PTR(-EINVAL);
1441
1442         offset = offset_in_page(addr);
1443         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1444         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1445         if (!pages)
1446                 return ERR_PTR(-ENOMEM);
1447
1448         err = get_user_pages_fast(addr, count, 1, pages);
1449         if (err < count) {
1450                 count = err;
1451                 err = -EFAULT;
1452                 goto put_pages;
1453         }
1454
1455         iod = nvme_alloc_iod(count, length, GFP_KERNEL);
1456         sg = iod->sg;
1457         sg_init_table(sg, count);
1458         for (i = 0; i < count; i++) {
1459                 sg_set_page(&sg[i], pages[i],
1460                             min_t(unsigned, length, PAGE_SIZE - offset),
1461                             offset);
1462                 length -= (PAGE_SIZE - offset);
1463                 offset = 0;
1464         }
1465         sg_mark_end(&sg[i - 1]);
1466         iod->nents = count;
1467
1468         err = -ENOMEM;
1469         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1470                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1471         if (!nents)
1472                 goto free_iod;
1473
1474         kfree(pages);
1475         return iod;
1476
1477  free_iod:
1478         kfree(iod);
1479  put_pages:
1480         for (i = 0; i < count; i++)
1481                 put_page(pages[i]);
1482         kfree(pages);
1483         return ERR_PTR(err);
1484 }
1485
1486 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1487                         struct nvme_iod *iod)
1488 {
1489         int i;
1490
1491         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1492                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1493
1494         for (i = 0; i < iod->nents; i++)
1495                 put_page(sg_page(&iod->sg[i]));
1496 }
1497
1498 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1499 {
1500         struct nvme_dev *dev = ns->dev;
1501         struct nvme_queue *nvmeq;
1502         struct nvme_user_io io;
1503         struct nvme_command c;
1504         unsigned length, meta_len;
1505         int status, i;
1506         struct nvme_iod *iod, *meta_iod = NULL;
1507         dma_addr_t meta_dma_addr;
1508         void *meta, *uninitialized_var(meta_mem);
1509
1510         if (copy_from_user(&io, uio, sizeof(io)))
1511                 return -EFAULT;
1512         length = (io.nblocks + 1) << ns->lba_shift;
1513         meta_len = (io.nblocks + 1) * ns->ms;
1514
1515         if (meta_len && ((io.metadata & 3) || !io.metadata))
1516                 return -EINVAL;
1517
1518         switch (io.opcode) {
1519         case nvme_cmd_write:
1520         case nvme_cmd_read:
1521         case nvme_cmd_compare:
1522                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1523                 break;
1524         default:
1525                 return -EINVAL;
1526         }
1527
1528         if (IS_ERR(iod))
1529                 return PTR_ERR(iod);
1530
1531         memset(&c, 0, sizeof(c));
1532         c.rw.opcode = io.opcode;
1533         c.rw.flags = io.flags;
1534         c.rw.nsid = cpu_to_le32(ns->ns_id);
1535         c.rw.slba = cpu_to_le64(io.slba);
1536         c.rw.length = cpu_to_le16(io.nblocks);
1537         c.rw.control = cpu_to_le16(io.control);
1538         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1539         c.rw.reftag = cpu_to_le32(io.reftag);
1540         c.rw.apptag = cpu_to_le16(io.apptag);
1541         c.rw.appmask = cpu_to_le16(io.appmask);
1542
1543         if (meta_len) {
1544                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1545                                                                 meta_len);
1546                 if (IS_ERR(meta_iod)) {
1547                         status = PTR_ERR(meta_iod);
1548                         meta_iod = NULL;
1549                         goto unmap;
1550                 }
1551
1552                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1553                                                 &meta_dma_addr, GFP_KERNEL);
1554                 if (!meta_mem) {
1555                         status = -ENOMEM;
1556                         goto unmap;
1557                 }
1558
1559                 if (io.opcode & 1) {
1560                         int meta_offset = 0;
1561
1562                         for (i = 0; i < meta_iod->nents; i++) {
1563                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1564                                                 meta_iod->sg[i].offset;
1565                                 memcpy(meta_mem + meta_offset, meta,
1566                                                 meta_iod->sg[i].length);
1567                                 kunmap_atomic(meta);
1568                                 meta_offset += meta_iod->sg[i].length;
1569                         }
1570                 }
1571
1572                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1573         }
1574
1575         length = nvme_setup_prps(dev, &c.common, iod, length, GFP_KERNEL);
1576
1577         nvmeq = get_nvmeq(dev);
1578         /*
1579          * Since nvme_submit_sync_cmd sleeps, we can't keep preemption
1580          * disabled.  We may be preempted at any point, and be rescheduled
1581          * to a different CPU.  That will cause cacheline bouncing, but no
1582          * additional races since q_lock already protects against other CPUs.
1583          */
1584         put_nvmeq(nvmeq);
1585         if (length != (io.nblocks + 1) << ns->lba_shift)
1586                 status = -ENOMEM;
1587         else if (!nvmeq || nvmeq->q_suspended)
1588                 status = -EBUSY;
1589         else
1590                 status = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
1591
1592         if (meta_len) {
1593                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1594                         int meta_offset = 0;
1595
1596                         for (i = 0; i < meta_iod->nents; i++) {
1597                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1598                                                 meta_iod->sg[i].offset;
1599                                 memcpy(meta, meta_mem + meta_offset,
1600                                                 meta_iod->sg[i].length);
1601                                 kunmap_atomic(meta);
1602                                 meta_offset += meta_iod->sg[i].length;
1603                         }
1604                 }
1605
1606                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1607                                                                 meta_dma_addr);
1608         }
1609
1610  unmap:
1611         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1612         nvme_free_iod(dev, iod);
1613
1614         if (meta_iod) {
1615                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1616                 nvme_free_iod(dev, meta_iod);
1617         }
1618
1619         return status;
1620 }
1621
1622 static int nvme_user_admin_cmd(struct nvme_dev *dev,
1623                                         struct nvme_admin_cmd __user *ucmd)
1624 {
1625         struct nvme_admin_cmd cmd;
1626         struct nvme_command c;
1627         int status, length;
1628         struct nvme_iod *uninitialized_var(iod);
1629         unsigned timeout;
1630
1631         if (!capable(CAP_SYS_ADMIN))
1632                 return -EACCES;
1633         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1634                 return -EFAULT;
1635
1636         memset(&c, 0, sizeof(c));
1637         c.common.opcode = cmd.opcode;
1638         c.common.flags = cmd.flags;
1639         c.common.nsid = cpu_to_le32(cmd.nsid);
1640         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1641         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1642         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1643         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1644         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1645         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1646         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1647         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1648
1649         length = cmd.data_len;
1650         if (cmd.data_len) {
1651                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1652                                                                 length);
1653                 if (IS_ERR(iod))
1654                         return PTR_ERR(iod);
1655                 length = nvme_setup_prps(dev, &c.common, iod, length,
1656                                                                 GFP_KERNEL);
1657         }
1658
1659         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1660                                                                 ADMIN_TIMEOUT;
1661         if (length != cmd.data_len)
1662                 status = -ENOMEM;
1663         else
1664                 status = nvme_submit_sync_cmd(dev->queues[0], &c, &cmd.result,
1665                                                                 timeout);
1666
1667         if (cmd.data_len) {
1668                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1669                 nvme_free_iod(dev, iod);
1670         }
1671
1672         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1673                                                         sizeof(cmd.result)))
1674                 status = -EFAULT;
1675
1676         return status;
1677 }
1678
1679 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1680                                                         unsigned long arg)
1681 {
1682         struct nvme_ns *ns = bdev->bd_disk->private_data;
1683
1684         switch (cmd) {
1685         case NVME_IOCTL_ID:
1686                 force_successful_syscall_return();
1687                 return ns->ns_id;
1688         case NVME_IOCTL_ADMIN_CMD:
1689                 return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
1690         case NVME_IOCTL_SUBMIT_IO:
1691                 return nvme_submit_io(ns, (void __user *)arg);
1692         case SG_GET_VERSION_NUM:
1693                 return nvme_sg_get_version_num((void __user *)arg);
1694         case SG_IO:
1695                 return nvme_sg_io(ns, (void __user *)arg);
1696         default:
1697                 return -ENOTTY;
1698         }
1699 }
1700
1701 #ifdef CONFIG_COMPAT
1702 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1703                                         unsigned int cmd, unsigned long arg)
1704 {
1705         struct nvme_ns *ns = bdev->bd_disk->private_data;
1706
1707         switch (cmd) {
1708         case SG_IO:
1709                 return nvme_sg_io32(ns, arg);
1710         }
1711         return nvme_ioctl(bdev, mode, cmd, arg);
1712 }
1713 #else
1714 #define nvme_compat_ioctl       NULL
1715 #endif
1716
1717 static const struct block_device_operations nvme_fops = {
1718         .owner          = THIS_MODULE,
1719         .ioctl          = nvme_ioctl,
1720         .compat_ioctl   = nvme_compat_ioctl,
1721 };
1722
1723 static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
1724 {
1725         while (bio_list_peek(&nvmeq->sq_cong)) {
1726                 struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
1727                 struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
1728
1729                 if (bio_list_empty(&nvmeq->sq_cong))
1730                         remove_wait_queue(&nvmeq->sq_full,
1731                                                         &nvmeq->sq_cong_wait);
1732                 if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
1733                         if (bio_list_empty(&nvmeq->sq_cong))
1734                                 add_wait_queue(&nvmeq->sq_full,
1735                                                         &nvmeq->sq_cong_wait);
1736                         bio_list_add_head(&nvmeq->sq_cong, bio);
1737                         break;
1738                 }
1739         }
1740 }
1741
1742 static int nvme_kthread(void *data)
1743 {
1744         struct nvme_dev *dev, *next;
1745
1746         while (!kthread_should_stop()) {
1747                 set_current_state(TASK_INTERRUPTIBLE);
1748                 spin_lock(&dev_list_lock);
1749                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1750                         int i;
1751                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1752                                                         dev->initialized) {
1753                                 if (work_busy(&dev->reset_work))
1754                                         continue;
1755                                 list_del_init(&dev->node);
1756                                 dev_warn(&dev->pci_dev->dev,
1757                                         "Failed status, reset controller\n");
1758                                 INIT_WORK(&dev->reset_work,
1759                                                         nvme_reset_failed_dev);
1760                                 queue_work(nvme_workq, &dev->reset_work);
1761                                 continue;
1762                         }
1763                         for (i = 0; i < dev->queue_count; i++) {
1764                                 struct nvme_queue *nvmeq = dev->queues[i];
1765                                 if (!nvmeq)
1766                                         continue;
1767                                 spin_lock_irq(&nvmeq->q_lock);
1768                                 if (nvmeq->q_suspended)
1769                                         goto unlock;
1770                                 nvme_process_cq(nvmeq);
1771                                 nvme_cancel_ios(nvmeq, true);
1772                                 nvme_resubmit_bios(nvmeq);
1773  unlock:
1774                                 spin_unlock_irq(&nvmeq->q_lock);
1775                         }
1776                 }
1777                 spin_unlock(&dev_list_lock);
1778                 schedule_timeout(round_jiffies_relative(HZ));
1779         }
1780         return 0;
1781 }
1782
1783 static DEFINE_IDA(nvme_index_ida);
1784
1785 static int nvme_get_ns_idx(void)
1786 {
1787         int index, error;
1788
1789         do {
1790                 if (!ida_pre_get(&nvme_index_ida, GFP_KERNEL))
1791                         return -1;
1792
1793                 spin_lock(&dev_list_lock);
1794                 error = ida_get_new(&nvme_index_ida, &index);
1795                 spin_unlock(&dev_list_lock);
1796         } while (error == -EAGAIN);
1797
1798         if (error)
1799                 index = -1;
1800         return index;
1801 }
1802
1803 static void nvme_put_ns_idx(int index)
1804 {
1805         spin_lock(&dev_list_lock);
1806         ida_remove(&nvme_index_ida, index);
1807         spin_unlock(&dev_list_lock);
1808 }
1809
1810 static void nvme_config_discard(struct nvme_ns *ns)
1811 {
1812         u32 logical_block_size = queue_logical_block_size(ns->queue);
1813         ns->queue->limits.discard_zeroes_data = 0;
1814         ns->queue->limits.discard_alignment = logical_block_size;
1815         ns->queue->limits.discard_granularity = logical_block_size;
1816         ns->queue->limits.max_discard_sectors = 0xffffffff;
1817         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1818 }
1819
1820 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1821                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1822 {
1823         struct nvme_ns *ns;
1824         struct gendisk *disk;
1825         int lbaf;
1826
1827         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1828                 return NULL;
1829
1830         ns = kzalloc(sizeof(*ns), GFP_KERNEL);
1831         if (!ns)
1832                 return NULL;
1833         ns->queue = blk_alloc_queue(GFP_KERNEL);
1834         if (!ns->queue)
1835                 goto out_free_ns;
1836         ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
1837         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1838         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1839         blk_queue_make_request(ns->queue, nvme_make_request);
1840         ns->dev = dev;
1841         ns->queue->queuedata = ns;
1842
1843         disk = alloc_disk(NVME_MINORS);
1844         if (!disk)
1845                 goto out_free_queue;
1846         ns->ns_id = nsid;
1847         ns->disk = disk;
1848         lbaf = id->flbas & 0xf;
1849         ns->lba_shift = id->lbaf[lbaf].ds;
1850         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1851         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1852         if (dev->max_hw_sectors)
1853                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1854
1855         disk->major = nvme_major;
1856         disk->minors = NVME_MINORS;
1857         disk->first_minor = NVME_MINORS * nvme_get_ns_idx();
1858         disk->fops = &nvme_fops;
1859         disk->private_data = ns;
1860         disk->queue = ns->queue;
1861         disk->driverfs_dev = &dev->pci_dev->dev;
1862         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1863         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1864
1865         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1866                 nvme_config_discard(ns);
1867
1868         return ns;
1869
1870  out_free_queue:
1871         blk_cleanup_queue(ns->queue);
1872  out_free_ns:
1873         kfree(ns);
1874         return NULL;
1875 }
1876
1877 static void nvme_ns_free(struct nvme_ns *ns)
1878 {
1879         int index = ns->disk->first_minor / NVME_MINORS;
1880         put_disk(ns->disk);
1881         nvme_put_ns_idx(index);
1882         blk_cleanup_queue(ns->queue);
1883         kfree(ns);
1884 }
1885
1886 static int set_queue_count(struct nvme_dev *dev, int count)
1887 {
1888         int status;
1889         u32 result;
1890         u32 q_count = (count - 1) | ((count - 1) << 16);
1891
1892         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
1893                                                                 &result);
1894         if (status)
1895                 return status < 0 ? -EIO : -EBUSY;
1896         return min(result & 0xffff, result >> 16) + 1;
1897 }
1898
1899 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
1900 {
1901         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
1902 }
1903
1904 static int nvme_setup_io_queues(struct nvme_dev *dev)
1905 {
1906         struct pci_dev *pdev = dev->pci_dev;
1907         int result, cpu, i, vecs, nr_io_queues, size, q_depth;
1908
1909         nr_io_queues = num_online_cpus();
1910         result = set_queue_count(dev, nr_io_queues);
1911         if (result < 0)
1912                 return result;
1913         if (result < nr_io_queues)
1914                 nr_io_queues = result;
1915
1916         size = db_bar_size(dev, nr_io_queues);
1917         if (size > 8192) {
1918                 iounmap(dev->bar);
1919                 do {
1920                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
1921                         if (dev->bar)
1922                                 break;
1923                         if (!--nr_io_queues)
1924                                 return -ENOMEM;
1925                         size = db_bar_size(dev, nr_io_queues);
1926                 } while (1);
1927                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
1928                 dev->queues[0]->q_db = dev->dbs;
1929         }
1930
1931         /* Deregister the admin queue's interrupt */
1932         free_irq(dev->entry[0].vector, dev->queues[0]);
1933
1934         vecs = nr_io_queues;
1935         for (i = 0; i < vecs; i++)
1936                 dev->entry[i].entry = i;
1937         for (;;) {
1938                 result = pci_enable_msix(pdev, dev->entry, vecs);
1939                 if (result <= 0)
1940                         break;
1941                 vecs = result;
1942         }
1943
1944         if (result < 0) {
1945                 vecs = nr_io_queues;
1946                 if (vecs > 32)
1947                         vecs = 32;
1948                 for (;;) {
1949                         result = pci_enable_msi_block(pdev, vecs);
1950                         if (result == 0) {
1951                                 for (i = 0; i < vecs; i++)
1952                                         dev->entry[i].vector = i + pdev->irq;
1953                                 break;
1954                         } else if (result < 0) {
1955                                 vecs = 1;
1956                                 break;
1957                         }
1958                         vecs = result;
1959                 }
1960         }
1961
1962         /*
1963          * Should investigate if there's a performance win from allocating
1964          * more queues than interrupt vectors; it might allow the submission
1965          * path to scale better, even if the receive path is limited by the
1966          * number of interrupts.
1967          */
1968         nr_io_queues = vecs;
1969
1970         result = queue_request_irq(dev, dev->queues[0], "nvme admin");
1971         if (result) {
1972                 dev->queues[0]->q_suspended = 1;
1973                 goto free_queues;
1974         }
1975
1976         /* Free previously allocated queues that are no longer usable */
1977         spin_lock(&dev_list_lock);
1978         for (i = dev->queue_count - 1; i > nr_io_queues; i--) {
1979                 struct nvme_queue *nvmeq = dev->queues[i];
1980
1981                 spin_lock_irq(&nvmeq->q_lock);
1982                 nvme_cancel_ios(nvmeq, false);
1983                 spin_unlock_irq(&nvmeq->q_lock);
1984
1985                 nvme_free_queue(nvmeq);
1986                 dev->queue_count--;
1987                 dev->queues[i] = NULL;
1988         }
1989         spin_unlock(&dev_list_lock);
1990
1991         cpu = cpumask_first(cpu_online_mask);
1992         for (i = 0; i < nr_io_queues; i++) {
1993                 irq_set_affinity_hint(dev->entry[i].vector, get_cpu_mask(cpu));
1994                 cpu = cpumask_next(cpu, cpu_online_mask);
1995         }
1996
1997         q_depth = min_t(int, NVME_CAP_MQES(readq(&dev->bar->cap)) + 1,
1998                                                                 NVME_Q_DEPTH);
1999         for (i = dev->queue_count - 1; i < nr_io_queues; i++) {
2000                 dev->queues[i + 1] = nvme_alloc_queue(dev, i + 1, q_depth, i);
2001                 if (!dev->queues[i + 1]) {
2002                         result = -ENOMEM;
2003                         goto free_queues;
2004                 }
2005         }
2006
2007         for (; i < num_possible_cpus(); i++) {
2008                 int target = i % rounddown_pow_of_two(dev->queue_count - 1);
2009                 dev->queues[i + 1] = dev->queues[target + 1];
2010         }
2011
2012         for (i = 1; i < dev->queue_count; i++) {
2013                 result = nvme_create_queue(dev->queues[i], i);
2014                 if (result) {
2015                         for (--i; i > 0; i--)
2016                                 nvme_disable_queue(dev, i);
2017                         goto free_queues;
2018                 }
2019         }
2020
2021         return 0;
2022
2023  free_queues:
2024         nvme_free_queues(dev);
2025         return result;
2026 }
2027
2028 /*
2029  * Return: error value if an error occurred setting up the queues or calling
2030  * Identify Device.  0 if these succeeded, even if adding some of the
2031  * namespaces failed.  At the moment, these failures are silent.  TBD which
2032  * failures should be reported.
2033  */
2034 static int nvme_dev_add(struct nvme_dev *dev)
2035 {
2036         struct pci_dev *pdev = dev->pci_dev;
2037         int res;
2038         unsigned nn, i;
2039         struct nvme_ns *ns;
2040         struct nvme_id_ctrl *ctrl;
2041         struct nvme_id_ns *id_ns;
2042         void *mem;
2043         dma_addr_t dma_addr;
2044         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2045
2046         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2047         if (!mem)
2048                 return -ENOMEM;
2049
2050         res = nvme_identify(dev, 0, 1, dma_addr);
2051         if (res) {
2052                 res = -EIO;
2053                 goto out;
2054         }
2055
2056         ctrl = mem;
2057         nn = le32_to_cpup(&ctrl->nn);
2058         dev->oncs = le16_to_cpup(&ctrl->oncs);
2059         dev->abort_limit = ctrl->acl + 1;
2060         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2061         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2062         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2063         if (ctrl->mdts)
2064                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2065         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2066                         (pdev->device == 0x0953) && ctrl->vs[3])
2067                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2068
2069         id_ns = mem;
2070         for (i = 1; i <= nn; i++) {
2071                 res = nvme_identify(dev, i, 0, dma_addr);
2072                 if (res)
2073                         continue;
2074
2075                 if (id_ns->ncap == 0)
2076                         continue;
2077
2078                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2079                                                         dma_addr + 4096, NULL);
2080                 if (res)
2081                         memset(mem + 4096, 0, 4096);
2082
2083                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2084                 if (ns)
2085                         list_add_tail(&ns->list, &dev->namespaces);
2086         }
2087         list_for_each_entry(ns, &dev->namespaces, list)
2088                 add_disk(ns->disk);
2089         res = 0;
2090
2091  out:
2092         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2093         return res;
2094 }
2095
2096 static int nvme_dev_map(struct nvme_dev *dev)
2097 {
2098         int bars, result = -ENOMEM;
2099         struct pci_dev *pdev = dev->pci_dev;
2100
2101         if (pci_enable_device_mem(pdev))
2102                 return result;
2103
2104         dev->entry[0].vector = pdev->irq;
2105         pci_set_master(pdev);
2106         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2107         if (pci_request_selected_regions(pdev, bars, "nvme"))
2108                 goto disable_pci;
2109
2110         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2111             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2112                 goto disable;
2113
2114         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2115         if (!dev->bar)
2116                 goto disable;
2117         if (readl(&dev->bar->csts) == -1) {
2118                 result = -ENODEV;
2119                 goto unmap;
2120         }
2121         dev->db_stride = 1 << NVME_CAP_STRIDE(readq(&dev->bar->cap));
2122         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2123
2124         return 0;
2125
2126  unmap:
2127         iounmap(dev->bar);
2128         dev->bar = NULL;
2129  disable:
2130         pci_release_regions(pdev);
2131  disable_pci:
2132         pci_disable_device(pdev);
2133         return result;
2134 }
2135
2136 static void nvme_dev_unmap(struct nvme_dev *dev)
2137 {
2138         if (dev->pci_dev->msi_enabled)
2139                 pci_disable_msi(dev->pci_dev);
2140         else if (dev->pci_dev->msix_enabled)
2141                 pci_disable_msix(dev->pci_dev);
2142
2143         if (dev->bar) {
2144                 iounmap(dev->bar);
2145                 dev->bar = NULL;
2146                 pci_release_regions(dev->pci_dev);
2147         }
2148
2149         if (pci_is_enabled(dev->pci_dev))
2150                 pci_disable_device(dev->pci_dev);
2151 }
2152
2153 struct nvme_delq_ctx {
2154         struct task_struct *waiter;
2155         struct kthread_worker *worker;
2156         atomic_t refcount;
2157 };
2158
2159 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2160 {
2161         dq->waiter = current;
2162         mb();
2163
2164         for (;;) {
2165                 set_current_state(TASK_KILLABLE);
2166                 if (!atomic_read(&dq->refcount))
2167                         break;
2168                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2169                                         fatal_signal_pending(current)) {
2170                         set_current_state(TASK_RUNNING);
2171
2172                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2173                         nvme_disable_queue(dev, 0);
2174
2175                         send_sig(SIGKILL, dq->worker->task, 1);
2176                         flush_kthread_worker(dq->worker);
2177                         return;
2178                 }
2179         }
2180         set_current_state(TASK_RUNNING);
2181 }
2182
2183 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2184 {
2185         atomic_dec(&dq->refcount);
2186         if (dq->waiter)
2187                 wake_up_process(dq->waiter);
2188 }
2189
2190 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2191 {
2192         atomic_inc(&dq->refcount);
2193         return dq;
2194 }
2195
2196 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2197 {
2198         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2199
2200         nvme_clear_queue(nvmeq);
2201         nvme_put_dq(dq);
2202 }
2203
2204 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2205                                                 kthread_work_func_t fn)
2206 {
2207         struct nvme_command c;
2208
2209         memset(&c, 0, sizeof(c));
2210         c.delete_queue.opcode = opcode;
2211         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2212
2213         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2214         return nvme_submit_admin_cmd_async(nvmeq->dev, &c, &nvmeq->cmdinfo);
2215 }
2216
2217 static void nvme_del_cq_work_handler(struct kthread_work *work)
2218 {
2219         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2220                                                         cmdinfo.work);
2221         nvme_del_queue_end(nvmeq);
2222 }
2223
2224 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2225 {
2226         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2227                                                 nvme_del_cq_work_handler);
2228 }
2229
2230 static void nvme_del_sq_work_handler(struct kthread_work *work)
2231 {
2232         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2233                                                         cmdinfo.work);
2234         int status = nvmeq->cmdinfo.status;
2235
2236         if (!status)
2237                 status = nvme_delete_cq(nvmeq);
2238         if (status)
2239                 nvme_del_queue_end(nvmeq);
2240 }
2241
2242 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2243 {
2244         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2245                                                 nvme_del_sq_work_handler);
2246 }
2247
2248 static void nvme_del_queue_start(struct kthread_work *work)
2249 {
2250         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2251                                                         cmdinfo.work);
2252         allow_signal(SIGKILL);
2253         if (nvme_delete_sq(nvmeq))
2254                 nvme_del_queue_end(nvmeq);
2255 }
2256
2257 static void nvme_disable_io_queues(struct nvme_dev *dev)
2258 {
2259         int i;
2260         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2261         struct nvme_delq_ctx dq;
2262         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2263                                         &worker, "nvme%d", dev->instance);
2264
2265         if (IS_ERR(kworker_task)) {
2266                 dev_err(&dev->pci_dev->dev,
2267                         "Failed to create queue del task\n");
2268                 for (i = dev->queue_count - 1; i > 0; i--)
2269                         nvme_disable_queue(dev, i);
2270                 return;
2271         }
2272
2273         dq.waiter = NULL;
2274         atomic_set(&dq.refcount, 0);
2275         dq.worker = &worker;
2276         for (i = dev->queue_count - 1; i > 0; i--) {
2277                 struct nvme_queue *nvmeq = dev->queues[i];
2278
2279                 if (nvme_suspend_queue(nvmeq))
2280                         continue;
2281                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2282                 nvmeq->cmdinfo.worker = dq.worker;
2283                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2284                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2285         }
2286         nvme_wait_dq(&dq, dev);
2287         kthread_stop(kworker_task);
2288 }
2289
2290 static void nvme_dev_shutdown(struct nvme_dev *dev)
2291 {
2292         int i;
2293
2294         dev->initialized = 0;
2295
2296         spin_lock(&dev_list_lock);
2297         list_del_init(&dev->node);
2298         spin_unlock(&dev_list_lock);
2299
2300         if (!dev->bar || (dev->bar && readl(&dev->bar->csts) == -1)) {
2301                 for (i = dev->queue_count - 1; i >= 0; i--) {
2302                         struct nvme_queue *nvmeq = dev->queues[i];
2303                         nvme_suspend_queue(nvmeq);
2304                         nvme_clear_queue(nvmeq);
2305                 }
2306         } else {
2307                 nvme_disable_io_queues(dev);
2308                 nvme_shutdown_ctrl(dev);
2309                 nvme_disable_queue(dev, 0);
2310         }
2311         nvme_dev_unmap(dev);
2312 }
2313
2314 static void nvme_dev_remove(struct nvme_dev *dev)
2315 {
2316         struct nvme_ns *ns, *next;
2317
2318         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2319                 list_del(&ns->list);
2320                 del_gendisk(ns->disk);
2321                 nvme_ns_free(ns);
2322         }
2323 }
2324
2325 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2326 {
2327         struct device *dmadev = &dev->pci_dev->dev;
2328         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2329                                                 PAGE_SIZE, PAGE_SIZE, 0);
2330         if (!dev->prp_page_pool)
2331                 return -ENOMEM;
2332
2333         /* Optimisation for I/Os between 4k and 128k */
2334         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2335                                                 256, 256, 0);
2336         if (!dev->prp_small_pool) {
2337                 dma_pool_destroy(dev->prp_page_pool);
2338                 return -ENOMEM;
2339         }
2340         return 0;
2341 }
2342
2343 static void nvme_release_prp_pools(struct nvme_dev *dev)
2344 {
2345         dma_pool_destroy(dev->prp_page_pool);
2346         dma_pool_destroy(dev->prp_small_pool);
2347 }
2348
2349 static DEFINE_IDA(nvme_instance_ida);
2350
2351 static int nvme_set_instance(struct nvme_dev *dev)
2352 {
2353         int instance, error;
2354
2355         do {
2356                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2357                         return -ENODEV;
2358
2359                 spin_lock(&dev_list_lock);
2360                 error = ida_get_new(&nvme_instance_ida, &instance);
2361                 spin_unlock(&dev_list_lock);
2362         } while (error == -EAGAIN);
2363
2364         if (error)
2365                 return -ENODEV;
2366
2367         dev->instance = instance;
2368         return 0;
2369 }
2370
2371 static void nvme_release_instance(struct nvme_dev *dev)
2372 {
2373         spin_lock(&dev_list_lock);
2374         ida_remove(&nvme_instance_ida, dev->instance);
2375         spin_unlock(&dev_list_lock);
2376 }
2377
2378 static void nvme_free_dev(struct kref *kref)
2379 {
2380         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2381         kfree(dev->queues);
2382         kfree(dev->entry);
2383         kfree(dev);
2384 }
2385
2386 static int nvme_dev_open(struct inode *inode, struct file *f)
2387 {
2388         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2389                                                                 miscdev);
2390         kref_get(&dev->kref);
2391         f->private_data = dev;
2392         return 0;
2393 }
2394
2395 static int nvme_dev_release(struct inode *inode, struct file *f)
2396 {
2397         struct nvme_dev *dev = f->private_data;
2398         kref_put(&dev->kref, nvme_free_dev);
2399         return 0;
2400 }
2401
2402 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2403 {
2404         struct nvme_dev *dev = f->private_data;
2405         switch (cmd) {
2406         case NVME_IOCTL_ADMIN_CMD:
2407                 return nvme_user_admin_cmd(dev, (void __user *)arg);
2408         default:
2409                 return -ENOTTY;
2410         }
2411 }
2412
2413 static const struct file_operations nvme_dev_fops = {
2414         .owner          = THIS_MODULE,
2415         .open           = nvme_dev_open,
2416         .release        = nvme_dev_release,
2417         .unlocked_ioctl = nvme_dev_ioctl,
2418         .compat_ioctl   = nvme_dev_ioctl,
2419 };
2420
2421 static int nvme_dev_start(struct nvme_dev *dev)
2422 {
2423         int result;
2424
2425         result = nvme_dev_map(dev);
2426         if (result)
2427                 return result;
2428
2429         result = nvme_configure_admin_queue(dev);
2430         if (result)
2431                 goto unmap;
2432
2433         spin_lock(&dev_list_lock);
2434         list_add(&dev->node, &dev_list);
2435         spin_unlock(&dev_list_lock);
2436
2437         result = nvme_setup_io_queues(dev);
2438         if (result && result != -EBUSY)
2439                 goto disable;
2440
2441         return result;
2442
2443  disable:
2444         spin_lock(&dev_list_lock);
2445         list_del_init(&dev->node);
2446         spin_unlock(&dev_list_lock);
2447  unmap:
2448         nvme_dev_unmap(dev);
2449         return result;
2450 }
2451
2452 static int nvme_remove_dead_ctrl(void *arg)
2453 {
2454         struct nvme_dev *dev = (struct nvme_dev *)arg;
2455         struct pci_dev *pdev = dev->pci_dev;
2456
2457         if (pci_get_drvdata(pdev))
2458                 pci_stop_and_remove_bus_device(pdev);
2459         kref_put(&dev->kref, nvme_free_dev);
2460         return 0;
2461 }
2462
2463 static void nvme_remove_disks(struct work_struct *ws)
2464 {
2465         int i;
2466         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2467
2468         nvme_dev_remove(dev);
2469         spin_lock(&dev_list_lock);
2470         for (i = dev->queue_count - 1; i > 0; i--) {
2471                 BUG_ON(!dev->queues[i] || !dev->queues[i]->q_suspended);
2472                 nvme_free_queue(dev->queues[i]);
2473                 dev->queue_count--;
2474                 dev->queues[i] = NULL;
2475         }
2476         spin_unlock(&dev_list_lock);
2477 }
2478
2479 static int nvme_dev_resume(struct nvme_dev *dev)
2480 {
2481         int ret;
2482
2483         ret = nvme_dev_start(dev);
2484         if (ret && ret != -EBUSY)
2485                 return ret;
2486         if (ret == -EBUSY) {
2487                 spin_lock(&dev_list_lock);
2488                 INIT_WORK(&dev->reset_work, nvme_remove_disks);
2489                 queue_work(nvme_workq, &dev->reset_work);
2490                 spin_unlock(&dev_list_lock);
2491         }
2492         dev->initialized = 1;
2493         return 0;
2494 }
2495
2496 static void nvme_dev_reset(struct nvme_dev *dev)
2497 {
2498         nvme_dev_shutdown(dev);
2499         if (nvme_dev_resume(dev)) {
2500                 dev_err(&dev->pci_dev->dev, "Device failed to resume\n");
2501                 kref_get(&dev->kref);
2502                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2503                                                         dev->instance))) {
2504                         dev_err(&dev->pci_dev->dev,
2505                                 "Failed to start controller remove task\n");
2506                         kref_put(&dev->kref, nvme_free_dev);
2507                 }
2508         }
2509 }
2510
2511 static void nvme_reset_failed_dev(struct work_struct *ws)
2512 {
2513         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2514         nvme_dev_reset(dev);
2515 }
2516
2517 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2518 {
2519         int result = -ENOMEM;
2520         struct nvme_dev *dev;
2521
2522         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
2523         if (!dev)
2524                 return -ENOMEM;
2525         dev->entry = kcalloc(num_possible_cpus(), sizeof(*dev->entry),
2526                                                                 GFP_KERNEL);
2527         if (!dev->entry)
2528                 goto free;
2529         dev->queues = kcalloc(num_possible_cpus() + 1, sizeof(void *),
2530                                                                 GFP_KERNEL);
2531         if (!dev->queues)
2532                 goto free;
2533
2534         INIT_LIST_HEAD(&dev->namespaces);
2535         dev->pci_dev = pdev;
2536         pci_set_drvdata(pdev, dev);
2537         result = nvme_set_instance(dev);
2538         if (result)
2539                 goto free;
2540
2541         result = nvme_setup_prp_pools(dev);
2542         if (result)
2543                 goto release;
2544
2545         result = nvme_dev_start(dev);
2546         if (result) {
2547                 if (result == -EBUSY)
2548                         goto create_cdev;
2549                 goto release_pools;
2550         }
2551
2552         result = nvme_dev_add(dev);
2553         if (result)
2554                 goto shutdown;
2555
2556  create_cdev:
2557         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2558         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2559         dev->miscdev.parent = &pdev->dev;
2560         dev->miscdev.name = dev->name;
2561         dev->miscdev.fops = &nvme_dev_fops;
2562         result = misc_register(&dev->miscdev);
2563         if (result)
2564                 goto remove;
2565
2566         dev->initialized = 1;
2567         kref_init(&dev->kref);
2568         return 0;
2569
2570  remove:
2571         nvme_dev_remove(dev);
2572  shutdown:
2573         nvme_dev_shutdown(dev);
2574  release_pools:
2575         nvme_free_queues(dev);
2576         nvme_release_prp_pools(dev);
2577  release:
2578         nvme_release_instance(dev);
2579  free:
2580         kfree(dev->queues);
2581         kfree(dev->entry);
2582         kfree(dev);
2583         return result;
2584 }
2585
2586 static void nvme_remove(struct pci_dev *pdev)
2587 {
2588         struct nvme_dev *dev = pci_get_drvdata(pdev);
2589
2590         spin_lock(&dev_list_lock);
2591         list_del_init(&dev->node);
2592         spin_unlock(&dev_list_lock);
2593
2594         pci_set_drvdata(pdev, NULL);
2595         flush_work(&dev->reset_work);
2596         misc_deregister(&dev->miscdev);
2597         nvme_dev_remove(dev);
2598         nvme_dev_shutdown(dev);
2599         nvme_free_queues(dev);
2600         nvme_release_instance(dev);
2601         nvme_release_prp_pools(dev);
2602         kref_put(&dev->kref, nvme_free_dev);
2603 }
2604
2605 /* These functions are yet to be implemented */
2606 #define nvme_error_detected NULL
2607 #define nvme_dump_registers NULL
2608 #define nvme_link_reset NULL
2609 #define nvme_slot_reset NULL
2610 #define nvme_error_resume NULL
2611
2612 static int nvme_suspend(struct device *dev)
2613 {
2614         struct pci_dev *pdev = to_pci_dev(dev);
2615         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2616
2617         nvme_dev_shutdown(ndev);
2618         return 0;
2619 }
2620
2621 static int nvme_resume(struct device *dev)
2622 {
2623         struct pci_dev *pdev = to_pci_dev(dev);
2624         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2625
2626         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2627                 INIT_WORK(&ndev->reset_work, nvme_reset_failed_dev);
2628                 queue_work(nvme_workq, &ndev->reset_work);
2629         }
2630         return 0;
2631 }
2632
2633 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2634
2635 static const struct pci_error_handlers nvme_err_handler = {
2636         .error_detected = nvme_error_detected,
2637         .mmio_enabled   = nvme_dump_registers,
2638         .link_reset     = nvme_link_reset,
2639         .slot_reset     = nvme_slot_reset,
2640         .resume         = nvme_error_resume,
2641 };
2642
2643 /* Move to pci_ids.h later */
2644 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2645
2646 static DEFINE_PCI_DEVICE_TABLE(nvme_id_table) = {
2647         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2648         { 0, }
2649 };
2650 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2651
2652 static struct pci_driver nvme_driver = {
2653         .name           = "nvme",
2654         .id_table       = nvme_id_table,
2655         .probe          = nvme_probe,
2656         .remove         = nvme_remove,
2657         .driver         = {
2658                 .pm     = &nvme_dev_pm_ops,
2659         },
2660         .err_handler    = &nvme_err_handler,
2661 };
2662
2663 static int __init nvme_init(void)
2664 {
2665         int result;
2666
2667         nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2668         if (IS_ERR(nvme_thread))
2669                 return PTR_ERR(nvme_thread);
2670
2671         result = -ENOMEM;
2672         nvme_workq = create_singlethread_workqueue("nvme");
2673         if (!nvme_workq)
2674                 goto kill_kthread;
2675
2676         result = register_blkdev(nvme_major, "nvme");
2677         if (result < 0)
2678                 goto kill_workq;
2679         else if (result > 0)
2680                 nvme_major = result;
2681
2682         result = pci_register_driver(&nvme_driver);
2683         if (result)
2684                 goto unregister_blkdev;
2685         return 0;
2686
2687  unregister_blkdev:
2688         unregister_blkdev(nvme_major, "nvme");
2689  kill_workq:
2690         destroy_workqueue(nvme_workq);
2691  kill_kthread:
2692         kthread_stop(nvme_thread);
2693         return result;
2694 }
2695
2696 static void __exit nvme_exit(void)
2697 {
2698         pci_unregister_driver(&nvme_driver);
2699         unregister_blkdev(nvme_major, "nvme");
2700         destroy_workqueue(nvme_workq);
2701         kthread_stop(nvme_thread);
2702 }
2703
2704 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2705 MODULE_LICENSE("GPL");
2706 MODULE_VERSION("0.8");
2707 module_init(nvme_init);
2708 module_exit(nvme_exit);