2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #define NVME_MINORS (1U << MINORBITS)
46 #define NVME_Q_DEPTH 1024
47 #define NVME_AQ_DEPTH 64
48 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT (admin_timeout * HZ)
51 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
52 #define IOD_TIMEOUT (retry_time * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char retry_time = 30;
63 module_param(retry_time, byte, 0644);
64 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
66 static unsigned char shutdown_timeout = 5;
67 module_param(shutdown_timeout, byte, 0644);
68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
70 static int nvme_major;
71 module_param(nvme_major, int, 0);
73 static int nvme_char_major;
74 module_param(nvme_char_major, int, 0);
76 static int use_threaded_interrupts;
77 module_param(use_threaded_interrupts, int, 0);
79 static DEFINE_SPINLOCK(dev_list_lock);
80 static LIST_HEAD(dev_list);
81 static struct task_struct *nvme_thread;
82 static struct workqueue_struct *nvme_workq;
83 static wait_queue_head_t nvme_kthread_wait;
84 static struct notifier_block nvme_nb;
86 static struct class *nvme_class;
88 static void nvme_reset_failed_dev(struct work_struct *ws);
89 static int nvme_process_cq(struct nvme_queue *nvmeq);
91 struct async_cmd_info {
92 struct kthread_work work;
93 struct kthread_worker *worker;
101 * An NVM Express queue. Each device has at least two (one for admin
102 * commands and one for I/O commands).
105 struct llist_node node;
106 struct device *q_dmadev;
107 struct nvme_dev *dev;
108 char irqname[24]; /* nvme4294967295-65535\0 */
110 struct nvme_command *sq_cmds;
111 volatile struct nvme_completion *cqes;
112 dma_addr_t sq_dma_addr;
113 dma_addr_t cq_dma_addr;
123 struct async_cmd_info cmdinfo;
124 struct blk_mq_hw_ctx *hctx;
128 * Check we didin't inadvertently grow the command struct
130 static inline void _nvme_check_size(void)
132 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
141 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
142 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
147 struct nvme_completion *);
149 struct nvme_cmd_info {
150 nvme_completion_fn fn;
153 struct nvme_queue *nvmeq;
154 struct nvme_iod iod[0];
158 * Max size of iod being embedded in the request payload
160 #define NVME_INT_PAGES 2
161 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
164 * Will slightly overestimate the number of pages needed. This is OK
165 * as it only leads to a small amount of wasted memory for the lifetime of
168 static int nvme_npages(unsigned size, struct nvme_dev *dev)
170 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
171 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
174 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
176 unsigned int ret = sizeof(struct nvme_cmd_info);
178 ret += sizeof(struct nvme_iod);
179 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
180 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
185 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
186 unsigned int hctx_idx)
188 struct nvme_dev *dev = data;
189 struct nvme_queue *nvmeq = dev->queues[0];
191 WARN_ON(nvmeq->hctx);
193 hctx->driver_data = nvmeq;
197 static int nvme_admin_init_request(void *data, struct request *req,
198 unsigned int hctx_idx, unsigned int rq_idx,
199 unsigned int numa_node)
201 struct nvme_dev *dev = data;
202 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
203 struct nvme_queue *nvmeq = dev->queues[0];
210 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
212 struct nvme_queue *nvmeq = hctx->driver_data;
217 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
218 unsigned int hctx_idx)
220 struct nvme_dev *dev = data;
221 struct nvme_queue *nvmeq = dev->queues[
222 (hctx_idx % dev->queue_count) + 1];
227 /* nvmeq queues are shared between namespaces. We assume here that
228 * blk-mq map the tags so they match up with the nvme queue tags. */
229 WARN_ON(nvmeq->hctx->tags != hctx->tags);
231 hctx->driver_data = nvmeq;
235 static int nvme_init_request(void *data, struct request *req,
236 unsigned int hctx_idx, unsigned int rq_idx,
237 unsigned int numa_node)
239 struct nvme_dev *dev = data;
240 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
241 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
249 nvme_completion_fn handler)
254 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
257 static void *iod_get_private(struct nvme_iod *iod)
259 return (void *) (iod->private & ~0x1UL);
263 * If bit 0 is set, the iod is embedded in the request payload.
265 static bool iod_should_kfree(struct nvme_iod *iod)
267 return (iod->private & 0x01) == 0;
270 /* Special values must be less than 0x1000 */
271 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
272 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
273 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
274 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
277 struct nvme_completion *cqe)
279 if (ctx == CMD_CTX_CANCELLED)
281 if (ctx == CMD_CTX_COMPLETED) {
282 dev_warn(nvmeq->q_dmadev,
283 "completed id %d twice on queue %d\n",
284 cqe->command_id, le16_to_cpup(&cqe->sq_id));
287 if (ctx == CMD_CTX_INVALID) {
288 dev_warn(nvmeq->q_dmadev,
289 "invalid id %d completed on queue %d\n",
290 cqe->command_id, le16_to_cpup(&cqe->sq_id));
293 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
303 cmd->fn = special_completion;
304 cmd->ctx = CMD_CTX_CANCELLED;
308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
309 struct nvme_completion *cqe)
311 struct request *req = ctx;
313 u32 result = le32_to_cpup(&cqe->result);
314 u16 status = le16_to_cpup(&cqe->status) >> 1;
316 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
317 ++nvmeq->dev->event_limit;
318 if (status == NVME_SC_SUCCESS)
319 dev_warn(nvmeq->q_dmadev,
320 "async event result %08x\n", result);
322 blk_mq_free_hctx_request(nvmeq->hctx, req);
325 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
326 struct nvme_completion *cqe)
328 struct request *req = ctx;
330 u16 status = le16_to_cpup(&cqe->status) >> 1;
331 u32 result = le32_to_cpup(&cqe->result);
333 blk_mq_free_hctx_request(nvmeq->hctx, req);
335 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
336 ++nvmeq->dev->abort_limit;
339 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
340 struct nvme_completion *cqe)
342 struct async_cmd_info *cmdinfo = ctx;
343 cmdinfo->result = le32_to_cpup(&cqe->result);
344 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
345 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
346 blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
349 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
352 struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
353 struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
355 return blk_mq_rq_to_pdu(req);
359 * Called with local interrupts disabled and the q_lock held. May not sleep.
361 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
362 nvme_completion_fn *fn)
364 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
366 if (tag >= nvmeq->q_depth) {
367 *fn = special_completion;
368 return CMD_CTX_INVALID;
373 cmd->fn = special_completion;
374 cmd->ctx = CMD_CTX_COMPLETED;
379 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
380 * @nvmeq: The queue to use
381 * @cmd: The command to send
383 * Safe to use from interrupt context
385 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
387 u16 tail = nvmeq->sq_tail;
389 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
390 if (++tail == nvmeq->q_depth)
392 writel(tail, nvmeq->q_db);
393 nvmeq->sq_tail = tail;
398 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
402 spin_lock_irqsave(&nvmeq->q_lock, flags);
403 ret = __nvme_submit_cmd(nvmeq, cmd);
404 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
408 static __le64 **iod_list(struct nvme_iod *iod)
410 return ((void *)iod) + iod->offset;
413 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
414 unsigned nseg, unsigned long private)
416 iod->private = private;
417 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
419 iod->length = nbytes;
423 static struct nvme_iod *
424 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
425 unsigned long priv, gfp_t gfp)
427 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
428 sizeof(__le64 *) * nvme_npages(bytes, dev) +
429 sizeof(struct scatterlist) * nseg, gfp);
432 iod_init(iod, bytes, nseg, priv);
437 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
440 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
441 sizeof(struct nvme_dsm_range);
442 unsigned long mask = 0;
443 struct nvme_iod *iod;
445 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
446 size <= NVME_INT_BYTES(dev)) {
447 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
451 iod_init(iod, size, rq->nr_phys_segments,
452 (unsigned long) rq | 0x01);
456 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
457 (unsigned long) rq, gfp);
460 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
462 const int last_prp = dev->page_size / 8 - 1;
464 __le64 **list = iod_list(iod);
465 dma_addr_t prp_dma = iod->first_dma;
467 if (iod->npages == 0)
468 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
469 for (i = 0; i < iod->npages; i++) {
470 __le64 *prp_list = list[i];
471 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
472 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
473 prp_dma = next_prp_dma;
476 if (iod_should_kfree(iod))
480 static int nvme_error_status(u16 status)
482 switch (status & 0x7ff) {
483 case NVME_SC_SUCCESS:
485 case NVME_SC_CAP_EXCEEDED:
492 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
494 if (be32_to_cpu(pi->ref_tag) == v)
495 pi->ref_tag = cpu_to_be32(p);
498 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
500 if (be32_to_cpu(pi->ref_tag) == p)
501 pi->ref_tag = cpu_to_be32(v);
505 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
507 * The virtual start sector is the one that was originally submitted by the
508 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
509 * start sector may be different. Remap protection information to match the
510 * physical LBA on writes, and back to the original seed on reads.
512 * Type 0 and 3 do not have a ref tag, so no remapping required.
514 static void nvme_dif_remap(struct request *req,
515 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
517 struct nvme_ns *ns = req->rq_disk->private_data;
518 struct bio_integrity_payload *bip;
519 struct t10_pi_tuple *pi;
521 u32 i, nlb, ts, phys, virt;
523 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
526 bip = bio_integrity(req->bio);
530 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
535 virt = bip_get_seed(bip);
536 phys = nvme_block_nr(ns, blk_rq_pos(req));
537 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
538 ts = ns->disk->integrity->tuple_size;
540 for (i = 0; i < nlb; i++, virt++, phys++) {
541 pi = (struct t10_pi_tuple *)p;
542 dif_swap(phys, virt, pi);
548 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
549 struct nvme_completion *cqe)
551 struct nvme_iod *iod = ctx;
552 struct request *req = iod_get_private(iod);
553 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
555 u16 status = le16_to_cpup(&cqe->status) >> 1;
557 if (unlikely(status)) {
558 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
559 && (jiffies - req->start_time) < req->timeout) {
562 blk_mq_requeue_request(req);
563 spin_lock_irqsave(req->q->queue_lock, flags);
564 if (!blk_queue_stopped(req->q))
565 blk_mq_kick_requeue_list(req->q);
566 spin_unlock_irqrestore(req->q->queue_lock, flags);
569 req->errors = nvme_error_status(status);
574 dev_warn(&nvmeq->dev->pci_dev->dev,
575 "completing aborted command with status:%04x\n",
579 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
580 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
581 if (blk_integrity_rq(req)) {
582 if (!rq_data_dir(req))
583 nvme_dif_remap(req, nvme_dif_complete);
584 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->meta_sg, 1,
585 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
588 nvme_free_iod(nvmeq->dev, iod);
590 blk_mq_complete_request(req);
593 /* length is in bytes. gfp flags indicates whether we may sleep. */
594 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
597 struct dma_pool *pool;
598 int length = total_len;
599 struct scatterlist *sg = iod->sg;
600 int dma_len = sg_dma_len(sg);
601 u64 dma_addr = sg_dma_address(sg);
602 int offset = offset_in_page(dma_addr);
604 __le64 **list = iod_list(iod);
607 u32 page_size = dev->page_size;
609 length -= (page_size - offset);
613 dma_len -= (page_size - offset);
615 dma_addr += (page_size - offset);
618 dma_addr = sg_dma_address(sg);
619 dma_len = sg_dma_len(sg);
622 if (length <= page_size) {
623 iod->first_dma = dma_addr;
627 nprps = DIV_ROUND_UP(length, page_size);
628 if (nprps <= (256 / 8)) {
629 pool = dev->prp_small_pool;
632 pool = dev->prp_page_pool;
636 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
638 iod->first_dma = dma_addr;
640 return (total_len - length) + page_size;
643 iod->first_dma = prp_dma;
646 if (i == page_size >> 3) {
647 __le64 *old_prp_list = prp_list;
648 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
650 return total_len - length;
651 list[iod->npages++] = prp_list;
652 prp_list[0] = old_prp_list[i - 1];
653 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
656 prp_list[i++] = cpu_to_le64(dma_addr);
657 dma_len -= page_size;
658 dma_addr += page_size;
666 dma_addr = sg_dma_address(sg);
667 dma_len = sg_dma_len(sg);
674 * We reuse the small pool to allocate the 16-byte range here as it is not
675 * worth having a special pool for these or additional cases to handle freeing
678 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
679 struct request *req, struct nvme_iod *iod)
681 struct nvme_dsm_range *range =
682 (struct nvme_dsm_range *)iod_list(iod)[0];
683 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
685 range->cattr = cpu_to_le32(0);
686 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
687 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
689 memset(cmnd, 0, sizeof(*cmnd));
690 cmnd->dsm.opcode = nvme_cmd_dsm;
691 cmnd->dsm.command_id = req->tag;
692 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
693 cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
695 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
697 if (++nvmeq->sq_tail == nvmeq->q_depth)
699 writel(nvmeq->sq_tail, nvmeq->q_db);
702 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
705 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
707 memset(cmnd, 0, sizeof(*cmnd));
708 cmnd->common.opcode = nvme_cmd_flush;
709 cmnd->common.command_id = cmdid;
710 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
712 if (++nvmeq->sq_tail == nvmeq->q_depth)
714 writel(nvmeq->sq_tail, nvmeq->q_db);
717 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
720 struct request *req = iod_get_private(iod);
721 struct nvme_command *cmnd;
725 if (req->cmd_flags & REQ_FUA)
726 control |= NVME_RW_FUA;
727 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
728 control |= NVME_RW_LR;
730 if (req->cmd_flags & REQ_RAHEAD)
731 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
733 cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
734 memset(cmnd, 0, sizeof(*cmnd));
736 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
737 cmnd->rw.command_id = req->tag;
738 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
739 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
740 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
741 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
742 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
744 if (blk_integrity_rq(req)) {
745 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
746 switch (ns->pi_type) {
747 case NVME_NS_DPS_PI_TYPE3:
748 control |= NVME_RW_PRINFO_PRCHK_GUARD;
750 case NVME_NS_DPS_PI_TYPE1:
751 case NVME_NS_DPS_PI_TYPE2:
752 control |= NVME_RW_PRINFO_PRCHK_GUARD |
753 NVME_RW_PRINFO_PRCHK_REF;
754 cmnd->rw.reftag = cpu_to_le32(
755 nvme_block_nr(ns, blk_rq_pos(req)));
759 control |= NVME_RW_PRINFO_PRACT;
761 cmnd->rw.control = cpu_to_le16(control);
762 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
764 if (++nvmeq->sq_tail == nvmeq->q_depth)
766 writel(nvmeq->sq_tail, nvmeq->q_db);
771 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
772 const struct blk_mq_queue_data *bd)
774 struct nvme_ns *ns = hctx->queue->queuedata;
775 struct nvme_queue *nvmeq = hctx->driver_data;
776 struct request *req = bd->rq;
777 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
778 struct nvme_iod *iod;
779 enum dma_data_direction dma_dir;
782 * If formated with metadata, require the block layer provide a buffer
783 * unless this namespace is formated such that the metadata can be
784 * stripped/generated by the controller with PRACT=1.
786 if (ns->ms && !blk_integrity_rq(req)) {
787 if (!(ns->pi_type && ns->ms == 8)) {
788 req->errors = -EFAULT;
789 blk_mq_complete_request(req);
790 return BLK_MQ_RQ_QUEUE_OK;
794 iod = nvme_alloc_iod(req, ns->dev, GFP_ATOMIC);
796 return BLK_MQ_RQ_QUEUE_BUSY;
798 if (req->cmd_flags & REQ_DISCARD) {
801 * We reuse the small pool to allocate the 16-byte range here
802 * as it is not worth having a special pool for these or
803 * additional cases to handle freeing the iod.
805 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
810 iod_list(iod)[0] = (__le64 *)range;
812 } else if (req->nr_phys_segments) {
813 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
815 sg_init_table(iod->sg, req->nr_phys_segments);
816 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
820 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
823 if (blk_rq_bytes(req) !=
824 nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
825 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg,
826 iod->nents, dma_dir);
829 if (blk_integrity_rq(req)) {
830 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
833 sg_init_table(iod->meta_sg, 1);
834 if (blk_rq_map_integrity_sg(
835 req->q, req->bio, iod->meta_sg) != 1)
838 if (rq_data_dir(req))
839 nvme_dif_remap(req, nvme_dif_prep);
841 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
846 nvme_set_info(cmd, iod, req_completion);
847 spin_lock_irq(&nvmeq->q_lock);
848 if (req->cmd_flags & REQ_DISCARD)
849 nvme_submit_discard(nvmeq, ns, req, iod);
850 else if (req->cmd_flags & REQ_FLUSH)
851 nvme_submit_flush(nvmeq, ns, req->tag);
853 nvme_submit_iod(nvmeq, iod, ns);
855 nvme_process_cq(nvmeq);
856 spin_unlock_irq(&nvmeq->q_lock);
857 return BLK_MQ_RQ_QUEUE_OK;
860 nvme_free_iod(nvmeq->dev, iod);
861 return BLK_MQ_RQ_QUEUE_ERROR;
863 nvme_free_iod(nvmeq->dev, iod);
864 return BLK_MQ_RQ_QUEUE_BUSY;
867 static int nvme_process_cq(struct nvme_queue *nvmeq)
871 head = nvmeq->cq_head;
872 phase = nvmeq->cq_phase;
876 nvme_completion_fn fn;
877 struct nvme_completion cqe = nvmeq->cqes[head];
878 if ((le16_to_cpu(cqe.status) & 1) != phase)
880 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
881 if (++head == nvmeq->q_depth) {
885 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
886 fn(nvmeq, ctx, &cqe);
889 /* If the controller ignores the cq head doorbell and continuously
890 * writes to the queue, it is theoretically possible to wrap around
891 * the queue twice and mistakenly return IRQ_NONE. Linux only
892 * requires that 0.1% of your interrupts are handled, so this isn't
895 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
898 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
899 nvmeq->cq_head = head;
900 nvmeq->cq_phase = phase;
906 /* Admin queue isn't initialized as a request queue. If at some point this
907 * happens anyway, make sure to notify the user */
908 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
909 const struct blk_mq_queue_data *bd)
912 return BLK_MQ_RQ_QUEUE_ERROR;
915 static irqreturn_t nvme_irq(int irq, void *data)
918 struct nvme_queue *nvmeq = data;
919 spin_lock(&nvmeq->q_lock);
920 nvme_process_cq(nvmeq);
921 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
923 spin_unlock(&nvmeq->q_lock);
927 static irqreturn_t nvme_irq_check(int irq, void *data)
929 struct nvme_queue *nvmeq = data;
930 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
931 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
933 return IRQ_WAKE_THREAD;
936 static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
939 spin_lock_irq(&nvmeq->q_lock);
940 cancel_cmd_info(cmd_info, NULL);
941 spin_unlock_irq(&nvmeq->q_lock);
944 struct sync_cmd_info {
945 struct task_struct *task;
950 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
951 struct nvme_completion *cqe)
953 struct sync_cmd_info *cmdinfo = ctx;
954 cmdinfo->result = le32_to_cpup(&cqe->result);
955 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
956 wake_up_process(cmdinfo->task);
960 * Returns 0 on success. If the result is negative, it's a Linux error code;
961 * if the result is positive, it's an NVM Express status code
963 static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
964 u32 *result, unsigned timeout)
967 struct sync_cmd_info cmdinfo;
968 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
969 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
971 cmdinfo.task = current;
972 cmdinfo.status = -EINTR;
974 cmd->common.command_id = req->tag;
976 nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
978 set_current_state(TASK_KILLABLE);
979 ret = nvme_submit_cmd(nvmeq, cmd);
981 nvme_finish_cmd(nvmeq, req->tag, NULL);
982 set_current_state(TASK_RUNNING);
984 ret = schedule_timeout(timeout);
987 * Ensure that sync_completion has either run, or that it will
990 nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
993 * We never got the completion
995 if (cmdinfo.status == -EINTR)
999 *result = cmdinfo.result;
1001 return cmdinfo.status;
1004 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1006 struct nvme_queue *nvmeq = dev->queues[0];
1007 struct nvme_command c;
1008 struct nvme_cmd_info *cmd_info;
1009 struct request *req;
1011 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false);
1013 return PTR_ERR(req);
1015 req->cmd_flags |= REQ_NO_TIMEOUT;
1016 cmd_info = blk_mq_rq_to_pdu(req);
1017 nvme_set_info(cmd_info, req, async_req_completion);
1019 memset(&c, 0, sizeof(c));
1020 c.common.opcode = nvme_admin_async_event;
1021 c.common.command_id = req->tag;
1023 return __nvme_submit_cmd(nvmeq, &c);
1026 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1027 struct nvme_command *cmd,
1028 struct async_cmd_info *cmdinfo, unsigned timeout)
1030 struct nvme_queue *nvmeq = dev->queues[0];
1031 struct request *req;
1032 struct nvme_cmd_info *cmd_rq;
1034 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1036 return PTR_ERR(req);
1038 req->timeout = timeout;
1039 cmd_rq = blk_mq_rq_to_pdu(req);
1041 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1042 cmdinfo->status = -EINTR;
1044 cmd->common.command_id = req->tag;
1046 return nvme_submit_cmd(nvmeq, cmd);
1049 static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
1050 u32 *result, unsigned timeout)
1053 struct request *req;
1055 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1057 return PTR_ERR(req);
1058 res = nvme_submit_sync_cmd(req, cmd, result, timeout);
1059 blk_mq_free_request(req);
1063 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
1066 return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT);
1069 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1070 struct nvme_command *cmd, u32 *result)
1073 struct request *req;
1075 req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT),
1078 return PTR_ERR(req);
1079 res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT);
1080 blk_mq_free_request(req);
1084 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1086 struct nvme_command c;
1088 memset(&c, 0, sizeof(c));
1089 c.delete_queue.opcode = opcode;
1090 c.delete_queue.qid = cpu_to_le16(id);
1092 return nvme_submit_admin_cmd(dev, &c, NULL);
1095 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1096 struct nvme_queue *nvmeq)
1098 struct nvme_command c;
1099 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1101 memset(&c, 0, sizeof(c));
1102 c.create_cq.opcode = nvme_admin_create_cq;
1103 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1104 c.create_cq.cqid = cpu_to_le16(qid);
1105 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1106 c.create_cq.cq_flags = cpu_to_le16(flags);
1107 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1109 return nvme_submit_admin_cmd(dev, &c, NULL);
1112 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1113 struct nvme_queue *nvmeq)
1115 struct nvme_command c;
1116 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1118 memset(&c, 0, sizeof(c));
1119 c.create_sq.opcode = nvme_admin_create_sq;
1120 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1121 c.create_sq.sqid = cpu_to_le16(qid);
1122 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1123 c.create_sq.sq_flags = cpu_to_le16(flags);
1124 c.create_sq.cqid = cpu_to_le16(qid);
1126 return nvme_submit_admin_cmd(dev, &c, NULL);
1129 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1131 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1134 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1136 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1139 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1140 dma_addr_t dma_addr)
1142 struct nvme_command c;
1144 memset(&c, 0, sizeof(c));
1145 c.identify.opcode = nvme_admin_identify;
1146 c.identify.nsid = cpu_to_le32(nsid);
1147 c.identify.prp1 = cpu_to_le64(dma_addr);
1148 c.identify.cns = cpu_to_le32(cns);
1150 return nvme_submit_admin_cmd(dev, &c, NULL);
1153 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1154 dma_addr_t dma_addr, u32 *result)
1156 struct nvme_command c;
1158 memset(&c, 0, sizeof(c));
1159 c.features.opcode = nvme_admin_get_features;
1160 c.features.nsid = cpu_to_le32(nsid);
1161 c.features.prp1 = cpu_to_le64(dma_addr);
1162 c.features.fid = cpu_to_le32(fid);
1164 return nvme_submit_admin_cmd(dev, &c, result);
1167 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1168 dma_addr_t dma_addr, u32 *result)
1170 struct nvme_command c;
1172 memset(&c, 0, sizeof(c));
1173 c.features.opcode = nvme_admin_set_features;
1174 c.features.prp1 = cpu_to_le64(dma_addr);
1175 c.features.fid = cpu_to_le32(fid);
1176 c.features.dword11 = cpu_to_le32(dword11);
1178 return nvme_submit_admin_cmd(dev, &c, result);
1182 * nvme_abort_req - Attempt aborting a request
1184 * Schedule controller reset if the command was already aborted once before and
1185 * still hasn't been returned to the driver, or if this is the admin queue.
1187 static void nvme_abort_req(struct request *req)
1189 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1190 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1191 struct nvme_dev *dev = nvmeq->dev;
1192 struct request *abort_req;
1193 struct nvme_cmd_info *abort_cmd;
1194 struct nvme_command cmd;
1196 if (!nvmeq->qid || cmd_rq->aborted) {
1197 unsigned long flags;
1199 spin_lock_irqsave(&dev_list_lock, flags);
1200 if (work_busy(&dev->reset_work))
1202 list_del_init(&dev->node);
1203 dev_warn(&dev->pci_dev->dev,
1204 "I/O %d QID %d timeout, reset controller\n",
1205 req->tag, nvmeq->qid);
1206 dev->reset_workfn = nvme_reset_failed_dev;
1207 queue_work(nvme_workq, &dev->reset_work);
1209 spin_unlock_irqrestore(&dev_list_lock, flags);
1213 if (!dev->abort_limit)
1216 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1218 if (IS_ERR(abort_req))
1221 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1222 nvme_set_info(abort_cmd, abort_req, abort_completion);
1224 memset(&cmd, 0, sizeof(cmd));
1225 cmd.abort.opcode = nvme_admin_abort_cmd;
1226 cmd.abort.cid = req->tag;
1227 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1228 cmd.abort.command_id = abort_req->tag;
1231 cmd_rq->aborted = 1;
1233 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1235 if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1236 dev_warn(nvmeq->q_dmadev,
1237 "Could not abort I/O %d QID %d",
1238 req->tag, nvmeq->qid);
1239 blk_mq_free_request(abort_req);
1243 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1244 struct request *req, void *data, bool reserved)
1246 struct nvme_queue *nvmeq = data;
1248 nvme_completion_fn fn;
1249 struct nvme_cmd_info *cmd;
1250 struct nvme_completion cqe;
1252 if (!blk_mq_request_started(req))
1255 cmd = blk_mq_rq_to_pdu(req);
1257 if (cmd->ctx == CMD_CTX_CANCELLED)
1260 if (blk_queue_dying(req->q))
1261 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1263 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1266 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1267 req->tag, nvmeq->qid);
1268 ctx = cancel_cmd_info(cmd, &fn);
1269 fn(nvmeq, ctx, &cqe);
1272 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1274 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1275 struct nvme_queue *nvmeq = cmd->nvmeq;
1277 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1279 spin_lock_irq(&nvmeq->q_lock);
1280 nvme_abort_req(req);
1281 spin_unlock_irq(&nvmeq->q_lock);
1284 * The aborted req will be completed on receiving the abort req.
1285 * We enable the timer again. If hit twice, it'll cause a device reset,
1286 * as the device then is in a faulty state.
1288 return BLK_EH_RESET_TIMER;
1291 static void nvme_free_queue(struct nvme_queue *nvmeq)
1293 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1294 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1295 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1296 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1300 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1304 for (i = dev->queue_count - 1; i >= lowest; i--) {
1305 struct nvme_queue *nvmeq = dev->queues[i];
1307 dev->queues[i] = NULL;
1308 nvme_free_queue(nvmeq);
1313 * nvme_suspend_queue - put queue into suspended state
1314 * @nvmeq - queue to suspend
1316 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1320 spin_lock_irq(&nvmeq->q_lock);
1321 if (nvmeq->cq_vector == -1) {
1322 spin_unlock_irq(&nvmeq->q_lock);
1325 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1326 nvmeq->dev->online_queues--;
1327 nvmeq->cq_vector = -1;
1328 spin_unlock_irq(&nvmeq->q_lock);
1330 irq_set_affinity_hint(vector, NULL);
1331 free_irq(vector, nvmeq);
1336 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1338 struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1340 spin_lock_irq(&nvmeq->q_lock);
1341 if (hctx && hctx->tags)
1342 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1343 spin_unlock_irq(&nvmeq->q_lock);
1346 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1348 struct nvme_queue *nvmeq = dev->queues[qid];
1352 if (nvme_suspend_queue(nvmeq))
1355 /* Don't tell the adapter to delete the admin queue.
1356 * Don't tell a removed adapter to delete IO queues. */
1357 if (qid && readl(&dev->bar->csts) != -1) {
1358 adapter_delete_sq(dev, qid);
1359 adapter_delete_cq(dev, qid);
1361 if (!qid && dev->admin_q)
1362 blk_mq_freeze_queue_start(dev->admin_q);
1364 spin_lock_irq(&nvmeq->q_lock);
1365 nvme_process_cq(nvmeq);
1366 spin_unlock_irq(&nvmeq->q_lock);
1369 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1372 struct device *dmadev = &dev->pci_dev->dev;
1373 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1377 nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1378 &nvmeq->cq_dma_addr, GFP_KERNEL);
1382 nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1383 &nvmeq->sq_dma_addr, GFP_KERNEL);
1384 if (!nvmeq->sq_cmds)
1387 nvmeq->q_dmadev = dmadev;
1389 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1390 dev->instance, qid);
1391 spin_lock_init(&nvmeq->q_lock);
1393 nvmeq->cq_phase = 1;
1394 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1395 nvmeq->q_depth = depth;
1398 dev->queues[qid] = nvmeq;
1403 dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1404 nvmeq->cq_dma_addr);
1410 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1413 if (use_threaded_interrupts)
1414 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1415 nvme_irq_check, nvme_irq, IRQF_SHARED,
1417 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1418 IRQF_SHARED, name, nvmeq);
1421 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1423 struct nvme_dev *dev = nvmeq->dev;
1425 spin_lock_irq(&nvmeq->q_lock);
1428 nvmeq->cq_phase = 1;
1429 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1430 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1431 dev->online_queues++;
1432 spin_unlock_irq(&nvmeq->q_lock);
1435 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1437 struct nvme_dev *dev = nvmeq->dev;
1440 nvmeq->cq_vector = qid - 1;
1441 result = adapter_alloc_cq(dev, qid, nvmeq);
1445 result = adapter_alloc_sq(dev, qid, nvmeq);
1449 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1453 nvme_init_queue(nvmeq, qid);
1457 adapter_delete_sq(dev, qid);
1459 adapter_delete_cq(dev, qid);
1463 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1465 unsigned long timeout;
1466 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1468 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1470 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1472 if (fatal_signal_pending(current))
1474 if (time_after(jiffies, timeout)) {
1475 dev_err(&dev->pci_dev->dev,
1476 "Device not ready; aborting %s\n", enabled ?
1477 "initialisation" : "reset");
1486 * If the device has been passed off to us in an enabled state, just clear
1487 * the enabled bit. The spec says we should set the 'shutdown notification
1488 * bits', but doing so may cause the device to complete commands to the
1489 * admin queue ... and we don't know what memory that might be pointing at!
1491 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1493 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1494 dev->ctrl_config &= ~NVME_CC_ENABLE;
1495 writel(dev->ctrl_config, &dev->bar->cc);
1497 return nvme_wait_ready(dev, cap, false);
1500 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1502 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1503 dev->ctrl_config |= NVME_CC_ENABLE;
1504 writel(dev->ctrl_config, &dev->bar->cc);
1506 return nvme_wait_ready(dev, cap, true);
1509 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1511 unsigned long timeout;
1513 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1514 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1516 writel(dev->ctrl_config, &dev->bar->cc);
1518 timeout = SHUTDOWN_TIMEOUT + jiffies;
1519 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1520 NVME_CSTS_SHST_CMPLT) {
1522 if (fatal_signal_pending(current))
1524 if (time_after(jiffies, timeout)) {
1525 dev_err(&dev->pci_dev->dev,
1526 "Device shutdown incomplete; abort shutdown\n");
1534 static struct blk_mq_ops nvme_mq_admin_ops = {
1535 .queue_rq = nvme_admin_queue_rq,
1536 .map_queue = blk_mq_map_queue,
1537 .init_hctx = nvme_admin_init_hctx,
1538 .exit_hctx = nvme_exit_hctx,
1539 .init_request = nvme_admin_init_request,
1540 .timeout = nvme_timeout,
1543 static struct blk_mq_ops nvme_mq_ops = {
1544 .queue_rq = nvme_queue_rq,
1545 .map_queue = blk_mq_map_queue,
1546 .init_hctx = nvme_init_hctx,
1547 .exit_hctx = nvme_exit_hctx,
1548 .init_request = nvme_init_request,
1549 .timeout = nvme_timeout,
1552 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1554 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1555 blk_cleanup_queue(dev->admin_q);
1556 blk_mq_free_tag_set(&dev->admin_tagset);
1560 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1562 if (!dev->admin_q) {
1563 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1564 dev->admin_tagset.nr_hw_queues = 1;
1565 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1566 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1567 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1568 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1569 dev->admin_tagset.driver_data = dev;
1571 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1574 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1575 if (IS_ERR(dev->admin_q)) {
1576 blk_mq_free_tag_set(&dev->admin_tagset);
1579 if (!blk_get_queue(dev->admin_q)) {
1580 nvme_dev_remove_admin(dev);
1584 blk_mq_unfreeze_queue(dev->admin_q);
1589 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1593 u64 cap = readq(&dev->bar->cap);
1594 struct nvme_queue *nvmeq;
1595 unsigned page_shift = PAGE_SHIFT;
1596 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1597 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1599 if (page_shift < dev_page_min) {
1600 dev_err(&dev->pci_dev->dev,
1601 "Minimum device page size (%u) too large for "
1602 "host (%u)\n", 1 << dev_page_min,
1606 if (page_shift > dev_page_max) {
1607 dev_info(&dev->pci_dev->dev,
1608 "Device maximum page size (%u) smaller than "
1609 "host (%u); enabling work-around\n",
1610 1 << dev_page_max, 1 << page_shift);
1611 page_shift = dev_page_max;
1614 result = nvme_disable_ctrl(dev, cap);
1618 nvmeq = dev->queues[0];
1620 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1625 aqa = nvmeq->q_depth - 1;
1628 dev->page_size = 1 << page_shift;
1630 dev->ctrl_config = NVME_CC_CSS_NVM;
1631 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1632 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1633 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1635 writel(aqa, &dev->bar->aqa);
1636 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1637 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1639 result = nvme_enable_ctrl(dev, cap);
1643 nvmeq->cq_vector = 0;
1644 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1651 nvme_free_queues(dev, 0);
1655 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1656 unsigned long addr, unsigned length)
1658 int i, err, count, nents, offset;
1659 struct scatterlist *sg;
1660 struct page **pages;
1661 struct nvme_iod *iod;
1664 return ERR_PTR(-EINVAL);
1665 if (!length || length > INT_MAX - PAGE_SIZE)
1666 return ERR_PTR(-EINVAL);
1668 offset = offset_in_page(addr);
1669 count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1670 pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1672 return ERR_PTR(-ENOMEM);
1674 err = get_user_pages_fast(addr, count, 1, pages);
1682 iod = __nvme_alloc_iod(count, length, dev, 0, GFP_KERNEL);
1687 sg_init_table(sg, count);
1688 for (i = 0; i < count; i++) {
1689 sg_set_page(&sg[i], pages[i],
1690 min_t(unsigned, length, PAGE_SIZE - offset),
1692 length -= (PAGE_SIZE - offset);
1695 sg_mark_end(&sg[i - 1]);
1698 nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1699 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1709 for (i = 0; i < count; i++)
1712 return ERR_PTR(err);
1715 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1716 struct nvme_iod *iod)
1720 dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1721 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1723 for (i = 0; i < iod->nents; i++)
1724 put_page(sg_page(&iod->sg[i]));
1727 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1729 struct nvme_dev *dev = ns->dev;
1730 struct nvme_user_io io;
1731 struct nvme_command c;
1732 unsigned length, meta_len;
1734 struct nvme_iod *iod, *meta_iod = NULL;
1735 dma_addr_t meta_dma_addr;
1736 void *meta, *uninitialized_var(meta_mem);
1738 if (copy_from_user(&io, uio, sizeof(io)))
1740 length = (io.nblocks + 1) << ns->lba_shift;
1741 meta_len = (io.nblocks + 1) * ns->ms;
1743 if (meta_len && ((io.metadata & 3) || !io.metadata))
1746 switch (io.opcode) {
1747 case nvme_cmd_write:
1749 case nvme_cmd_compare:
1750 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1757 return PTR_ERR(iod);
1759 memset(&c, 0, sizeof(c));
1760 c.rw.opcode = io.opcode;
1761 c.rw.flags = io.flags;
1762 c.rw.nsid = cpu_to_le32(ns->ns_id);
1763 c.rw.slba = cpu_to_le64(io.slba);
1764 c.rw.length = cpu_to_le16(io.nblocks);
1765 c.rw.control = cpu_to_le16(io.control);
1766 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1767 c.rw.reftag = cpu_to_le32(io.reftag);
1768 c.rw.apptag = cpu_to_le16(io.apptag);
1769 c.rw.appmask = cpu_to_le16(io.appmask);
1772 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1774 if (IS_ERR(meta_iod)) {
1775 status = PTR_ERR(meta_iod);
1780 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1781 &meta_dma_addr, GFP_KERNEL);
1787 if (io.opcode & 1) {
1788 int meta_offset = 0;
1790 for (i = 0; i < meta_iod->nents; i++) {
1791 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1792 meta_iod->sg[i].offset;
1793 memcpy(meta_mem + meta_offset, meta,
1794 meta_iod->sg[i].length);
1795 kunmap_atomic(meta);
1796 meta_offset += meta_iod->sg[i].length;
1800 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1803 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1804 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1805 c.rw.prp2 = cpu_to_le64(iod->first_dma);
1807 if (length != (io.nblocks + 1) << ns->lba_shift)
1810 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1813 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1814 int meta_offset = 0;
1816 for (i = 0; i < meta_iod->nents; i++) {
1817 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1818 meta_iod->sg[i].offset;
1819 memcpy(meta, meta_mem + meta_offset,
1820 meta_iod->sg[i].length);
1821 kunmap_atomic(meta);
1822 meta_offset += meta_iod->sg[i].length;
1826 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1831 nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1832 nvme_free_iod(dev, iod);
1835 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1836 nvme_free_iod(dev, meta_iod);
1842 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1843 struct nvme_passthru_cmd __user *ucmd)
1845 struct nvme_passthru_cmd cmd;
1846 struct nvme_command c;
1848 struct nvme_iod *uninitialized_var(iod);
1851 if (!capable(CAP_SYS_ADMIN))
1853 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1856 memset(&c, 0, sizeof(c));
1857 c.common.opcode = cmd.opcode;
1858 c.common.flags = cmd.flags;
1859 c.common.nsid = cpu_to_le32(cmd.nsid);
1860 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1861 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1862 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1863 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1864 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1865 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1866 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1867 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1869 length = cmd.data_len;
1871 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1874 return PTR_ERR(iod);
1875 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1876 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1877 c.common.prp2 = cpu_to_le64(iod->first_dma);
1880 timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1883 if (length != cmd.data_len)
1886 struct request *req;
1888 req = blk_mq_alloc_request(ns->queue, WRITE,
1889 (GFP_KERNEL|__GFP_WAIT), false);
1891 status = PTR_ERR(req);
1893 status = nvme_submit_sync_cmd(req, &c, &cmd.result,
1895 blk_mq_free_request(req);
1898 status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout);
1901 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1902 nvme_free_iod(dev, iod);
1905 if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1906 sizeof(cmd.result)))
1912 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1915 struct nvme_ns *ns = bdev->bd_disk->private_data;
1919 force_successful_syscall_return();
1921 case NVME_IOCTL_ADMIN_CMD:
1922 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1923 case NVME_IOCTL_IO_CMD:
1924 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1925 case NVME_IOCTL_SUBMIT_IO:
1926 return nvme_submit_io(ns, (void __user *)arg);
1927 case SG_GET_VERSION_NUM:
1928 return nvme_sg_get_version_num((void __user *)arg);
1930 return nvme_sg_io(ns, (void __user *)arg);
1936 #ifdef CONFIG_COMPAT
1937 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1938 unsigned int cmd, unsigned long arg)
1942 return -ENOIOCTLCMD;
1944 return nvme_ioctl(bdev, mode, cmd, arg);
1947 #define nvme_compat_ioctl NULL
1950 static int nvme_open(struct block_device *bdev, fmode_t mode)
1955 spin_lock(&dev_list_lock);
1956 ns = bdev->bd_disk->private_data;
1959 else if (!kref_get_unless_zero(&ns->dev->kref))
1961 spin_unlock(&dev_list_lock);
1966 static void nvme_free_dev(struct kref *kref);
1968 static void nvme_release(struct gendisk *disk, fmode_t mode)
1970 struct nvme_ns *ns = disk->private_data;
1971 struct nvme_dev *dev = ns->dev;
1973 kref_put(&dev->kref, nvme_free_dev);
1976 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1978 /* some standard values */
1979 geo->heads = 1 << 6;
1980 geo->sectors = 1 << 5;
1981 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1985 static void nvme_config_discard(struct nvme_ns *ns)
1987 u32 logical_block_size = queue_logical_block_size(ns->queue);
1988 ns->queue->limits.discard_zeroes_data = 0;
1989 ns->queue->limits.discard_alignment = logical_block_size;
1990 ns->queue->limits.discard_granularity = logical_block_size;
1991 ns->queue->limits.max_discard_sectors = 0xffffffff;
1992 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1995 static int nvme_noop_verify(struct blk_integrity_iter *iter)
2000 static int nvme_noop_generate(struct blk_integrity_iter *iter)
2005 struct blk_integrity nvme_meta_noop = {
2006 .name = "NVME_META_NOOP",
2007 .generate_fn = nvme_noop_generate,
2008 .verify_fn = nvme_noop_verify,
2011 static void nvme_init_integrity(struct nvme_ns *ns)
2013 struct blk_integrity integrity;
2015 switch (ns->pi_type) {
2016 case NVME_NS_DPS_PI_TYPE3:
2017 integrity = t10_pi_type3_crc;
2019 case NVME_NS_DPS_PI_TYPE1:
2020 case NVME_NS_DPS_PI_TYPE2:
2021 integrity = t10_pi_type1_crc;
2024 integrity = nvme_meta_noop;
2027 integrity.tuple_size = ns->ms;
2028 blk_integrity_register(ns->disk, &integrity);
2029 blk_queue_max_integrity_segments(ns->queue, 1);
2032 static int nvme_revalidate_disk(struct gendisk *disk)
2034 struct nvme_ns *ns = disk->private_data;
2035 struct nvme_dev *dev = ns->dev;
2036 struct nvme_id_ns *id;
2037 dma_addr_t dma_addr;
2038 int lbaf, pi_type, old_ms;
2041 id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
2044 dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n",
2048 if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) {
2049 dev_warn(&dev->pci_dev->dev,
2050 "identify failed ns:%d, setting capacity to 0\n",
2052 memset(id, 0, sizeof(*id));
2056 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2057 ns->lba_shift = id->lbaf[lbaf].ds;
2058 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2061 * If identify namespace failed, use default 512 byte block size so
2062 * block layer can use before failing read/write for 0 capacity.
2064 if (ns->lba_shift == 0)
2066 bs = 1 << ns->lba_shift;
2068 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2069 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2070 id->dps & NVME_NS_DPS_PI_MASK : 0;
2072 if (disk->integrity && (ns->pi_type != pi_type || ns->ms != old_ms ||
2073 bs != queue_logical_block_size(disk->queue) ||
2074 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT)))
2075 blk_integrity_unregister(disk);
2077 ns->pi_type = pi_type;
2078 blk_queue_logical_block_size(ns->queue, bs);
2080 if (ns->ms && !disk->integrity && (disk->flags & GENHD_FL_UP) &&
2081 !(id->flbas & NVME_NS_FLBAS_META_EXT))
2082 nvme_init_integrity(ns);
2084 if (id->ncap == 0 || (ns->ms && !disk->integrity))
2085 set_capacity(disk, 0);
2087 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2089 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2090 nvme_config_discard(ns);
2092 dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
2096 static const struct block_device_operations nvme_fops = {
2097 .owner = THIS_MODULE,
2098 .ioctl = nvme_ioctl,
2099 .compat_ioctl = nvme_compat_ioctl,
2101 .release = nvme_release,
2102 .getgeo = nvme_getgeo,
2103 .revalidate_disk= nvme_revalidate_disk,
2106 static int nvme_kthread(void *data)
2108 struct nvme_dev *dev, *next;
2110 while (!kthread_should_stop()) {
2111 set_current_state(TASK_INTERRUPTIBLE);
2112 spin_lock(&dev_list_lock);
2113 list_for_each_entry_safe(dev, next, &dev_list, node) {
2115 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2116 if (work_busy(&dev->reset_work))
2118 list_del_init(&dev->node);
2119 dev_warn(&dev->pci_dev->dev,
2120 "Failed status: %x, reset controller\n",
2121 readl(&dev->bar->csts));
2122 dev->reset_workfn = nvme_reset_failed_dev;
2123 queue_work(nvme_workq, &dev->reset_work);
2126 for (i = 0; i < dev->queue_count; i++) {
2127 struct nvme_queue *nvmeq = dev->queues[i];
2130 spin_lock_irq(&nvmeq->q_lock);
2131 nvme_process_cq(nvmeq);
2133 while ((i == 0) && (dev->event_limit > 0)) {
2134 if (nvme_submit_async_admin_req(dev))
2138 spin_unlock_irq(&nvmeq->q_lock);
2141 spin_unlock(&dev_list_lock);
2142 schedule_timeout(round_jiffies_relative(HZ));
2147 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2150 struct gendisk *disk;
2151 int node = dev_to_node(&dev->pci_dev->dev);
2153 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2157 ns->queue = blk_mq_init_queue(&dev->tagset);
2158 if (IS_ERR(ns->queue))
2160 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2161 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2162 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2164 ns->queue->queuedata = ns;
2166 disk = alloc_disk_node(0, node);
2168 goto out_free_queue;
2172 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2173 list_add_tail(&ns->list, &dev->namespaces);
2175 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2176 if (dev->max_hw_sectors)
2177 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2178 if (dev->stripe_size)
2179 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2180 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2181 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2183 disk->major = nvme_major;
2184 disk->first_minor = 0;
2185 disk->fops = &nvme_fops;
2186 disk->private_data = ns;
2187 disk->queue = ns->queue;
2188 disk->driverfs_dev = dev->device;
2189 disk->flags = GENHD_FL_EXT_DEVT;
2190 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2193 * Initialize capacity to 0 until we establish the namespace format and
2194 * setup integrity extentions if necessary. The revalidate_disk after
2195 * add_disk allows the driver to register with integrity if the format
2198 set_capacity(disk, 0);
2199 nvme_revalidate_disk(ns->disk);
2202 revalidate_disk(ns->disk);
2205 blk_cleanup_queue(ns->queue);
2210 static void nvme_create_io_queues(struct nvme_dev *dev)
2214 for (i = dev->queue_count; i <= dev->max_qid; i++)
2215 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2218 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2219 if (nvme_create_queue(dev->queues[i], i))
2223 static int set_queue_count(struct nvme_dev *dev, int count)
2227 u32 q_count = (count - 1) | ((count - 1) << 16);
2229 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2234 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
2238 return min(result & 0xffff, result >> 16) + 1;
2241 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2243 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2246 static int nvme_setup_io_queues(struct nvme_dev *dev)
2248 struct nvme_queue *adminq = dev->queues[0];
2249 struct pci_dev *pdev = dev->pci_dev;
2250 int result, i, vecs, nr_io_queues, size;
2252 nr_io_queues = num_possible_cpus();
2253 result = set_queue_count(dev, nr_io_queues);
2256 if (result < nr_io_queues)
2257 nr_io_queues = result;
2259 size = db_bar_size(dev, nr_io_queues);
2263 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2266 if (!--nr_io_queues)
2268 size = db_bar_size(dev, nr_io_queues);
2270 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2271 adminq->q_db = dev->dbs;
2274 /* Deregister the admin queue's interrupt */
2275 free_irq(dev->entry[0].vector, adminq);
2278 * If we enable msix early due to not intx, disable it again before
2279 * setting up the full range we need.
2282 pci_disable_msix(pdev);
2284 for (i = 0; i < nr_io_queues; i++)
2285 dev->entry[i].entry = i;
2286 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2288 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2292 for (i = 0; i < vecs; i++)
2293 dev->entry[i].vector = i + pdev->irq;
2298 * Should investigate if there's a performance win from allocating
2299 * more queues than interrupt vectors; it might allow the submission
2300 * path to scale better, even if the receive path is limited by the
2301 * number of interrupts.
2303 nr_io_queues = vecs;
2304 dev->max_qid = nr_io_queues;
2306 result = queue_request_irq(dev, adminq, adminq->irqname);
2310 /* Free previously allocated queues that are no longer usable */
2311 nvme_free_queues(dev, nr_io_queues + 1);
2312 nvme_create_io_queues(dev);
2317 nvme_free_queues(dev, 1);
2322 * Return: error value if an error occurred setting up the queues or calling
2323 * Identify Device. 0 if these succeeded, even if adding some of the
2324 * namespaces failed. At the moment, these failures are silent. TBD which
2325 * failures should be reported.
2327 static int nvme_dev_add(struct nvme_dev *dev)
2329 struct pci_dev *pdev = dev->pci_dev;
2332 struct nvme_id_ctrl *ctrl;
2334 dma_addr_t dma_addr;
2335 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2337 mem = dma_alloc_coherent(&pdev->dev, 4096, &dma_addr, GFP_KERNEL);
2341 res = nvme_identify(dev, 0, 1, dma_addr);
2343 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2344 dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2349 nn = le32_to_cpup(&ctrl->nn);
2350 dev->oncs = le16_to_cpup(&ctrl->oncs);
2351 dev->abort_limit = ctrl->acl + 1;
2352 dev->vwc = ctrl->vwc;
2353 dev->event_limit = min(ctrl->aerl + 1, 8);
2354 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2355 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2356 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2358 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2359 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2360 (pdev->device == 0x0953) && ctrl->vs[3]) {
2361 unsigned int max_hw_sectors;
2363 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2364 max_hw_sectors = dev->stripe_size >> (shift - 9);
2365 if (dev->max_hw_sectors) {
2366 dev->max_hw_sectors = min(max_hw_sectors,
2367 dev->max_hw_sectors);
2369 dev->max_hw_sectors = max_hw_sectors;
2371 dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2373 dev->tagset.ops = &nvme_mq_ops;
2374 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2375 dev->tagset.timeout = NVME_IO_TIMEOUT;
2376 dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
2377 dev->tagset.queue_depth =
2378 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2379 dev->tagset.cmd_size = nvme_cmd_size(dev);
2380 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2381 dev->tagset.driver_data = dev;
2383 if (blk_mq_alloc_tag_set(&dev->tagset))
2386 for (i = 1; i <= nn; i++)
2387 nvme_alloc_ns(dev, i);
2392 static int nvme_dev_map(struct nvme_dev *dev)
2395 int bars, result = -ENOMEM;
2396 struct pci_dev *pdev = dev->pci_dev;
2398 if (pci_enable_device_mem(pdev))
2401 dev->entry[0].vector = pdev->irq;
2402 pci_set_master(pdev);
2403 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2407 if (pci_request_selected_regions(pdev, bars, "nvme"))
2410 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2411 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2414 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2418 if (readl(&dev->bar->csts) == -1) {
2424 * Some devices don't advertse INTx interrupts, pre-enable a single
2425 * MSIX vec for setup. We'll adjust this later.
2428 result = pci_enable_msix(pdev, dev->entry, 1);
2433 cap = readq(&dev->bar->cap);
2434 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2435 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2436 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2444 pci_release_regions(pdev);
2446 pci_disable_device(pdev);
2450 static void nvme_dev_unmap(struct nvme_dev *dev)
2452 if (dev->pci_dev->msi_enabled)
2453 pci_disable_msi(dev->pci_dev);
2454 else if (dev->pci_dev->msix_enabled)
2455 pci_disable_msix(dev->pci_dev);
2460 pci_release_regions(dev->pci_dev);
2463 if (pci_is_enabled(dev->pci_dev))
2464 pci_disable_device(dev->pci_dev);
2467 struct nvme_delq_ctx {
2468 struct task_struct *waiter;
2469 struct kthread_worker *worker;
2473 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2475 dq->waiter = current;
2479 set_current_state(TASK_KILLABLE);
2480 if (!atomic_read(&dq->refcount))
2482 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2483 fatal_signal_pending(current)) {
2485 * Disable the controller first since we can't trust it
2486 * at this point, but leave the admin queue enabled
2487 * until all queue deletion requests are flushed.
2488 * FIXME: This may take a while if there are more h/w
2489 * queues than admin tags.
2491 set_current_state(TASK_RUNNING);
2492 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2493 nvme_clear_queue(dev->queues[0]);
2494 flush_kthread_worker(dq->worker);
2495 nvme_disable_queue(dev, 0);
2499 set_current_state(TASK_RUNNING);
2502 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2504 atomic_dec(&dq->refcount);
2506 wake_up_process(dq->waiter);
2509 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2511 atomic_inc(&dq->refcount);
2515 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2517 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2521 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2522 kthread_work_func_t fn)
2524 struct nvme_command c;
2526 memset(&c, 0, sizeof(c));
2527 c.delete_queue.opcode = opcode;
2528 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2530 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2531 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2535 static void nvme_del_cq_work_handler(struct kthread_work *work)
2537 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2539 nvme_del_queue_end(nvmeq);
2542 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2544 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2545 nvme_del_cq_work_handler);
2548 static void nvme_del_sq_work_handler(struct kthread_work *work)
2550 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2552 int status = nvmeq->cmdinfo.status;
2555 status = nvme_delete_cq(nvmeq);
2557 nvme_del_queue_end(nvmeq);
2560 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2562 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2563 nvme_del_sq_work_handler);
2566 static void nvme_del_queue_start(struct kthread_work *work)
2568 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2570 if (nvme_delete_sq(nvmeq))
2571 nvme_del_queue_end(nvmeq);
2574 static void nvme_disable_io_queues(struct nvme_dev *dev)
2577 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2578 struct nvme_delq_ctx dq;
2579 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2580 &worker, "nvme%d", dev->instance);
2582 if (IS_ERR(kworker_task)) {
2583 dev_err(&dev->pci_dev->dev,
2584 "Failed to create queue del task\n");
2585 for (i = dev->queue_count - 1; i > 0; i--)
2586 nvme_disable_queue(dev, i);
2591 atomic_set(&dq.refcount, 0);
2592 dq.worker = &worker;
2593 for (i = dev->queue_count - 1; i > 0; i--) {
2594 struct nvme_queue *nvmeq = dev->queues[i];
2596 if (nvme_suspend_queue(nvmeq))
2598 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2599 nvmeq->cmdinfo.worker = dq.worker;
2600 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2601 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2603 nvme_wait_dq(&dq, dev);
2604 kthread_stop(kworker_task);
2608 * Remove the node from the device list and check
2609 * for whether or not we need to stop the nvme_thread.
2611 static void nvme_dev_list_remove(struct nvme_dev *dev)
2613 struct task_struct *tmp = NULL;
2615 spin_lock(&dev_list_lock);
2616 list_del_init(&dev->node);
2617 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2621 spin_unlock(&dev_list_lock);
2627 static void nvme_freeze_queues(struct nvme_dev *dev)
2631 list_for_each_entry(ns, &dev->namespaces, list) {
2632 blk_mq_freeze_queue_start(ns->queue);
2634 spin_lock(ns->queue->queue_lock);
2635 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2636 spin_unlock(ns->queue->queue_lock);
2638 blk_mq_cancel_requeue_work(ns->queue);
2639 blk_mq_stop_hw_queues(ns->queue);
2643 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2647 list_for_each_entry(ns, &dev->namespaces, list) {
2648 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2649 blk_mq_unfreeze_queue(ns->queue);
2650 blk_mq_start_stopped_hw_queues(ns->queue, true);
2651 blk_mq_kick_requeue_list(ns->queue);
2655 static void nvme_dev_shutdown(struct nvme_dev *dev)
2660 nvme_dev_list_remove(dev);
2663 nvme_freeze_queues(dev);
2664 csts = readl(&dev->bar->csts);
2666 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2667 for (i = dev->queue_count - 1; i >= 0; i--) {
2668 struct nvme_queue *nvmeq = dev->queues[i];
2669 nvme_suspend_queue(nvmeq);
2672 nvme_disable_io_queues(dev);
2673 nvme_shutdown_ctrl(dev);
2674 nvme_disable_queue(dev, 0);
2676 nvme_dev_unmap(dev);
2678 for (i = dev->queue_count - 1; i >= 0; i--)
2679 nvme_clear_queue(dev->queues[i]);
2682 static void nvme_dev_remove(struct nvme_dev *dev)
2686 list_for_each_entry(ns, &dev->namespaces, list) {
2687 if (ns->disk->flags & GENHD_FL_UP) {
2688 if (ns->disk->integrity)
2689 blk_integrity_unregister(ns->disk);
2690 del_gendisk(ns->disk);
2692 if (!blk_queue_dying(ns->queue)) {
2693 blk_mq_abort_requeue_list(ns->queue);
2694 blk_cleanup_queue(ns->queue);
2699 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2701 struct device *dmadev = &dev->pci_dev->dev;
2702 dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2703 PAGE_SIZE, PAGE_SIZE, 0);
2704 if (!dev->prp_page_pool)
2707 /* Optimisation for I/Os between 4k and 128k */
2708 dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2710 if (!dev->prp_small_pool) {
2711 dma_pool_destroy(dev->prp_page_pool);
2717 static void nvme_release_prp_pools(struct nvme_dev *dev)
2719 dma_pool_destroy(dev->prp_page_pool);
2720 dma_pool_destroy(dev->prp_small_pool);
2723 static DEFINE_IDA(nvme_instance_ida);
2725 static int nvme_set_instance(struct nvme_dev *dev)
2727 int instance, error;
2730 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2733 spin_lock(&dev_list_lock);
2734 error = ida_get_new(&nvme_instance_ida, &instance);
2735 spin_unlock(&dev_list_lock);
2736 } while (error == -EAGAIN);
2741 dev->instance = instance;
2745 static void nvme_release_instance(struct nvme_dev *dev)
2747 spin_lock(&dev_list_lock);
2748 ida_remove(&nvme_instance_ida, dev->instance);
2749 spin_unlock(&dev_list_lock);
2752 static void nvme_free_namespaces(struct nvme_dev *dev)
2754 struct nvme_ns *ns, *next;
2756 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2757 list_del(&ns->list);
2759 spin_lock(&dev_list_lock);
2760 ns->disk->private_data = NULL;
2761 spin_unlock(&dev_list_lock);
2768 static void nvme_free_dev(struct kref *kref)
2770 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2772 pci_dev_put(dev->pci_dev);
2773 put_device(dev->device);
2774 nvme_free_namespaces(dev);
2775 nvme_release_instance(dev);
2776 blk_mq_free_tag_set(&dev->tagset);
2777 blk_put_queue(dev->admin_q);
2783 static int nvme_dev_open(struct inode *inode, struct file *f)
2785 struct nvme_dev *dev;
2786 int instance = iminor(inode);
2789 spin_lock(&dev_list_lock);
2790 list_for_each_entry(dev, &dev_list, node) {
2791 if (dev->instance == instance) {
2792 if (!dev->admin_q) {
2796 if (!kref_get_unless_zero(&dev->kref))
2798 f->private_data = dev;
2803 spin_unlock(&dev_list_lock);
2808 static int nvme_dev_release(struct inode *inode, struct file *f)
2810 struct nvme_dev *dev = f->private_data;
2811 kref_put(&dev->kref, nvme_free_dev);
2815 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2817 struct nvme_dev *dev = f->private_data;
2821 case NVME_IOCTL_ADMIN_CMD:
2822 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2823 case NVME_IOCTL_IO_CMD:
2824 if (list_empty(&dev->namespaces))
2826 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2827 return nvme_user_cmd(dev, ns, (void __user *)arg);
2833 static const struct file_operations nvme_dev_fops = {
2834 .owner = THIS_MODULE,
2835 .open = nvme_dev_open,
2836 .release = nvme_dev_release,
2837 .unlocked_ioctl = nvme_dev_ioctl,
2838 .compat_ioctl = nvme_dev_ioctl,
2841 static void nvme_set_irq_hints(struct nvme_dev *dev)
2843 struct nvme_queue *nvmeq;
2846 for (i = 0; i < dev->online_queues; i++) {
2847 nvmeq = dev->queues[i];
2852 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2853 nvmeq->hctx->cpumask);
2857 static int nvme_dev_start(struct nvme_dev *dev)
2860 bool start_thread = false;
2862 result = nvme_dev_map(dev);
2866 result = nvme_configure_admin_queue(dev);
2870 spin_lock(&dev_list_lock);
2871 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2872 start_thread = true;
2875 list_add(&dev->node, &dev_list);
2876 spin_unlock(&dev_list_lock);
2879 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2880 wake_up_all(&nvme_kthread_wait);
2882 wait_event_killable(nvme_kthread_wait, nvme_thread);
2884 if (IS_ERR_OR_NULL(nvme_thread)) {
2885 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2889 nvme_init_queue(dev->queues[0], 0);
2890 result = nvme_alloc_admin_tags(dev);
2894 result = nvme_setup_io_queues(dev);
2898 nvme_set_irq_hints(dev);
2903 nvme_dev_remove_admin(dev);
2905 nvme_disable_queue(dev, 0);
2906 nvme_dev_list_remove(dev);
2908 nvme_dev_unmap(dev);
2912 static int nvme_remove_dead_ctrl(void *arg)
2914 struct nvme_dev *dev = (struct nvme_dev *)arg;
2915 struct pci_dev *pdev = dev->pci_dev;
2917 if (pci_get_drvdata(pdev))
2918 pci_stop_and_remove_bus_device_locked(pdev);
2919 kref_put(&dev->kref, nvme_free_dev);
2923 static void nvme_remove_disks(struct work_struct *ws)
2925 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2927 nvme_free_queues(dev, 1);
2928 nvme_dev_remove(dev);
2931 static int nvme_dev_resume(struct nvme_dev *dev)
2935 ret = nvme_dev_start(dev);
2938 if (dev->online_queues < 2) {
2939 spin_lock(&dev_list_lock);
2940 dev->reset_workfn = nvme_remove_disks;
2941 queue_work(nvme_workq, &dev->reset_work);
2942 spin_unlock(&dev_list_lock);
2944 nvme_unfreeze_queues(dev);
2945 nvme_set_irq_hints(dev);
2950 static void nvme_dev_reset(struct nvme_dev *dev)
2952 nvme_dev_shutdown(dev);
2953 if (nvme_dev_resume(dev)) {
2954 dev_warn(&dev->pci_dev->dev, "Device failed to resume\n");
2955 kref_get(&dev->kref);
2956 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2958 dev_err(&dev->pci_dev->dev,
2959 "Failed to start controller remove task\n");
2960 kref_put(&dev->kref, nvme_free_dev);
2965 static void nvme_reset_failed_dev(struct work_struct *ws)
2967 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2968 nvme_dev_reset(dev);
2971 static void nvme_reset_workfn(struct work_struct *work)
2973 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2974 dev->reset_workfn(work);
2977 static void nvme_async_probe(struct work_struct *work);
2978 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2980 int node, result = -ENOMEM;
2981 struct nvme_dev *dev;
2983 node = dev_to_node(&pdev->dev);
2984 if (node == NUMA_NO_NODE)
2985 set_dev_node(&pdev->dev, 0);
2987 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2990 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2994 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2999 INIT_LIST_HEAD(&dev->namespaces);
3000 dev->reset_workfn = nvme_reset_failed_dev;
3001 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3002 dev->pci_dev = pci_dev_get(pdev);
3003 pci_set_drvdata(pdev, dev);
3004 result = nvme_set_instance(dev);
3008 result = nvme_setup_prp_pools(dev);
3012 kref_init(&dev->kref);
3013 dev->device = device_create(nvme_class, &pdev->dev,
3014 MKDEV(nvme_char_major, dev->instance),
3015 dev, "nvme%d", dev->instance);
3016 if (IS_ERR(dev->device)) {
3017 result = PTR_ERR(dev->device);
3020 get_device(dev->device);
3022 INIT_WORK(&dev->probe_work, nvme_async_probe);
3023 schedule_work(&dev->probe_work);
3027 nvme_release_prp_pools(dev);
3029 nvme_release_instance(dev);
3031 pci_dev_put(dev->pci_dev);
3039 static void nvme_async_probe(struct work_struct *work)
3041 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3044 result = nvme_dev_start(dev);
3048 if (dev->online_queues > 1)
3049 result = nvme_dev_add(dev);
3053 nvme_set_irq_hints(dev);
3056 if (!work_busy(&dev->reset_work)) {
3057 dev->reset_workfn = nvme_reset_failed_dev;
3058 queue_work(nvme_workq, &dev->reset_work);
3062 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3064 struct nvme_dev *dev = pci_get_drvdata(pdev);
3067 nvme_dev_shutdown(dev);
3069 nvme_dev_resume(dev);
3072 static void nvme_shutdown(struct pci_dev *pdev)
3074 struct nvme_dev *dev = pci_get_drvdata(pdev);
3075 nvme_dev_shutdown(dev);
3078 static void nvme_remove(struct pci_dev *pdev)
3080 struct nvme_dev *dev = pci_get_drvdata(pdev);
3082 spin_lock(&dev_list_lock);
3083 list_del_init(&dev->node);
3084 spin_unlock(&dev_list_lock);
3086 pci_set_drvdata(pdev, NULL);
3087 flush_work(&dev->probe_work);
3088 flush_work(&dev->reset_work);
3089 nvme_dev_shutdown(dev);
3090 nvme_dev_remove(dev);
3091 nvme_dev_remove_admin(dev);
3092 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3093 nvme_free_queues(dev, 0);
3094 nvme_release_prp_pools(dev);
3095 kref_put(&dev->kref, nvme_free_dev);
3098 /* These functions are yet to be implemented */
3099 #define nvme_error_detected NULL
3100 #define nvme_dump_registers NULL
3101 #define nvme_link_reset NULL
3102 #define nvme_slot_reset NULL
3103 #define nvme_error_resume NULL
3105 #ifdef CONFIG_PM_SLEEP
3106 static int nvme_suspend(struct device *dev)
3108 struct pci_dev *pdev = to_pci_dev(dev);
3109 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3111 nvme_dev_shutdown(ndev);
3115 static int nvme_resume(struct device *dev)
3117 struct pci_dev *pdev = to_pci_dev(dev);
3118 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3120 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3121 ndev->reset_workfn = nvme_reset_failed_dev;
3122 queue_work(nvme_workq, &ndev->reset_work);
3128 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3130 static const struct pci_error_handlers nvme_err_handler = {
3131 .error_detected = nvme_error_detected,
3132 .mmio_enabled = nvme_dump_registers,
3133 .link_reset = nvme_link_reset,
3134 .slot_reset = nvme_slot_reset,
3135 .resume = nvme_error_resume,
3136 .reset_notify = nvme_reset_notify,
3139 /* Move to pci_ids.h later */
3140 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3142 static const struct pci_device_id nvme_id_table[] = {
3143 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3146 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3148 static struct pci_driver nvme_driver = {
3150 .id_table = nvme_id_table,
3151 .probe = nvme_probe,
3152 .remove = nvme_remove,
3153 .shutdown = nvme_shutdown,
3155 .pm = &nvme_dev_pm_ops,
3157 .err_handler = &nvme_err_handler,
3160 static int __init nvme_init(void)
3164 init_waitqueue_head(&nvme_kthread_wait);
3166 nvme_workq = create_singlethread_workqueue("nvme");
3170 result = register_blkdev(nvme_major, "nvme");
3173 else if (result > 0)
3174 nvme_major = result;
3176 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3179 goto unregister_blkdev;
3180 else if (result > 0)
3181 nvme_char_major = result;
3183 nvme_class = class_create(THIS_MODULE, "nvme");
3185 goto unregister_chrdev;
3187 result = pci_register_driver(&nvme_driver);
3193 class_destroy(nvme_class);
3195 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3197 unregister_blkdev(nvme_major, "nvme");
3199 destroy_workqueue(nvme_workq);
3203 static void __exit nvme_exit(void)
3205 pci_unregister_driver(&nvme_driver);
3206 unregister_hotcpu_notifier(&nvme_nb);
3207 unregister_blkdev(nvme_major, "nvme");
3208 destroy_workqueue(nvme_workq);
3209 class_destroy(nvme_class);
3210 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3211 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3215 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3216 MODULE_LICENSE("GPL");
3217 MODULE_VERSION("1.0");
3218 module_init(nvme_init);
3219 module_exit(nvme_exit);