2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #define NVME_MINORS (1U << MINORBITS)
46 #define NVME_Q_DEPTH 1024
47 #define NVME_AQ_DEPTH 256
48 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT (admin_timeout * HZ)
51 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
53 static unsigned char admin_timeout = 60;
54 module_param(admin_timeout, byte, 0644);
55 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
57 unsigned char nvme_io_timeout = 30;
58 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
59 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
61 static unsigned char shutdown_timeout = 5;
62 module_param(shutdown_timeout, byte, 0644);
63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
65 static int nvme_major;
66 module_param(nvme_major, int, 0);
68 static int nvme_char_major;
69 module_param(nvme_char_major, int, 0);
71 static int use_threaded_interrupts;
72 module_param(use_threaded_interrupts, int, 0);
74 static DEFINE_SPINLOCK(dev_list_lock);
75 static LIST_HEAD(dev_list);
76 static struct task_struct *nvme_thread;
77 static struct workqueue_struct *nvme_workq;
78 static wait_queue_head_t nvme_kthread_wait;
80 static struct class *nvme_class;
82 static void nvme_reset_failed_dev(struct work_struct *ws);
83 static int nvme_process_cq(struct nvme_queue *nvmeq);
85 struct async_cmd_info {
86 struct kthread_work work;
87 struct kthread_worker *worker;
95 * An NVM Express queue. Each device has at least two (one for admin
96 * commands and one for I/O commands).
99 struct device *q_dmadev;
100 struct nvme_dev *dev;
101 char irqname[24]; /* nvme4294967295-65535\0 */
103 struct nvme_command *sq_cmds;
104 volatile struct nvme_completion *cqes;
105 dma_addr_t sq_dma_addr;
106 dma_addr_t cq_dma_addr;
116 struct async_cmd_info cmdinfo;
117 struct blk_mq_hw_ctx *hctx;
121 * Check we didin't inadvertently grow the command struct
123 static inline void _nvme_check_size(void)
125 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
126 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
127 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
134 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
135 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
140 struct nvme_completion *);
142 struct nvme_cmd_info {
143 nvme_completion_fn fn;
146 struct nvme_queue *nvmeq;
147 struct nvme_iod iod[0];
151 * Max size of iod being embedded in the request payload
153 #define NVME_INT_PAGES 2
154 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
155 #define NVME_INT_MASK 0x01
158 * Will slightly overestimate the number of pages needed. This is OK
159 * as it only leads to a small amount of wasted memory for the lifetime of
162 static int nvme_npages(unsigned size, struct nvme_dev *dev)
164 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
165 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
168 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
170 unsigned int ret = sizeof(struct nvme_cmd_info);
172 ret += sizeof(struct nvme_iod);
173 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
174 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
179 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
180 unsigned int hctx_idx)
182 struct nvme_dev *dev = data;
183 struct nvme_queue *nvmeq = dev->queues[0];
185 WARN_ON(nvmeq->hctx);
187 hctx->driver_data = nvmeq;
191 static int nvme_admin_init_request(void *data, struct request *req,
192 unsigned int hctx_idx, unsigned int rq_idx,
193 unsigned int numa_node)
195 struct nvme_dev *dev = data;
196 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
197 struct nvme_queue *nvmeq = dev->queues[0];
204 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
206 struct nvme_queue *nvmeq = hctx->driver_data;
211 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
212 unsigned int hctx_idx)
214 struct nvme_dev *dev = data;
215 struct nvme_queue *nvmeq = dev->queues[
216 (hctx_idx % dev->queue_count) + 1];
221 /* nvmeq queues are shared between namespaces. We assume here that
222 * blk-mq map the tags so they match up with the nvme queue tags. */
223 WARN_ON(nvmeq->hctx->tags != hctx->tags);
225 hctx->driver_data = nvmeq;
229 static int nvme_init_request(void *data, struct request *req,
230 unsigned int hctx_idx, unsigned int rq_idx,
231 unsigned int numa_node)
233 struct nvme_dev *dev = data;
234 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
235 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
242 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
243 nvme_completion_fn handler)
248 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
251 static void *iod_get_private(struct nvme_iod *iod)
253 return (void *) (iod->private & ~0x1UL);
257 * If bit 0 is set, the iod is embedded in the request payload.
259 static bool iod_should_kfree(struct nvme_iod *iod)
261 return (iod->private & NVME_INT_MASK) == 0;
264 /* Special values must be less than 0x1000 */
265 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
266 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
267 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
268 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
270 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
271 struct nvme_completion *cqe)
273 if (ctx == CMD_CTX_CANCELLED)
275 if (ctx == CMD_CTX_COMPLETED) {
276 dev_warn(nvmeq->q_dmadev,
277 "completed id %d twice on queue %d\n",
278 cqe->command_id, le16_to_cpup(&cqe->sq_id));
281 if (ctx == CMD_CTX_INVALID) {
282 dev_warn(nvmeq->q_dmadev,
283 "invalid id %d completed on queue %d\n",
284 cqe->command_id, le16_to_cpup(&cqe->sq_id));
287 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
290 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
297 cmd->fn = special_completion;
298 cmd->ctx = CMD_CTX_CANCELLED;
302 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
303 struct nvme_completion *cqe)
305 u32 result = le32_to_cpup(&cqe->result);
306 u16 status = le16_to_cpup(&cqe->status) >> 1;
308 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
309 ++nvmeq->dev->event_limit;
310 if (status == NVME_SC_SUCCESS)
311 dev_warn(nvmeq->q_dmadev,
312 "async event result %08x\n", result);
315 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
316 struct nvme_completion *cqe)
318 struct request *req = ctx;
320 u16 status = le16_to_cpup(&cqe->status) >> 1;
321 u32 result = le32_to_cpup(&cqe->result);
323 blk_mq_free_hctx_request(nvmeq->hctx, req);
325 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
326 ++nvmeq->dev->abort_limit;
329 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
330 struct nvme_completion *cqe)
332 struct async_cmd_info *cmdinfo = ctx;
333 cmdinfo->result = le32_to_cpup(&cqe->result);
334 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
335 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
336 blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
339 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
342 struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
343 struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
345 return blk_mq_rq_to_pdu(req);
349 * Called with local interrupts disabled and the q_lock held. May not sleep.
351 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
352 nvme_completion_fn *fn)
354 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
356 if (tag >= nvmeq->q_depth) {
357 *fn = special_completion;
358 return CMD_CTX_INVALID;
363 cmd->fn = special_completion;
364 cmd->ctx = CMD_CTX_COMPLETED;
369 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
370 * @nvmeq: The queue to use
371 * @cmd: The command to send
373 * Safe to use from interrupt context
375 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
377 u16 tail = nvmeq->sq_tail;
379 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
380 if (++tail == nvmeq->q_depth)
382 writel(tail, nvmeq->q_db);
383 nvmeq->sq_tail = tail;
388 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
392 spin_lock_irqsave(&nvmeq->q_lock, flags);
393 ret = __nvme_submit_cmd(nvmeq, cmd);
394 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
398 static __le64 **iod_list(struct nvme_iod *iod)
400 return ((void *)iod) + iod->offset;
403 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
404 unsigned nseg, unsigned long private)
406 iod->private = private;
407 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
409 iod->length = nbytes;
413 static struct nvme_iod *
414 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
415 unsigned long priv, gfp_t gfp)
417 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
418 sizeof(__le64 *) * nvme_npages(bytes, dev) +
419 sizeof(struct scatterlist) * nseg, gfp);
422 iod_init(iod, bytes, nseg, priv);
427 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
430 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
431 sizeof(struct nvme_dsm_range);
432 struct nvme_iod *iod;
434 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
435 size <= NVME_INT_BYTES(dev)) {
436 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
439 iod_init(iod, size, rq->nr_phys_segments,
440 (unsigned long) rq | NVME_INT_MASK);
444 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
445 (unsigned long) rq, gfp);
448 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
450 const int last_prp = dev->page_size / 8 - 1;
452 __le64 **list = iod_list(iod);
453 dma_addr_t prp_dma = iod->first_dma;
455 if (iod->npages == 0)
456 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
457 for (i = 0; i < iod->npages; i++) {
458 __le64 *prp_list = list[i];
459 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
460 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
461 prp_dma = next_prp_dma;
464 if (iod_should_kfree(iod))
468 static int nvme_error_status(u16 status)
470 switch (status & 0x7ff) {
471 case NVME_SC_SUCCESS:
473 case NVME_SC_CAP_EXCEEDED:
480 #ifdef CONFIG_BLK_DEV_INTEGRITY
481 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
483 if (be32_to_cpu(pi->ref_tag) == v)
484 pi->ref_tag = cpu_to_be32(p);
487 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
489 if (be32_to_cpu(pi->ref_tag) == p)
490 pi->ref_tag = cpu_to_be32(v);
494 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
496 * The virtual start sector is the one that was originally submitted by the
497 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
498 * start sector may be different. Remap protection information to match the
499 * physical LBA on writes, and back to the original seed on reads.
501 * Type 0 and 3 do not have a ref tag, so no remapping required.
503 static void nvme_dif_remap(struct request *req,
504 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
506 struct nvme_ns *ns = req->rq_disk->private_data;
507 struct bio_integrity_payload *bip;
508 struct t10_pi_tuple *pi;
510 u32 i, nlb, ts, phys, virt;
512 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
515 bip = bio_integrity(req->bio);
519 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
522 virt = bip_get_seed(bip);
523 phys = nvme_block_nr(ns, blk_rq_pos(req));
524 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
525 ts = ns->disk->integrity->tuple_size;
527 for (i = 0; i < nlb; i++, virt++, phys++) {
528 pi = (struct t10_pi_tuple *)p;
529 dif_swap(phys, virt, pi);
535 static int nvme_noop_verify(struct blk_integrity_iter *iter)
540 static int nvme_noop_generate(struct blk_integrity_iter *iter)
545 struct blk_integrity nvme_meta_noop = {
546 .name = "NVME_META_NOOP",
547 .generate_fn = nvme_noop_generate,
548 .verify_fn = nvme_noop_verify,
551 static void nvme_init_integrity(struct nvme_ns *ns)
553 struct blk_integrity integrity;
555 switch (ns->pi_type) {
556 case NVME_NS_DPS_PI_TYPE3:
557 integrity = t10_pi_type3_crc;
559 case NVME_NS_DPS_PI_TYPE1:
560 case NVME_NS_DPS_PI_TYPE2:
561 integrity = t10_pi_type1_crc;
564 integrity = nvme_meta_noop;
567 integrity.tuple_size = ns->ms;
568 blk_integrity_register(ns->disk, &integrity);
569 blk_queue_max_integrity_segments(ns->queue, 1);
571 #else /* CONFIG_BLK_DEV_INTEGRITY */
572 static void nvme_dif_remap(struct request *req,
573 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 static void nvme_init_integrity(struct nvme_ns *ns)
587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
588 struct nvme_completion *cqe)
590 struct nvme_iod *iod = ctx;
591 struct request *req = iod_get_private(iod);
592 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
594 u16 status = le16_to_cpup(&cqe->status) >> 1;
596 if (unlikely(status)) {
597 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
598 && (jiffies - req->start_time) < req->timeout) {
601 blk_mq_requeue_request(req);
602 spin_lock_irqsave(req->q->queue_lock, flags);
603 if (!blk_queue_stopped(req->q))
604 blk_mq_kick_requeue_list(req->q);
605 spin_unlock_irqrestore(req->q->queue_lock, flags);
608 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
609 req->sense_len = le32_to_cpup(&cqe->result);
610 req->errors = status;
612 req->errors = nvme_error_status(status);
618 dev_warn(nvmeq->dev->dev,
619 "completing aborted command with status:%04x\n",
623 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
624 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
625 if (blk_integrity_rq(req)) {
626 if (!rq_data_dir(req))
627 nvme_dif_remap(req, nvme_dif_complete);
628 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
629 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
632 nvme_free_iod(nvmeq->dev, iod);
634 blk_mq_complete_request(req);
637 /* length is in bytes. gfp flags indicates whether we may sleep. */
638 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
639 int total_len, gfp_t gfp)
641 struct dma_pool *pool;
642 int length = total_len;
643 struct scatterlist *sg = iod->sg;
644 int dma_len = sg_dma_len(sg);
645 u64 dma_addr = sg_dma_address(sg);
646 u32 page_size = dev->page_size;
647 int offset = dma_addr & (page_size - 1);
649 __le64 **list = iod_list(iod);
653 length -= (page_size - offset);
657 dma_len -= (page_size - offset);
659 dma_addr += (page_size - offset);
662 dma_addr = sg_dma_address(sg);
663 dma_len = sg_dma_len(sg);
666 if (length <= page_size) {
667 iod->first_dma = dma_addr;
671 nprps = DIV_ROUND_UP(length, page_size);
672 if (nprps <= (256 / 8)) {
673 pool = dev->prp_small_pool;
676 pool = dev->prp_page_pool;
680 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
682 iod->first_dma = dma_addr;
684 return (total_len - length) + page_size;
687 iod->first_dma = prp_dma;
690 if (i == page_size >> 3) {
691 __le64 *old_prp_list = prp_list;
692 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
694 return total_len - length;
695 list[iod->npages++] = prp_list;
696 prp_list[0] = old_prp_list[i - 1];
697 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
700 prp_list[i++] = cpu_to_le64(dma_addr);
701 dma_len -= page_size;
702 dma_addr += page_size;
710 dma_addr = sg_dma_address(sg);
711 dma_len = sg_dma_len(sg);
717 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
718 struct nvme_iod *iod)
720 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
722 memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
723 cmnd->rw.command_id = req->tag;
724 if (req->nr_phys_segments) {
725 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
726 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
729 if (++nvmeq->sq_tail == nvmeq->q_depth)
731 writel(nvmeq->sq_tail, nvmeq->q_db);
735 * We reuse the small pool to allocate the 16-byte range here as it is not
736 * worth having a special pool for these or additional cases to handle freeing
739 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
740 struct request *req, struct nvme_iod *iod)
742 struct nvme_dsm_range *range =
743 (struct nvme_dsm_range *)iod_list(iod)[0];
744 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
746 range->cattr = cpu_to_le32(0);
747 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
748 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
750 memset(cmnd, 0, sizeof(*cmnd));
751 cmnd->dsm.opcode = nvme_cmd_dsm;
752 cmnd->dsm.command_id = req->tag;
753 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
754 cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
756 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
758 if (++nvmeq->sq_tail == nvmeq->q_depth)
760 writel(nvmeq->sq_tail, nvmeq->q_db);
763 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
766 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
768 memset(cmnd, 0, sizeof(*cmnd));
769 cmnd->common.opcode = nvme_cmd_flush;
770 cmnd->common.command_id = cmdid;
771 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
773 if (++nvmeq->sq_tail == nvmeq->q_depth)
775 writel(nvmeq->sq_tail, nvmeq->q_db);
778 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
781 struct request *req = iod_get_private(iod);
782 struct nvme_command *cmnd;
786 if (req->cmd_flags & REQ_FUA)
787 control |= NVME_RW_FUA;
788 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
789 control |= NVME_RW_LR;
791 if (req->cmd_flags & REQ_RAHEAD)
792 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
794 cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
795 memset(cmnd, 0, sizeof(*cmnd));
797 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
798 cmnd->rw.command_id = req->tag;
799 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
800 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
801 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
802 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
803 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
805 if (blk_integrity_rq(req)) {
806 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
807 switch (ns->pi_type) {
808 case NVME_NS_DPS_PI_TYPE3:
809 control |= NVME_RW_PRINFO_PRCHK_GUARD;
811 case NVME_NS_DPS_PI_TYPE1:
812 case NVME_NS_DPS_PI_TYPE2:
813 control |= NVME_RW_PRINFO_PRCHK_GUARD |
814 NVME_RW_PRINFO_PRCHK_REF;
815 cmnd->rw.reftag = cpu_to_le32(
816 nvme_block_nr(ns, blk_rq_pos(req)));
820 control |= NVME_RW_PRINFO_PRACT;
822 cmnd->rw.control = cpu_to_le16(control);
823 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
825 if (++nvmeq->sq_tail == nvmeq->q_depth)
827 writel(nvmeq->sq_tail, nvmeq->q_db);
833 * NOTE: ns is NULL when called on the admin queue.
835 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
836 const struct blk_mq_queue_data *bd)
838 struct nvme_ns *ns = hctx->queue->queuedata;
839 struct nvme_queue *nvmeq = hctx->driver_data;
840 struct nvme_dev *dev = nvmeq->dev;
841 struct request *req = bd->rq;
842 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
843 struct nvme_iod *iod;
844 enum dma_data_direction dma_dir;
847 * If formated with metadata, require the block layer provide a buffer
848 * unless this namespace is formated such that the metadata can be
849 * stripped/generated by the controller with PRACT=1.
851 if (ns && ns->ms && !blk_integrity_rq(req)) {
852 if (!(ns->pi_type && ns->ms == 8)) {
853 req->errors = -EFAULT;
854 blk_mq_complete_request(req);
855 return BLK_MQ_RQ_QUEUE_OK;
859 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
861 return BLK_MQ_RQ_QUEUE_BUSY;
863 if (req->cmd_flags & REQ_DISCARD) {
866 * We reuse the small pool to allocate the 16-byte range here
867 * as it is not worth having a special pool for these or
868 * additional cases to handle freeing the iod.
870 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
874 iod_list(iod)[0] = (__le64 *)range;
876 } else if (req->nr_phys_segments) {
877 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
879 sg_init_table(iod->sg, req->nr_phys_segments);
880 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
884 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
887 if (blk_rq_bytes(req) !=
888 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
889 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
892 if (blk_integrity_rq(req)) {
893 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
896 sg_init_table(iod->meta_sg, 1);
897 if (blk_rq_map_integrity_sg(
898 req->q, req->bio, iod->meta_sg) != 1)
901 if (rq_data_dir(req))
902 nvme_dif_remap(req, nvme_dif_prep);
904 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
909 nvme_set_info(cmd, iod, req_completion);
910 spin_lock_irq(&nvmeq->q_lock);
911 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
912 nvme_submit_priv(nvmeq, req, iod);
913 else if (req->cmd_flags & REQ_DISCARD)
914 nvme_submit_discard(nvmeq, ns, req, iod);
915 else if (req->cmd_flags & REQ_FLUSH)
916 nvme_submit_flush(nvmeq, ns, req->tag);
918 nvme_submit_iod(nvmeq, iod, ns);
920 nvme_process_cq(nvmeq);
921 spin_unlock_irq(&nvmeq->q_lock);
922 return BLK_MQ_RQ_QUEUE_OK;
925 nvme_free_iod(dev, iod);
926 return BLK_MQ_RQ_QUEUE_ERROR;
928 nvme_free_iod(dev, iod);
929 return BLK_MQ_RQ_QUEUE_BUSY;
932 static int nvme_process_cq(struct nvme_queue *nvmeq)
936 head = nvmeq->cq_head;
937 phase = nvmeq->cq_phase;
941 nvme_completion_fn fn;
942 struct nvme_completion cqe = nvmeq->cqes[head];
943 if ((le16_to_cpu(cqe.status) & 1) != phase)
945 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
946 if (++head == nvmeq->q_depth) {
950 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
951 fn(nvmeq, ctx, &cqe);
954 /* If the controller ignores the cq head doorbell and continuously
955 * writes to the queue, it is theoretically possible to wrap around
956 * the queue twice and mistakenly return IRQ_NONE. Linux only
957 * requires that 0.1% of your interrupts are handled, so this isn't
960 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
963 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
964 nvmeq->cq_head = head;
965 nvmeq->cq_phase = phase;
971 static irqreturn_t nvme_irq(int irq, void *data)
974 struct nvme_queue *nvmeq = data;
975 spin_lock(&nvmeq->q_lock);
976 nvme_process_cq(nvmeq);
977 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
979 spin_unlock(&nvmeq->q_lock);
983 static irqreturn_t nvme_irq_check(int irq, void *data)
985 struct nvme_queue *nvmeq = data;
986 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
987 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
989 return IRQ_WAKE_THREAD;
993 * Returns 0 on success. If the result is negative, it's a Linux error code;
994 * if the result is positive, it's an NVM Express status code
996 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
997 void *buffer, void __user *ubuffer, unsigned bufflen,
998 u32 *result, unsigned timeout)
1000 bool write = cmd->common.opcode & 1;
1001 struct bio *bio = NULL;
1002 struct request *req;
1005 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1007 return PTR_ERR(req);
1009 req->cmd_type = REQ_TYPE_DRV_PRIV;
1010 req->__data_len = 0;
1011 req->__sector = (sector_t) -1;
1012 req->bio = req->biotail = NULL;
1014 req->timeout = ADMIN_TIMEOUT;
1016 req->cmd = (unsigned char *)cmd;
1017 req->cmd_len = sizeof(struct nvme_command);
1021 if (buffer && bufflen) {
1022 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1025 } else if (ubuffer && bufflen) {
1026 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1032 blk_execute_rq(req->q, NULL, req, 0);
1034 blk_rq_unmap_user(bio);
1036 *result = req->sense_len;
1039 blk_mq_free_request(req);
1043 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1044 void *buffer, unsigned bufflen)
1046 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1049 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1051 struct nvme_queue *nvmeq = dev->queues[0];
1052 struct nvme_command c;
1053 struct nvme_cmd_info *cmd_info;
1054 struct request *req;
1056 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1058 return PTR_ERR(req);
1060 req->cmd_flags |= REQ_NO_TIMEOUT;
1061 cmd_info = blk_mq_rq_to_pdu(req);
1062 nvme_set_info(cmd_info, NULL, async_req_completion);
1064 memset(&c, 0, sizeof(c));
1065 c.common.opcode = nvme_admin_async_event;
1066 c.common.command_id = req->tag;
1068 blk_mq_free_hctx_request(nvmeq->hctx, req);
1069 return __nvme_submit_cmd(nvmeq, &c);
1072 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1073 struct nvme_command *cmd,
1074 struct async_cmd_info *cmdinfo, unsigned timeout)
1076 struct nvme_queue *nvmeq = dev->queues[0];
1077 struct request *req;
1078 struct nvme_cmd_info *cmd_rq;
1080 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1082 return PTR_ERR(req);
1084 req->timeout = timeout;
1085 cmd_rq = blk_mq_rq_to_pdu(req);
1087 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1088 cmdinfo->status = -EINTR;
1090 cmd->common.command_id = req->tag;
1092 return nvme_submit_cmd(nvmeq, cmd);
1095 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1097 struct nvme_command c;
1099 memset(&c, 0, sizeof(c));
1100 c.delete_queue.opcode = opcode;
1101 c.delete_queue.qid = cpu_to_le16(id);
1103 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1106 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1107 struct nvme_queue *nvmeq)
1109 struct nvme_command c;
1110 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1113 * Note: we (ab)use the fact the the prp fields survive if no data
1114 * is attached to the request.
1116 memset(&c, 0, sizeof(c));
1117 c.create_cq.opcode = nvme_admin_create_cq;
1118 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1119 c.create_cq.cqid = cpu_to_le16(qid);
1120 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1121 c.create_cq.cq_flags = cpu_to_le16(flags);
1122 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1124 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1127 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1128 struct nvme_queue *nvmeq)
1130 struct nvme_command c;
1131 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1134 * Note: we (ab)use the fact the the prp fields survive if no data
1135 * is attached to the request.
1137 memset(&c, 0, sizeof(c));
1138 c.create_sq.opcode = nvme_admin_create_sq;
1139 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1140 c.create_sq.sqid = cpu_to_le16(qid);
1141 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1142 c.create_sq.sq_flags = cpu_to_le16(flags);
1143 c.create_sq.cqid = cpu_to_le16(qid);
1145 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1148 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1150 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1153 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1155 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1158 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1160 struct nvme_command c = {
1161 .identify.opcode = nvme_admin_identify,
1162 .identify.cns = cpu_to_le32(1),
1166 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1170 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1171 sizeof(struct nvme_id_ctrl));
1177 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1178 struct nvme_id_ns **id)
1180 struct nvme_command c = {
1181 .identify.opcode = nvme_admin_identify,
1182 .identify.nsid = cpu_to_le32(nsid),
1186 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1190 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1191 sizeof(struct nvme_id_ns));
1197 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1198 dma_addr_t dma_addr, u32 *result)
1200 struct nvme_command c;
1202 memset(&c, 0, sizeof(c));
1203 c.features.opcode = nvme_admin_get_features;
1204 c.features.nsid = cpu_to_le32(nsid);
1205 c.features.prp1 = cpu_to_le64(dma_addr);
1206 c.features.fid = cpu_to_le32(fid);
1208 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1212 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1213 dma_addr_t dma_addr, u32 *result)
1215 struct nvme_command c;
1217 memset(&c, 0, sizeof(c));
1218 c.features.opcode = nvme_admin_set_features;
1219 c.features.prp1 = cpu_to_le64(dma_addr);
1220 c.features.fid = cpu_to_le32(fid);
1221 c.features.dword11 = cpu_to_le32(dword11);
1223 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1227 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1229 struct nvme_command c = {
1230 .common.opcode = nvme_admin_get_log_page,
1231 .common.nsid = cpu_to_le32(0xFFFFFFFF),
1232 .common.cdw10[0] = cpu_to_le32(
1233 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1238 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1242 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1243 sizeof(struct nvme_smart_log));
1250 * nvme_abort_req - Attempt aborting a request
1252 * Schedule controller reset if the command was already aborted once before and
1253 * still hasn't been returned to the driver, or if this is the admin queue.
1255 static void nvme_abort_req(struct request *req)
1257 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1258 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1259 struct nvme_dev *dev = nvmeq->dev;
1260 struct request *abort_req;
1261 struct nvme_cmd_info *abort_cmd;
1262 struct nvme_command cmd;
1264 if (!nvmeq->qid || cmd_rq->aborted) {
1265 unsigned long flags;
1267 spin_lock_irqsave(&dev_list_lock, flags);
1268 if (work_busy(&dev->reset_work))
1270 list_del_init(&dev->node);
1271 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1272 req->tag, nvmeq->qid);
1273 dev->reset_workfn = nvme_reset_failed_dev;
1274 queue_work(nvme_workq, &dev->reset_work);
1276 spin_unlock_irqrestore(&dev_list_lock, flags);
1280 if (!dev->abort_limit)
1283 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1285 if (IS_ERR(abort_req))
1288 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1289 nvme_set_info(abort_cmd, abort_req, abort_completion);
1291 memset(&cmd, 0, sizeof(cmd));
1292 cmd.abort.opcode = nvme_admin_abort_cmd;
1293 cmd.abort.cid = req->tag;
1294 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1295 cmd.abort.command_id = abort_req->tag;
1298 cmd_rq->aborted = 1;
1300 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1302 if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1303 dev_warn(nvmeq->q_dmadev,
1304 "Could not abort I/O %d QID %d",
1305 req->tag, nvmeq->qid);
1306 blk_mq_free_request(abort_req);
1310 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1311 struct request *req, void *data, bool reserved)
1313 struct nvme_queue *nvmeq = data;
1315 nvme_completion_fn fn;
1316 struct nvme_cmd_info *cmd;
1317 struct nvme_completion cqe;
1319 if (!blk_mq_request_started(req))
1322 cmd = blk_mq_rq_to_pdu(req);
1324 if (cmd->ctx == CMD_CTX_CANCELLED)
1327 if (blk_queue_dying(req->q))
1328 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1330 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1333 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1334 req->tag, nvmeq->qid);
1335 ctx = cancel_cmd_info(cmd, &fn);
1336 fn(nvmeq, ctx, &cqe);
1339 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1341 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1342 struct nvme_queue *nvmeq = cmd->nvmeq;
1344 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1346 spin_lock_irq(&nvmeq->q_lock);
1347 nvme_abort_req(req);
1348 spin_unlock_irq(&nvmeq->q_lock);
1351 * The aborted req will be completed on receiving the abort req.
1352 * We enable the timer again. If hit twice, it'll cause a device reset,
1353 * as the device then is in a faulty state.
1355 return BLK_EH_RESET_TIMER;
1358 static void nvme_free_queue(struct nvme_queue *nvmeq)
1360 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1361 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1362 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1363 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1367 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1371 for (i = dev->queue_count - 1; i >= lowest; i--) {
1372 struct nvme_queue *nvmeq = dev->queues[i];
1374 dev->queues[i] = NULL;
1375 nvme_free_queue(nvmeq);
1380 * nvme_suspend_queue - put queue into suspended state
1381 * @nvmeq - queue to suspend
1383 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1387 spin_lock_irq(&nvmeq->q_lock);
1388 if (nvmeq->cq_vector == -1) {
1389 spin_unlock_irq(&nvmeq->q_lock);
1392 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1393 nvmeq->dev->online_queues--;
1394 nvmeq->cq_vector = -1;
1395 spin_unlock_irq(&nvmeq->q_lock);
1397 if (!nvmeq->qid && nvmeq->dev->admin_q)
1398 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1400 irq_set_affinity_hint(vector, NULL);
1401 free_irq(vector, nvmeq);
1406 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1408 struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1410 spin_lock_irq(&nvmeq->q_lock);
1411 if (hctx && hctx->tags)
1412 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1413 spin_unlock_irq(&nvmeq->q_lock);
1416 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1418 struct nvme_queue *nvmeq = dev->queues[qid];
1422 if (nvme_suspend_queue(nvmeq))
1425 /* Don't tell the adapter to delete the admin queue.
1426 * Don't tell a removed adapter to delete IO queues. */
1427 if (qid && readl(&dev->bar->csts) != -1) {
1428 adapter_delete_sq(dev, qid);
1429 adapter_delete_cq(dev, qid);
1432 spin_lock_irq(&nvmeq->q_lock);
1433 nvme_process_cq(nvmeq);
1434 spin_unlock_irq(&nvmeq->q_lock);
1437 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1440 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1444 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1445 &nvmeq->cq_dma_addr, GFP_KERNEL);
1449 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1450 &nvmeq->sq_dma_addr, GFP_KERNEL);
1451 if (!nvmeq->sq_cmds)
1454 nvmeq->q_dmadev = dev->dev;
1456 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1457 dev->instance, qid);
1458 spin_lock_init(&nvmeq->q_lock);
1460 nvmeq->cq_phase = 1;
1461 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1462 nvmeq->q_depth = depth;
1465 dev->queues[qid] = nvmeq;
1470 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1471 nvmeq->cq_dma_addr);
1477 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1480 if (use_threaded_interrupts)
1481 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1482 nvme_irq_check, nvme_irq, IRQF_SHARED,
1484 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1485 IRQF_SHARED, name, nvmeq);
1488 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1490 struct nvme_dev *dev = nvmeq->dev;
1492 spin_lock_irq(&nvmeq->q_lock);
1495 nvmeq->cq_phase = 1;
1496 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1497 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1498 dev->online_queues++;
1499 spin_unlock_irq(&nvmeq->q_lock);
1502 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1504 struct nvme_dev *dev = nvmeq->dev;
1507 nvmeq->cq_vector = qid - 1;
1508 result = adapter_alloc_cq(dev, qid, nvmeq);
1512 result = adapter_alloc_sq(dev, qid, nvmeq);
1516 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1520 nvme_init_queue(nvmeq, qid);
1524 adapter_delete_sq(dev, qid);
1526 adapter_delete_cq(dev, qid);
1530 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1532 unsigned long timeout;
1533 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1535 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1537 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1539 if (fatal_signal_pending(current))
1541 if (time_after(jiffies, timeout)) {
1543 "Device not ready; aborting %s\n", enabled ?
1544 "initialisation" : "reset");
1553 * If the device has been passed off to us in an enabled state, just clear
1554 * the enabled bit. The spec says we should set the 'shutdown notification
1555 * bits', but doing so may cause the device to complete commands to the
1556 * admin queue ... and we don't know what memory that might be pointing at!
1558 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1560 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1561 dev->ctrl_config &= ~NVME_CC_ENABLE;
1562 writel(dev->ctrl_config, &dev->bar->cc);
1564 return nvme_wait_ready(dev, cap, false);
1567 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1569 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1570 dev->ctrl_config |= NVME_CC_ENABLE;
1571 writel(dev->ctrl_config, &dev->bar->cc);
1573 return nvme_wait_ready(dev, cap, true);
1576 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1578 unsigned long timeout;
1580 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1581 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1583 writel(dev->ctrl_config, &dev->bar->cc);
1585 timeout = SHUTDOWN_TIMEOUT + jiffies;
1586 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1587 NVME_CSTS_SHST_CMPLT) {
1589 if (fatal_signal_pending(current))
1591 if (time_after(jiffies, timeout)) {
1593 "Device shutdown incomplete; abort shutdown\n");
1601 static struct blk_mq_ops nvme_mq_admin_ops = {
1602 .queue_rq = nvme_queue_rq,
1603 .map_queue = blk_mq_map_queue,
1604 .init_hctx = nvme_admin_init_hctx,
1605 .exit_hctx = nvme_exit_hctx,
1606 .init_request = nvme_admin_init_request,
1607 .timeout = nvme_timeout,
1610 static struct blk_mq_ops nvme_mq_ops = {
1611 .queue_rq = nvme_queue_rq,
1612 .map_queue = blk_mq_map_queue,
1613 .init_hctx = nvme_init_hctx,
1614 .exit_hctx = nvme_exit_hctx,
1615 .init_request = nvme_init_request,
1616 .timeout = nvme_timeout,
1619 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1621 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1622 blk_cleanup_queue(dev->admin_q);
1623 blk_mq_free_tag_set(&dev->admin_tagset);
1627 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1629 if (!dev->admin_q) {
1630 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1631 dev->admin_tagset.nr_hw_queues = 1;
1632 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1633 dev->admin_tagset.reserved_tags = 1;
1634 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1635 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1636 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1637 dev->admin_tagset.driver_data = dev;
1639 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1642 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1643 if (IS_ERR(dev->admin_q)) {
1644 blk_mq_free_tag_set(&dev->admin_tagset);
1647 if (!blk_get_queue(dev->admin_q)) {
1648 nvme_dev_remove_admin(dev);
1652 blk_mq_unfreeze_queue(dev->admin_q);
1657 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1661 u64 cap = readq(&dev->bar->cap);
1662 struct nvme_queue *nvmeq;
1663 unsigned page_shift = PAGE_SHIFT;
1664 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1665 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1667 if (page_shift < dev_page_min) {
1669 "Minimum device page size (%u) too large for "
1670 "host (%u)\n", 1 << dev_page_min,
1674 if (page_shift > dev_page_max) {
1676 "Device maximum page size (%u) smaller than "
1677 "host (%u); enabling work-around\n",
1678 1 << dev_page_max, 1 << page_shift);
1679 page_shift = dev_page_max;
1682 result = nvme_disable_ctrl(dev, cap);
1686 nvmeq = dev->queues[0];
1688 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1693 aqa = nvmeq->q_depth - 1;
1696 dev->page_size = 1 << page_shift;
1698 dev->ctrl_config = NVME_CC_CSS_NVM;
1699 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1700 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1701 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1703 writel(aqa, &dev->bar->aqa);
1704 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1705 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1707 result = nvme_enable_ctrl(dev, cap);
1711 nvmeq->cq_vector = 0;
1712 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1719 nvme_free_queues(dev, 0);
1723 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1725 struct nvme_dev *dev = ns->dev;
1726 struct nvme_user_io io;
1727 struct nvme_command c;
1728 unsigned length, meta_len;
1730 dma_addr_t meta_dma = 0;
1733 if (copy_from_user(&io, uio, sizeof(io)))
1736 switch (io.opcode) {
1737 case nvme_cmd_write:
1739 case nvme_cmd_compare:
1745 length = (io.nblocks + 1) << ns->lba_shift;
1746 meta_len = (io.nblocks + 1) * ns->ms;
1747 write = io.opcode & 1;
1750 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1758 meta = dma_alloc_coherent(dev->dev, meta_len,
1759 &meta_dma, GFP_KERNEL);
1765 if (copy_from_user(meta, (void __user *)io.metadata,
1773 memset(&c, 0, sizeof(c));
1774 c.rw.opcode = io.opcode;
1775 c.rw.flags = io.flags;
1776 c.rw.nsid = cpu_to_le32(ns->ns_id);
1777 c.rw.slba = cpu_to_le64(io.slba);
1778 c.rw.length = cpu_to_le16(io.nblocks);
1779 c.rw.control = cpu_to_le16(io.control);
1780 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1781 c.rw.reftag = cpu_to_le32(io.reftag);
1782 c.rw.apptag = cpu_to_le16(io.apptag);
1783 c.rw.appmask = cpu_to_le16(io.appmask);
1784 c.rw.metadata = cpu_to_le64(meta_dma);
1786 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1787 (void __user *)io.addr, length, NULL, 0);
1790 if (status == NVME_SC_SUCCESS && !write) {
1791 if (copy_to_user((void __user *)io.metadata, meta,
1795 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1800 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1801 struct nvme_passthru_cmd __user *ucmd)
1803 struct nvme_passthru_cmd cmd;
1804 struct nvme_command c;
1805 unsigned timeout = 0;
1808 if (!capable(CAP_SYS_ADMIN))
1810 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1813 memset(&c, 0, sizeof(c));
1814 c.common.opcode = cmd.opcode;
1815 c.common.flags = cmd.flags;
1816 c.common.nsid = cpu_to_le32(cmd.nsid);
1817 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1818 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1819 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1820 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1821 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1822 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1823 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1824 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1827 timeout = msecs_to_jiffies(cmd.timeout_ms);
1829 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1830 NULL, (void __user *)cmd.addr, cmd.data_len,
1831 &cmd.result, timeout);
1833 if (put_user(cmd.result, &ucmd->result))
1840 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1843 struct nvme_ns *ns = bdev->bd_disk->private_data;
1847 force_successful_syscall_return();
1849 case NVME_IOCTL_ADMIN_CMD:
1850 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1851 case NVME_IOCTL_IO_CMD:
1852 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1853 case NVME_IOCTL_SUBMIT_IO:
1854 return nvme_submit_io(ns, (void __user *)arg);
1855 case SG_GET_VERSION_NUM:
1856 return nvme_sg_get_version_num((void __user *)arg);
1858 return nvme_sg_io(ns, (void __user *)arg);
1864 #ifdef CONFIG_COMPAT
1865 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1866 unsigned int cmd, unsigned long arg)
1870 return -ENOIOCTLCMD;
1872 return nvme_ioctl(bdev, mode, cmd, arg);
1875 #define nvme_compat_ioctl NULL
1878 static int nvme_open(struct block_device *bdev, fmode_t mode)
1883 spin_lock(&dev_list_lock);
1884 ns = bdev->bd_disk->private_data;
1887 else if (!kref_get_unless_zero(&ns->dev->kref))
1889 spin_unlock(&dev_list_lock);
1894 static void nvme_free_dev(struct kref *kref);
1896 static void nvme_release(struct gendisk *disk, fmode_t mode)
1898 struct nvme_ns *ns = disk->private_data;
1899 struct nvme_dev *dev = ns->dev;
1901 kref_put(&dev->kref, nvme_free_dev);
1904 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1906 /* some standard values */
1907 geo->heads = 1 << 6;
1908 geo->sectors = 1 << 5;
1909 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1913 static void nvme_config_discard(struct nvme_ns *ns)
1915 u32 logical_block_size = queue_logical_block_size(ns->queue);
1916 ns->queue->limits.discard_zeroes_data = 0;
1917 ns->queue->limits.discard_alignment = logical_block_size;
1918 ns->queue->limits.discard_granularity = logical_block_size;
1919 ns->queue->limits.max_discard_sectors = 0xffffffff;
1920 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1923 static int nvme_revalidate_disk(struct gendisk *disk)
1925 struct nvme_ns *ns = disk->private_data;
1926 struct nvme_dev *dev = ns->dev;
1927 struct nvme_id_ns *id;
1932 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1933 dev_warn(dev->dev, "%s: Identify failure\n", __func__);
1938 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1939 ns->lba_shift = id->lbaf[lbaf].ds;
1940 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1941 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1944 * If identify namespace failed, use default 512 byte block size so
1945 * block layer can use before failing read/write for 0 capacity.
1947 if (ns->lba_shift == 0)
1949 bs = 1 << ns->lba_shift;
1951 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1952 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1953 id->dps & NVME_NS_DPS_PI_MASK : 0;
1955 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1957 bs != queue_logical_block_size(disk->queue) ||
1958 (ns->ms && ns->ext)))
1959 blk_integrity_unregister(disk);
1961 ns->pi_type = pi_type;
1962 blk_queue_logical_block_size(ns->queue, bs);
1964 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
1966 nvme_init_integrity(ns);
1968 if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
1969 set_capacity(disk, 0);
1971 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1973 if (dev->oncs & NVME_CTRL_ONCS_DSM)
1974 nvme_config_discard(ns);
1980 static const struct block_device_operations nvme_fops = {
1981 .owner = THIS_MODULE,
1982 .ioctl = nvme_ioctl,
1983 .compat_ioctl = nvme_compat_ioctl,
1985 .release = nvme_release,
1986 .getgeo = nvme_getgeo,
1987 .revalidate_disk= nvme_revalidate_disk,
1990 static int nvme_kthread(void *data)
1992 struct nvme_dev *dev, *next;
1994 while (!kthread_should_stop()) {
1995 set_current_state(TASK_INTERRUPTIBLE);
1996 spin_lock(&dev_list_lock);
1997 list_for_each_entry_safe(dev, next, &dev_list, node) {
1999 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2000 if (work_busy(&dev->reset_work))
2002 list_del_init(&dev->node);
2004 "Failed status: %x, reset controller\n",
2005 readl(&dev->bar->csts));
2006 dev->reset_workfn = nvme_reset_failed_dev;
2007 queue_work(nvme_workq, &dev->reset_work);
2010 for (i = 0; i < dev->queue_count; i++) {
2011 struct nvme_queue *nvmeq = dev->queues[i];
2014 spin_lock_irq(&nvmeq->q_lock);
2015 nvme_process_cq(nvmeq);
2017 while ((i == 0) && (dev->event_limit > 0)) {
2018 if (nvme_submit_async_admin_req(dev))
2022 spin_unlock_irq(&nvmeq->q_lock);
2025 spin_unlock(&dev_list_lock);
2026 schedule_timeout(round_jiffies_relative(HZ));
2031 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2034 struct gendisk *disk;
2035 int node = dev_to_node(dev->dev);
2037 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2041 ns->queue = blk_mq_init_queue(&dev->tagset);
2042 if (IS_ERR(ns->queue))
2044 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2045 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2046 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2048 ns->queue->queuedata = ns;
2050 disk = alloc_disk_node(0, node);
2052 goto out_free_queue;
2056 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2057 list_add_tail(&ns->list, &dev->namespaces);
2059 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2060 if (dev->max_hw_sectors)
2061 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2062 if (dev->stripe_size)
2063 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2064 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2065 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2067 disk->major = nvme_major;
2068 disk->first_minor = 0;
2069 disk->fops = &nvme_fops;
2070 disk->private_data = ns;
2071 disk->queue = ns->queue;
2072 disk->driverfs_dev = dev->device;
2073 disk->flags = GENHD_FL_EXT_DEVT;
2074 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2077 * Initialize capacity to 0 until we establish the namespace format and
2078 * setup integrity extentions if necessary. The revalidate_disk after
2079 * add_disk allows the driver to register with integrity if the format
2082 set_capacity(disk, 0);
2083 nvme_revalidate_disk(ns->disk);
2086 revalidate_disk(ns->disk);
2089 blk_cleanup_queue(ns->queue);
2094 static void nvme_create_io_queues(struct nvme_dev *dev)
2098 for (i = dev->queue_count; i <= dev->max_qid; i++)
2099 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2102 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2103 if (nvme_create_queue(dev->queues[i], i))
2107 static int set_queue_count(struct nvme_dev *dev, int count)
2111 u32 q_count = (count - 1) | ((count - 1) << 16);
2113 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2118 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2121 return min(result & 0xffff, result >> 16) + 1;
2124 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2126 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2129 static int nvme_setup_io_queues(struct nvme_dev *dev)
2131 struct nvme_queue *adminq = dev->queues[0];
2132 struct pci_dev *pdev = to_pci_dev(dev->dev);
2133 int result, i, vecs, nr_io_queues, size;
2135 nr_io_queues = num_possible_cpus();
2136 result = set_queue_count(dev, nr_io_queues);
2139 if (result < nr_io_queues)
2140 nr_io_queues = result;
2142 size = db_bar_size(dev, nr_io_queues);
2146 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2149 if (!--nr_io_queues)
2151 size = db_bar_size(dev, nr_io_queues);
2153 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2154 adminq->q_db = dev->dbs;
2157 /* Deregister the admin queue's interrupt */
2158 free_irq(dev->entry[0].vector, adminq);
2161 * If we enable msix early due to not intx, disable it again before
2162 * setting up the full range we need.
2165 pci_disable_msix(pdev);
2167 for (i = 0; i < nr_io_queues; i++)
2168 dev->entry[i].entry = i;
2169 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2171 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2175 for (i = 0; i < vecs; i++)
2176 dev->entry[i].vector = i + pdev->irq;
2181 * Should investigate if there's a performance win from allocating
2182 * more queues than interrupt vectors; it might allow the submission
2183 * path to scale better, even if the receive path is limited by the
2184 * number of interrupts.
2186 nr_io_queues = vecs;
2187 dev->max_qid = nr_io_queues;
2189 result = queue_request_irq(dev, adminq, adminq->irqname);
2193 /* Free previously allocated queues that are no longer usable */
2194 nvme_free_queues(dev, nr_io_queues + 1);
2195 nvme_create_io_queues(dev);
2200 nvme_free_queues(dev, 1);
2205 * Return: error value if an error occurred setting up the queues or calling
2206 * Identify Device. 0 if these succeeded, even if adding some of the
2207 * namespaces failed. At the moment, these failures are silent. TBD which
2208 * failures should be reported.
2210 static int nvme_dev_add(struct nvme_dev *dev)
2212 struct pci_dev *pdev = to_pci_dev(dev->dev);
2215 struct nvme_id_ctrl *ctrl;
2216 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2218 res = nvme_identify_ctrl(dev, &ctrl);
2220 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2224 nn = le32_to_cpup(&ctrl->nn);
2225 dev->oncs = le16_to_cpup(&ctrl->oncs);
2226 dev->abort_limit = ctrl->acl + 1;
2227 dev->vwc = ctrl->vwc;
2228 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2229 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2230 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2232 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2233 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2234 (pdev->device == 0x0953) && ctrl->vs[3]) {
2235 unsigned int max_hw_sectors;
2237 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2238 max_hw_sectors = dev->stripe_size >> (shift - 9);
2239 if (dev->max_hw_sectors) {
2240 dev->max_hw_sectors = min(max_hw_sectors,
2241 dev->max_hw_sectors);
2243 dev->max_hw_sectors = max_hw_sectors;
2247 dev->tagset.ops = &nvme_mq_ops;
2248 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2249 dev->tagset.timeout = NVME_IO_TIMEOUT;
2250 dev->tagset.numa_node = dev_to_node(dev->dev);
2251 dev->tagset.queue_depth =
2252 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2253 dev->tagset.cmd_size = nvme_cmd_size(dev);
2254 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2255 dev->tagset.driver_data = dev;
2257 if (blk_mq_alloc_tag_set(&dev->tagset))
2260 for (i = 1; i <= nn; i++)
2261 nvme_alloc_ns(dev, i);
2266 static int nvme_dev_map(struct nvme_dev *dev)
2269 int bars, result = -ENOMEM;
2270 struct pci_dev *pdev = to_pci_dev(dev->dev);
2272 if (pci_enable_device_mem(pdev))
2275 dev->entry[0].vector = pdev->irq;
2276 pci_set_master(pdev);
2277 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2281 if (pci_request_selected_regions(pdev, bars, "nvme"))
2284 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2285 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2288 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2292 if (readl(&dev->bar->csts) == -1) {
2298 * Some devices don't advertse INTx interrupts, pre-enable a single
2299 * MSIX vec for setup. We'll adjust this later.
2302 result = pci_enable_msix(pdev, dev->entry, 1);
2307 cap = readq(&dev->bar->cap);
2308 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2309 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2310 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2318 pci_release_regions(pdev);
2320 pci_disable_device(pdev);
2324 static void nvme_dev_unmap(struct nvme_dev *dev)
2326 struct pci_dev *pdev = to_pci_dev(dev->dev);
2328 if (pdev->msi_enabled)
2329 pci_disable_msi(pdev);
2330 else if (pdev->msix_enabled)
2331 pci_disable_msix(pdev);
2336 pci_release_regions(pdev);
2339 if (pci_is_enabled(pdev))
2340 pci_disable_device(pdev);
2343 struct nvme_delq_ctx {
2344 struct task_struct *waiter;
2345 struct kthread_worker *worker;
2349 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2351 dq->waiter = current;
2355 set_current_state(TASK_KILLABLE);
2356 if (!atomic_read(&dq->refcount))
2358 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2359 fatal_signal_pending(current)) {
2361 * Disable the controller first since we can't trust it
2362 * at this point, but leave the admin queue enabled
2363 * until all queue deletion requests are flushed.
2364 * FIXME: This may take a while if there are more h/w
2365 * queues than admin tags.
2367 set_current_state(TASK_RUNNING);
2368 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2369 nvme_clear_queue(dev->queues[0]);
2370 flush_kthread_worker(dq->worker);
2371 nvme_disable_queue(dev, 0);
2375 set_current_state(TASK_RUNNING);
2378 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2380 atomic_dec(&dq->refcount);
2382 wake_up_process(dq->waiter);
2385 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2387 atomic_inc(&dq->refcount);
2391 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2393 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2397 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2398 kthread_work_func_t fn)
2400 struct nvme_command c;
2402 memset(&c, 0, sizeof(c));
2403 c.delete_queue.opcode = opcode;
2404 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2406 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2407 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2411 static void nvme_del_cq_work_handler(struct kthread_work *work)
2413 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2415 nvme_del_queue_end(nvmeq);
2418 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2420 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2421 nvme_del_cq_work_handler);
2424 static void nvme_del_sq_work_handler(struct kthread_work *work)
2426 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2428 int status = nvmeq->cmdinfo.status;
2431 status = nvme_delete_cq(nvmeq);
2433 nvme_del_queue_end(nvmeq);
2436 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2438 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2439 nvme_del_sq_work_handler);
2442 static void nvme_del_queue_start(struct kthread_work *work)
2444 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2446 if (nvme_delete_sq(nvmeq))
2447 nvme_del_queue_end(nvmeq);
2450 static void nvme_disable_io_queues(struct nvme_dev *dev)
2453 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2454 struct nvme_delq_ctx dq;
2455 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2456 &worker, "nvme%d", dev->instance);
2458 if (IS_ERR(kworker_task)) {
2460 "Failed to create queue del task\n");
2461 for (i = dev->queue_count - 1; i > 0; i--)
2462 nvme_disable_queue(dev, i);
2467 atomic_set(&dq.refcount, 0);
2468 dq.worker = &worker;
2469 for (i = dev->queue_count - 1; i > 0; i--) {
2470 struct nvme_queue *nvmeq = dev->queues[i];
2472 if (nvme_suspend_queue(nvmeq))
2474 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2475 nvmeq->cmdinfo.worker = dq.worker;
2476 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2477 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2479 nvme_wait_dq(&dq, dev);
2480 kthread_stop(kworker_task);
2484 * Remove the node from the device list and check
2485 * for whether or not we need to stop the nvme_thread.
2487 static void nvme_dev_list_remove(struct nvme_dev *dev)
2489 struct task_struct *tmp = NULL;
2491 spin_lock(&dev_list_lock);
2492 list_del_init(&dev->node);
2493 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2497 spin_unlock(&dev_list_lock);
2503 static void nvme_freeze_queues(struct nvme_dev *dev)
2507 list_for_each_entry(ns, &dev->namespaces, list) {
2508 blk_mq_freeze_queue_start(ns->queue);
2510 spin_lock_irq(ns->queue->queue_lock);
2511 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2512 spin_unlock_irq(ns->queue->queue_lock);
2514 blk_mq_cancel_requeue_work(ns->queue);
2515 blk_mq_stop_hw_queues(ns->queue);
2519 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2523 list_for_each_entry(ns, &dev->namespaces, list) {
2524 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2525 blk_mq_unfreeze_queue(ns->queue);
2526 blk_mq_start_stopped_hw_queues(ns->queue, true);
2527 blk_mq_kick_requeue_list(ns->queue);
2531 static void nvme_dev_shutdown(struct nvme_dev *dev)
2536 nvme_dev_list_remove(dev);
2539 nvme_freeze_queues(dev);
2540 csts = readl(&dev->bar->csts);
2542 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2543 for (i = dev->queue_count - 1; i >= 0; i--) {
2544 struct nvme_queue *nvmeq = dev->queues[i];
2545 nvme_suspend_queue(nvmeq);
2548 nvme_disable_io_queues(dev);
2549 nvme_shutdown_ctrl(dev);
2550 nvme_disable_queue(dev, 0);
2552 nvme_dev_unmap(dev);
2554 for (i = dev->queue_count - 1; i >= 0; i--)
2555 nvme_clear_queue(dev->queues[i]);
2558 static void nvme_dev_remove(struct nvme_dev *dev)
2562 list_for_each_entry(ns, &dev->namespaces, list) {
2563 if (ns->disk->flags & GENHD_FL_UP) {
2564 if (blk_get_integrity(ns->disk))
2565 blk_integrity_unregister(ns->disk);
2566 del_gendisk(ns->disk);
2568 if (!blk_queue_dying(ns->queue)) {
2569 blk_mq_abort_requeue_list(ns->queue);
2570 blk_cleanup_queue(ns->queue);
2575 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2577 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2578 PAGE_SIZE, PAGE_SIZE, 0);
2579 if (!dev->prp_page_pool)
2582 /* Optimisation for I/Os between 4k and 128k */
2583 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2585 if (!dev->prp_small_pool) {
2586 dma_pool_destroy(dev->prp_page_pool);
2592 static void nvme_release_prp_pools(struct nvme_dev *dev)
2594 dma_pool_destroy(dev->prp_page_pool);
2595 dma_pool_destroy(dev->prp_small_pool);
2598 static DEFINE_IDA(nvme_instance_ida);
2600 static int nvme_set_instance(struct nvme_dev *dev)
2602 int instance, error;
2605 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2608 spin_lock(&dev_list_lock);
2609 error = ida_get_new(&nvme_instance_ida, &instance);
2610 spin_unlock(&dev_list_lock);
2611 } while (error == -EAGAIN);
2616 dev->instance = instance;
2620 static void nvme_release_instance(struct nvme_dev *dev)
2622 spin_lock(&dev_list_lock);
2623 ida_remove(&nvme_instance_ida, dev->instance);
2624 spin_unlock(&dev_list_lock);
2627 static void nvme_free_namespaces(struct nvme_dev *dev)
2629 struct nvme_ns *ns, *next;
2631 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2632 list_del(&ns->list);
2634 spin_lock(&dev_list_lock);
2635 ns->disk->private_data = NULL;
2636 spin_unlock(&dev_list_lock);
2643 static void nvme_free_dev(struct kref *kref)
2645 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2647 put_device(dev->dev);
2648 put_device(dev->device);
2649 nvme_free_namespaces(dev);
2650 nvme_release_instance(dev);
2651 blk_mq_free_tag_set(&dev->tagset);
2652 blk_put_queue(dev->admin_q);
2658 static int nvme_dev_open(struct inode *inode, struct file *f)
2660 struct nvme_dev *dev;
2661 int instance = iminor(inode);
2664 spin_lock(&dev_list_lock);
2665 list_for_each_entry(dev, &dev_list, node) {
2666 if (dev->instance == instance) {
2667 if (!dev->admin_q) {
2671 if (!kref_get_unless_zero(&dev->kref))
2673 f->private_data = dev;
2678 spin_unlock(&dev_list_lock);
2683 static int nvme_dev_release(struct inode *inode, struct file *f)
2685 struct nvme_dev *dev = f->private_data;
2686 kref_put(&dev->kref, nvme_free_dev);
2690 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2692 struct nvme_dev *dev = f->private_data;
2696 case NVME_IOCTL_ADMIN_CMD:
2697 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2698 case NVME_IOCTL_IO_CMD:
2699 if (list_empty(&dev->namespaces))
2701 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2702 return nvme_user_cmd(dev, ns, (void __user *)arg);
2708 static const struct file_operations nvme_dev_fops = {
2709 .owner = THIS_MODULE,
2710 .open = nvme_dev_open,
2711 .release = nvme_dev_release,
2712 .unlocked_ioctl = nvme_dev_ioctl,
2713 .compat_ioctl = nvme_dev_ioctl,
2716 static void nvme_set_irq_hints(struct nvme_dev *dev)
2718 struct nvme_queue *nvmeq;
2721 for (i = 0; i < dev->online_queues; i++) {
2722 nvmeq = dev->queues[i];
2727 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2728 nvmeq->hctx->cpumask);
2732 static int nvme_dev_start(struct nvme_dev *dev)
2735 bool start_thread = false;
2737 result = nvme_dev_map(dev);
2741 result = nvme_configure_admin_queue(dev);
2745 spin_lock(&dev_list_lock);
2746 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2747 start_thread = true;
2750 list_add(&dev->node, &dev_list);
2751 spin_unlock(&dev_list_lock);
2754 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2755 wake_up_all(&nvme_kthread_wait);
2757 wait_event_killable(nvme_kthread_wait, nvme_thread);
2759 if (IS_ERR_OR_NULL(nvme_thread)) {
2760 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2764 nvme_init_queue(dev->queues[0], 0);
2765 result = nvme_alloc_admin_tags(dev);
2769 result = nvme_setup_io_queues(dev);
2773 nvme_set_irq_hints(dev);
2775 dev->event_limit = 1;
2779 nvme_dev_remove_admin(dev);
2781 nvme_disable_queue(dev, 0);
2782 nvme_dev_list_remove(dev);
2784 nvme_dev_unmap(dev);
2788 static int nvme_remove_dead_ctrl(void *arg)
2790 struct nvme_dev *dev = (struct nvme_dev *)arg;
2791 struct pci_dev *pdev = to_pci_dev(dev->dev);
2793 if (pci_get_drvdata(pdev))
2794 pci_stop_and_remove_bus_device_locked(pdev);
2795 kref_put(&dev->kref, nvme_free_dev);
2799 static void nvme_remove_disks(struct work_struct *ws)
2801 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2803 nvme_free_queues(dev, 1);
2804 nvme_dev_remove(dev);
2807 static int nvme_dev_resume(struct nvme_dev *dev)
2811 ret = nvme_dev_start(dev);
2814 if (dev->online_queues < 2) {
2815 spin_lock(&dev_list_lock);
2816 dev->reset_workfn = nvme_remove_disks;
2817 queue_work(nvme_workq, &dev->reset_work);
2818 spin_unlock(&dev_list_lock);
2820 nvme_unfreeze_queues(dev);
2821 nvme_set_irq_hints(dev);
2826 static void nvme_dev_reset(struct nvme_dev *dev)
2828 nvme_dev_shutdown(dev);
2829 if (nvme_dev_resume(dev)) {
2830 dev_warn(dev->dev, "Device failed to resume\n");
2831 kref_get(&dev->kref);
2832 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2835 "Failed to start controller remove task\n");
2836 kref_put(&dev->kref, nvme_free_dev);
2841 static void nvme_reset_failed_dev(struct work_struct *ws)
2843 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2844 nvme_dev_reset(dev);
2847 static void nvme_reset_workfn(struct work_struct *work)
2849 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2850 dev->reset_workfn(work);
2853 static void nvme_async_probe(struct work_struct *work);
2854 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2856 int node, result = -ENOMEM;
2857 struct nvme_dev *dev;
2859 node = dev_to_node(&pdev->dev);
2860 if (node == NUMA_NO_NODE)
2861 set_dev_node(&pdev->dev, 0);
2863 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2866 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2870 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2875 INIT_LIST_HEAD(&dev->namespaces);
2876 dev->reset_workfn = nvme_reset_failed_dev;
2877 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2878 dev->dev = get_device(&pdev->dev);
2879 pci_set_drvdata(pdev, dev);
2880 result = nvme_set_instance(dev);
2884 result = nvme_setup_prp_pools(dev);
2888 kref_init(&dev->kref);
2889 dev->device = device_create(nvme_class, &pdev->dev,
2890 MKDEV(nvme_char_major, dev->instance),
2891 dev, "nvme%d", dev->instance);
2892 if (IS_ERR(dev->device)) {
2893 result = PTR_ERR(dev->device);
2896 get_device(dev->device);
2898 INIT_LIST_HEAD(&dev->node);
2899 INIT_WORK(&dev->probe_work, nvme_async_probe);
2900 schedule_work(&dev->probe_work);
2904 nvme_release_prp_pools(dev);
2906 nvme_release_instance(dev);
2908 put_device(dev->dev);
2916 static void nvme_async_probe(struct work_struct *work)
2918 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2921 result = nvme_dev_start(dev);
2925 if (dev->online_queues > 1)
2926 result = nvme_dev_add(dev);
2930 nvme_set_irq_hints(dev);
2933 if (!work_busy(&dev->reset_work)) {
2934 dev->reset_workfn = nvme_reset_failed_dev;
2935 queue_work(nvme_workq, &dev->reset_work);
2939 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2941 struct nvme_dev *dev = pci_get_drvdata(pdev);
2944 nvme_dev_shutdown(dev);
2946 nvme_dev_resume(dev);
2949 static void nvme_shutdown(struct pci_dev *pdev)
2951 struct nvme_dev *dev = pci_get_drvdata(pdev);
2952 nvme_dev_shutdown(dev);
2955 static void nvme_remove(struct pci_dev *pdev)
2957 struct nvme_dev *dev = pci_get_drvdata(pdev);
2959 spin_lock(&dev_list_lock);
2960 list_del_init(&dev->node);
2961 spin_unlock(&dev_list_lock);
2963 pci_set_drvdata(pdev, NULL);
2964 flush_work(&dev->probe_work);
2965 flush_work(&dev->reset_work);
2966 nvme_dev_shutdown(dev);
2967 nvme_dev_remove(dev);
2968 nvme_dev_remove_admin(dev);
2969 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
2970 nvme_free_queues(dev, 0);
2971 nvme_release_prp_pools(dev);
2972 kref_put(&dev->kref, nvme_free_dev);
2975 /* These functions are yet to be implemented */
2976 #define nvme_error_detected NULL
2977 #define nvme_dump_registers NULL
2978 #define nvme_link_reset NULL
2979 #define nvme_slot_reset NULL
2980 #define nvme_error_resume NULL
2982 #ifdef CONFIG_PM_SLEEP
2983 static int nvme_suspend(struct device *dev)
2985 struct pci_dev *pdev = to_pci_dev(dev);
2986 struct nvme_dev *ndev = pci_get_drvdata(pdev);
2988 nvme_dev_shutdown(ndev);
2992 static int nvme_resume(struct device *dev)
2994 struct pci_dev *pdev = to_pci_dev(dev);
2995 struct nvme_dev *ndev = pci_get_drvdata(pdev);
2997 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2998 ndev->reset_workfn = nvme_reset_failed_dev;
2999 queue_work(nvme_workq, &ndev->reset_work);
3005 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3007 static const struct pci_error_handlers nvme_err_handler = {
3008 .error_detected = nvme_error_detected,
3009 .mmio_enabled = nvme_dump_registers,
3010 .link_reset = nvme_link_reset,
3011 .slot_reset = nvme_slot_reset,
3012 .resume = nvme_error_resume,
3013 .reset_notify = nvme_reset_notify,
3016 /* Move to pci_ids.h later */
3017 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3019 static const struct pci_device_id nvme_id_table[] = {
3020 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3023 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3025 static struct pci_driver nvme_driver = {
3027 .id_table = nvme_id_table,
3028 .probe = nvme_probe,
3029 .remove = nvme_remove,
3030 .shutdown = nvme_shutdown,
3032 .pm = &nvme_dev_pm_ops,
3034 .err_handler = &nvme_err_handler,
3037 static int __init nvme_init(void)
3041 init_waitqueue_head(&nvme_kthread_wait);
3043 nvme_workq = create_singlethread_workqueue("nvme");
3047 result = register_blkdev(nvme_major, "nvme");
3050 else if (result > 0)
3051 nvme_major = result;
3053 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3056 goto unregister_blkdev;
3057 else if (result > 0)
3058 nvme_char_major = result;
3060 nvme_class = class_create(THIS_MODULE, "nvme");
3061 if (IS_ERR(nvme_class)) {
3062 result = PTR_ERR(nvme_class);
3063 goto unregister_chrdev;
3066 result = pci_register_driver(&nvme_driver);
3072 class_destroy(nvme_class);
3074 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3076 unregister_blkdev(nvme_major, "nvme");
3078 destroy_workqueue(nvme_workq);
3082 static void __exit nvme_exit(void)
3084 pci_unregister_driver(&nvme_driver);
3085 unregister_blkdev(nvme_major, "nvme");
3086 destroy_workqueue(nvme_workq);
3087 class_destroy(nvme_class);
3088 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3089 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3093 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3094 MODULE_LICENSE("GPL");
3095 MODULE_VERSION("1.0");
3096 module_init(nvme_init);
3097 module_exit(nvme_exit);