drivers/accel/ivpu/ivpu_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2020-2023 Intel Corporation
   4  */
   5
   6 #include <linux/firmware.h>
   7 #include <linux/module.h>
   8 #include <linux/pci.h>
   9
  10 #include <drm/drm_accel.h>
  11 #include <drm/drm_file.h>
  12 #include <drm/drm_gem.h>
  13 #include <drm/drm_ioctl.h>
  14 #include <drm/drm_prime.h>
  15
  16 #include "vpu_boot_api.h"
  17 #include "ivpu_debugfs.h"
  18 #include "ivpu_drv.h"
  19 #include "ivpu_fw.h"
  20 #include "ivpu_gem.h"
  21 #include "ivpu_hw.h"
  22 #include "ivpu_ipc.h"
  23 #include "ivpu_job.h"
  24 #include "ivpu_jsm_msg.h"
  25 #include "ivpu_mmu.h"
  26 #include "ivpu_mmu_context.h"
  27 #include "ivpu_pm.h"
  28
  29 #ifndef DRIVER_VERSION_STR
  30 #define DRIVER_VERSION_STR __stringify(DRM_IVPU_DRIVER_MAJOR) "." \
  31                            __stringify(DRM_IVPU_DRIVER_MINOR) "."
  32 #endif
  33
  34 static struct lock_class_key submitted_jobs_xa_lock_class_key;
  35
  36 int ivpu_dbg_mask;
  37 module_param_named(dbg_mask, ivpu_dbg_mask, int, 0644);
  38 MODULE_PARM_DESC(dbg_mask, "Driver debug mask. See IVPU_DBG_* macros.");
  39
  40 int ivpu_test_mode;
  41 module_param_named_unsafe(test_mode, ivpu_test_mode, int, 0644);
  42 MODULE_PARM_DESC(test_mode, "Test mode: 0 - disabled , 1 - fw unit test, 2 - null hw, 3 - null submission");
  43
  44 u8 ivpu_pll_min_ratio;
  45 module_param_named(pll_min_ratio, ivpu_pll_min_ratio, byte, 0644);
  46 MODULE_PARM_DESC(pll_min_ratio, "Minimum PLL ratio used to set VPU frequency");
  47
  48 u8 ivpu_pll_max_ratio = U8_MAX;
  49 module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
  50 MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set VPU frequency");
  51
  52 bool ivpu_disable_mmu_cont_pages;
  53 module_param_named(disable_mmu_cont_pages, ivpu_disable_mmu_cont_pages, bool, 0644);
  54 MODULE_PARM_DESC(disable_mmu_cont_pages, "Disable MMU contiguous pages optimization");
  55
  56 struct ivpu_file_priv *ivpu_file_priv_get(struct ivpu_file_priv *file_priv)
  57 {
  58         struct ivpu_device *vdev = file_priv->vdev;
  59
  60         kref_get(&file_priv->ref);
  61
  62         ivpu_dbg(vdev, KREF, "file_priv get: ctx %u refcount %u\n",
  63                  file_priv->ctx.id, kref_read(&file_priv->ref));
  64
  65         return file_priv;
  66 }
  67
  68 struct ivpu_file_priv *ivpu_file_priv_get_by_ctx_id(struct ivpu_device *vdev, unsigned long id)
  69 {
  70         struct ivpu_file_priv *file_priv;
  71
  72         xa_lock_irq(&vdev->context_xa);
  73         file_priv = xa_load(&vdev->context_xa, id);
  74         /* file_priv may still be in context_xa during file_priv_release() */
  75         if (file_priv && !kref_get_unless_zero(&file_priv->ref))
  76                 file_priv = NULL;
  77         xa_unlock_irq(&vdev->context_xa);
  78
  79         if (file_priv)
  80                 ivpu_dbg(vdev, KREF, "file_priv get by id: ctx %u refcount %u\n",
  81                          file_priv->ctx.id, kref_read(&file_priv->ref));
  82
  83         return file_priv;
  84 }
  85
  86 static void file_priv_release(struct kref *ref)
  87 {
  88         struct ivpu_file_priv *file_priv = container_of(ref, struct ivpu_file_priv, ref);
  89         struct ivpu_device *vdev = file_priv->vdev;
  90
  91         ivpu_dbg(vdev, FILE, "file_priv release: ctx %u\n", file_priv->ctx.id);
  92
  93         ivpu_cmdq_release_all(file_priv);
  94         ivpu_bo_remove_all_bos_from_context(&file_priv->ctx);
  95         ivpu_jsm_context_release(vdev, file_priv->ctx.id);
  96         ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
  97         drm_WARN_ON(&vdev->drm, xa_erase_irq(&vdev->context_xa, file_priv->ctx.id) != file_priv);
  98         mutex_destroy(&file_priv->lock);
  99         kfree(file_priv);
 100 }
 101
 102 void ivpu_file_priv_put(struct ivpu_file_priv **link)
 103 {
 104         struct ivpu_file_priv *file_priv = *link;
 105         struct ivpu_device *vdev = file_priv->vdev;
 106
 107         drm_WARN_ON(&vdev->drm, !file_priv);
 108
 109         ivpu_dbg(vdev, KREF, "file_priv put: ctx %u refcount %u\n",
 110                  file_priv->ctx.id, kref_read(&file_priv->ref));
 111
 112         *link = NULL;
 113         kref_put(&file_priv->ref, file_priv_release);
 114 }
 115
 116 static int ivpu_get_capabilities(struct ivpu_device *vdev, struct drm_ivpu_param *args)
 117 {
 118         switch (args->index) {
 119         case DRM_IVPU_CAP_METRIC_STREAMER:
 120                 args->value = 0;
 121                 break;
 122         case DRM_IVPU_CAP_DMA_MEMORY_RANGE:
 123                 args->value = 1;
 124                 break;
 125         default:
 126                 return -EINVAL;
 127         }
 128
 129         return 0;
 130 }
 131
 132 static int ivpu_get_core_clock_rate(struct ivpu_device *vdev, u64 *clk_rate)
 133 {
 134         int ret;
 135
 136         ret = ivpu_rpm_get_if_active(vdev);
 137         if (ret < 0)
 138                 return ret;
 139
 140         *clk_rate = ret ? ivpu_hw_reg_pll_freq_get(vdev) : 0;
 141
 142         if (ret)
 143                 ivpu_rpm_put(vdev);
 144
 145         return 0;
 146 }
 147
 148 static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 149 {
 150         struct ivpu_file_priv *file_priv = file->driver_priv;
 151         struct ivpu_device *vdev = file_priv->vdev;
 152         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 153         struct drm_ivpu_param *args = data;
 154         int ret = 0;
 155         int idx;
 156
 157         if (!drm_dev_enter(dev, &idx))
 158                 return -ENODEV;
 159
 160         switch (args->param) {
 161         case DRM_IVPU_PARAM_DEVICE_ID:
 162                 args->value = pdev->device;
 163                 break;
 164         case DRM_IVPU_PARAM_DEVICE_REVISION:
 165                 args->value = pdev->revision;
 166                 break;
 167         case DRM_IVPU_PARAM_PLATFORM_TYPE:
 168                 args->value = vdev->platform;
 169                 break;
 170         case DRM_IVPU_PARAM_CORE_CLOCK_RATE:
 171                 ret = ivpu_get_core_clock_rate(vdev, &args->value);
 172                 break;
 173         case DRM_IVPU_PARAM_NUM_CONTEXTS:
 174                 args->value = ivpu_get_context_count(vdev);
 175                 break;
 176         case DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS:
 177                 args->value = vdev->hw->ranges.user.start;
 178                 break;
 179         case DRM_IVPU_PARAM_CONTEXT_PRIORITY:
 180                 args->value = file_priv->priority;
 181                 break;
 182         case DRM_IVPU_PARAM_CONTEXT_ID:
 183                 args->value = file_priv->ctx.id;
 184                 break;
 185         case DRM_IVPU_PARAM_FW_API_VERSION:
 186                 if (args->index < VPU_FW_API_VER_NUM) {
 187                         struct vpu_firmware_header *fw_hdr;
 188
 189                         fw_hdr = (struct vpu_firmware_header *)vdev->fw->file->data;
 190                         args->value = fw_hdr->api_version[args->index];
 191                 } else {
 192                         ret = -EINVAL;
 193                 }
 194                 break;
 195         case DRM_IVPU_PARAM_ENGINE_HEARTBEAT:
 196                 ret = ivpu_jsm_get_heartbeat(vdev, args->index, &args->value);
 197                 break;
 198         case DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID:
 199                 args->value = (u64)atomic64_inc_return(&vdev->unique_id_counter);
 200                 break;
 201         case DRM_IVPU_PARAM_TILE_CONFIG:
 202                 args->value = vdev->hw->tile_fuse;
 203                 break;
 204         case DRM_IVPU_PARAM_SKU:
 205                 args->value = vdev->hw->sku;
 206                 break;
 207         case DRM_IVPU_PARAM_CAPABILITIES:
 208                 ret = ivpu_get_capabilities(vdev, args);
 209                 break;
 210         default:
 211                 ret = -EINVAL;
 212                 break;
 213         }
 214
 215         drm_dev_exit(idx);
 216         return ret;
 217 }
 218
 219 static int ivpu_set_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 220 {
 221         struct ivpu_file_priv *file_priv = file->driver_priv;
 222         struct drm_ivpu_param *args = data;
 223         int ret = 0;
 224
 225         switch (args->param) {
 226         case DRM_IVPU_PARAM_CONTEXT_PRIORITY:
 227                 if (args->value <= DRM_IVPU_CONTEXT_PRIORITY_REALTIME)
 228                         file_priv->priority = args->value;
 229                 else
 230                         ret = -EINVAL;
 231                 break;
 232         default:
 233                 ret = -EINVAL;
 234         }
 235
 236         return ret;
 237 }
 238
 239 static int ivpu_open(struct drm_device *dev, struct drm_file *file)
 240 {
 241         struct ivpu_device *vdev = to_ivpu_device(dev);
 242         struct ivpu_file_priv *file_priv;
 243         u32 ctx_id;
 244         void *old;
 245         int ret;
 246
 247         ret = xa_alloc_irq(&vdev->context_xa, &ctx_id, NULL, vdev->context_xa_limit, GFP_KERNEL);
 248         if (ret) {
 249                 ivpu_err(vdev, "Failed to allocate context id: %d\n", ret);
 250                 return ret;
 251         }
 252
 253         file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
 254         if (!file_priv) {
 255                 ret = -ENOMEM;
 256                 goto err_xa_erase;
 257         }
 258
 259         file_priv->vdev = vdev;
 260         file_priv->priority = DRM_IVPU_CONTEXT_PRIORITY_NORMAL;
 261         kref_init(&file_priv->ref);
 262         mutex_init(&file_priv->lock);
 263
 264         ret = ivpu_mmu_user_context_init(vdev, &file_priv->ctx, ctx_id);
 265         if (ret)
 266                 goto err_mutex_destroy;
 267
 268         old = xa_store_irq(&vdev->context_xa, ctx_id, file_priv, GFP_KERNEL);
 269         if (xa_is_err(old)) {
 270                 ret = xa_err(old);
 271                 ivpu_err(vdev, "Failed to store context %u: %d\n", ctx_id, ret);
 272                 goto err_ctx_fini;
 273         }
 274
 275         ivpu_dbg(vdev, FILE, "file_priv create: ctx %u process %s pid %d\n",
 276                  ctx_id, current->comm, task_pid_nr(current));
 277
 278         file->driver_priv = file_priv;
 279         return 0;
 280
 281 err_ctx_fini:
 282         ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
 283 err_mutex_destroy:
 284         mutex_destroy(&file_priv->lock);
 285         kfree(file_priv);
 286 err_xa_erase:
 287         xa_erase_irq(&vdev->context_xa, ctx_id);
 288         return ret;
 289 }
 290
 291 static void ivpu_postclose(struct drm_device *dev, struct drm_file *file)
 292 {
 293         struct ivpu_file_priv *file_priv = file->driver_priv;
 294         struct ivpu_device *vdev = to_ivpu_device(dev);
 295
 296         ivpu_dbg(vdev, FILE, "file_priv close: ctx %u process %s pid %d\n",
 297                  file_priv->ctx.id, current->comm, task_pid_nr(current));
 298
 299         ivpu_file_priv_put(&file_priv);
 300 }
 301
 302 static const struct drm_ioctl_desc ivpu_drm_ioctls[] = {
 303         DRM_IOCTL_DEF_DRV(IVPU_GET_PARAM, ivpu_get_param_ioctl, 0),
 304         DRM_IOCTL_DEF_DRV(IVPU_SET_PARAM, ivpu_set_param_ioctl, 0),
 305         DRM_IOCTL_DEF_DRV(IVPU_BO_CREATE, ivpu_bo_create_ioctl, 0),
 306         DRM_IOCTL_DEF_DRV(IVPU_BO_INFO, ivpu_bo_info_ioctl, 0),
 307         DRM_IOCTL_DEF_DRV(IVPU_SUBMIT, ivpu_submit_ioctl, 0),
 308         DRM_IOCTL_DEF_DRV(IVPU_BO_WAIT, ivpu_bo_wait_ioctl, 0),
 309 };
 310
 311 static int ivpu_wait_for_ready(struct ivpu_device *vdev)
 312 {
 313         struct ivpu_ipc_consumer cons;
 314         struct ivpu_ipc_hdr ipc_hdr;
 315         unsigned long timeout;
 316         int ret;
 317
 318         if (ivpu_test_mode == IVPU_TEST_MODE_FW_TEST)
 319                 return 0;
 320
 321         ivpu_ipc_consumer_add(vdev, &cons, IVPU_IPC_CHAN_BOOT_MSG);
 322
 323         timeout = jiffies + msecs_to_jiffies(vdev->timeout.boot);
 324         while (1) {
 325                 ret = ivpu_ipc_irq_handler(vdev);
 326                 if (ret)
 327                         break;
 328                 ret = ivpu_ipc_receive(vdev, &cons, &ipc_hdr, NULL, 0);
 329                 if (ret != -ETIMEDOUT || time_after_eq(jiffies, timeout))
 330                         break;
 331
 332                 cond_resched();
 333         }
 334
 335         ivpu_ipc_consumer_del(vdev, &cons);
 336
 337         if (!ret && ipc_hdr.data_addr != IVPU_IPC_BOOT_MSG_DATA_ADDR) {
 338                 ivpu_err(vdev, "Invalid VPU ready message: 0x%x\n",
 339                          ipc_hdr.data_addr);
 340                 return -EIO;
 341         }
 342
 343         if (!ret)
 344                 ivpu_info(vdev, "VPU ready message received successfully\n");
 345         else
 346                 ivpu_hw_diagnose_failure(vdev);
 347
 348         return ret;
 349 }
 350
 351 /**
 352  * ivpu_boot() - Start VPU firmware
 353  * @vdev: VPU device
 354  *
 355  * This function is paired with ivpu_shutdown() but it doesn't power up the
 356  * VPU because power up has to be called very early in ivpu_probe().
 357  */
 358 int ivpu_boot(struct ivpu_device *vdev)
 359 {
 360         int ret;
 361
 362         /* Update boot params located at first 4KB of FW memory */
 363         ivpu_fw_boot_params_setup(vdev, vdev->fw->mem->kvaddr);
 364
 365         ret = ivpu_hw_boot_fw(vdev);
 366         if (ret) {
 367                 ivpu_err(vdev, "Failed to start the firmware: %d\n", ret);
 368                 return ret;
 369         }
 370
 371         ret = ivpu_wait_for_ready(vdev);
 372         if (ret) {
 373                 ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret);
 374                 return ret;
 375         }
 376
 377         ivpu_hw_irq_clear(vdev);
 378         enable_irq(vdev->irq);
 379         ivpu_hw_irq_enable(vdev);
 380         ivpu_ipc_enable(vdev);
 381         return 0;
 382 }
 383
 384 int ivpu_shutdown(struct ivpu_device *vdev)
 385 {
 386         int ret;
 387
 388         ivpu_hw_irq_disable(vdev);
 389         disable_irq(vdev->irq);
 390         ivpu_ipc_disable(vdev);
 391         ivpu_mmu_disable(vdev);
 392
 393         ret = ivpu_hw_power_down(vdev);
 394         if (ret)
 395                 ivpu_warn(vdev, "Failed to power down HW: %d\n", ret);
 396
 397         return ret;
 398 }
 399
 400 static const struct file_operations ivpu_fops = {
 401         .owner          = THIS_MODULE,
 402         DRM_ACCEL_FOPS,
 403 };
 404
 405 static const struct drm_driver driver = {
 406         .driver_features = DRIVER_GEM | DRIVER_COMPUTE_ACCEL,
 407
 408         .open = ivpu_open,
 409         .postclose = ivpu_postclose,
 410         .gem_prime_import = ivpu_gem_prime_import,
 411
 412         .ioctls = ivpu_drm_ioctls,
 413         .num_ioctls = ARRAY_SIZE(ivpu_drm_ioctls),
 414         .fops = &ivpu_fops,
 415
 416         .name = DRIVER_NAME,
 417         .desc = DRIVER_DESC,
 418         .date = DRIVER_DATE,
 419         .major = DRM_IVPU_DRIVER_MAJOR,
 420         .minor = DRM_IVPU_DRIVER_MINOR,
 421 };
 422
 423 static int ivpu_irq_init(struct ivpu_device *vdev)
 424 {
 425         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 426         int ret;
 427
 428         ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_MSIX);
 429         if (ret < 0) {
 430                 ivpu_err(vdev, "Failed to allocate a MSI IRQ: %d\n", ret);
 431                 return ret;
 432         }
 433
 434         vdev->irq = pci_irq_vector(pdev, 0);
 435
 436         ret = devm_request_irq(vdev->drm.dev, vdev->irq, vdev->hw->ops->irq_handler,
 437                                IRQF_NO_AUTOEN, DRIVER_NAME, vdev);
 438         if (ret)
 439                 ivpu_err(vdev, "Failed to request an IRQ %d\n", ret);
 440
 441         return ret;
 442 }
 443
 444 static int ivpu_pci_init(struct ivpu_device *vdev)
 445 {
 446         struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
 447         struct resource *bar0 = &pdev->resource[0];
 448         struct resource *bar4 = &pdev->resource[4];
 449         int ret;
 450
 451         ivpu_dbg(vdev, MISC, "Mapping BAR0 (RegV) %pR\n", bar0);
 452         vdev->regv = devm_ioremap_resource(vdev->drm.dev, bar0);
 453         if (IS_ERR(vdev->regv)) {
 454                 ivpu_err(vdev, "Failed to map bar 0: %pe\n", vdev->regv);
 455                 return PTR_ERR(vdev->regv);
 456         }
 457
 458         ivpu_dbg(vdev, MISC, "Mapping BAR4 (RegB) %pR\n", bar4);
 459         vdev->regb = devm_ioremap_resource(vdev->drm.dev, bar4);
 460         if (IS_ERR(vdev->regb)) {
 461                 ivpu_err(vdev, "Failed to map bar 4: %pe\n", vdev->regb);
 462                 return PTR_ERR(vdev->regb);
 463         }
 464
 465         ret = dma_set_mask_and_coherent(vdev->drm.dev, DMA_BIT_MASK(vdev->hw->dma_bits));
 466         if (ret) {
 467                 ivpu_err(vdev, "Failed to set DMA mask: %d\n", ret);
 468                 return ret;
 469         }
 470         dma_set_max_seg_size(vdev->drm.dev, UINT_MAX);
 471
 472         /* Clear any pending errors */
 473         pcie_capability_clear_word(pdev, PCI_EXP_DEVSTA, 0x3f);
 474
 475         /* VPU 37XX does not require 10m D3hot delay */
 476         if (ivpu_hw_gen(vdev) == IVPU_HW_37XX)
 477                 pdev->d3hot_delay = 0;
 478
 479         ret = pcim_enable_device(pdev);
 480         if (ret) {
 481                 ivpu_err(vdev, "Failed to enable PCI device: %d\n", ret);
 482                 return ret;
 483         }
 484
 485         pci_set_master(pdev);
 486
 487         return 0;
 488 }
 489
 490 static int ivpu_dev_init(struct ivpu_device *vdev)
 491 {
 492         int ret;
 493
 494         vdev->hw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->hw), GFP_KERNEL);
 495         if (!vdev->hw)
 496                 return -ENOMEM;
 497
 498         vdev->mmu = drmm_kzalloc(&vdev->drm, sizeof(*vdev->mmu), GFP_KERNEL);
 499         if (!vdev->mmu)
 500                 return -ENOMEM;
 501
 502         vdev->fw = drmm_kzalloc(&vdev->drm, sizeof(*vdev->fw), GFP_KERNEL);
 503         if (!vdev->fw)
 504                 return -ENOMEM;
 505
 506         vdev->ipc = drmm_kzalloc(&vdev->drm, sizeof(*vdev->ipc), GFP_KERNEL);
 507         if (!vdev->ipc)
 508                 return -ENOMEM;
 509
 510         vdev->pm = drmm_kzalloc(&vdev->drm, sizeof(*vdev->pm), GFP_KERNEL);
 511         if (!vdev->pm)
 512                 return -ENOMEM;
 513
 514         if (ivpu_hw_gen(vdev) >= IVPU_HW_40XX) {
 515                 vdev->hw->ops = &ivpu_hw_40xx_ops;
 516                 vdev->hw->dma_bits = 48;
 517         } else {
 518                 vdev->hw->ops = &ivpu_hw_37xx_ops;
 519                 vdev->hw->dma_bits = 38;
 520         }
 521
 522         vdev->platform = IVPU_PLATFORM_INVALID;
 523         vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;
 524         vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;
 525         atomic64_set(&vdev->unique_id_counter, 0);
 526         xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC);
 527         xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1);
 528         lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key);
 529
 530         ret = ivpu_pci_init(vdev);
 531         if (ret)
 532                 goto err_xa_destroy;
 533
 534         ret = ivpu_irq_init(vdev);
 535         if (ret)
 536                 goto err_xa_destroy;
 537
 538         /* Init basic HW info based on buttress registers which are accessible before power up */
 539         ret = ivpu_hw_info_init(vdev);
 540         if (ret)
 541                 goto err_xa_destroy;
 542
 543         /* Power up early so the rest of init code can access VPU registers */
 544         ret = ivpu_hw_power_up(vdev);
 545         if (ret)
 546                 goto err_xa_destroy;
 547
 548         ret = ivpu_mmu_global_context_init(vdev);
 549         if (ret)
 550                 goto err_power_down;
 551
 552         ret = ivpu_mmu_init(vdev);
 553         if (ret)
 554                 goto err_mmu_gctx_fini;
 555
 556         ret = ivpu_mmu_reserved_context_init(vdev);
 557         if (ret)
 558                 goto err_mmu_gctx_fini;
 559
 560         ret = ivpu_fw_init(vdev);
 561         if (ret)
 562                 goto err_mmu_rctx_fini;
 563
 564         ret = ivpu_ipc_init(vdev);
 565         if (ret)
 566                 goto err_fw_fini;
 567
 568         ivpu_pm_init(vdev);
 569
 570         ret = ivpu_job_done_thread_init(vdev);
 571         if (ret)
 572                 goto err_ipc_fini;
 573
 574         ret = ivpu_boot(vdev);
 575         if (ret)
 576                 goto err_job_done_thread_fini;
 577
 578         ivpu_pm_enable(vdev);
 579
 580         return 0;
 581
 582 err_job_done_thread_fini:
 583         ivpu_job_done_thread_fini(vdev);
 584 err_ipc_fini:
 585         ivpu_ipc_fini(vdev);
 586 err_fw_fini:
 587         ivpu_fw_fini(vdev);
 588 err_mmu_rctx_fini:
 589         ivpu_mmu_reserved_context_fini(vdev);
 590 err_mmu_gctx_fini:
 591         ivpu_mmu_global_context_fini(vdev);
 592 err_power_down:
 593         ivpu_hw_power_down(vdev);
 594         if (IVPU_WA(d3hot_after_power_off))
 595                 pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
 596 err_xa_destroy:
 597         xa_destroy(&vdev->submitted_jobs_xa);
 598         xa_destroy(&vdev->context_xa);
 599         return ret;
 600 }
 601
 602 static void ivpu_dev_fini(struct ivpu_device *vdev)
 603 {
 604         ivpu_pm_disable(vdev);
 605         ivpu_shutdown(vdev);
 606         if (IVPU_WA(d3hot_after_power_off))
 607                 pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
 608         ivpu_job_done_thread_fini(vdev);
 609         ivpu_pm_cancel_recovery(vdev);
 610
 611         ivpu_ipc_fini(vdev);
 612         ivpu_fw_fini(vdev);
 613         ivpu_mmu_reserved_context_fini(vdev);
 614         ivpu_mmu_global_context_fini(vdev);
 615
 616         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->submitted_jobs_xa));
 617         xa_destroy(&vdev->submitted_jobs_xa);
 618         drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->context_xa));
 619         xa_destroy(&vdev->context_xa);
 620 }
 621
 622 static struct pci_device_id ivpu_pci_ids[] = {
 623         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_MTL) },
 624         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
 625         { }
 626 };
 627 MODULE_DEVICE_TABLE(pci, ivpu_pci_ids);
 628
 629 static int ivpu_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 630 {
 631         struct ivpu_device *vdev;
 632         int ret;
 633
 634         vdev = devm_drm_dev_alloc(&pdev->dev, &driver, struct ivpu_device, drm);
 635         if (IS_ERR(vdev))
 636                 return PTR_ERR(vdev);
 637
 638         pci_set_drvdata(pdev, vdev);
 639
 640         ret = ivpu_dev_init(vdev);
 641         if (ret)
 642                 return ret;
 643
 644         ivpu_debugfs_init(vdev);
 645
 646         ret = drm_dev_register(&vdev->drm, 0);
 647         if (ret) {
 648                 dev_err(&pdev->dev, "Failed to register DRM device: %d\n", ret);
 649                 ivpu_dev_fini(vdev);
 650         }
 651
 652         return ret;
 653 }
 654
 655 static void ivpu_remove(struct pci_dev *pdev)
 656 {
 657         struct ivpu_device *vdev = pci_get_drvdata(pdev);
 658
 659         drm_dev_unplug(&vdev->drm);
 660         ivpu_dev_fini(vdev);
 661 }
 662
 663 static const struct dev_pm_ops ivpu_drv_pci_pm = {
 664         SET_SYSTEM_SLEEP_PM_OPS(ivpu_pm_suspend_cb, ivpu_pm_resume_cb)
 665         SET_RUNTIME_PM_OPS(ivpu_pm_runtime_suspend_cb, ivpu_pm_runtime_resume_cb, NULL)
 666 };
 667
 668 static const struct pci_error_handlers ivpu_drv_pci_err = {
 669         .reset_prepare = ivpu_pm_reset_prepare_cb,
 670         .reset_done = ivpu_pm_reset_done_cb,
 671 };
 672
 673 static struct pci_driver ivpu_pci_driver = {
 674         .name = KBUILD_MODNAME,
 675         .id_table = ivpu_pci_ids,
 676         .probe = ivpu_probe,
 677         .remove = ivpu_remove,
 678         .driver = {
 679                 .pm = &ivpu_drv_pci_pm,
 680         },
 681         .err_handler = &ivpu_drv_pci_err,
 682 };
 683
 684 module_pci_driver(ivpu_pci_driver);
 685
 686 MODULE_AUTHOR("Intel Corporation");
 687 MODULE_DESCRIPTION(DRIVER_DESC);
 688 MODULE_LICENSE("GPL and additional rights");
 689 MODULE_VERSION(DRIVER_VERSION_STR);